diff options
Diffstat (limited to 'drivers/video')
39 files changed, 2901 insertions, 1236 deletions
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 6bafb51bb43..e6a8d8c0101 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig @@ -322,69 +322,6 @@ config FB_ARMCLCD here and read <file:Documentation/kbuild/modules.txt>. The module will be called amba-clcd. -choice - - depends on FB_ARMCLCD && (ARCH_LH7A40X || ARCH_LH7952X) - prompt "LCD Panel" - default FB_ARMCLCD_SHARP_LQ035Q7DB02 - -config FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT - bool "LogicPD LCD 3.5\" QVGA w/HRTFT IC" - help - This is an implementation of the Sharp LQ035Q7DB02, a 3.5" - color QVGA, HRTFT panel. The LogicPD device includes - an integrated HRTFT controller IC. - The native resolution is 240x320. - -config FB_ARMCLCD_SHARP_LQ057Q3DC02 - bool "LogicPD LCD 5.7\" QVGA" - help - This is an implementation of the Sharp LQ057Q3DC02, a 5.7" - color QVGA, TFT panel. The LogicPD device includes an - The native resolution is 320x240. - -config FB_ARMCLCD_SHARP_LQ64D343 - bool "LogicPD LCD 6.4\" VGA" - help - This is an implementation of the Sharp LQ64D343, a 6.4" - color VGA, TFT panel. The LogicPD device includes an - The native resolution is 640x480. - -config FB_ARMCLCD_SHARP_LQ10D368 - bool "LogicPD LCD 10.4\" VGA" - help - This is an implementation of the Sharp LQ10D368, a 10.4" - color VGA, TFT panel. The LogicPD device includes an - The native resolution is 640x480. - - -config FB_ARMCLCD_SHARP_LQ121S1DG41 - bool "LogicPD LCD 12.1\" SVGA" - help - This is an implementation of the Sharp LQ121S1DG41, a 12.1" - color SVGA, TFT panel. The LogicPD device includes an - The native resolution is 800x600. - - This panel requires a clock rate may be an integer fraction - of the base LCDCLK frequency. The driver will select the - highest frequency available that is lower than the maximum - allowed. The panel may flicker if the clock rate is - slower than the recommended minimum. - -config FB_ARMCLCD_AUO_A070VW01_WIDE - bool "AU Optronics A070VW01 LCD 7.0\" WIDE" - help - This is an implementation of the AU Optronics, a 7.0" - WIDE Color. The native resolution is 234x480. - -config FB_ARMCLCD_HITACHI - bool "Hitachi Wide Screen 800x480" - help - This is an implementation of the Hitachi 800x480. - -endchoice - - config FB_ACORN bool "Acorn VIDC support" depends on (FB = y) && ARM && ARCH_ACORN @@ -439,6 +376,24 @@ config FB_CYBER2000 Say Y if you have a NetWinder or a graphics card containing this device, otherwise say N. +config FB_CYBER2000_DDC + bool "DDC for CyberPro support" + depends on FB_CYBER2000 + select FB_DDC + default y + help + Say Y here if you want DDC support for your CyberPro graphics + card. This is only I2C bus support, driver does not use EDID. + +config FB_CYBER2000_I2C + bool "CyberPro 2000/2010/5000 I2C support" + depends on FB_CYBER2000 && I2C && ARCH_NETWINDER + select I2C_ALGOBIT + help + Enable support for the I2C video decoder interface on the + Integraphics CyberPro 20x0 and 5000 VGA chips. This is used + on the Netwinder machines for the SAA7111 video capture. + config FB_APOLLO bool depends on (FB = y) && APOLLO @@ -2005,6 +1960,7 @@ config FB_SH_MOBILE_LCDC select FB_SYS_IMAGEBLIT select FB_SYS_FOPS select FB_DEFERRED_IO + select FB_BACKLIGHT select SH_MIPI_DSI if SH_LCD_MIPI_DSI ---help--- Frame buffer driver for the on-chip SH-Mobile LCD controller. @@ -2365,6 +2321,26 @@ config FB_JZ4740 help Framebuffer support for the JZ4740 SoC. +config FB_MXS + tristate "MXS LCD framebuffer support" + depends on FB && ARCH_MXS + select FB_CFB_FILLRECT + select FB_CFB_COPYAREA + select FB_CFB_IMAGEBLIT + help + Framebuffer support for the MXS SoC. + +config FB_PUV3_UNIGFX + tristate "PKUnity v3 Unigfx framebuffer support" + depends on FB && UNICORE32 && ARCH_PUV3 + select FB_SYS_FILLRECT + select FB_SYS_COPYAREA + select FB_SYS_IMAGEBLIT + select FB_SYS_FOPS + help + Choose this option if you want to use the Unigfx device as a + framebuffer device. Without the support of PCI & AGP. + source "drivers/video/omap/Kconfig" source "drivers/video/omap2/Kconfig" diff --git a/drivers/video/Makefile b/drivers/video/Makefile index 8c8fabdff9d..2ea44b6625f 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -139,6 +139,7 @@ obj-$(CONFIG_FB_MB862XX) += mb862xx/ obj-$(CONFIG_FB_MSM) += msm/ obj-$(CONFIG_FB_NUC900) += nuc900fb.o obj-$(CONFIG_FB_JZ4740) += jz4740_fb.o +obj-$(CONFIG_FB_PUV3_UNIGFX) += fb-puv3.o # Platform or fallback drivers go here obj-$(CONFIG_FB_UVESA) += uvesafb.o @@ -153,6 +154,7 @@ obj-$(CONFIG_FB_BFIN_T350MCQB) += bfin-t350mcqb-fb.o obj-$(CONFIG_FB_BFIN_7393) += bfin_adv7393fb.o obj-$(CONFIG_FB_MX3) += mx3fb.o obj-$(CONFIG_FB_DA8XX) += da8xx-fb.o +obj-$(CONFIG_FB_MXS) += mxsfb.o # the test framebuffer is last obj-$(CONFIG_FB_VIRTUAL) += vfb.o diff --git a/drivers/video/amba-clcd.c b/drivers/video/amba-clcd.c index 1c2c68356ea..013c8ce5720 100644 --- a/drivers/video/amba-clcd.c +++ b/drivers/video/amba-clcd.c @@ -461,7 +461,7 @@ static int clcdfb_register(struct clcd_fb *fb) return ret; } -static int clcdfb_probe(struct amba_device *dev, struct amba_id *id) +static int clcdfb_probe(struct amba_device *dev, const struct amba_id *id) { struct clcd_board *board = dev->dev.platform_data; struct clcd_fb *fb; diff --git a/drivers/video/bw2.c b/drivers/video/bw2.c index 4dc13467281..7ba74cd4be6 100644 --- a/drivers/video/bw2.c +++ b/drivers/video/bw2.c @@ -273,7 +273,7 @@ static int __devinit bw2_do_default_mode(struct bw2_par *par, return 0; } -static int __devinit bw2_probe(struct platform_device *op, const struct of_device_id *match) +static int __devinit bw2_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct fb_info *info; @@ -375,7 +375,7 @@ static const struct of_device_id bw2_match[] = { }; MODULE_DEVICE_TABLE(of, bw2_match); -static struct of_platform_driver bw2_driver = { +static struct platform_driver bw2_driver = { .driver = { .name = "bw2", .owner = THIS_MODULE, @@ -390,12 +390,12 @@ static int __init bw2_init(void) if (fb_get_options("bw2fb", NULL)) return -ENODEV; - return of_register_platform_driver(&bw2_driver); + return platform_driver_register(&bw2_driver); } static void __exit bw2_exit(void) { - of_unregister_platform_driver(&bw2_driver); + platform_driver_unregister(&bw2_driver); } module_init(bw2_init); diff --git a/drivers/video/cg14.c b/drivers/video/cg14.c index 24249535ac8..e2c85b0db63 100644 --- a/drivers/video/cg14.c +++ b/drivers/video/cg14.c @@ -463,7 +463,7 @@ static void cg14_unmap_regs(struct platform_device *op, struct fb_info *info, info->screen_base, info->fix.smem_len); } -static int __devinit cg14_probe(struct platform_device *op, const struct of_device_id *match) +static int __devinit cg14_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct fb_info *info; @@ -595,7 +595,7 @@ static const struct of_device_id cg14_match[] = { }; MODULE_DEVICE_TABLE(of, cg14_match); -static struct of_platform_driver cg14_driver = { +static struct platform_driver cg14_driver = { .driver = { .name = "cg14", .owner = THIS_MODULE, @@ -610,12 +610,12 @@ static int __init cg14_init(void) if (fb_get_options("cg14fb", NULL)) return -ENODEV; - return of_register_platform_driver(&cg14_driver); + return platform_driver_register(&cg14_driver); } static void __exit cg14_exit(void) { - of_unregister_platform_driver(&cg14_driver); + platform_driver_unregister(&cg14_driver); } module_init(cg14_init); diff --git a/drivers/video/cg3.c b/drivers/video/cg3.c index 09c0c3c4248..f927a7b1a8d 100644 --- a/drivers/video/cg3.c +++ b/drivers/video/cg3.c @@ -346,8 +346,7 @@ static int __devinit cg3_do_default_mode(struct cg3_par *par) return 0; } -static int __devinit cg3_probe(struct platform_device *op, - const struct of_device_id *match) +static int __devinit cg3_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct fb_info *info; @@ -462,7 +461,7 @@ static const struct of_device_id cg3_match[] = { }; MODULE_DEVICE_TABLE(of, cg3_match); -static struct of_platform_driver cg3_driver = { +static struct platform_driver cg3_driver = { .driver = { .name = "cg3", .owner = THIS_MODULE, @@ -477,12 +476,12 @@ static int __init cg3_init(void) if (fb_get_options("cg3fb", NULL)) return -ENODEV; - return of_register_platform_driver(&cg3_driver); + return platform_driver_register(&cg3_driver); } static void __exit cg3_exit(void) { - of_unregister_platform_driver(&cg3_driver); + platform_driver_unregister(&cg3_driver); } module_init(cg3_init); diff --git a/drivers/video/cg6.c b/drivers/video/cg6.c index 2b5a97058b0..4ffad90bde4 100644 --- a/drivers/video/cg6.c +++ b/drivers/video/cg6.c @@ -737,8 +737,7 @@ static void cg6_unmap_regs(struct platform_device *op, struct fb_info *info, info->fix.smem_len); } -static int __devinit cg6_probe(struct platform_device *op, - const struct of_device_id *match) +static int __devinit cg6_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct fb_info *info; @@ -855,7 +854,7 @@ static const struct of_device_id cg6_match[] = { }; MODULE_DEVICE_TABLE(of, cg6_match); -static struct of_platform_driver cg6_driver = { +static struct platform_driver cg6_driver = { .driver = { .name = "cg6", .owner = THIS_MODULE, @@ -870,12 +869,12 @@ static int __init cg6_init(void) if (fb_get_options("cg6fb", NULL)) return -ENODEV; - return of_register_platform_driver(&cg6_driver); + return platform_driver_register(&cg6_driver); } static void __exit cg6_exit(void) { - of_unregister_platform_driver(&cg6_driver); + platform_driver_unregister(&cg6_driver); } module_init(cg6_init); diff --git a/drivers/video/cyber2000fb.c b/drivers/video/cyber2000fb.c index 0c1afd13ddd..850380795b0 100644 --- a/drivers/video/cyber2000fb.c +++ b/drivers/video/cyber2000fb.c @@ -47,6 +47,8 @@ #include <linux/pci.h> #include <linux/init.h> #include <linux/io.h> +#include <linux/i2c.h> +#include <linux/i2c-algo-bit.h> #include <asm/pgtable.h> #include <asm/system.h> @@ -61,10 +63,10 @@ struct cfb_info { struct fb_info fb; struct display_switch *dispsw; struct display *display; - struct pci_dev *dev; unsigned char __iomem *region; unsigned char __iomem *regs; u_int id; + u_int irq; int func_use_count; u_long ref_ps; @@ -88,6 +90,19 @@ struct cfb_info { u_char ramdac_powerdown; u32 pseudo_palette[16]; + + spinlock_t reg_b0_lock; + +#ifdef CONFIG_FB_CYBER2000_DDC + bool ddc_registered; + struct i2c_adapter ddc_adapter; + struct i2c_algo_bit_data ddc_algo; +#endif + +#ifdef CONFIG_FB_CYBER2000_I2C + struct i2c_adapter i2c_adapter; + struct i2c_algo_bit_data i2c_algo; +#endif }; static char *default_font = "Acorn8x8"; @@ -494,6 +509,7 @@ static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw) cyber2000_attrw(0x14, 0x00, cfb); /* PLL registers */ + spin_lock(&cfb->reg_b0_lock); cyber2000_grphw(EXT_DCLK_MULT, hw->clock_mult, cfb); cyber2000_grphw(EXT_DCLK_DIV, hw->clock_div, cfb); cyber2000_grphw(EXT_MCLK_MULT, cfb->mclk_mult, cfb); @@ -501,6 +517,7 @@ static void cyber2000fb_set_timing(struct cfb_info *cfb, struct par_info *hw) cyber2000_grphw(0x90, 0x01, cfb); cyber2000_grphw(0xb9, 0x80, cfb); cyber2000_grphw(0xb9, 0x00, cfb); + spin_unlock(&cfb->reg_b0_lock); cfb->ramdac_ctrl = hw->ramdac; cyber2000fb_write_ramdac_ctrl(cfb); @@ -681,9 +698,9 @@ cyber2000fb_decode_clock(struct par_info *hw, struct cfb_info *cfb, * pll_ps_calc = best_div1 / (ref_ps * best_mult) */ best_diff = 0x7fffffff; - best_mult = 32; - best_div1 = 255; - for (t_div1 = 32; t_div1 > 1; t_div1 -= 1) { + best_mult = 2; + best_div1 = 32; + for (t_div1 = 2; t_div1 < 32; t_div1 += 1) { u_int rr, t_mult, t_pll_ps; int diff; @@ -1105,24 +1122,22 @@ void cyber2000fb_disable_extregs(struct cfb_info *cfb) } EXPORT_SYMBOL(cyber2000fb_disable_extregs); -void cyber2000fb_get_fb_var(struct cfb_info *cfb, struct fb_var_screeninfo *var) -{ - memcpy(var, &cfb->fb.var, sizeof(struct fb_var_screeninfo)); -} -EXPORT_SYMBOL(cyber2000fb_get_fb_var); - /* * Attach a capture/tv driver to the core CyberX0X0 driver. */ int cyber2000fb_attach(struct cyberpro_info *info, int idx) { if (int_cfb_info != NULL) { - info->dev = int_cfb_info->dev; + info->dev = int_cfb_info->fb.device; +#ifdef CONFIG_FB_CYBER2000_I2C + info->i2c = &int_cfb_info->i2c_adapter; +#else + info->i2c = NULL; +#endif info->regs = int_cfb_info->regs; + info->irq = int_cfb_info->irq; info->fb = int_cfb_info->fb.screen_base; info->fb_size = int_cfb_info->fb.fix.smem_len; - info->enable_extregs = cyber2000fb_enable_extregs; - info->disable_extregs = cyber2000fb_disable_extregs; info->info = int_cfb_info; strlcpy(info->dev_name, int_cfb_info->fb.fix.id, @@ -1141,6 +1156,183 @@ void cyber2000fb_detach(int idx) } EXPORT_SYMBOL(cyber2000fb_detach); +#ifdef CONFIG_FB_CYBER2000_DDC + +#define DDC_REG 0xb0 +#define DDC_SCL_OUT (1 << 0) +#define DDC_SDA_OUT (1 << 4) +#define DDC_SCL_IN (1 << 2) +#define DDC_SDA_IN (1 << 6) + +static void cyber2000fb_enable_ddc(struct cfb_info *cfb) +{ + spin_lock(&cfb->reg_b0_lock); + cyber2000fb_writew(0x1bf, 0x3ce, cfb); +} + +static void cyber2000fb_disable_ddc(struct cfb_info *cfb) +{ + cyber2000fb_writew(0x0bf, 0x3ce, cfb); + spin_unlock(&cfb->reg_b0_lock); +} + + +static void cyber2000fb_ddc_setscl(void *data, int val) +{ + struct cfb_info *cfb = data; + unsigned char reg; + + cyber2000fb_enable_ddc(cfb); + reg = cyber2000_grphr(DDC_REG, cfb); + if (!val) /* bit is inverted */ + reg |= DDC_SCL_OUT; + else + reg &= ~DDC_SCL_OUT; + cyber2000_grphw(DDC_REG, reg, cfb); + cyber2000fb_disable_ddc(cfb); +} + +static void cyber2000fb_ddc_setsda(void *data, int val) +{ + struct cfb_info *cfb = data; + unsigned char reg; + + cyber2000fb_enable_ddc(cfb); + reg = cyber2000_grphr(DDC_REG, cfb); + if (!val) /* bit is inverted */ + reg |= DDC_SDA_OUT; + else + reg &= ~DDC_SDA_OUT; + cyber2000_grphw(DDC_REG, reg, cfb); + cyber2000fb_disable_ddc(cfb); +} + +static int cyber2000fb_ddc_getscl(void *data) +{ + struct cfb_info *cfb = data; + int retval; + + cyber2000fb_enable_ddc(cfb); + retval = !!(cyber2000_grphr(DDC_REG, cfb) & DDC_SCL_IN); + cyber2000fb_disable_ddc(cfb); + + return retval; +} + +static int cyber2000fb_ddc_getsda(void *data) +{ + struct cfb_info *cfb = data; + int retval; + + cyber2000fb_enable_ddc(cfb); + retval = !!(cyber2000_grphr(DDC_REG, cfb) & DDC_SDA_IN); + cyber2000fb_disable_ddc(cfb); + + return retval; +} + +static int __devinit cyber2000fb_setup_ddc_bus(struct cfb_info *cfb) +{ + strlcpy(cfb->ddc_adapter.name, cfb->fb.fix.id, + sizeof(cfb->ddc_adapter.name)); + cfb->ddc_adapter.owner = THIS_MODULE; + cfb->ddc_adapter.class = I2C_CLASS_DDC; + cfb->ddc_adapter.algo_data = &cfb->ddc_algo; + cfb->ddc_adapter.dev.parent = cfb->fb.device; + cfb->ddc_algo.setsda = cyber2000fb_ddc_setsda; + cfb->ddc_algo.setscl = cyber2000fb_ddc_setscl; + cfb->ddc_algo.getsda = cyber2000fb_ddc_getsda; + cfb->ddc_algo.getscl = cyber2000fb_ddc_getscl; + cfb->ddc_algo.udelay = 10; + cfb->ddc_algo.timeout = 20; + cfb->ddc_algo.data = cfb; + + i2c_set_adapdata(&cfb->ddc_adapter, cfb); + + return i2c_bit_add_bus(&cfb->ddc_adapter); +} +#endif /* CONFIG_FB_CYBER2000_DDC */ + +#ifdef CONFIG_FB_CYBER2000_I2C +static void cyber2000fb_i2c_setsda(void *data, int state) +{ + struct cfb_info *cfb = data; + unsigned int latch2; + + spin_lock(&cfb->reg_b0_lock); + latch2 = cyber2000_grphr(EXT_LATCH2, cfb); + latch2 &= EXT_LATCH2_I2C_CLKEN; + if (state) + latch2 |= EXT_LATCH2_I2C_DATEN; + cyber2000_grphw(EXT_LATCH2, latch2, cfb); + spin_unlock(&cfb->reg_b0_lock); +} + +static void cyber2000fb_i2c_setscl(void *data, int state) +{ + struct cfb_info *cfb = data; + unsigned int latch2; + + spin_lock(&cfb->reg_b0_lock); + latch2 = cyber2000_grphr(EXT_LATCH2, cfb); + latch2 &= EXT_LATCH2_I2C_DATEN; + if (state) + latch2 |= EXT_LATCH2_I2C_CLKEN; + cyber2000_grphw(EXT_LATCH2, latch2, cfb); + spin_unlock(&cfb->reg_b0_lock); +} + +static int cyber2000fb_i2c_getsda(void *data) +{ + struct cfb_info *cfb = data; + int ret; + + spin_lock(&cfb->reg_b0_lock); + ret = !!(cyber2000_grphr(EXT_LATCH2, cfb) & EXT_LATCH2_I2C_DAT); + spin_unlock(&cfb->reg_b0_lock); + + return ret; +} + +static int cyber2000fb_i2c_getscl(void *data) +{ + struct cfb_info *cfb = data; + int ret; + + spin_lock(&cfb->reg_b0_lock); + ret = !!(cyber2000_grphr(EXT_LATCH2, cfb) & EXT_LATCH2_I2C_CLK); + spin_unlock(&cfb->reg_b0_lock); + + return ret; +} + +static int __devinit cyber2000fb_i2c_register(struct cfb_info *cfb) +{ + strlcpy(cfb->i2c_adapter.name, cfb->fb.fix.id, + sizeof(cfb->i2c_adapter.name)); + cfb->i2c_adapter.owner = THIS_MODULE; + cfb->i2c_adapter.algo_data = &cfb->i2c_algo; + cfb->i2c_adapter.dev.parent = cfb->fb.device; + cfb->i2c_algo.setsda = cyber2000fb_i2c_setsda; + cfb->i2c_algo.setscl = cyber2000fb_i2c_setscl; + cfb->i2c_algo.getsda = cyber2000fb_i2c_getsda; + cfb->i2c_algo.getscl = cyber2000fb_i2c_getscl; + cfb->i2c_algo.udelay = 5; + cfb->i2c_algo.timeout = msecs_to_jiffies(100); + cfb->i2c_algo.data = cfb; + + return i2c_bit_add_bus(&cfb->i2c_adapter); +} + +static void cyber2000fb_i2c_unregister(struct cfb_info *cfb) +{ + i2c_del_adapter(&cfb->i2c_adapter); +} +#else +#define cyber2000fb_i2c_register(cfb) (0) +#define cyber2000fb_i2c_unregister(cfb) do { } while (0) +#endif + /* * These parameters give * 640x480, hsync 31.5kHz, vsync 60Hz @@ -1275,6 +1467,8 @@ static struct cfb_info __devinit *cyberpro_alloc_fb_info(unsigned int id, cfb->fb.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; cfb->fb.pseudo_palette = cfb->pseudo_palette; + spin_lock_init(&cfb->reg_b0_lock); + fb_alloc_cmap(&cfb->fb.cmap, NR_PALETTE, 0); return cfb; @@ -1369,6 +1563,11 @@ static int __devinit cyberpro_common_probe(struct cfb_info *cfb) cfb->fb.fix.mmio_len = MMIO_SIZE; cfb->fb.screen_base = cfb->region; +#ifdef CONFIG_FB_CYBER2000_DDC + if (cyber2000fb_setup_ddc_bus(cfb) == 0) + cfb->ddc_registered = true; +#endif + err = -EINVAL; if (!fb_find_mode(&cfb->fb.var, &cfb->fb, NULL, NULL, 0, &cyber2000fb_default_mode, 8)) { @@ -1401,14 +1600,32 @@ static int __devinit cyberpro_common_probe(struct cfb_info *cfb) cfb->fb.var.xres, cfb->fb.var.yres, h_sync / 1000, h_sync % 1000, v_sync); - if (cfb->dev) - cfb->fb.device = &cfb->dev->dev; + err = cyber2000fb_i2c_register(cfb); + if (err) + goto failed; + err = register_framebuffer(&cfb->fb); + if (err) + cyber2000fb_i2c_unregister(cfb); failed: +#ifdef CONFIG_FB_CYBER2000_DDC + if (err && cfb->ddc_registered) + i2c_del_adapter(&cfb->ddc_adapter); +#endif return err; } +static void __devexit cyberpro_common_remove(struct cfb_info *cfb) +{ + unregister_framebuffer(&cfb->fb); +#ifdef CONFIG_FB_CYBER2000_DDC + if (cfb->ddc_registered) + i2c_del_adapter(&cfb->ddc_adapter); +#endif + cyber2000fb_i2c_unregister(cfb); +} + static void cyberpro_common_resume(struct cfb_info *cfb) { cyberpro_init_hw(cfb); @@ -1442,12 +1659,13 @@ static int __devinit cyberpro_vl_probe(void) if (!cfb) goto failed_release; - cfb->dev = NULL; + cfb->irq = -1; cfb->region = ioremap(FB_START, FB_SIZE); if (!cfb->region) goto failed_ioremap; cfb->regs = cfb->region + MMIO_OFFSET; + cfb->fb.device = NULL; cfb->fb.fix.mmio_start = FB_START + MMIO_OFFSET; cfb->fb.fix.smem_start = FB_START; @@ -1585,12 +1803,13 @@ cyberpro_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) if (err) goto failed_regions; - cfb->dev = dev; + cfb->irq = dev->irq; cfb->region = pci_ioremap_bar(dev, 0); if (!cfb->region) goto failed_ioremap; cfb->regs = cfb->region + MMIO_OFFSET; + cfb->fb.device = &dev->dev; cfb->fb.fix.mmio_start = pci_resource_start(dev, 0) + MMIO_OFFSET; cfb->fb.fix.smem_start = pci_resource_start(dev, 0); @@ -1648,15 +1867,7 @@ static void __devexit cyberpro_pci_remove(struct pci_dev *dev) struct cfb_info *cfb = pci_get_drvdata(dev); if (cfb) { - /* - * If unregister_framebuffer fails, then - * we will be leaving hooks that could cause - * oopsen laying around. - */ - if (unregister_framebuffer(&cfb->fb)) - printk(KERN_WARNING "%s: danger Will Robinson, " - "danger danger! Oopsen imminent!\n", - cfb->fb.fix.id); + cyberpro_common_remove(cfb); iounmap(cfb->region); cyberpro_free_fb_info(cfb); diff --git a/drivers/video/cyber2000fb.h b/drivers/video/cyber2000fb.h index de4fc43e51c..bad69102e77 100644 --- a/drivers/video/cyber2000fb.h +++ b/drivers/video/cyber2000fb.h @@ -464,12 +464,14 @@ static void debug_printf(char *fmt, ...) struct cfb_info; struct cyberpro_info { - struct pci_dev *dev; + struct device *dev; + struct i2c_adapter *i2c; unsigned char __iomem *regs; char __iomem *fb; char dev_name[32]; unsigned int fb_size; unsigned int chip_id; + unsigned int irq; /* * The following is a pointer to be passed into the @@ -478,15 +480,6 @@ struct cyberpro_info { * is within this structure. */ struct cfb_info *info; - - /* - * Use these to enable the BM or TV registers. In an SMP - * environment, these two function pointers should only be - * called from the module_init() or module_exit() - * functions. - */ - void (*enable_extregs)(struct cfb_info *); - void (*disable_extregs)(struct cfb_info *); }; #define ID_IGA_1682 0 @@ -494,8 +487,6 @@ struct cyberpro_info { #define ID_CYBERPRO_2010 2 #define ID_CYBERPRO_5000 3 -struct fb_var_screeninfo; - /* * Note! Writing to the Cyber20x0 registers from an interrupt * routine is definitely a bad idea atm. @@ -504,4 +495,3 @@ int cyber2000fb_attach(struct cyberpro_info *info, int idx); void cyber2000fb_detach(int idx); void cyber2000fb_enable_extregs(struct cfb_info *cfb); void cyber2000fb_disable_extregs(struct cfb_info *cfb); -void cyber2000fb_get_fb_var(struct cfb_info *cfb, struct fb_var_screeninfo *var); diff --git a/drivers/video/fb-puv3.c b/drivers/video/fb-puv3.c new file mode 100644 index 00000000000..dbd2dc4745d --- /dev/null +++ b/drivers/video/fb-puv3.c @@ -0,0 +1,846 @@ +/* + * Frame Buffer Driver for PKUnity-v3 Unigfx + * Code specific to PKUnity SoC and UniCore ISA + * + * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> + * Copyright (C) 2001-2010 Guan Xuetao + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#include <linux/module.h> +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/vmalloc.h> +#include <linux/platform_device.h> +#include <linux/clk.h> +#include <linux/fb.h> +#include <linux/init.h> +#include <linux/console.h> + +#include <asm/sizes.h> +#include <mach/hardware.h> + +/* Platform_data reserved for unifb registers. */ +#define UNIFB_REGS_NUM 10 +/* RAM reserved for the frame buffer. */ +#define UNIFB_MEMSIZE (SZ_4M) /* 4 MB for 1024*768*32b */ + +/* + * cause UNIGFX don not have EDID + * all the modes are organized as follow + */ +static const struct fb_videomode unifb_modes[] = { + /* 0 640x480-60 VESA */ + { "640x480@60", 60, 640, 480, 25175000, 48, 16, 34, 10, 96, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 1 640x480-75 VESA */ + { "640x480@75", 75, 640, 480, 31500000, 120, 16, 18, 1, 64, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 2 800x600-60 VESA */ + { "800x600@60", 60, 800, 600, 40000000, 88, 40, 26, 1, 128, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 3 800x600-75 VESA */ + { "800x600@75", 75, 800, 600, 49500000, 160, 16, 23, 1, 80, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 4 1024x768-60 VESA */ + { "1024x768@60", 60, 1024, 768, 65000000, 160, 24, 34, 3, 136, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 5 1024x768-75 VESA */ + { "1024x768@75", 75, 1024, 768, 78750000, 176, 16, 30, 1, 96, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 6 1280x960-60 VESA */ + { "1280x960@60", 60, 1280, 960, 108000000, 312, 96, 38, 1, 112, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 7 1440x900-60 VESA */ + { "1440x900@60", 60, 1440, 900, 106500000, 232, 80, 30, 3, 152, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 8 FIXME 9 1024x600-60 VESA UNTESTED */ + { "1024x600@60", 60, 1024, 600, 50650000, 160, 24, 26, 1, 136, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 9 FIXME 10 1024x600-75 VESA UNTESTED */ + { "1024x600@75", 75, 1024, 600, 61500000, 176, 16, 23, 1, 96, 1, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, + /* 10 FIXME 11 1366x768-60 VESA UNTESTED */ + { "1366x768@60", 60, 1366, 768, 85500000, 256, 58, 18, 1, 112, 3, + 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA }, +}; + +static struct fb_var_screeninfo unifb_default = { + .xres = 640, + .yres = 480, + .xres_virtual = 640, + .yres_virtual = 480, + .bits_per_pixel = 16, + .red = { 11, 5, 0 }, + .green = { 5, 6, 0 }, + .blue = { 0, 5, 0 }, + .activate = FB_ACTIVATE_NOW, + .height = -1, + .width = -1, + .pixclock = 25175000, + .left_margin = 48, + .right_margin = 16, + .upper_margin = 33, + .lower_margin = 10, + .hsync_len = 96, + .vsync_len = 2, + .vmode = FB_VMODE_NONINTERLACED, +}; + +static struct fb_fix_screeninfo unifb_fix = { + .id = "UNIGFX FB", + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_TRUECOLOR, + .xpanstep = 1, + .ypanstep = 1, + .ywrapstep = 1, + .accel = FB_ACCEL_NONE, +}; + +static void unifb_sync(struct fb_info *info) +{ + /* TODO: may, this can be replaced by interrupt */ + int cnt; + + for (cnt = 0; cnt < 0x10000000; cnt++) { + if (readl(UGE_COMMAND) & 0x1000000) + return; + } + + if (cnt > 0x8000000) + dev_warn(info->device, "Warning: UniGFX GE time out ...\n"); +} + +static void unifb_prim_fillrect(struct fb_info *info, + const struct fb_fillrect *region) +{ + int awidth = region->width; + int aheight = region->height; + int m_iBpp = info->var.bits_per_pixel; + int screen_width = info->var.xres; + int src_sel = 1; /* from fg_color */ + int pat_sel = 1; + int src_x0 = 0; + int dst_x0 = region->dx; + int src_y0 = 0; + int dst_y0 = region->dy; + int rop_alpha_sel = 0; + int rop_alpha_code = 0xCC; + int x_dir = 1; + int y_dir = 1; + int alpha_r = 0; + int alpha_sel = 0; + int dst_pitch = screen_width * (m_iBpp / 8); + int dst_offset = dst_y0 * dst_pitch + dst_x0 * (m_iBpp / 8); + int src_pitch = screen_width * (m_iBpp / 8); + int src_offset = src_y0 * src_pitch + src_x0 * (m_iBpp / 8); + unsigned int command = 0; + int clip_region = 0; + int clip_en = 0; + int tp_en = 0; + int fg_color = 0; + int bottom = info->var.yres - 1; + int right = info->var.xres - 1; + int top = 0; + + bottom = (bottom << 16) | right; + command = (rop_alpha_sel << 26) | (pat_sel << 18) | (src_sel << 16) + | (x_dir << 20) | (y_dir << 21) | (command << 24) + | (clip_region << 23) | (clip_en << 22) | (tp_en << 27); + src_pitch = (dst_pitch << 16) | src_pitch; + awidth = awidth | (aheight << 16); + alpha_r = ((rop_alpha_code & 0xff) << 8) | (alpha_r & 0xff) + | (alpha_sel << 16); + src_x0 = (src_x0 & 0x1fff) | ((src_y0 & 0x1fff) << 16); + dst_x0 = (dst_x0 & 0x1fff) | ((dst_y0 & 0x1fff) << 16); + fg_color = region->color; + + unifb_sync(info); + + writel(((u32 *)(info->pseudo_palette))[fg_color], UGE_FCOLOR); + writel(0, UGE_BCOLOR); + writel(src_pitch, UGE_PITCH); + writel(src_offset, UGE_SRCSTART); + writel(dst_offset, UGE_DSTSTART); + writel(awidth, UGE_WIDHEIGHT); + writel(top, UGE_CLIP0); + writel(bottom, UGE_CLIP1); + writel(alpha_r, UGE_ROPALPHA); + writel(src_x0, UGE_SRCXY); + writel(dst_x0, UGE_DSTXY); + writel(command, UGE_COMMAND); +} + +static void unifb_fillrect(struct fb_info *info, + const struct fb_fillrect *region) +{ + struct fb_fillrect modded; + int vxres, vyres; + + if (info->flags & FBINFO_HWACCEL_DISABLED) { + sys_fillrect(info, region); + return; + } + + vxres = info->var.xres_virtual; + vyres = info->var.yres_virtual; + + memcpy(&modded, region, sizeof(struct fb_fillrect)); + + if (!modded.width || !modded.height || + modded.dx >= vxres || modded.dy >= vyres) + return; + + if (modded.dx + modded.width > vxres) + modded.width = vxres - modded.dx; + if (modded.dy + modded.height > vyres) + modded.height = vyres - modded.dy; + + unifb_prim_fillrect(info, &modded); +} + +static void unifb_prim_copyarea(struct fb_info *info, + const struct fb_copyarea *area) +{ + int awidth = area->width; + int aheight = area->height; + int m_iBpp = info->var.bits_per_pixel; + int screen_width = info->var.xres; + int src_sel = 2; /* from mem */ + int pat_sel = 0; + int src_x0 = area->sx; + int dst_x0 = area->dx; + int src_y0 = area->sy; + int dst_y0 = area->dy; + + int rop_alpha_sel = 0; + int rop_alpha_code = 0xCC; + int x_dir = 1; + int y_dir = 1; + + int alpha_r = 0; + int alpha_sel = 0; + int dst_pitch = screen_width * (m_iBpp / 8); + int dst_offset = dst_y0 * dst_pitch + dst_x0 * (m_iBpp / 8); + int src_pitch = screen_width * (m_iBpp / 8); + int src_offset = src_y0 * src_pitch + src_x0 * (m_iBpp / 8); + unsigned int command = 0; + int clip_region = 0; + int clip_en = 1; + int tp_en = 0; + int top = 0; + int bottom = info->var.yres; + int right = info->var.xres; + int fg_color = 0; + int bg_color = 0; + + if (src_x0 < 0) + src_x0 = 0; + if (src_y0 < 0) + src_y0 = 0; + + if (src_y0 - dst_y0 > 0) { + y_dir = 1; + } else { + y_dir = 0; + src_offset = (src_y0 + aheight) * src_pitch + + src_x0 * (m_iBpp / 8); + dst_offset = (dst_y0 + aheight) * dst_pitch + + dst_x0 * (m_iBpp / 8); + src_y0 += aheight; + dst_y0 += aheight; + } + + command = (rop_alpha_sel << 26) | (pat_sel << 18) | (src_sel << 16) | + (x_dir << 20) | (y_dir << 21) | (command << 24) | + (clip_region << 23) | (clip_en << 22) | (tp_en << 27); + src_pitch = (dst_pitch << 16) | src_pitch; + awidth = awidth | (aheight << 16); + alpha_r = ((rop_alpha_code & 0xff) << 8) | (alpha_r & 0xff) | + (alpha_sel << 16); + src_x0 = (src_x0 & 0x1fff) | ((src_y0 & 0x1fff) << 16); + dst_x0 = (dst_x0 & 0x1fff) | ((dst_y0 & 0x1fff) << 16); + bottom = (bottom << 16) | right; + + unifb_sync(info); + + writel(src_pitch, UGE_PITCH); + writel(src_offset, UGE_SRCSTART); + writel(dst_offset, UGE_DSTSTART); + writel(awidth, UGE_WIDHEIGHT); + writel(top, UGE_CLIP0); + writel(bottom, UGE_CLIP1); + writel(bg_color, UGE_BCOLOR); + writel(fg_color, UGE_FCOLOR); + writel(alpha_r, UGE_ROPALPHA); + writel(src_x0, UGE_SRCXY); + writel(dst_x0, UGE_DSTXY); + writel(command, UGE_COMMAND); +} + +static void unifb_copyarea(struct fb_info *info, const struct fb_copyarea *area) +{ + struct fb_copyarea modded; + u32 vxres, vyres; + modded.sx = area->sx; + modded.sy = area->sy; + modded.dx = area->dx; + modded.dy = area->dy; + modded.width = area->width; + modded.height = area->height; + + if (info->flags & FBINFO_HWACCEL_DISABLED) { + sys_copyarea(info, area); + return; + } + + vxres = info->var.xres_virtual; + vyres = info->var.yres_virtual; + + if (!modded.width || !modded.height || + modded.sx >= vxres || modded.sy >= vyres || + modded.dx >= vxres || modded.dy >= vyres) + return; + + if (modded.sx + modded.width > vxres) + modded.width = vxres - modded.sx; + if (modded.dx + modded.width > vxres) + modded.width = vxres - modded.dx; + if (modded.sy + modded.height > vyres) + modded.height = vyres - modded.sy; + if (modded.dy + modded.height > vyres) + modded.height = vyres - modded.dy; + + unifb_prim_copyarea(info, &modded); +} + +static void unifb_imageblit(struct fb_info *info, const struct fb_image *image) +{ + sys_imageblit(info, image); +} + +static u_long get_line_length(int xres_virtual, int bpp) +{ + u_long length; + + length = xres_virtual * bpp; + length = (length + 31) & ~31; + length >>= 3; + return length; +} + +/* + * Setting the video mode has been split into two parts. + * First part, xxxfb_check_var, must not write anything + * to hardware, it should only verify and adjust var. + * This means it doesn't alter par but it does use hardware + * data from it to check this var. + */ +static int unifb_check_var(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + u_long line_length; + + /* + * FB_VMODE_CONUPDATE and FB_VMODE_SMOOTH_XPAN are equal! + * as FB_VMODE_SMOOTH_XPAN is only used internally + */ + + if (var->vmode & FB_VMODE_CONUPDATE) { + var->vmode |= FB_VMODE_YWRAP; + var->xoffset = info->var.xoffset; + var->yoffset = info->var.yoffset; + } + + /* + * Some very basic checks + */ + if (!var->xres) + var->xres = 1; + if (!var->yres) + var->yres = 1; + if (var->xres > var->xres_virtual) + var->xres_virtual = var->xres; + if (var->yres > var->yres_virtual) + var->yres_virtual = var->yres; + if (var->bits_per_pixel <= 1) + var->bits_per_pixel = 1; + else if (var->bits_per_pixel <= 8) + var->bits_per_pixel = 8; + else if (var->bits_per_pixel <= 16) + var->bits_per_pixel = 16; + else if (var->bits_per_pixel <= 24) + var->bits_per_pixel = 24; + else if (var->bits_per_pixel <= 32) + var->bits_per_pixel = 32; + else + return -EINVAL; + + if (var->xres_virtual < var->xoffset + var->xres) + var->xres_virtual = var->xoffset + var->xres; + if (var->yres_virtual < var->yoffset + var->yres) + var->yres_virtual = var->yoffset + var->yres; + + /* + * Memory limit + */ + line_length = + get_line_length(var->xres_virtual, var->bits_per_pixel); + if (line_length * var->yres_virtual > UNIFB_MEMSIZE) + return -ENOMEM; + + /* + * Now that we checked it we alter var. The reason being is that the + * video mode passed in might not work but slight changes to it might + * make it work. This way we let the user know what is acceptable. + */ + switch (var->bits_per_pixel) { + case 1: + case 8: + var->red.offset = 0; + var->red.length = 8; + var->green.offset = 0; + var->green.length = 8; + var->blue.offset = 0; + var->blue.length = 8; + var->transp.offset = 0; + var->transp.length = 0; + break; + case 16: /* RGBA 5551 */ + if (var->transp.length) { + var->red.offset = 0; + var->red.length = 5; + var->green.offset = 5; + var->green.length = 5; + var->blue.offset = 10; + var->blue.length = 5; + var->transp.offset = 15; + var->transp.length = 1; + } else { /* RGB 565 */ + var->red.offset = 11; + var->red.length = 5; + var->green.offset = 5; + var->green.length = 6; + var->blue.offset = 0; + var->blue.length = 5; + var->transp.offset = 0; + var->transp.length = 0; + } + break; + case 24: /* RGB 888 */ + var->red.offset = 0; + var->red.length = 8; + var->green.offset = 8; + var->green.length = 8; + var->blue.offset = 16; + var->blue.length = 8; + var->transp.offset = 0; + var->transp.length = 0; + break; + case 32: /* RGBA 8888 */ + var->red.offset = 16; + var->red.length = 8; + var->green.offset = 8; + var->green.length = 8; + var->blue.offset = 0; + var->blue.length = 8; + var->transp.offset = 24; + var->transp.length = 8; + break; + } + var->red.msb_right = 0; + var->green.msb_right = 0; + var->blue.msb_right = 0; + var->transp.msb_right = 0; + + return 0; +} + +/* + * This routine actually sets the video mode. It's in here where we + * the hardware state info->par and fix which can be affected by the + * change in par. For this driver it doesn't do much. + */ +static int unifb_set_par(struct fb_info *info) +{ + int hTotal, vTotal, hSyncStart, hSyncEnd, vSyncStart, vSyncEnd; + int format; + +#ifdef CONFIG_PUV3_PM + struct clk *clk_vga; + u32 pixclk = 0; + int i; + + for (i = 0; i <= 10; i++) { + if (info->var.xres == unifb_modes[i].xres + && info->var.yres == unifb_modes[i].yres + && info->var.upper_margin == unifb_modes[i].upper_margin + && info->var.lower_margin == unifb_modes[i].lower_margin + && info->var.left_margin == unifb_modes[i].left_margin + && info->var.right_margin == unifb_modes[i].right_margin + && info->var.hsync_len == unifb_modes[i].hsync_len + && info->var.vsync_len == unifb_modes[i].vsync_len) { + pixclk = unifb_modes[i].pixclock; + break; + } + } + + /* set clock rate */ + clk_vga = clk_get(info->device, "VGA_CLK"); + if (clk_vga == ERR_PTR(-ENOENT)) + return -ENOENT; + + if (pixclk != 0) { + if (clk_set_rate(clk_vga, pixclk)) { /* set clock failed */ + info->fix = unifb_fix; + info->var = unifb_default; + if (clk_set_rate(clk_vga, unifb_default.pixclock)) + return -EINVAL; + } + } +#endif + + info->fix.line_length = get_line_length(info->var.xres_virtual, + info->var.bits_per_pixel); + + hSyncStart = info->var.xres + info->var.right_margin; + hSyncEnd = hSyncStart + info->var.hsync_len; + hTotal = hSyncEnd + info->var.left_margin; + + vSyncStart = info->var.yres + info->var.lower_margin; + vSyncEnd = vSyncStart + info->var.vsync_len; + vTotal = vSyncEnd + info->var.upper_margin; + + switch (info->var.bits_per_pixel) { + case 8: + format = UDE_CFG_DST8; + break; + case 16: + format = UDE_CFG_DST16; + break; + case 24: + format = UDE_CFG_DST24; + break; + case 32: + format = UDE_CFG_DST32; + break; + default: + return -EINVAL; + } + + writel(PKUNITY_UNIGFX_MMAP_BASE, UDE_FSA); + writel(info->var.yres, UDE_LS); + writel(get_line_length(info->var.xres, + info->var.bits_per_pixel) >> 3, UDE_PS); + /* >> 3 for hardware required. */ + writel((hTotal << 16) | (info->var.xres), UDE_HAT); + writel(((hTotal - 1) << 16) | (info->var.xres - 1), UDE_HBT); + writel(((hSyncEnd - 1) << 16) | (hSyncStart - 1), UDE_HST); + writel((vTotal << 16) | (info->var.yres), UDE_VAT); + writel(((vTotal - 1) << 16) | (info->var.yres - 1), UDE_VBT); + writel(((vSyncEnd - 1) << 16) | (vSyncStart - 1), UDE_VST); + writel(UDE_CFG_GDEN_ENABLE | UDE_CFG_TIMEUP_ENABLE + | format | 0xC0000001, UDE_CFG); + + return 0; +} + +/* + * Set a single color register. The values supplied are already + * rounded down to the hardware's capabilities (according to the + * entries in the var structure). Return != 0 for invalid regno. + */ +static int unifb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *info) +{ + if (regno >= 256) /* no. of hw registers */ + return 1; + + /* grayscale works only partially under directcolor */ + if (info->var.grayscale) { + /* grayscale = 0.30*R + 0.59*G + 0.11*B */ + red = green = blue = + (red * 77 + green * 151 + blue * 28) >> 8; + } + +#define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16) + switch (info->fix.visual) { + case FB_VISUAL_TRUECOLOR: + case FB_VISUAL_PSEUDOCOLOR: + red = CNVT_TOHW(red, info->var.red.length); + green = CNVT_TOHW(green, info->var.green.length); + blue = CNVT_TOHW(blue, info->var.blue.length); + transp = CNVT_TOHW(transp, info->var.transp.length); + break; + case FB_VISUAL_DIRECTCOLOR: + red = CNVT_TOHW(red, 8); /* expect 8 bit DAC */ + green = CNVT_TOHW(green, 8); + blue = CNVT_TOHW(blue, 8); + /* hey, there is bug in transp handling... */ + transp = CNVT_TOHW(transp, 8); + break; + } +#undef CNVT_TOHW + /* Truecolor has hardware independent palette */ + if (info->fix.visual == FB_VISUAL_TRUECOLOR) { + u32 v; + + if (regno >= 16) + return 1; + + v = (red << info->var.red.offset) | + (green << info->var.green.offset) | + (blue << info->var.blue.offset) | + (transp << info->var.transp.offset); + switch (info->var.bits_per_pixel) { + case 8: + break; + case 16: + case 24: + case 32: + ((u32 *) (info->pseudo_palette))[regno] = v; + break; + default: + return 1; + } + return 0; + } + return 0; +} + +/* + * Pan or Wrap the Display + * + * This call looks only at xoffset, yoffset and the FB_VMODE_YWRAP flag + */ +static int unifb_pan_display(struct fb_var_screeninfo *var, + struct fb_info *info) +{ + if (var->vmode & FB_VMODE_YWRAP) { + if (var->yoffset < 0 + || var->yoffset >= info->var.yres_virtual + || var->xoffset) + return -EINVAL; + } else { + if (var->xoffset + var->xres > info->var.xres_virtual || + var->yoffset + var->yres > info->var.yres_virtual) + return -EINVAL; + } + info->var.xoffset = var->xoffset; + info->var.yoffset = var->yoffset; + if (var->vmode & FB_VMODE_YWRAP) + info->var.vmode |= FB_VMODE_YWRAP; + else + info->var.vmode &= ~FB_VMODE_YWRAP; + return 0; +} + +int unifb_mmap(struct fb_info *info, + struct vm_area_struct *vma) +{ + unsigned long size = vma->vm_end - vma->vm_start; + unsigned long offset = vma->vm_pgoff << PAGE_SHIFT; + unsigned long pos = info->fix.smem_start + offset; + + if (offset + size > info->fix.smem_len) + return -EINVAL; + + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); + + if (io_remap_pfn_range(vma, vma->vm_start, pos >> PAGE_SHIFT, size, + vma->vm_page_prot)) + return -EAGAIN; + + vma->vm_flags |= VM_RESERVED; /* avoid to swap out this VMA */ + return 0; + +} + +static struct fb_ops unifb_ops = { + .fb_read = fb_sys_read, + .fb_write = fb_sys_write, + .fb_check_var = unifb_check_var, + .fb_set_par = unifb_set_par, + .fb_setcolreg = unifb_setcolreg, + .fb_pan_display = unifb_pan_display, + .fb_fillrect = unifb_fillrect, + .fb_copyarea = unifb_copyarea, + .fb_imageblit = unifb_imageblit, + .fb_mmap = unifb_mmap, +}; + +/* + * Initialisation + */ +static int unifb_probe(struct platform_device *dev) +{ + struct fb_info *info; + u32 unifb_regs[UNIFB_REGS_NUM]; + int retval = -ENOMEM; + struct resource *iomem, *mapmem; + + info = framebuffer_alloc(sizeof(u32)*256, &dev->dev); + if (!info) + goto err; + + info->screen_base = (char __iomem *)KUSER_UNIGFX_BASE; + info->fbops = &unifb_ops; + + retval = fb_find_mode(&info->var, info, NULL, + unifb_modes, 10, &unifb_modes[0], 16); + + if (!retval || (retval == 4)) + info->var = unifb_default; + + iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); + unifb_fix.mmio_start = iomem->start; + + mapmem = platform_get_resource(dev, IORESOURCE_MEM, 1); + unifb_fix.smem_start = mapmem->start; + unifb_fix.smem_len = UNIFB_MEMSIZE; + + info->fix = unifb_fix; + info->pseudo_palette = info->par; + info->par = NULL; + info->flags = FBINFO_FLAG_DEFAULT; +#ifdef FB_ACCEL_PUV3_UNIGFX + info->fix.accel = FB_ACCEL_PUV3_UNIGFX; +#endif + + retval = fb_alloc_cmap(&info->cmap, 256, 0); + if (retval < 0) + goto err1; + + retval = register_framebuffer(info); + if (retval < 0) + goto err2; + platform_set_drvdata(dev, info); + platform_device_add_data(dev, unifb_regs, sizeof(u32) * UNIFB_REGS_NUM); + + printk(KERN_INFO + "fb%d: Virtual frame buffer device, using %dM of video memory\n", + info->node, UNIFB_MEMSIZE >> 20); + return 0; +err2: + fb_dealloc_cmap(&info->cmap); +err1: + framebuffer_release(info); +err: + return retval; +} + +static int unifb_remove(struct platform_device *dev) +{ + struct fb_info *info = platform_get_drvdata(dev); + + if (info) { + unregister_framebuffer(info); + fb_dealloc_cmap(&info->cmap); + framebuffer_release(info); + } + return 0; +} + +#ifdef CONFIG_PM +static int unifb_resume(struct platform_device *dev) +{ + int rc = 0; + u32 *unifb_regs = dev->dev.platform_data; + + if (dev->dev.power.power_state.event == PM_EVENT_ON) + return 0; + + console_lock(); + + if (dev->dev.power.power_state.event == PM_EVENT_SUSPEND) { + writel(unifb_regs[0], UDE_FSA); + writel(unifb_regs[1], UDE_LS); + writel(unifb_regs[2], UDE_PS); + writel(unifb_regs[3], UDE_HAT); + writel(unifb_regs[4], UDE_HBT); + writel(unifb_regs[5], UDE_HST); + writel(unifb_regs[6], UDE_VAT); + writel(unifb_regs[7], UDE_VBT); + writel(unifb_regs[8], UDE_VST); + writel(unifb_regs[9], UDE_CFG); + } + dev->dev.power.power_state = PMSG_ON; + + console_unlock(); + + return rc; +} + +static int unifb_suspend(struct platform_device *dev, pm_message_t mesg) +{ + u32 *unifb_regs = dev->dev.platform_data; + + unifb_regs[0] = readl(UDE_FSA); + unifb_regs[1] = readl(UDE_LS); + unifb_regs[2] = readl(UDE_PS); + unifb_regs[3] = readl(UDE_HAT); + unifb_regs[4] = readl(UDE_HBT); + unifb_regs[5] = readl(UDE_HST); + unifb_regs[6] = readl(UDE_VAT); + unifb_regs[7] = readl(UDE_VBT); + unifb_regs[8] = readl(UDE_VST); + unifb_regs[9] = readl(UDE_CFG); + + if (mesg.event == dev->dev.power.power_state.event) + return 0; + + switch (mesg.event) { + case PM_EVENT_FREEZE: /* about to take snapshot */ + case PM_EVENT_PRETHAW: /* before restoring snapshot */ + goto done; + } + + console_lock(); + + /* do nothing... */ + + console_unlock(); + +done: + dev->dev.power.power_state = mesg; + + return 0; +} +#else +#define unifb_resume NULL +#define unifb_suspend NULL +#endif + +static struct platform_driver unifb_driver = { + .probe = unifb_probe, + .remove = unifb_remove, + .resume = unifb_resume, + .suspend = unifb_suspend, + .driver = { + .name = "PKUnity-v3-UNIGFX", + }, +}; + +static int __init unifb_init(void) +{ +#ifndef MODULE + if (fb_get_options("unifb", NULL)) + return -ENODEV; +#endif + + return platform_driver_register(&unifb_driver); +} + +module_init(unifb_init); + +static void __exit unifb_exit(void) +{ + platform_driver_unregister(&unifb_driver); +} + +module_exit(unifb_exit); + +MODULE_LICENSE("GPL v2"); diff --git a/drivers/video/ffb.c b/drivers/video/ffb.c index 6739b2af3bc..910c5e6f670 100644 --- a/drivers/video/ffb.c +++ b/drivers/video/ffb.c @@ -893,8 +893,7 @@ static void ffb_init_fix(struct fb_info *info) info->fix.accel = FB_ACCEL_SUN_CREATOR; } -static int __devinit ffb_probe(struct platform_device *op, - const struct of_device_id *match) +static int __devinit ffb_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct ffb_fbc __iomem *fbc; @@ -1052,7 +1051,7 @@ static const struct of_device_id ffb_match[] = { }; MODULE_DEVICE_TABLE(of, ffb_match); -static struct of_platform_driver ffb_driver = { +static struct platform_driver ffb_driver = { .driver = { .name = "ffb", .owner = THIS_MODULE, @@ -1067,12 +1066,12 @@ static int __init ffb_init(void) if (fb_get_options("ffb", NULL)) return -ENODEV; - return of_register_platform_driver(&ffb_driver); + return platform_driver_register(&ffb_driver); } static void __exit ffb_exit(void) { - of_unregister_platform_driver(&ffb_driver); + platform_driver_unregister(&ffb_driver); } module_init(ffb_init); diff --git a/drivers/video/fsl-diu-fb.c b/drivers/video/fsl-diu-fb.c index 8bbbf08fa3c..9048f87fa8c 100644 --- a/drivers/video/fsl-diu-fb.c +++ b/drivers/video/fsl-diu-fb.c @@ -1487,8 +1487,7 @@ static ssize_t show_monitor(struct device *device, return diu_ops.show_monitor_port(machine_data->monitor_port, buf); } -static int __devinit fsl_diu_probe(struct platform_device *ofdev, - const struct of_device_id *match) +static int __devinit fsl_diu_probe(struct platform_device *ofdev) { struct device_node *np = ofdev->dev.of_node; struct mfb_info *mfbi; @@ -1735,7 +1734,7 @@ static struct of_device_id fsl_diu_match[] = { }; MODULE_DEVICE_TABLE(of, fsl_diu_match); -static struct of_platform_driver fsl_diu_driver = { +static struct platform_driver fsl_diu_driver = { .driver = { .name = "fsl_diu", .owner = THIS_MODULE, @@ -1797,7 +1796,7 @@ static int __init fsl_diu_init(void) if (!coherence_data) return -ENOMEM; #endif - ret = of_register_platform_driver(&fsl_diu_driver); + ret = platform_driver_register(&fsl_diu_driver); if (ret) { printk(KERN_ERR "fsl-diu: failed to register platform driver\n"); @@ -1811,7 +1810,7 @@ static int __init fsl_diu_init(void) static void __exit fsl_diu_exit(void) { - of_unregister_platform_driver(&fsl_diu_driver); + platform_driver_unregister(&fsl_diu_driver); #if defined(CONFIG_NOT_COHERENT_CACHE) vfree(coherence_data); #endif diff --git a/drivers/video/leo.c b/drivers/video/leo.c index b599e5e36ce..9e946e2c1da 100644 --- a/drivers/video/leo.c +++ b/drivers/video/leo.c @@ -547,8 +547,7 @@ static void leo_unmap_regs(struct platform_device *op, struct fb_info *info, of_iounmap(&op->resource[0], info->screen_base, 0x800000); } -static int __devinit leo_probe(struct platform_device *op, - const struct of_device_id *match) +static int __devinit leo_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct fb_info *info; @@ -662,7 +661,7 @@ static const struct of_device_id leo_match[] = { }; MODULE_DEVICE_TABLE(of, leo_match); -static struct of_platform_driver leo_driver = { +static struct platform_driver leo_driver = { .driver = { .name = "leo", .owner = THIS_MODULE, @@ -677,12 +676,12 @@ static int __init leo_init(void) if (fb_get_options("leofb", NULL)) return -ENODEV; - return of_register_platform_driver(&leo_driver); + return platform_driver_register(&leo_driver); } static void __exit leo_exit(void) { - of_unregister_platform_driver(&leo_driver); + platform_driver_unregister(&leo_driver); } module_init(leo_init); diff --git a/drivers/video/mb862xx/mb862xxfb.c b/drivers/video/mb862xx/mb862xxfb.c index b1c4374cf94..c76e663a6cd 100644 --- a/drivers/video/mb862xx/mb862xxfb.c +++ b/drivers/video/mb862xx/mb862xxfb.c @@ -550,8 +550,7 @@ static int mb862xx_gdc_init(struct mb862xxfb_par *par) return 0; } -static int __devinit of_platform_mb862xx_probe(struct platform_device *ofdev, - const struct of_device_id *id) +static int __devinit of_platform_mb862xx_probe(struct platform_device *ofdev) { struct device_node *np = ofdev->dev.of_node; struct device *dev = &ofdev->dev; @@ -717,7 +716,7 @@ static struct of_device_id __devinitdata of_platform_mb862xx_tbl[] = { { /* end */ } }; -static struct of_platform_driver of_platform_mb862xxfb_driver = { +static struct platform_driver of_platform_mb862xxfb_driver = { .driver = { .name = DRV_NAME, .owner = THIS_MODULE, @@ -1038,7 +1037,7 @@ static int __devinit mb862xxfb_init(void) int ret = -ENODEV; #if defined(CONFIG_FB_MB862XX_LIME) - ret = of_register_platform_driver(&of_platform_mb862xxfb_driver); + ret = platform_driver_register(&of_platform_mb862xxfb_driver); #endif #if defined(CONFIG_FB_MB862XX_PCI_GDC) ret = pci_register_driver(&mb862xxfb_pci_driver); @@ -1049,7 +1048,7 @@ static int __devinit mb862xxfb_init(void) static void __exit mb862xxfb_exit(void) { #if defined(CONFIG_FB_MB862XX_LIME) - of_unregister_platform_driver(&of_platform_mb862xxfb_driver); + platform_driver_unregister(&of_platform_mb862xxfb_driver); #endif #if defined(CONFIG_FB_MB862XX_PCI_GDC) pci_unregister_driver(&mb862xxfb_pci_driver); diff --git a/drivers/video/msm/mdp_hw.h b/drivers/video/msm/mdp_hw.h index 4e3deb4e592..d80477415ca 100644 --- a/drivers/video/msm/mdp_hw.h +++ b/drivers/video/msm/mdp_hw.h @@ -449,6 +449,7 @@ int mdp_ppp_blit(const struct mdp_info *mdp, struct mdp_blit_req *req, #define PPP_CFG_MDP_XRGB_8888(dir) PPP_CFG_MDP_ARGB_8888(dir) #define PPP_CFG_MDP_RGBA_8888(dir) PPP_CFG_MDP_ARGB_8888(dir) #define PPP_CFG_MDP_BGRA_8888(dir) PPP_CFG_MDP_ARGB_8888(dir) +#define PPP_CFG_MDP_RGBX_8888(dir) PPP_CFG_MDP_ARGB_8888(dir) #define PPP_CFG_MDP_Y_CBCR_H2V2(dir) (PPP_##dir##_C2R_8BIT | \ PPP_##dir##_C0G_8BIT | \ @@ -488,12 +489,14 @@ int mdp_ppp_blit(const struct mdp_info *mdp, struct mdp_blit_req *req, MDP_GET_PACK_PATTERN(0, CLR_R, CLR_G, CLR_B, 8) #define PPP_PACK_PATTERN_MDP_RGB_888 PPP_PACK_PATTERN_MDP_RGB_565 #define PPP_PACK_PATTERN_MDP_XRGB_8888 \ - MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G, CLR_B, 8) + MDP_GET_PACK_PATTERN(CLR_B, CLR_G, CLR_R, CLR_ALPHA, 8) #define PPP_PACK_PATTERN_MDP_ARGB_8888 PPP_PACK_PATTERN_MDP_XRGB_8888 #define PPP_PACK_PATTERN_MDP_RGBA_8888 \ MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_B, CLR_G, CLR_R, 8) #define PPP_PACK_PATTERN_MDP_BGRA_8888 \ MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_R, CLR_G, CLR_B, 8) +#define PPP_PACK_PATTERN_MDP_RGBX_8888 \ + MDP_GET_PACK_PATTERN(CLR_ALPHA, CLR_B, CLR_G, CLR_R, 8) #define PPP_PACK_PATTERN_MDP_Y_CBCR_H2V1 \ MDP_GET_PACK_PATTERN(0, 0, CLR_CB, CLR_CR, 8) #define PPP_PACK_PATTERN_MDP_Y_CBCR_H2V2 PPP_PACK_PATTERN_MDP_Y_CBCR_H2V1 @@ -509,6 +512,7 @@ int mdp_ppp_blit(const struct mdp_info *mdp, struct mdp_blit_req *req, #define PPP_CHROMA_SAMP_MDP_ARGB_8888(dir) PPP_OP_##dir##_CHROMA_RGB #define PPP_CHROMA_SAMP_MDP_RGBA_8888(dir) PPP_OP_##dir##_CHROMA_RGB #define PPP_CHROMA_SAMP_MDP_BGRA_8888(dir) PPP_OP_##dir##_CHROMA_RGB +#define PPP_CHROMA_SAMP_MDP_RGBX_8888(dir) PPP_OP_##dir##_CHROMA_RGB #define PPP_CHROMA_SAMP_MDP_Y_CBCR_H2V1(dir) PPP_OP_##dir##_CHROMA_H2V1 #define PPP_CHROMA_SAMP_MDP_Y_CBCR_H2V2(dir) PPP_OP_##dir##_CHROMA_420 #define PPP_CHROMA_SAMP_MDP_Y_CRCB_H2V1(dir) PPP_OP_##dir##_CHROMA_H2V1 @@ -523,6 +527,7 @@ int mdp_ppp_blit(const struct mdp_info *mdp, struct mdp_blit_req *req, [MDP_ARGB_8888] = PPP_##name##_MDP_ARGB_8888,\ [MDP_RGBA_8888] = PPP_##name##_MDP_RGBA_8888,\ [MDP_BGRA_8888] = PPP_##name##_MDP_BGRA_8888,\ + [MDP_RGBX_8888] = PPP_##name##_MDP_RGBX_8888,\ [MDP_Y_CBCR_H2V1] = PPP_##name##_MDP_Y_CBCR_H2V1,\ [MDP_Y_CBCR_H2V2] = PPP_##name##_MDP_Y_CBCR_H2V2,\ [MDP_Y_CRCB_H2V1] = PPP_##name##_MDP_Y_CRCB_H2V1,\ @@ -536,6 +541,7 @@ int mdp_ppp_blit(const struct mdp_info *mdp, struct mdp_blit_req *req, [MDP_ARGB_8888] = PPP_##name##_MDP_ARGB_8888(dir),\ [MDP_RGBA_8888] = PPP_##name##_MDP_RGBA_8888(dir),\ [MDP_BGRA_8888] = PPP_##name##_MDP_BGRA_8888(dir),\ + [MDP_RGBX_8888] = PPP_##name##_MDP_RGBX_8888(dir),\ [MDP_Y_CBCR_H2V1] = PPP_##name##_MDP_Y_CBCR_H2V1(dir),\ [MDP_Y_CBCR_H2V2] = PPP_##name##_MDP_Y_CBCR_H2V2(dir),\ [MDP_Y_CRCB_H2V1] = PPP_##name##_MDP_Y_CRCB_H2V1(dir),\ @@ -547,7 +553,8 @@ int mdp_ppp_blit(const struct mdp_info *mdp, struct mdp_blit_req *req, (img == MDP_YCRYCB_H2V1)) #define IS_RGB(img) ((img == MDP_RGB_565) | (img == MDP_RGB_888) | \ (img == MDP_ARGB_8888) | (img == MDP_RGBA_8888) | \ - (img == MDP_XRGB_8888) | (img == MDP_BGRA_8888)) + (img == MDP_XRGB_8888) | (img == MDP_BGRA_8888) | \ + (img == MDP_RGBX_8888)) #define HAS_ALPHA(img) ((img == MDP_ARGB_8888) | (img == MDP_RGBA_8888) | \ (img == MDP_BGRA_8888)) diff --git a/drivers/video/msm/mdp_ppp.c b/drivers/video/msm/mdp_ppp.c index 4ff001f4cbb..2b6564e8bfe 100644 --- a/drivers/video/msm/mdp_ppp.c +++ b/drivers/video/msm/mdp_ppp.c @@ -69,6 +69,7 @@ static uint32_t bytes_per_pixel[] = { [MDP_ARGB_8888] = 4, [MDP_RGBA_8888] = 4, [MDP_BGRA_8888] = 4, + [MDP_RGBX_8888] = 4, [MDP_Y_CBCR_H2V1] = 1, [MDP_Y_CBCR_H2V2] = 1, [MDP_Y_CRCB_H2V1] = 1, diff --git a/drivers/video/msm/msm_fb.c b/drivers/video/msm/msm_fb.c index debe5933fd2..ec351309e60 100644 --- a/drivers/video/msm/msm_fb.c +++ b/drivers/video/msm/msm_fb.c @@ -81,7 +81,6 @@ struct msmfb_info { spinlock_t update_lock; struct mutex panel_init_lock; wait_queue_head_t frame_wq; - struct workqueue_struct *resume_workqueue; struct work_struct resume_work; struct msmfb_callback dma_callback; struct msmfb_callback vsync_callback; @@ -111,7 +110,7 @@ static void msmfb_handle_dma_interrupt(struct msmfb_callback *callback) if (msmfb->sleeping == UPDATING && msmfb->frame_done == msmfb->update_frame) { DLOG(SUSPEND_RESUME, "full update completed\n"); - queue_work(msmfb->resume_workqueue, &msmfb->resume_work); + schedule_work(&msmfb->resume_work); } spin_unlock_irqrestore(&msmfb->update_lock, irq_flags); wake_up(&msmfb->frame_wq); @@ -220,8 +219,8 @@ restart: sleeping = msmfb->sleeping; /* on a full update, if the last frame has not completed, wait for it */ - if (pan_display && (msmfb->frame_requested != msmfb->frame_done || - sleeping == UPDATING)) { + if ((pan_display && msmfb->frame_requested != msmfb->frame_done) || + sleeping == UPDATING) { int ret; spin_unlock_irqrestore(&msmfb->update_lock, irq_flags); ret = wait_event_interruptible_timeout(msmfb->frame_wq, @@ -470,6 +469,18 @@ static void setup_fb_info(struct msmfb_info *msmfb) fb_info->var.yoffset = 0; if (msmfb->panel->caps & MSMFB_CAP_PARTIAL_UPDATES) { + /* + * Set the param in the fixed screen, so userspace can't + * change it. This will be used to check for the + * capability. + */ + fb_info->fix.reserved[0] = 0x5444; + fb_info->fix.reserved[1] = 0x5055; + + /* + * This preloads the value so that if userspace doesn't + * change it, it will be a full update + */ fb_info->var.reserved[0] = 0x54445055; fb_info->var.reserved[1] = 0; fb_info->var.reserved[2] = (uint16_t)msmfb->xres | @@ -559,12 +570,6 @@ static int msmfb_probe(struct platform_device *pdev) spin_lock_init(&msmfb->update_lock); mutex_init(&msmfb->panel_init_lock); init_waitqueue_head(&msmfb->frame_wq); - msmfb->resume_workqueue = create_workqueue("panel_on"); - if (msmfb->resume_workqueue == NULL) { - printk(KERN_ERR "failed to create panel_on workqueue\n"); - ret = -ENOMEM; - goto error_create_workqueue; - } INIT_WORK(&msmfb->resume_work, power_on_panel); msmfb->black = kzalloc(msmfb->fb->var.bits_per_pixel*msmfb->xres, GFP_KERNEL); @@ -589,8 +594,6 @@ static int msmfb_probe(struct platform_device *pdev) return 0; error_register_framebuffer: - destroy_workqueue(msmfb->resume_workqueue); -error_create_workqueue: iounmap(fb->screen_base); error_setup_fbmem: framebuffer_release(msmfb->fb); diff --git a/drivers/video/mxsfb.c b/drivers/video/mxsfb.c new file mode 100644 index 00000000000..7d028488298 --- /dev/null +++ b/drivers/video/mxsfb.c @@ -0,0 +1,919 @@ +/* + * Copyright (C) 2010 Juergen Beisert, Pengutronix + * + * This code is based on: + * Author: Vitaly Wool <vital@embeddedalley.com> + * + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. + * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version 2 + * of the License, or (at your option) any later version. + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define DRIVER_NAME "mxsfb" + +/** + * @file + * @brief LCDIF driver for i.MX23 and i.MX28 + * + * The LCDIF support four modes of operation + * - MPU interface (to drive smart displays) -> not supported yet + * - VSYNC interface (like MPU interface plus Vsync) -> not supported yet + * - Dotclock interface (to drive LC displays with RGB data and sync signals) + * - DVI (to drive ITU-R BT656) -> not supported yet + * + * This driver depends on a correct setup of the pins used for this purpose + * (platform specific). + * + * For the developer: Don't forget to set the data bus width to the display + * in the imx_fb_videomode structure. You will else end up with ugly colours. + * If you fight against jitter you can vary the clock delay. This is a feature + * of the i.MX28 and you can vary it between 2 ns ... 8 ns in 2 ns steps. Give + * the required value in the imx_fb_videomode structure. + */ + +#include <linux/kernel.h> +#include <linux/platform_device.h> +#include <linux/clk.h> +#include <linux/dma-mapping.h> +#include <linux/io.h> +#include <mach/mxsfb.h> + +#define REG_SET 4 +#define REG_CLR 8 + +#define LCDC_CTRL 0x00 +#define LCDC_CTRL1 0x10 +#define LCDC_V4_CTRL2 0x20 +#define LCDC_V3_TRANSFER_COUNT 0x20 +#define LCDC_V4_TRANSFER_COUNT 0x30 +#define LCDC_V4_CUR_BUF 0x40 +#define LCDC_V4_NEXT_BUF 0x50 +#define LCDC_V3_CUR_BUF 0x30 +#define LCDC_V3_NEXT_BUF 0x40 +#define LCDC_TIMING 0x60 +#define LCDC_VDCTRL0 0x70 +#define LCDC_VDCTRL1 0x80 +#define LCDC_VDCTRL2 0x90 +#define LCDC_VDCTRL3 0xa0 +#define LCDC_VDCTRL4 0xb0 +#define LCDC_DVICTRL0 0xc0 +#define LCDC_DVICTRL1 0xd0 +#define LCDC_DVICTRL2 0xe0 +#define LCDC_DVICTRL3 0xf0 +#define LCDC_DVICTRL4 0x100 +#define LCDC_V4_DATA 0x180 +#define LCDC_V3_DATA 0x1b0 +#define LCDC_V4_DEBUG0 0x1d0 +#define LCDC_V3_DEBUG0 0x1f0 + +#define CTRL_SFTRST (1 << 31) +#define CTRL_CLKGATE (1 << 30) +#define CTRL_BYPASS_COUNT (1 << 19) +#define CTRL_VSYNC_MODE (1 << 18) +#define CTRL_DOTCLK_MODE (1 << 17) +#define CTRL_DATA_SELECT (1 << 16) +#define CTRL_SET_BUS_WIDTH(x) (((x) & 0x3) << 10) +#define CTRL_GET_BUS_WIDTH(x) (((x) >> 10) & 0x3) +#define CTRL_SET_WORD_LENGTH(x) (((x) & 0x3) << 8) +#define CTRL_GET_WORD_LENGTH(x) (((x) >> 8) & 0x3) +#define CTRL_MASTER (1 << 5) +#define CTRL_DF16 (1 << 3) +#define CTRL_DF18 (1 << 2) +#define CTRL_DF24 (1 << 1) +#define CTRL_RUN (1 << 0) + +#define CTRL1_FIFO_CLEAR (1 << 21) +#define CTRL1_SET_BYTE_PACKAGING(x) (((x) & 0xf) << 16) +#define CTRL1_GET_BYTE_PACKAGING(x) (((x) >> 16) & 0xf) + +#define TRANSFER_COUNT_SET_VCOUNT(x) (((x) & 0xffff) << 16) +#define TRANSFER_COUNT_GET_VCOUNT(x) (((x) >> 16) & 0xffff) +#define TRANSFER_COUNT_SET_HCOUNT(x) ((x) & 0xffff) +#define TRANSFER_COUNT_GET_HCOUNT(x) ((x) & 0xffff) + + +#define VDCTRL0_ENABLE_PRESENT (1 << 28) +#define VDCTRL0_VSYNC_ACT_HIGH (1 << 27) +#define VDCTRL0_HSYNC_ACT_HIGH (1 << 26) +#define VDCTRL0_DOTCLK_ACT_FAILING (1 << 25) +#define VDCTRL0_ENABLE_ACT_HIGH (1 << 24) +#define VDCTRL0_VSYNC_PERIOD_UNIT (1 << 21) +#define VDCTRL0_VSYNC_PULSE_WIDTH_UNIT (1 << 20) +#define VDCTRL0_HALF_LINE (1 << 19) +#define VDCTRL0_HALF_LINE_MODE (1 << 18) +#define VDCTRL0_SET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) +#define VDCTRL0_GET_VSYNC_PULSE_WIDTH(x) ((x) & 0x3ffff) + +#define VDCTRL2_SET_HSYNC_PERIOD(x) ((x) & 0x3ffff) +#define VDCTRL2_GET_HSYNC_PERIOD(x) ((x) & 0x3ffff) + +#define VDCTRL3_MUX_SYNC_SIGNALS (1 << 29) +#define VDCTRL3_VSYNC_ONLY (1 << 28) +#define SET_HOR_WAIT_CNT(x) (((x) & 0xfff) << 16) +#define GET_HOR_WAIT_CNT(x) (((x) >> 16) & 0xfff) +#define SET_VERT_WAIT_CNT(x) ((x) & 0xffff) +#define GET_VERT_WAIT_CNT(x) ((x) & 0xffff) + +#define VDCTRL4_SET_DOTCLK_DLY(x) (((x) & 0x7) << 29) /* v4 only */ +#define VDCTRL4_GET_DOTCLK_DLY(x) (((x) >> 29) & 0x7) /* v4 only */ +#define VDCTRL4_SYNC_SIGNALS_ON (1 << 18) +#define SET_DOTCLK_H_VALID_DATA_CNT(x) ((x) & 0x3ffff) + +#define DEBUG0_HSYNC (1 < 26) +#define DEBUG0_VSYNC (1 < 25) + +#define MIN_XRES 120 +#define MIN_YRES 120 + +#define RED 0 +#define GREEN 1 +#define BLUE 2 +#define TRANSP 3 + +enum mxsfb_devtype { + MXSFB_V3, + MXSFB_V4, +}; + +/* CPU dependent register offsets */ +struct mxsfb_devdata { + unsigned transfer_count; + unsigned cur_buf; + unsigned next_buf; + unsigned debug0; + unsigned hs_wdth_mask; + unsigned hs_wdth_shift; + unsigned ipversion; +}; + +struct mxsfb_info { + struct fb_info fb_info; + struct platform_device *pdev; + struct clk *clk; + void __iomem *base; /* registers */ + unsigned allocated_size; + int enabled; + unsigned ld_intf_width; + unsigned dotclk_delay; + const struct mxsfb_devdata *devdata; + int mapped; +}; + +#define mxsfb_is_v3(host) (host->devdata->ipversion == 3) +#define mxsfb_is_v4(host) (host->devdata->ipversion == 4) + +static const struct mxsfb_devdata mxsfb_devdata[] = { + [MXSFB_V3] = { + .transfer_count = LCDC_V3_TRANSFER_COUNT, + .cur_buf = LCDC_V3_CUR_BUF, + .next_buf = LCDC_V3_NEXT_BUF, + .debug0 = LCDC_V3_DEBUG0, + .hs_wdth_mask = 0xff, + .hs_wdth_shift = 24, + .ipversion = 3, + }, + [MXSFB_V4] = { + .transfer_count = LCDC_V4_TRANSFER_COUNT, + .cur_buf = LCDC_V4_CUR_BUF, + .next_buf = LCDC_V4_NEXT_BUF, + .debug0 = LCDC_V4_DEBUG0, + .hs_wdth_mask = 0x3fff, + .hs_wdth_shift = 18, + .ipversion = 4, + }, +}; + +#define to_imxfb_host(x) (container_of(x, struct mxsfb_info, fb_info)) + +/* mask and shift depends on architecture */ +static inline u32 set_hsync_pulse_width(struct mxsfb_info *host, unsigned val) +{ + return (val & host->devdata->hs_wdth_mask) << + host->devdata->hs_wdth_shift; +} + +static inline u32 get_hsync_pulse_width(struct mxsfb_info *host, unsigned val) +{ + return (val >> host->devdata->hs_wdth_shift) & + host->devdata->hs_wdth_mask; +} + +static const struct fb_bitfield def_rgb565[] = { + [RED] = { + .offset = 11, + .length = 5, + }, + [GREEN] = { + .offset = 5, + .length = 6, + }, + [BLUE] = { + .offset = 0, + .length = 5, + }, + [TRANSP] = { /* no support for transparency */ + .length = 0, + } +}; + +static const struct fb_bitfield def_rgb666[] = { + [RED] = { + .offset = 16, + .length = 6, + }, + [GREEN] = { + .offset = 8, + .length = 6, + }, + [BLUE] = { + .offset = 0, + .length = 6, + }, + [TRANSP] = { /* no support for transparency */ + .length = 0, + } +}; + +static const struct fb_bitfield def_rgb888[] = { + [RED] = { + .offset = 16, + .length = 8, + }, + [GREEN] = { + .offset = 8, + .length = 8, + }, + [BLUE] = { + .offset = 0, + .length = 8, + }, + [TRANSP] = { /* no support for transparency */ + .length = 0, + } +}; + +static inline unsigned chan_to_field(unsigned chan, struct fb_bitfield *bf) +{ + chan &= 0xffff; + chan >>= 16 - bf->length; + return chan << bf->offset; +} + +static int mxsfb_check_var(struct fb_var_screeninfo *var, + struct fb_info *fb_info) +{ + struct mxsfb_info *host = to_imxfb_host(fb_info); + const struct fb_bitfield *rgb = NULL; + + if (var->xres < MIN_XRES) + var->xres = MIN_XRES; + if (var->yres < MIN_YRES) + var->yres = MIN_YRES; + + var->xres_virtual = var->xres; + + var->yres_virtual = var->yres; + + switch (var->bits_per_pixel) { + case 16: + /* always expect RGB 565 */ + rgb = def_rgb565; + break; + case 32: + switch (host->ld_intf_width) { + case STMLCDIF_8BIT: + pr_debug("Unsupported LCD bus width mapping\n"); + break; + case STMLCDIF_16BIT: + case STMLCDIF_18BIT: + /* 24 bit to 18 bit mapping */ + rgb = def_rgb666; + break; + case STMLCDIF_24BIT: + /* real 24 bit */ + rgb = def_rgb888; + break; + } + break; + default: + pr_debug("Unsupported colour depth: %u\n", var->bits_per_pixel); + return -EINVAL; + } + + /* + * Copy the RGB parameters for this display + * from the machine specific parameters. + */ + var->red = rgb[RED]; + var->green = rgb[GREEN]; + var->blue = rgb[BLUE]; + var->transp = rgb[TRANSP]; + + return 0; +} + +static void mxsfb_enable_controller(struct fb_info *fb_info) +{ + struct mxsfb_info *host = to_imxfb_host(fb_info); + u32 reg; + + dev_dbg(&host->pdev->dev, "%s\n", __func__); + + clk_enable(host->clk); + clk_set_rate(host->clk, PICOS2KHZ(fb_info->var.pixclock) * 1000U); + + /* if it was disabled, re-enable the mode again */ + writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_SET); + + /* enable the SYNC signals first, then the DMA engine */ + reg = readl(host->base + LCDC_VDCTRL4); + reg |= VDCTRL4_SYNC_SIGNALS_ON; + writel(reg, host->base + LCDC_VDCTRL4); + + writel(CTRL_RUN, host->base + LCDC_CTRL + REG_SET); + + host->enabled = 1; +} + +static void mxsfb_disable_controller(struct fb_info *fb_info) +{ + struct mxsfb_info *host = to_imxfb_host(fb_info); + unsigned loop; + u32 reg; + + dev_dbg(&host->pdev->dev, "%s\n", __func__); + + /* + * Even if we disable the controller here, it will still continue + * until its FIFOs are running out of data + */ + writel(CTRL_DOTCLK_MODE, host->base + LCDC_CTRL + REG_CLR); + + loop = 1000; + while (loop) { + reg = readl(host->base + LCDC_CTRL); + if (!(reg & CTRL_RUN)) + break; + loop--; + } + + writel(VDCTRL4_SYNC_SIGNALS_ON, host->base + LCDC_VDCTRL4 + REG_CLR); + + clk_disable(host->clk); + + host->enabled = 0; +} + +static int mxsfb_set_par(struct fb_info *fb_info) +{ + struct mxsfb_info *host = to_imxfb_host(fb_info); + u32 ctrl, vdctrl0, vdctrl4; + int line_size, fb_size; + int reenable = 0; + + line_size = fb_info->var.xres * (fb_info->var.bits_per_pixel >> 3); + fb_size = fb_info->var.yres_virtual * line_size; + + if (fb_size > fb_info->fix.smem_len) + return -ENOMEM; + + fb_info->fix.line_length = line_size; + + /* + * It seems, you can't re-program the controller if it is still running. + * This may lead into shifted pictures (FIFO issue?). + * So, first stop the controller and drain its FIFOs + */ + if (host->enabled) { + reenable = 1; + mxsfb_disable_controller(fb_info); + } + + /* clear the FIFOs */ + writel(CTRL1_FIFO_CLEAR, host->base + LCDC_CTRL1 + REG_SET); + + ctrl = CTRL_BYPASS_COUNT | CTRL_MASTER | + CTRL_SET_BUS_WIDTH(host->ld_intf_width);; + + switch (fb_info->var.bits_per_pixel) { + case 16: + dev_dbg(&host->pdev->dev, "Setting up RGB565 mode\n"); + ctrl |= CTRL_SET_WORD_LENGTH(0); + writel(CTRL1_SET_BYTE_PACKAGING(0xf), host->base + LCDC_CTRL1); + break; + case 32: + dev_dbg(&host->pdev->dev, "Setting up RGB888/666 mode\n"); + ctrl |= CTRL_SET_WORD_LENGTH(3); + switch (host->ld_intf_width) { + case STMLCDIF_8BIT: + dev_dbg(&host->pdev->dev, + "Unsupported LCD bus width mapping\n"); + return -EINVAL; + case STMLCDIF_16BIT: + case STMLCDIF_18BIT: + /* 24 bit to 18 bit mapping */ + ctrl |= CTRL_DF24; /* ignore the upper 2 bits in + * each colour component + */ + break; + case STMLCDIF_24BIT: + /* real 24 bit */ + break; + } + /* do not use packed pixels = one pixel per word instead */ + writel(CTRL1_SET_BYTE_PACKAGING(0x7), host->base + LCDC_CTRL1); + break; + default: + dev_dbg(&host->pdev->dev, "Unhandled color depth of %u\n", + fb_info->var.bits_per_pixel); + return -EINVAL; + } + + writel(ctrl, host->base + LCDC_CTRL); + + writel(TRANSFER_COUNT_SET_VCOUNT(fb_info->var.yres) | + TRANSFER_COUNT_SET_HCOUNT(fb_info->var.xres), + host->base + host->devdata->transfer_count); + + vdctrl0 = VDCTRL0_ENABLE_PRESENT | /* always in DOTCLOCK mode */ + VDCTRL0_VSYNC_PERIOD_UNIT | + VDCTRL0_VSYNC_PULSE_WIDTH_UNIT | + VDCTRL0_SET_VSYNC_PULSE_WIDTH(fb_info->var.vsync_len); + if (fb_info->var.sync & FB_SYNC_HOR_HIGH_ACT) + vdctrl0 |= VDCTRL0_HSYNC_ACT_HIGH; + if (fb_info->var.sync & FB_SYNC_VERT_HIGH_ACT) + vdctrl0 |= VDCTRL0_VSYNC_ACT_HIGH; + if (fb_info->var.sync & FB_SYNC_DATA_ENABLE_HIGH_ACT) + vdctrl0 |= VDCTRL0_ENABLE_ACT_HIGH; + if (fb_info->var.sync & FB_SYNC_DOTCLK_FAILING_ACT) + vdctrl0 |= VDCTRL0_DOTCLK_ACT_FAILING; + + writel(vdctrl0, host->base + LCDC_VDCTRL0); + + /* frame length in lines */ + writel(fb_info->var.upper_margin + fb_info->var.vsync_len + + fb_info->var.lower_margin + fb_info->var.yres, + host->base + LCDC_VDCTRL1); + + /* line length in units of clocks or pixels */ + writel(set_hsync_pulse_width(host, fb_info->var.hsync_len) | + VDCTRL2_SET_HSYNC_PERIOD(fb_info->var.left_margin + + fb_info->var.hsync_len + fb_info->var.right_margin + + fb_info->var.xres), + host->base + LCDC_VDCTRL2); + + writel(SET_HOR_WAIT_CNT(fb_info->var.left_margin + + fb_info->var.hsync_len) | + SET_VERT_WAIT_CNT(fb_info->var.upper_margin + + fb_info->var.vsync_len), + host->base + LCDC_VDCTRL3); + + vdctrl4 = SET_DOTCLK_H_VALID_DATA_CNT(fb_info->var.xres); + if (mxsfb_is_v4(host)) + vdctrl4 |= VDCTRL4_SET_DOTCLK_DLY(host->dotclk_delay); + writel(vdctrl4, host->base + LCDC_VDCTRL4); + + writel(fb_info->fix.smem_start + + fb_info->fix.line_length * fb_info->var.yoffset, + host->base + host->devdata->next_buf); + + if (reenable) + mxsfb_enable_controller(fb_info); + + return 0; +} + +static int mxsfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue, + u_int transp, struct fb_info *fb_info) +{ + unsigned int val; + int ret = -EINVAL; + + /* + * If greyscale is true, then we convert the RGB value + * to greyscale no matter what visual we are using. + */ + if (fb_info->var.grayscale) + red = green = blue = (19595 * red + 38470 * green + + 7471 * blue) >> 16; + + switch (fb_info->fix.visual) { + case FB_VISUAL_TRUECOLOR: + /* + * 12 or 16-bit True Colour. We encode the RGB value + * according to the RGB bitfield information. + */ + if (regno < 16) { + u32 *pal = fb_info->pseudo_palette; + + val = chan_to_field(red, &fb_info->var.red); + val |= chan_to_field(green, &fb_info->var.green); + val |= chan_to_field(blue, &fb_info->var.blue); + + pal[regno] = val; + ret = 0; + } + break; + + case FB_VISUAL_STATIC_PSEUDOCOLOR: + case FB_VISUAL_PSEUDOCOLOR: + break; + } + + return ret; +} + +static int mxsfb_blank(int blank, struct fb_info *fb_info) +{ + struct mxsfb_info *host = to_imxfb_host(fb_info); + + switch (blank) { + case FB_BLANK_POWERDOWN: + case FB_BLANK_VSYNC_SUSPEND: + case FB_BLANK_HSYNC_SUSPEND: + case FB_BLANK_NORMAL: + if (host->enabled) + mxsfb_disable_controller(fb_info); + break; + + case FB_BLANK_UNBLANK: + if (!host->enabled) + mxsfb_enable_controller(fb_info); + break; + } + return 0; +} + +static int mxsfb_pan_display(struct fb_var_screeninfo *var, + struct fb_info *fb_info) +{ + struct mxsfb_info *host = to_imxfb_host(fb_info); + unsigned offset; + + if (var->xoffset != 0) + return -EINVAL; + + offset = fb_info->fix.line_length * var->yoffset; + + /* update on next VSYNC */ + writel(fb_info->fix.smem_start + offset, + host->base + host->devdata->next_buf); + + return 0; +} + +static struct fb_ops mxsfb_ops = { + .owner = THIS_MODULE, + .fb_check_var = mxsfb_check_var, + .fb_set_par = mxsfb_set_par, + .fb_setcolreg = mxsfb_setcolreg, + .fb_blank = mxsfb_blank, + .fb_pan_display = mxsfb_pan_display, + .fb_fillrect = cfb_fillrect, + .fb_copyarea = cfb_copyarea, + .fb_imageblit = cfb_imageblit, +}; + +static int __devinit mxsfb_restore_mode(struct mxsfb_info *host) +{ + struct fb_info *fb_info = &host->fb_info; + unsigned line_count; + unsigned period; + unsigned long pa, fbsize; + int bits_per_pixel, ofs; + u32 transfer_count, vdctrl0, vdctrl2, vdctrl3, vdctrl4, ctrl; + struct fb_videomode vmode; + + /* Only restore the mode when the controller is running */ + ctrl = readl(host->base + LCDC_CTRL); + if (!(ctrl & CTRL_RUN)) + return -EINVAL; + + vdctrl0 = readl(host->base + LCDC_VDCTRL0); + vdctrl2 = readl(host->base + LCDC_VDCTRL2); + vdctrl3 = readl(host->base + LCDC_VDCTRL3); + vdctrl4 = readl(host->base + LCDC_VDCTRL4); + + transfer_count = readl(host->base + host->devdata->transfer_count); + + vmode.xres = TRANSFER_COUNT_GET_HCOUNT(transfer_count); + vmode.yres = TRANSFER_COUNT_GET_VCOUNT(transfer_count); + + switch (CTRL_GET_WORD_LENGTH(ctrl)) { + case 0: + bits_per_pixel = 16; + break; + case 3: + bits_per_pixel = 32; + case 1: + default: + return -EINVAL; + } + + fb_info->var.bits_per_pixel = bits_per_pixel; + + vmode.pixclock = KHZ2PICOS(clk_get_rate(host->clk) / 1000U); + vmode.hsync_len = get_hsync_pulse_width(host, vdctrl2); + vmode.left_margin = GET_HOR_WAIT_CNT(vdctrl3) - vmode.hsync_len; + vmode.right_margin = VDCTRL2_GET_HSYNC_PERIOD(vdctrl2) - vmode.hsync_len - + vmode.left_margin - vmode.xres; + vmode.vsync_len = VDCTRL0_GET_VSYNC_PULSE_WIDTH(vdctrl0); + period = readl(host->base + LCDC_VDCTRL1); + vmode.upper_margin = GET_VERT_WAIT_CNT(vdctrl3) - vmode.vsync_len; + vmode.lower_margin = period - vmode.vsync_len - vmode.upper_margin - vmode.yres; + + vmode.vmode = FB_VMODE_NONINTERLACED; + + vmode.sync = 0; + if (vdctrl0 & VDCTRL0_HSYNC_ACT_HIGH) + vmode.sync |= FB_SYNC_HOR_HIGH_ACT; + if (vdctrl0 & VDCTRL0_VSYNC_ACT_HIGH) + vmode.sync |= FB_SYNC_VERT_HIGH_ACT; + + pr_debug("Reconstructed video mode:\n"); + pr_debug("%dx%d, hsync: %u left: %u, right: %u, vsync: %u, upper: %u, lower: %u\n", + vmode.xres, vmode.yres, + vmode.hsync_len, vmode.left_margin, vmode.right_margin, + vmode.vsync_len, vmode.upper_margin, vmode.lower_margin); + pr_debug("pixclk: %ldkHz\n", PICOS2KHZ(vmode.pixclock)); + + fb_add_videomode(&vmode, &fb_info->modelist); + + host->ld_intf_width = CTRL_GET_BUS_WIDTH(ctrl); + host->dotclk_delay = VDCTRL4_GET_DOTCLK_DLY(vdctrl4); + + fb_info->fix.line_length = vmode.xres * (bits_per_pixel >> 3); + + pa = readl(host->base + host->devdata->cur_buf); + fbsize = fb_info->fix.line_length * vmode.yres; + if (pa < fb_info->fix.smem_start) + return -EINVAL; + if (pa + fbsize > fb_info->fix.smem_start + fb_info->fix.smem_len) + return -EINVAL; + ofs = pa - fb_info->fix.smem_start; + if (ofs) { + memmove(fb_info->screen_base, fb_info->screen_base + ofs, fbsize); + writel(fb_info->fix.smem_start, host->base + host->devdata->next_buf); + } + + line_count = fb_info->fix.smem_len / fb_info->fix.line_length; + fb_info->fix.ypanstep = 1; + + clk_enable(host->clk); + host->enabled = 1; + + return 0; +} + +static int __devinit mxsfb_init_fbinfo(struct mxsfb_info *host) +{ + struct fb_info *fb_info = &host->fb_info; + struct fb_var_screeninfo *var = &fb_info->var; + struct mxsfb_platform_data *pdata = host->pdev->dev.platform_data; + dma_addr_t fb_phys; + void *fb_virt; + unsigned fb_size = pdata->fb_size; + + fb_info->fbops = &mxsfb_ops; + fb_info->flags = FBINFO_FLAG_DEFAULT | FBINFO_READS_FAST; + strlcpy(fb_info->fix.id, "mxs", sizeof(fb_info->fix.id)); + fb_info->fix.type = FB_TYPE_PACKED_PIXELS; + fb_info->fix.ypanstep = 1; + fb_info->fix.visual = FB_VISUAL_TRUECOLOR, + fb_info->fix.accel = FB_ACCEL_NONE; + + var->bits_per_pixel = pdata->default_bpp ? pdata->default_bpp : 16; + var->nonstd = 0; + var->activate = FB_ACTIVATE_NOW; + var->accel_flags = 0; + var->vmode = FB_VMODE_NONINTERLACED; + + host->dotclk_delay = pdata->dotclk_delay; + host->ld_intf_width = pdata->ld_intf_width; + + /* Memory allocation for framebuffer */ + if (pdata->fb_phys) { + if (!fb_size) + return -EINVAL; + + fb_phys = pdata->fb_phys; + + if (!request_mem_region(fb_phys, fb_size, host->pdev->name)) + return -ENOMEM; + + fb_virt = ioremap(fb_phys, fb_size); + if (!fb_virt) { + release_mem_region(fb_phys, fb_size); + return -ENOMEM; + } + host->mapped = 1; + } else { + if (!fb_size) + fb_size = SZ_2M; /* default */ + fb_virt = alloc_pages_exact(fb_size, GFP_DMA); + if (!fb_virt) + return -ENOMEM; + + fb_phys = virt_to_phys(fb_virt); + } + + fb_info->fix.smem_start = fb_phys; + fb_info->screen_base = fb_virt; + fb_info->screen_size = fb_info->fix.smem_len = fb_size; + + if (mxsfb_restore_mode(host)) + memset(fb_virt, 0, fb_size); + + return 0; +} + +static void __devexit mxsfb_free_videomem(struct mxsfb_info *host) +{ + struct fb_info *fb_info = &host->fb_info; + + if (host->mapped) { + iounmap(fb_info->screen_base); + release_mem_region(fb_info->fix.smem_start, + fb_info->screen_size); + } else { + free_pages_exact(fb_info->screen_base, fb_info->fix.smem_len); + } +} + +static int __devinit mxsfb_probe(struct platform_device *pdev) +{ + struct mxsfb_platform_data *pdata = pdev->dev.platform_data; + struct resource *res; + struct mxsfb_info *host; + struct fb_info *fb_info; + struct fb_modelist *modelist; + int i, ret; + + if (!pdata) { + dev_err(&pdev->dev, "No platformdata. Giving up\n"); + return -ENODEV; + } + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + dev_err(&pdev->dev, "Cannot get memory IO resource\n"); + return -ENODEV; + } + + if (!request_mem_region(res->start, resource_size(res), pdev->name)) + return -EBUSY; + + fb_info = framebuffer_alloc(sizeof(struct mxsfb_info), &pdev->dev); + if (!fb_info) { + dev_err(&pdev->dev, "Failed to allocate fbdev\n"); + ret = -ENOMEM; + goto error_alloc_info; + } + + host = to_imxfb_host(fb_info); + + host->base = ioremap(res->start, resource_size(res)); + if (!host->base) { + dev_err(&pdev->dev, "ioremap failed\n"); + ret = -ENOMEM; + goto error_ioremap; + } + + host->pdev = pdev; + platform_set_drvdata(pdev, host); + + host->devdata = &mxsfb_devdata[pdev->id_entry->driver_data]; + + host->clk = clk_get(&host->pdev->dev, NULL); + if (IS_ERR(host->clk)) { + ret = PTR_ERR(host->clk); + goto error_getclock; + } + + fb_info->pseudo_palette = kmalloc(sizeof(u32) * 16, GFP_KERNEL); + if (!fb_info->pseudo_palette) { + ret = -ENOMEM; + goto error_pseudo_pallette; + } + + INIT_LIST_HEAD(&fb_info->modelist); + + ret = mxsfb_init_fbinfo(host); + if (ret != 0) + goto error_init_fb; + + for (i = 0; i < pdata->mode_count; i++) + fb_add_videomode(&pdata->mode_list[i], &fb_info->modelist); + + modelist = list_first_entry(&fb_info->modelist, + struct fb_modelist, list); + fb_videomode_to_var(&fb_info->var, &modelist->mode); + + /* init the color fields */ + mxsfb_check_var(&fb_info->var, fb_info); + + platform_set_drvdata(pdev, fb_info); + + ret = register_framebuffer(fb_info); + if (ret != 0) { + dev_err(&pdev->dev,"Failed to register framebuffer\n"); + goto error_register; + } + + if (!host->enabled) { + writel(0, host->base + LCDC_CTRL); + mxsfb_set_par(fb_info); + mxsfb_enable_controller(fb_info); + } + + dev_info(&pdev->dev, "initialized\n"); + + return 0; + +error_register: + if (host->enabled) + clk_disable(host->clk); + fb_destroy_modelist(&fb_info->modelist); +error_init_fb: + kfree(fb_info->pseudo_palette); +error_pseudo_pallette: + clk_put(host->clk); +error_getclock: + iounmap(host->base); +error_ioremap: + framebuffer_release(fb_info); +error_alloc_info: + release_mem_region(res->start, resource_size(res)); + + return ret; +} + +static int __devexit mxsfb_remove(struct platform_device *pdev) +{ + struct fb_info *fb_info = platform_get_drvdata(pdev); + struct mxsfb_info *host = to_imxfb_host(fb_info); + struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + + if (host->enabled) + mxsfb_disable_controller(fb_info); + + unregister_framebuffer(fb_info); + kfree(fb_info->pseudo_palette); + mxsfb_free_videomem(host); + iounmap(host->base); + clk_put(host->clk); + + framebuffer_release(fb_info); + release_mem_region(res->start, resource_size(res)); + + platform_set_drvdata(pdev, NULL); + + return 0; +} + +static struct platform_device_id mxsfb_devtype[] = { + { + .name = "imx23-fb", + .driver_data = MXSFB_V3, + }, { + .name = "imx28-fb", + .driver_data = MXSFB_V4, + }, { + /* sentinel */ + } +}; +MODULE_DEVICE_TABLE(platform, mxsfb_devtype); + +static struct platform_driver mxsfb_driver = { + .probe = mxsfb_probe, + .remove = __devexit_p(mxsfb_remove), + .id_table = mxsfb_devtype, + .driver = { + .name = DRIVER_NAME, + }, +}; + +static int __init mxsfb_init(void) +{ + return platform_driver_register(&mxsfb_driver); +} + +static void __exit mxsfb_exit(void) +{ + platform_driver_unregister(&mxsfb_driver); +} + +module_init(mxsfb_init); +module_exit(mxsfb_exit); + +MODULE_DESCRIPTION("Freescale mxs framebuffer driver"); +MODULE_AUTHOR("Sascha Hauer, Pengutronix"); +MODULE_LICENSE("GPL"); diff --git a/drivers/video/p9100.c b/drivers/video/p9100.c index b6c3fc2db63..d57cc58c516 100644 --- a/drivers/video/p9100.c +++ b/drivers/video/p9100.c @@ -249,7 +249,7 @@ static void p9100_init_fix(struct fb_info *info, int linebytes, struct device_no info->fix.accel = FB_ACCEL_SUN_CGTHREE; } -static int __devinit p9100_probe(struct platform_device *op, const struct of_device_id *match) +static int __devinit p9100_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct fb_info *info; @@ -352,7 +352,7 @@ static const struct of_device_id p9100_match[] = { }; MODULE_DEVICE_TABLE(of, p9100_match); -static struct of_platform_driver p9100_driver = { +static struct platform_driver p9100_driver = { .driver = { .name = "p9100", .owner = THIS_MODULE, @@ -367,12 +367,12 @@ static int __init p9100_init(void) if (fb_get_options("p9100fb", NULL)) return -ENODEV; - return of_register_platform_driver(&p9100_driver); + return platform_driver_register(&p9100_driver); } static void __exit p9100_exit(void) { - of_unregister_platform_driver(&p9100_driver); + platform_driver_unregister(&p9100_driver); } module_init(p9100_init); diff --git a/drivers/video/platinumfb.c b/drivers/video/platinumfb.c index a50e1977b31..ef532d9d3c9 100644 --- a/drivers/video/platinumfb.c +++ b/drivers/video/platinumfb.c @@ -533,8 +533,7 @@ static int __init platinumfb_setup(char *options) #define invalidate_cache(addr) #endif -static int __devinit platinumfb_probe(struct platform_device* odev, - const struct of_device_id *match) +static int __devinit platinumfb_probe(struct platform_device* odev) { struct device_node *dp = odev->dev.of_node; struct fb_info *info; @@ -677,7 +676,7 @@ static struct of_device_id platinumfb_match[] = {}, }; -static struct of_platform_driver platinum_driver = +static struct platform_driver platinum_driver = { .driver = { .name = "platinumfb", @@ -697,14 +696,14 @@ static int __init platinumfb_init(void) return -ENODEV; platinumfb_setup(option); #endif - of_register_platform_driver(&platinum_driver); + platform_driver_register(&platinum_driver); return 0; } static void __exit platinumfb_exit(void) { - of_unregister_platform_driver(&platinum_driver); + platform_driver_unregister(&platinum_driver); } MODULE_LICENSE("GPL"); diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c index bf12e53aed5..bf2629f83f4 100644 --- a/drivers/video/sh_mobile_lcdcfb.c +++ b/drivers/video/sh_mobile_lcdcfb.c @@ -21,6 +21,8 @@ #include <linux/ioctl.h> #include <linux/slab.h> #include <linux/console.h> +#include <linux/backlight.h> +#include <linux/gpio.h> #include <video/sh_mobile_lcdc.h> #include <asm/atomic.h> @@ -67,6 +69,7 @@ static unsigned long lcdc_offs_mainlcd[NR_CH_REGS] = { [LDSM1R] = 0x428, [LDSM2R] = 0x42c, [LDSA1R] = 0x430, + [LDSA2R] = 0x434, [LDMLSR] = 0x438, [LDHCNR] = 0x448, [LDHSYNR] = 0x44c, @@ -151,6 +154,7 @@ static bool banked(int reg_nr) case LDDFR: case LDSM1R: case LDSA1R: + case LDSA2R: case LDMLSR: case LDHCNR: case LDHSYNR: @@ -463,6 +467,7 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) struct sh_mobile_lcdc_board_cfg *board_cfg; unsigned long tmp; int bpp = 0; + unsigned long ldddsr; int k, m; int ret = 0; @@ -541,16 +546,21 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) } /* word and long word swap */ - switch (bpp) { - case 16: - lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 6); - break; - case 24: - lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 7); - break; - case 32: - lcdc_write(priv, _LDDDSR, lcdc_read(priv, _LDDDSR) | 4); - break; + ldddsr = lcdc_read(priv, _LDDDSR); + if (priv->ch[0].info->var.nonstd) + lcdc_write(priv, _LDDDSR, ldddsr | 7); + else { + switch (bpp) { + case 16: + lcdc_write(priv, _LDDDSR, ldddsr | 6); + break; + case 24: + lcdc_write(priv, _LDDDSR, ldddsr | 7); + break; + case 32: + lcdc_write(priv, _LDDDSR, ldddsr | 4); + break; + } } for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { @@ -561,21 +571,40 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) /* set bpp format in PKF[4:0] */ tmp = lcdc_read_chan(ch, LDDFR); - tmp &= ~0x0001001f; - switch (ch->info->var.bits_per_pixel) { - case 16: - tmp |= 0x03; - break; - case 24: - tmp |= 0x0b; - break; - case 32: - break; + tmp &= ~0x0003031f; + if (ch->info->var.nonstd) { + tmp |= (ch->info->var.nonstd << 16); + switch (ch->info->var.bits_per_pixel) { + case 12: + break; + case 16: + tmp |= (0x1 << 8); + break; + case 24: + tmp |= (0x2 << 8); + break; + } + } else { + switch (ch->info->var.bits_per_pixel) { + case 16: + tmp |= 0x03; + break; + case 24: + tmp |= 0x0b; + break; + case 32: + break; + } } lcdc_write_chan(ch, LDDFR, tmp); /* point out our frame buffer */ lcdc_write_chan(ch, LDSA1R, ch->info->fix.smem_start); + if (ch->info->var.nonstd) + lcdc_write_chan(ch, LDSA2R, + ch->info->fix.smem_start + + ch->info->var.xres * + ch->info->var.yres_virtual); /* set line size */ lcdc_write_chan(ch, LDMLSR, ch->info->fix.line_length); @@ -618,6 +647,11 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) board_cfg->display_on(board_cfg->board_data, ch->info); module_put(board_cfg->owner); } + + if (ch->bl) { + ch->bl->props.power = FB_BLANK_UNBLANK; + backlight_update_status(ch->bl); + } } return 0; @@ -648,6 +682,11 @@ static void sh_mobile_lcdc_stop(struct sh_mobile_lcdc_priv *priv) sh_mobile_lcdc_clk_on(priv); } + if (ch->bl) { + ch->bl->props.power = FB_BLANK_POWERDOWN; + backlight_update_status(ch->bl); + } + board_cfg = &ch->cfg.board_cfg; if (try_module_get(board_cfg->owner) && board_cfg->display_off) { board_cfg->display_off(board_cfg->board_data); @@ -804,9 +843,15 @@ static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var, struct sh_mobile_lcdc_priv *priv = ch->lcdc; unsigned long ldrcntr; unsigned long new_pan_offset; + unsigned long base_addr_y, base_addr_c; + unsigned long c_offset; - new_pan_offset = (var->yoffset * info->fix.line_length) + - (var->xoffset * (info->var.bits_per_pixel / 8)); + if (!var->nonstd) + new_pan_offset = (var->yoffset * info->fix.line_length) + + (var->xoffset * (info->var.bits_per_pixel / 8)); + else + new_pan_offset = (var->yoffset * info->fix.line_length) + + (var->xoffset); if (new_pan_offset == ch->pan_offset) return 0; /* No change, do nothing */ @@ -814,7 +859,26 @@ static int sh_mobile_fb_pan_display(struct fb_var_screeninfo *var, ldrcntr = lcdc_read(priv, _LDRCNTR); /* Set the source address for the next refresh */ - lcdc_write_chan_mirror(ch, LDSA1R, ch->dma_handle + new_pan_offset); + base_addr_y = ch->dma_handle + new_pan_offset; + if (var->nonstd) { + /* Set y offset */ + c_offset = (var->yoffset * + info->fix.line_length * + (info->var.bits_per_pixel - 8)) / 8; + base_addr_c = ch->dma_handle + var->xres * var->yres_virtual + + c_offset; + /* Set x offset */ + if (info->var.bits_per_pixel == 24) + base_addr_c += 2 * var->xoffset; + else + base_addr_c += var->xoffset; + } else + base_addr_c = 0; + + lcdc_write_chan_mirror(ch, LDSA1R, base_addr_y); + if (base_addr_c) + lcdc_write_chan_mirror(ch, LDSA2R, base_addr_c); + if (lcdc_chan_is_sublcd(ch)) lcdc_write(ch->lcdc, _LDRCNTR, ldrcntr ^ LDRCNTR_SRS); else @@ -885,7 +949,10 @@ static void sh_mobile_fb_reconfig(struct fb_info *info) /* Couldn't reconfigure, hopefully, can continue as before */ return; - info->fix.line_length = mode1.xres * (ch->cfg.bpp / 8); + if (info->var.nonstd) + info->fix.line_length = mode1.xres; + else + info->fix.line_length = mode1.xres * (ch->cfg.bpp / 8); /* * fb_set_var() calls the notifier change internally, only if @@ -980,8 +1047,80 @@ static struct fb_ops sh_mobile_lcdc_ops = { .fb_check_var = sh_mobile_check_var, }; -static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp) +static int sh_mobile_lcdc_update_bl(struct backlight_device *bdev) +{ + struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev); + struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg; + int brightness = bdev->props.brightness; + + if (bdev->props.power != FB_BLANK_UNBLANK || + bdev->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK)) + brightness = 0; + + return cfg->set_brightness(cfg->board_data, brightness); +} + +static int sh_mobile_lcdc_get_brightness(struct backlight_device *bdev) +{ + struct sh_mobile_lcdc_chan *ch = bl_get_data(bdev); + struct sh_mobile_lcdc_board_cfg *cfg = &ch->cfg.board_cfg; + + return cfg->get_brightness(cfg->board_data); +} + +static int sh_mobile_lcdc_check_fb(struct backlight_device *bdev, + struct fb_info *info) +{ + return (info->bl_dev == bdev); +} + +static struct backlight_ops sh_mobile_lcdc_bl_ops = { + .options = BL_CORE_SUSPENDRESUME, + .update_status = sh_mobile_lcdc_update_bl, + .get_brightness = sh_mobile_lcdc_get_brightness, + .check_fb = sh_mobile_lcdc_check_fb, +}; + +static struct backlight_device *sh_mobile_lcdc_bl_probe(struct device *parent, + struct sh_mobile_lcdc_chan *ch) +{ + struct backlight_device *bl; + + bl = backlight_device_register(ch->cfg.bl_info.name, parent, ch, + &sh_mobile_lcdc_bl_ops, NULL); + if (!bl) { + dev_err(parent, "unable to register backlight device\n"); + return NULL; + } + + bl->props.max_brightness = ch->cfg.bl_info.max_brightness; + bl->props.brightness = bl->props.max_brightness; + backlight_update_status(bl); + + return bl; +} + +static void sh_mobile_lcdc_bl_remove(struct backlight_device *bdev) +{ + backlight_device_unregister(bdev); +} + +static int sh_mobile_lcdc_set_bpp(struct fb_var_screeninfo *var, int bpp, + int nonstd) { + if (nonstd) { + switch (bpp) { + case 12: + case 16: + case 24: + var->bits_per_pixel = bpp; + var->nonstd = nonstd; + return 0; + default: + return -EINVAL; + } + } + switch (bpp) { case 16: /* PKF[4:0] = 00011 - RGB 565 */ var->red.offset = 11; @@ -1198,6 +1337,10 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev) init_completion(&ch->vsync_completion); ch->pan_offset = 0; + /* probe the backlight is there is one defined */ + if (ch->cfg.bl_info.max_brightness) + ch->bl = sh_mobile_lcdc_bl_probe(&pdev->dev, ch); + switch (pdata->ch[i].chan) { case LCDC_CHAN_MAINLCD: ch->enabled = 1 << 1; @@ -1260,6 +1403,14 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev) k < cfg->num_cfg && lcd_cfg; k++, lcd_cfg++) { unsigned long size = lcd_cfg->yres * lcd_cfg->xres; + /* NV12 buffers must have even number of lines */ + if ((cfg->nonstd) && cfg->bpp == 12 && + (lcd_cfg->yres & 0x1)) { + dev_err(&pdev->dev, "yres must be multiple of 2" + " for YCbCr420 mode.\n"); + error = -EINVAL; + goto err1; + } if (size > max_size) { max_cfg = lcd_cfg; @@ -1274,7 +1425,11 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev) max_cfg->xres, max_cfg->yres); info->fix = sh_mobile_lcdc_fix; - info->fix.smem_len = max_size * (cfg->bpp / 8) * 2; + info->fix.smem_len = max_size * 2 * cfg->bpp / 8; + + /* Only pan in 2 line steps for NV12 */ + if (cfg->nonstd && cfg->bpp == 12) + info->fix.ypanstep = 2; if (!mode) { mode = &default_720p; @@ -1292,7 +1447,7 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev) var->yres_virtual = var->yres * 2; var->activate = FB_ACTIVATE_NOW; - error = sh_mobile_lcdc_set_bpp(var, cfg->bpp); + error = sh_mobile_lcdc_set_bpp(var, cfg->bpp, cfg->nonstd); if (error) break; @@ -1316,7 +1471,11 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev) } info->fix.smem_start = ch->dma_handle; - info->fix.line_length = var->xres * (cfg->bpp / 8); + if (var->nonstd) + info->fix.line_length = var->xres; + else + info->fix.line_length = var->xres * (cfg->bpp / 8); + info->screen_base = buf; info->device = &pdev->dev; ch->display_var = *var; @@ -1345,6 +1504,8 @@ static int __devinit sh_mobile_lcdc_probe(struct platform_device *pdev) } } + info->bl_dev = ch->bl; + error = register_framebuffer(info); if (error < 0) goto err1; @@ -1404,6 +1565,11 @@ static int sh_mobile_lcdc_remove(struct platform_device *pdev) framebuffer_release(info); } + for (i = 0; i < ARRAY_SIZE(priv->ch); i++) { + if (priv->ch[i].bl) + sh_mobile_lcdc_bl_remove(priv->ch[i].bl); + } + if (priv->dot_clk) clk_put(priv->dot_clk); diff --git a/drivers/video/sh_mobile_lcdcfb.h b/drivers/video/sh_mobile_lcdcfb.h index 9ecee2fba1d..4635eed63ee 100644 --- a/drivers/video/sh_mobile_lcdcfb.h +++ b/drivers/video/sh_mobile_lcdcfb.h @@ -8,7 +8,7 @@ /* per-channel registers */ enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R, - LDSM2R, LDSA1R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR, + LDSM2R, LDSA1R, LDSA2R, LDMLSR, LDHCNR, LDHSYNR, LDVLNR, LDVSYNR, LDPMR, LDHAJR, NR_CH_REGS }; @@ -16,6 +16,7 @@ enum { LDDCKPAT1R, LDDCKPAT2R, LDMT1R, LDMT2R, LDMT3R, LDDFR, LDSM1R, struct sh_mobile_lcdc_priv; struct fb_info; +struct backlight_device; struct sh_mobile_lcdc_chan { struct sh_mobile_lcdc_priv *lcdc; @@ -26,6 +27,7 @@ struct sh_mobile_lcdc_chan { u32 pseudo_palette[PALETTE_NR]; unsigned long saved_ch_regs[NR_CH_REGS]; struct fb_info *info; + struct backlight_device *bl; dma_addr_t dma_handle; struct fb_deferred_io defio; struct scatterlist *sglist; diff --git a/drivers/video/sunxvr1000.c b/drivers/video/sunxvr1000.c index 5dbe06af222..b7f27acaf81 100644 --- a/drivers/video/sunxvr1000.c +++ b/drivers/video/sunxvr1000.c @@ -111,8 +111,7 @@ static int __devinit gfb_set_fbinfo(struct gfb_info *gp) return 0; } -static int __devinit gfb_probe(struct platform_device *op, - const struct of_device_id *match) +static int __devinit gfb_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct fb_info *info; @@ -198,7 +197,7 @@ static const struct of_device_id gfb_match[] = { }; MODULE_DEVICE_TABLE(of, ffb_match); -static struct of_platform_driver gfb_driver = { +static struct platform_driver gfb_driver = { .probe = gfb_probe, .remove = __devexit_p(gfb_remove), .driver = { @@ -213,12 +212,12 @@ static int __init gfb_init(void) if (fb_get_options("gfb", NULL)) return -ENODEV; - return of_register_platform_driver(&gfb_driver); + return platform_driver_register(&gfb_driver); } static void __exit gfb_exit(void) { - of_unregister_platform_driver(&gfb_driver); + platform_driver_unregister(&gfb_driver); } module_init(gfb_init); diff --git a/drivers/video/tcx.c b/drivers/video/tcx.c index 77ad27955cf..855b71993f6 100644 --- a/drivers/video/tcx.c +++ b/drivers/video/tcx.c @@ -362,8 +362,7 @@ static void tcx_unmap_regs(struct platform_device *op, struct fb_info *info, info->screen_base, info->fix.smem_len); } -static int __devinit tcx_probe(struct platform_device *op, - const struct of_device_id *match) +static int __devinit tcx_probe(struct platform_device *op) { struct device_node *dp = op->dev.of_node; struct fb_info *info; @@ -511,7 +510,7 @@ static const struct of_device_id tcx_match[] = { }; MODULE_DEVICE_TABLE(of, tcx_match); -static struct of_platform_driver tcx_driver = { +static struct platform_driver tcx_driver = { .driver = { .name = "tcx", .owner = THIS_MODULE, @@ -526,12 +525,12 @@ static int __init tcx_init(void) if (fb_get_options("tcxfb", NULL)) return -ENODEV; - return of_register_platform_driver(&tcx_driver); + return platform_driver_register(&tcx_driver); } static void __exit tcx_exit(void) { - of_unregister_platform_driver(&tcx_driver); + platform_driver_unregister(&tcx_driver); } module_init(tcx_init); diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c index 52ec0959d46..5180a215d78 100644 --- a/drivers/video/uvesafb.c +++ b/drivers/video/uvesafb.c @@ -73,7 +73,7 @@ static void uvesafb_cn_callback(struct cn_msg *msg, struct netlink_skb_parms *ns struct uvesafb_task *utask; struct uvesafb_ktask *task; - if (!cap_raised(nsp->eff_cap, CAP_SYS_ADMIN)) + if (!cap_raised(current_cap(), CAP_SYS_ADMIN)) return; if (msg->seq >= UVESAFB_TASKS_MAX) diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h index 48f1342897b..781f3aa66b4 100644 --- a/drivers/video/via/chip.h +++ b/drivers/video/via/chip.h @@ -110,16 +110,13 @@ struct tmds_chip_information { int tmds_chip_name; int tmds_chip_slave_addr; - int data_mode; int output_interface; int i2c_port; - int device_type; }; struct lvds_chip_information { int lvds_chip_name; int lvds_chip_slave_addr; - int data_mode; int output_interface; int i2c_port; }; @@ -142,9 +139,6 @@ struct chip_information { struct crt_setting_information { int iga_path; - int h_active; - int v_active; - int bpp; int refresh_rate; }; @@ -162,8 +156,6 @@ struct lvds_setting_information { int h_active; int v_active; int bpp; - int refresh_rate; - int lcd_panel_id; int lcd_panel_hres; int lcd_panel_vres; int display_method; @@ -188,7 +180,6 @@ struct GFX_DPA_SETTING { }; struct VT1636_DPA_SETTING { - int PanelSizeID; u8 CLK_SEL_ST1; u8 CLK_SEL_ST2; }; diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c index 84e21b39dd0..41ca198b509 100644 --- a/drivers/video/via/dvi.c +++ b/drivers/video/via/dvi.c @@ -195,7 +195,9 @@ void viafb_dvi_set_mode(struct VideoModeTable *mode, int mode_bpp, struct crt_mode_table *pDviTiming; unsigned long desirePixelClock, maxPixelClock; pDviTiming = mode->crtc; - desirePixelClock = pDviTiming->clk / 1000000; + desirePixelClock = pDviTiming->refresh_rate + * pDviTiming->crtc.hor_total * pDviTiming->crtc.ver_total + / 1000000; maxPixelClock = (unsigned long)viaparinfo-> tmds_setting_info->max_pixel_clock; diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c index 36d73f940d8..5728fd76bc1 100644 --- a/drivers/video/via/hw.c +++ b/drivers/video/via/hw.c @@ -22,342 +22,290 @@ #include <linux/via-core.h> #include "global.h" -static struct pll_map pll_value[] = { - {25175000, - {99, 7, 3}, - {85, 3, 4}, /* ignoring bit difference: 0x00008000 */ - {141, 5, 4}, - {141, 5, 4} }, - {29581000, - {33, 4, 2}, - {66, 2, 4}, /* ignoring bit difference: 0x00808000 */ - {166, 5, 4}, /* ignoring bit difference: 0x00008000 */ - {165, 5, 4} }, - {26880000, - {15, 4, 1}, - {30, 2, 3}, /* ignoring bit difference: 0x00808000 */ - {150, 5, 4}, - {150, 5, 4} }, - {31500000, - {53, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {141, 4, 4}, /* ignoring bit difference: 0x00008000 */ - {176, 5, 4}, - {176, 5, 4} }, - {31728000, - {31, 7, 1}, - {177, 5, 4}, /* ignoring bit difference: 0x00008000 */ - {177, 5, 4}, - {142, 4, 4} }, - {32688000, - {73, 4, 3}, - {146, 4, 4}, /* ignoring bit difference: 0x00008000 */ - {183, 5, 4}, - {146, 4, 4} }, - {36000000, - {101, 5, 3}, /* ignoring bit difference: 0x00008000 */ - {161, 4, 4}, /* ignoring bit difference: 0x00008000 */ - {202, 5, 4}, - {161, 4, 4} }, - {40000000, - {89, 4, 3}, - {89, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {112, 5, 3}, - {112, 5, 3} }, - {41291000, - {23, 4, 1}, - {69, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {115, 5, 3}, - {115, 5, 3} }, - {43163000, - {121, 5, 3}, - {121, 5, 3}, /* ignoring bit difference: 0x00008000 */ - {121, 5, 3}, - {121, 5, 3} }, - {45250000, - {127, 5, 3}, - {127, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {127, 5, 3}, - {127, 5, 3} }, - {46000000, - {90, 7, 2}, - {103, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {129, 5, 3}, - {103, 4, 3} }, - {46996000, - {105, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {131, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {131, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {105, 4, 3} }, - {48000000, - {67, 20, 0}, - {134, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {134, 5, 3}, - {134, 5, 3} }, - {48875000, - {99, 29, 0}, - {82, 3, 3}, /* ignoring bit difference: 0x00808000 */ - {82, 3, 3}, /* ignoring bit difference: 0x00808000 */ - {137, 5, 3} }, - {49500000, - {83, 6, 2}, - {83, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {138, 5, 3}, - {83, 3, 3} }, - {52406000, - {117, 4, 3}, - {117, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {117, 4, 3}, - {88, 3, 3} }, - {52977000, - {37, 5, 1}, - {148, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {148, 5, 3}, - {148, 5, 3} }, - {56250000, - {55, 7, 1}, /* ignoring bit difference: 0x00008000 */ - {126, 4, 3}, /* ignoring bit difference: 0x00008000 */ - {157, 5, 3}, - {157, 5, 3} }, - {57275000, - {0, 0, 0}, - {2, 2, 0}, - {2, 2, 0}, - {157, 5, 3} }, /* ignoring bit difference: 0x00808000 */ - {60466000, - {76, 9, 1}, - {169, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {169, 5, 3}, /* FIXED: old = {72, 2, 3} */ - {169, 5, 3} }, - {61500000, - {86, 20, 0}, - {172, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {172, 5, 3}, - {172, 5, 3} }, - {65000000, - {109, 6, 2}, /* ignoring bit difference: 0x00008000 */ - {109, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {109, 3, 3}, - {109, 3, 3} }, - {65178000, - {91, 5, 2}, - {182, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {109, 3, 3}, - {182, 5, 3} }, - {66750000, - {75, 4, 2}, - {150, 4, 3}, /* ignoring bit difference: 0x00808000 */ - {150, 4, 3}, - {112, 3, 3} }, - {68179000, - {19, 4, 0}, - {114, 3, 3}, /* ignoring bit difference: 0x00008000 */ - {190, 5, 3}, - {191, 5, 3} }, - {69924000, - {83, 17, 0}, - {195, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {195, 5, 3}, - {195, 5, 3} }, - {70159000, - {98, 20, 0}, - {196, 5, 3}, /* ignoring bit difference: 0x00808000 */ - {196, 5, 3}, - {195, 5, 3} }, - {72000000, - {121, 24, 0}, - {161, 4, 3}, /* ignoring bit difference: 0x00808000 */ - {161, 4, 3}, - {161, 4, 3} }, - {78750000, - {33, 3, 1}, - {66, 3, 2}, /* ignoring bit difference: 0x00008000 */ - {110, 5, 2}, - {110, 5, 2} }, - {80136000, - {28, 5, 0}, - {68, 3, 2}, /* ignoring bit difference: 0x00008000 */ - {112, 5, 2}, - {112, 5, 2} }, - {83375000, - {93, 2, 3}, - {93, 4, 2}, /* ignoring bit difference: 0x00800000 */ - {93, 4, 2}, /* ignoring bit difference: 0x00800000 */ - {117, 5, 2} }, - {83950000, - {41, 7, 0}, - {117, 5, 2}, /* ignoring bit difference: 0x00008000 */ - {117, 5, 2}, - {117, 5, 2} }, - {84750000, - {118, 5, 2}, - {118, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {118, 5, 2}, - {118, 5, 2} }, - {85860000, - {84, 7, 1}, - {120, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {120, 5, 2}, - {118, 5, 2} }, - {88750000, - {31, 5, 0}, - {124, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {174, 7, 2}, /* ignoring bit difference: 0x00808000 */ - {124, 5, 2} }, - {94500000, - {33, 5, 0}, - {132, 5, 2}, /* ignoring bit difference: 0x00008000 */ - {132, 5, 2}, - {132, 5, 2} }, - {97750000, - {82, 6, 1}, - {137, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {137, 5, 2}, - {137, 5, 2} }, - {101000000, - {127, 9, 1}, - {141, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {141, 5, 2}, - {141, 5, 2} }, - {106500000, - {119, 4, 2}, - {119, 4, 2}, /* ignoring bit difference: 0x00808000 */ - {119, 4, 2}, - {149, 5, 2} }, - {108000000, - {121, 4, 2}, - {121, 4, 2}, /* ignoring bit difference: 0x00808000 */ - {151, 5, 2}, - {151, 5, 2} }, - {113309000, - {95, 12, 0}, - {95, 3, 2}, /* ignoring bit difference: 0x00808000 */ - {95, 3, 2}, - {159, 5, 2} }, - {118840000, - {83, 5, 1}, - {166, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {166, 5, 2}, - {166, 5, 2} }, - {119000000, - {108, 13, 0}, - {133, 4, 2}, /* ignoring bit difference: 0x00808000 */ - {133, 4, 2}, - {167, 5, 2} }, - {121750000, - {85, 5, 1}, - {170, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {68, 2, 2}, - {0, 0, 0} }, - {125104000, - {53, 6, 0}, /* ignoring bit difference: 0x00008000 */ - {106, 3, 2}, /* ignoring bit difference: 0x00008000 */ - {175, 5, 2}, - {0, 0, 0} }, - {135000000, - {94, 5, 1}, - {28, 3, 0}, /* ignoring bit difference: 0x00804000 */ - {151, 4, 2}, - {189, 5, 2} }, - {136700000, - {115, 12, 0}, - {191, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {191, 5, 2}, - {191, 5, 2} }, - {138400000, - {87, 9, 0}, - {116, 3, 2}, /* ignoring bit difference: 0x00808000 */ - {116, 3, 2}, - {194, 5, 2} }, - {146760000, - {103, 5, 1}, - {206, 5, 2}, /* ignoring bit difference: 0x00808000 */ - {206, 5, 2}, - {206, 5, 2} }, - {153920000, - {86, 8, 0}, - {86, 4, 1}, /* ignoring bit difference: 0x00808000 */ - {86, 4, 1}, - {86, 4, 1} }, /* FIXED: old = {84, 2, 1} */ - {156000000, - {109, 5, 1}, - {109, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {109, 5, 1}, - {108, 5, 1} }, - {157500000, - {55, 5, 0}, /* ignoring bit difference: 0x00008000 */ - {22, 2, 0}, /* ignoring bit difference: 0x00802000 */ - {110, 5, 1}, - {110, 5, 1} }, - {162000000, - {113, 5, 1}, - {113, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {113, 5, 1}, - {113, 5, 1} }, - {187000000, - {118, 9, 0}, - {131, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {131, 5, 1}, - {131, 5, 1} }, - {193295000, - {108, 8, 0}, - {81, 3, 1}, /* ignoring bit difference: 0x00808000 */ - {135, 5, 1}, - {135, 5, 1} }, - {202500000, - {99, 7, 0}, - {85, 3, 1}, /* ignoring bit difference: 0x00808000 */ - {142, 5, 1}, - {142, 5, 1} }, - {204000000, - {100, 7, 0}, - {143, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {143, 5, 1}, - {143, 5, 1} }, - {218500000, - {92, 6, 0}, - {153, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {153, 5, 1}, - {153, 5, 1} }, - {234000000, - {98, 6, 0}, - {98, 3, 1}, /* ignoring bit difference: 0x00008000 */ - {98, 3, 1}, - {164, 5, 1} }, - {267250000, - {112, 6, 0}, - {112, 3, 1}, /* ignoring bit difference: 0x00808000 */ - {187, 5, 1}, - {187, 5, 1} }, - {297500000, - {102, 5, 0}, /* ignoring bit difference: 0x00008000 */ - {166, 4, 1}, /* ignoring bit difference: 0x00008000 */ - {208, 5, 1}, - {208, 5, 1} }, - {74481000, - {26, 5, 0}, - {125, 3, 3}, /* ignoring bit difference: 0x00808000 */ - {208, 5, 3}, - {209, 5, 3} }, - {172798000, - {121, 5, 1}, - {121, 5, 1}, /* ignoring bit difference: 0x00808000 */ - {121, 5, 1}, - {121, 5, 1} }, - {122614000, - {60, 7, 0}, - {137, 4, 2}, /* ignoring bit difference: 0x00808000 */ - {137, 4, 2}, - {172, 5, 2} }, - {74270000, - {83, 8, 1}, - {208, 5, 3}, - {208, 5, 3}, - {0, 0, 0} }, - {148500000, - {83, 8, 0}, - {208, 5, 2}, - {166, 4, 2}, - {208, 5, 2} } +static struct pll_config cle266_pll_config[] = { + {19, 4, 0}, + {26, 5, 0}, + {28, 5, 0}, + {31, 5, 0}, + {33, 5, 0}, + {55, 5, 0}, + {102, 5, 0}, + {53, 6, 0}, + {92, 6, 0}, + {98, 6, 0}, + {112, 6, 0}, + {41, 7, 0}, + {60, 7, 0}, + {99, 7, 0}, + {100, 7, 0}, + {83, 8, 0}, + {86, 8, 0}, + {108, 8, 0}, + {87, 9, 0}, + {118, 9, 0}, + {95, 12, 0}, + {115, 12, 0}, + {108, 13, 0}, + {83, 17, 0}, + {67, 20, 0}, + {86, 20, 0}, + {98, 20, 0}, + {121, 24, 0}, + {99, 29, 0}, + {33, 3, 1}, + {15, 4, 1}, + {23, 4, 1}, + {37, 5, 1}, + {83, 5, 1}, + {85, 5, 1}, + {94, 5, 1}, + {103, 5, 1}, + {109, 5, 1}, + {113, 5, 1}, + {121, 5, 1}, + {82, 6, 1}, + {31, 7, 1}, + {55, 7, 1}, + {84, 7, 1}, + {83, 8, 1}, + {76, 9, 1}, + {127, 9, 1}, + {33, 4, 2}, + {75, 4, 2}, + {119, 4, 2}, + {121, 4, 2}, + {91, 5, 2}, + {118, 5, 2}, + {83, 6, 2}, + {109, 6, 2}, + {90, 7, 2}, + {93, 2, 3}, + {53, 3, 3}, + {73, 4, 3}, + {89, 4, 3}, + {105, 4, 3}, + {117, 4, 3}, + {101, 5, 3}, + {121, 5, 3}, + {127, 5, 3}, + {99, 7, 3} +}; + +static struct pll_config k800_pll_config[] = { + {22, 2, 0}, + {28, 3, 0}, + {81, 3, 1}, + {85, 3, 1}, + {98, 3, 1}, + {112, 3, 1}, + {86, 4, 1}, + {166, 4, 1}, + {109, 5, 1}, + {113, 5, 1}, + {121, 5, 1}, + {131, 5, 1}, + {143, 5, 1}, + {153, 5, 1}, + {66, 3, 2}, + {68, 3, 2}, + {95, 3, 2}, + {106, 3, 2}, + {116, 3, 2}, + {93, 4, 2}, + {119, 4, 2}, + {121, 4, 2}, + {133, 4, 2}, + {137, 4, 2}, + {117, 5, 2}, + {118, 5, 2}, + {120, 5, 2}, + {124, 5, 2}, + {132, 5, 2}, + {137, 5, 2}, + {141, 5, 2}, + {166, 5, 2}, + {170, 5, 2}, + {191, 5, 2}, + {206, 5, 2}, + {208, 5, 2}, + {30, 2, 3}, + {69, 3, 3}, + {82, 3, 3}, + {83, 3, 3}, + {109, 3, 3}, + {114, 3, 3}, + {125, 3, 3}, + {89, 4, 3}, + {103, 4, 3}, + {117, 4, 3}, + {126, 4, 3}, + {150, 4, 3}, + {161, 4, 3}, + {121, 5, 3}, + {127, 5, 3}, + {131, 5, 3}, + {134, 5, 3}, + {148, 5, 3}, + {169, 5, 3}, + {172, 5, 3}, + {182, 5, 3}, + {195, 5, 3}, + {196, 5, 3}, + {208, 5, 3}, + {66, 2, 4}, + {85, 3, 4}, + {141, 4, 4}, + {146, 4, 4}, + {161, 4, 4}, + {177, 5, 4} +}; + +static struct pll_config cx700_pll_config[] = { + {98, 3, 1}, + {86, 4, 1}, + {109, 5, 1}, + {110, 5, 1}, + {113, 5, 1}, + {121, 5, 1}, + {131, 5, 1}, + {135, 5, 1}, + {142, 5, 1}, + {143, 5, 1}, + {153, 5, 1}, + {187, 5, 1}, + {208, 5, 1}, + {68, 2, 2}, + {95, 3, 2}, + {116, 3, 2}, + {93, 4, 2}, + {119, 4, 2}, + {133, 4, 2}, + {137, 4, 2}, + {151, 4, 2}, + {166, 4, 2}, + {110, 5, 2}, + {112, 5, 2}, + {117, 5, 2}, + {118, 5, 2}, + {120, 5, 2}, + {132, 5, 2}, + {137, 5, 2}, + {141, 5, 2}, + {151, 5, 2}, + {166, 5, 2}, + {175, 5, 2}, + {191, 5, 2}, + {206, 5, 2}, + {174, 7, 2}, + {82, 3, 3}, + {109, 3, 3}, + {117, 4, 3}, + {150, 4, 3}, + {161, 4, 3}, + {112, 5, 3}, + {115, 5, 3}, + {121, 5, 3}, + {127, 5, 3}, + {129, 5, 3}, + {131, 5, 3}, + {134, 5, 3}, + {138, 5, 3}, + {148, 5, 3}, + {157, 5, 3}, + {169, 5, 3}, + {172, 5, 3}, + {190, 5, 3}, + {195, 5, 3}, + {196, 5, 3}, + {208, 5, 3}, + {141, 5, 4}, + {150, 5, 4}, + {166, 5, 4}, + {176, 5, 4}, + {177, 5, 4}, + {183, 5, 4}, + {202, 5, 4} +}; + +static struct pll_config vx855_pll_config[] = { + {86, 4, 1}, + {108, 5, 1}, + {110, 5, 1}, + {113, 5, 1}, + {121, 5, 1}, + {131, 5, 1}, + {135, 5, 1}, + {142, 5, 1}, + {143, 5, 1}, + {153, 5, 1}, + {164, 5, 1}, + {187, 5, 1}, + {208, 5, 1}, + {110, 5, 2}, + {112, 5, 2}, + {117, 5, 2}, + {118, 5, 2}, + {124, 5, 2}, + {132, 5, 2}, + {137, 5, 2}, + {141, 5, 2}, + {149, 5, 2}, + {151, 5, 2}, + {159, 5, 2}, + {166, 5, 2}, + {167, 5, 2}, + {172, 5, 2}, + {189, 5, 2}, + {191, 5, 2}, + {194, 5, 2}, + {206, 5, 2}, + {208, 5, 2}, + {83, 3, 3}, + {88, 3, 3}, + {109, 3, 3}, + {112, 3, 3}, + {103, 4, 3}, + {105, 4, 3}, + {161, 4, 3}, + {112, 5, 3}, + {115, 5, 3}, + {121, 5, 3}, + {127, 5, 3}, + {134, 5, 3}, + {137, 5, 3}, + {148, 5, 3}, + {157, 5, 3}, + {169, 5, 3}, + {172, 5, 3}, + {182, 5, 3}, + {191, 5, 3}, + {195, 5, 3}, + {209, 5, 3}, + {142, 4, 4}, + {146, 4, 4}, + {161, 4, 4}, + {141, 5, 4}, + {150, 5, 4}, + {165, 5, 4}, + {176, 5, 4} +}; + +/* according to VIA Technologies these values are based on experiment */ +static struct io_reg scaling_parameters[] = { + {VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ + {VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ + {VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ + {VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ + {VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ + {VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ + {VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ + {VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ + {VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ + {VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ + {VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ + {VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ + {VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ + {VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ }; static struct fifo_depth_select display_fifo_depth_reg = { @@ -751,7 +699,7 @@ void viafb_unlock_crt(void) viafb_write_reg_mask(CR47, VIACR, 0, BIT0); } -void write_dac_reg(u8 index, u8 r, u8 g, u8 b) +static void write_dac_reg(u8 index, u8 r, u8 g, u8 b) { outb(index, LUT_INDEX_WRITE); outb(r, LUT_DATA); @@ -1674,43 +1622,63 @@ static u32 vx855_encode_pll(struct pll_config pll) | pll.multiplier; } -u32 viafb_get_clk_value(int clk) +static inline u32 get_pll_internal_frequency(u32 ref_freq, + struct pll_config pll) { - u32 value = 0; - int i = 0; + return ref_freq / pll.divisor * pll.multiplier; +} - while (i < NUM_TOTAL_PLL_TABLE && clk != pll_value[i].clk) - i++; +static inline u32 get_pll_output_frequency(u32 ref_freq, struct pll_config pll) +{ + return get_pll_internal_frequency(ref_freq, pll)>>pll.rshift; +} - if (i == NUM_TOTAL_PLL_TABLE) { - printk(KERN_WARNING "viafb_get_clk_value: PLL lookup failed!"); - } else { - switch (viaparinfo->chip_info->gfx_chip_name) { - case UNICHROME_CLE266: - case UNICHROME_K400: - value = cle266_encode_pll(pll_value[i].cle266_pll); - break; +static struct pll_config get_pll_config(struct pll_config *config, int size, + int clk) +{ + struct pll_config best = config[0]; + const u32 f0 = 14318180; /* X1 frequency */ + int i; - case UNICHROME_K800: - case UNICHROME_PM800: - case UNICHROME_CN700: - value = k800_encode_pll(pll_value[i].k800_pll); - break; + for (i = 1; i < size; i++) { + if (abs(get_pll_output_frequency(f0, config[i]) - clk) + < abs(get_pll_output_frequency(f0, best) - clk)) + best = config[i]; + } - case UNICHROME_CX700: - case UNICHROME_CN750: - case UNICHROME_K8M890: - case UNICHROME_P4M890: - case UNICHROME_P4M900: - case UNICHROME_VX800: - value = k800_encode_pll(pll_value[i].cx700_pll); - break; + return best; +} - case UNICHROME_VX855: - case UNICHROME_VX900: - value = vx855_encode_pll(pll_value[i].vx855_pll); - break; - } +u32 viafb_get_clk_value(int clk) +{ + u32 value = 0; + + switch (viaparinfo->chip_info->gfx_chip_name) { + case UNICHROME_CLE266: + case UNICHROME_K400: + value = cle266_encode_pll(get_pll_config(cle266_pll_config, + ARRAY_SIZE(cle266_pll_config), clk)); + break; + case UNICHROME_K800: + case UNICHROME_PM800: + case UNICHROME_CN700: + value = k800_encode_pll(get_pll_config(k800_pll_config, + ARRAY_SIZE(k800_pll_config), clk)); + break; + case UNICHROME_CX700: + case UNICHROME_CN750: + case UNICHROME_K8M890: + case UNICHROME_P4M890: + case UNICHROME_P4M900: + case UNICHROME_VX800: + value = k800_encode_pll(get_pll_config(cx700_pll_config, + ARRAY_SIZE(cx700_pll_config), clk)); + break; + case UNICHROME_VX855: + case UNICHROME_VX900: + value = vx855_encode_pll(get_pll_config(vx855_pll_config, + ARRAY_SIZE(vx855_pll_config), clk)); + break; } return value; @@ -2034,7 +2002,7 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, int i; int index = 0; int h_addr, v_addr; - u32 pll_D_N; + u32 pll_D_N, clock; for (i = 0; i < video_mode->mode_array; i++) { index = i; @@ -2087,7 +2055,9 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table, && (viaparinfo->chip_info->gfx_chip_name != UNICHROME_K400)) viafb_load_FIFO_reg(set_iga, h_addr, v_addr); - pll_D_N = viafb_get_clk_value(crt_table[index].clk); + clock = crt_reg.hor_total * crt_reg.ver_total + * crt_table[index].refresh_rate; + pll_D_N = viafb_get_clk_value(clock); DEBUG_MSG(KERN_INFO "PLL=%x", pll_D_N); viafb_set_vclock(pll_D_N, set_iga); @@ -2117,9 +2087,6 @@ void viafb_update_device_setting(int hres, int vres, int bpp, int vmode_refresh, int flag) { if (flag == 0) { - viaparinfo->crt_setting_info->h_active = hres; - viaparinfo->crt_setting_info->v_active = vres; - viaparinfo->crt_setting_info->bpp = bpp; viaparinfo->crt_setting_info->refresh_rate = vmode_refresh; @@ -2129,13 +2096,9 @@ void viafb_update_device_setting(int hres, int vres, viaparinfo->lvds_setting_info->h_active = hres; viaparinfo->lvds_setting_info->v_active = vres; viaparinfo->lvds_setting_info->bpp = bpp; - viaparinfo->lvds_setting_info->refresh_rate = - vmode_refresh; viaparinfo->lvds_setting_info2->h_active = hres; viaparinfo->lvds_setting_info2->v_active = vres; viaparinfo->lvds_setting_info2->bpp = bpp; - viaparinfo->lvds_setting_info2->refresh_rate = - vmode_refresh; } else { if (viaparinfo->tmds_setting_info->iga_path == IGA2) { @@ -2147,15 +2110,11 @@ void viafb_update_device_setting(int hres, int vres, viaparinfo->lvds_setting_info->h_active = hres; viaparinfo->lvds_setting_info->v_active = vres; viaparinfo->lvds_setting_info->bpp = bpp; - viaparinfo->lvds_setting_info->refresh_rate = - vmode_refresh; } if (IGA2 == viaparinfo->lvds_setting_info2->iga_path) { viaparinfo->lvds_setting_info2->h_active = hres; viaparinfo->lvds_setting_info2->v_active = vres; viaparinfo->lvds_setting_info2->bpp = bpp; - viaparinfo->lvds_setting_info2->refresh_rate = - vmode_refresh; } } } @@ -2430,6 +2389,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, break; } + viafb_write_regx(scaling_parameters, ARRAY_SIZE(scaling_parameters)); device_off(); via_set_state(devices, VIA_STATE_OFF); @@ -2608,35 +2568,43 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp, int viafb_get_pixclock(int hres, int vres, int vmode_refresh) { int i; + struct crt_mode_table *best; + struct VideoModeTable *vmode = viafb_get_mode(hres, vres); + + if (!vmode) + return RES_640X480_60HZ_PIXCLOCK; - for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { - if ((hres == res_map_refresh_tbl[i].hres) - && (vres == res_map_refresh_tbl[i].vres) - && (vmode_refresh == res_map_refresh_tbl[i].vmode_refresh)) - return res_map_refresh_tbl[i].pixclock; + best = &vmode->crtc[0]; + for (i = 1; i < vmode->mode_array; i++) { + if (abs(vmode->crtc[i].refresh_rate - vmode_refresh) + < abs(best->refresh_rate - vmode_refresh)) + best = &vmode->crtc[i]; } - return RES_640X480_60HZ_PIXCLOCK; + return 1000000000 / (best->crtc.hor_total * best->crtc.ver_total) + * 1000 / best->refresh_rate; } int viafb_get_refresh(int hres, int vres, u32 long_refresh) { -#define REFRESH_TOLERANCE 3 - int i, nearest = -1, diff = REFRESH_TOLERANCE; - for (i = 0; i < NUM_TOTAL_RES_MAP_REFRESH; i++) { - if ((hres == res_map_refresh_tbl[i].hres) - && (vres == res_map_refresh_tbl[i].vres) - && (diff > (abs(long_refresh - - res_map_refresh_tbl[i].vmode_refresh)))) { - diff = abs(long_refresh - res_map_refresh_tbl[i]. - vmode_refresh); - nearest = i; - } + int i; + struct crt_mode_table *best; + struct VideoModeTable *vmode = viafb_get_mode(hres, vres); + + if (!vmode) + return 60; + + best = &vmode->crtc[0]; + for (i = 1; i < vmode->mode_array; i++) { + if (abs(vmode->crtc[i].refresh_rate - long_refresh) + < abs(best->refresh_rate - long_refresh)) + best = &vmode->crtc[i]; } -#undef REFRESH_TOLERANCE - if (nearest > 0) - return res_map_refresh_tbl[nearest].vmode_refresh; - return 60; + + if (abs(best->refresh_rate - long_refresh) > 3) + return 60; + + return best->refresh_rate; } static void device_off(void) diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h index 668d534542e..7295263299f 100644 --- a/drivers/video/via/hw.h +++ b/drivers/video/via/hw.h @@ -893,8 +893,6 @@ struct iga2_crtc_timing { /* VT3410 chipset*/ #define VX900_FUNCTION3 0x3410 -#define NUM_TOTAL_PLL_TABLE ARRAY_SIZE(pll_value) - struct IODATA { u8 Index; u8 Mask; diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c index 3425c396980..64bc7e76310 100644 --- a/drivers/video/via/lcd.c +++ b/drivers/video/via/lcd.c @@ -26,10 +26,12 @@ /* CLE266 Software Power Sequence */ /* {Mask}, {Data}, {Delay} */ -int PowerSequenceOn[3][3] = { {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, - {0x19, 0x1FE, 0x01} }; -int PowerSequenceOff[3][3] = { {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, - {0xD2, 0x19, 0x01} }; +static const int PowerSequenceOn[3][3] = { + {0x10, 0x08, 0x06}, {0x10, 0x08, 0x06}, {0x19, 0x1FE, 0x01} +}; +static const int PowerSequenceOff[3][3] = { + {0x06, 0x08, 0x10}, {0x00, 0x00, 0x00}, {0xD2, 0x19, 0x01} +}; static struct _lcd_scaling_factor lcd_scaling_factor = { /* LCD Horizontal Scaling Factor Register */ @@ -95,8 +97,6 @@ void __devinit viafb_init_lcd_size(void) DEBUG_MSG(KERN_INFO "viafb_init_lcd_size()\n"); fp_id_to_vindex(viafb_lcd_panel_id); - viaparinfo->lvds_setting_info2->lcd_panel_id = - viaparinfo->lvds_setting_info->lcd_panel_id; viaparinfo->lvds_setting_info2->lcd_panel_hres = viaparinfo->lvds_setting_info->lcd_panel_hres; viaparinfo->lvds_setting_info2->lcd_panel_vres = @@ -203,176 +203,132 @@ static void __devinit fp_id_to_vindex(int panel_id) case 0x0: viaparinfo->lvds_setting_info->lcd_panel_hres = 640; viaparinfo->lvds_setting_info->lcd_panel_vres = 480; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID0_640X480; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x1: viaparinfo->lvds_setting_info->lcd_panel_hres = 800; viaparinfo->lvds_setting_info->lcd_panel_vres = 600; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID1_800X600; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x2: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID2_1024X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x3: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID3_1280X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x4: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 1024; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID4_1280X1024; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x5: viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; viaparinfo->lvds_setting_info->lcd_panel_vres = 1050; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID5_1400X1050; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x6: viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; viaparinfo->lvds_setting_info->lcd_panel_vres = 1200; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID6_1600X1200; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x8: viaparinfo->lvds_setting_info->lcd_panel_hres = 800; viaparinfo->lvds_setting_info->lcd_panel_vres = 480; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_IDA_800X480; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x9: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID2_1024X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0xA: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID2_1024X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xB: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID2_1024X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xC: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID3_1280X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xD: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 1024; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID4_1280X1024; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xE: viaparinfo->lvds_setting_info->lcd_panel_hres = 1400; viaparinfo->lvds_setting_info->lcd_panel_vres = 1050; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID5_1400X1050; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0xF: viaparinfo->lvds_setting_info->lcd_panel_hres = 1600; viaparinfo->lvds_setting_info->lcd_panel_vres = 1200; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID6_1600X1200; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0x10: viaparinfo->lvds_setting_info->lcd_panel_hres = 1366; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID7_1366X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0x11: viaparinfo->lvds_setting_info->lcd_panel_hres = 1024; viaparinfo->lvds_setting_info->lcd_panel_vres = 600; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID8_1024X600; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x12: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID3_1280X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x13: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 800; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID9_1280X800; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; case 0x14: viaparinfo->lvds_setting_info->lcd_panel_hres = 1360; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_IDB_1360X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0x15: viaparinfo->lvds_setting_info->lcd_panel_hres = 1280; viaparinfo->lvds_setting_info->lcd_panel_vres = 768; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID3_1280X768; viaparinfo->lvds_setting_info->device_lcd_dualedge = 1; viaparinfo->lvds_setting_info->LCDDithering = 0; break; case 0x16: viaparinfo->lvds_setting_info->lcd_panel_hres = 480; viaparinfo->lvds_setting_info->lcd_panel_vres = 640; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_IDC_480X640; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; break; @@ -380,16 +336,12 @@ static void __devinit fp_id_to_vindex(int panel_id) /* OLPC XO-1.5 panel */ viaparinfo->lvds_setting_info->lcd_panel_hres = 1200; viaparinfo->lvds_setting_info->lcd_panel_vres = 900; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_IDD_1200X900; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 0; break; default: viaparinfo->lvds_setting_info->lcd_panel_hres = 800; viaparinfo->lvds_setting_info->lcd_panel_vres = 600; - viaparinfo->lvds_setting_info->lcd_panel_id = - LCD_PANEL_ID1_800X600; viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; viaparinfo->lvds_setting_info->LCDDithering = 1; } @@ -610,7 +562,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, int set_vres = plvds_setting_info->v_active; int panel_hres = plvds_setting_info->lcd_panel_hres; int panel_vres = plvds_setting_info->lcd_panel_vres; - u32 pll_D_N; + u32 pll_D_N, clock; struct display_timing mode_crt_reg, panel_crt_reg; struct crt_mode_table *panel_crt_table = NULL; struct VideoModeTable *vmode_tbl = viafb_get_mode(panel_hres, @@ -625,7 +577,9 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, DEBUG_MSG(KERN_INFO "bellow viafb_lcd_set_mode!!\n"); if (VT1636_LVDS == plvds_chip_info->lvds_chip_name) viafb_init_lvds_vt1636(plvds_setting_info, plvds_chip_info); - plvds_setting_info->vclk = panel_crt_table->clk; + clock = panel_crt_reg.hor_total * panel_crt_reg.ver_total + * panel_crt_table->refresh_rate; + plvds_setting_info->vclk = clock; if (set_iga == IGA1) { /* IGA1 doesn't have LCD scaling, so set it as centering. */ viafb_load_crtc_timing(lcd_centering_timging @@ -660,7 +614,7 @@ void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, fill_lcd_format(); - pll_D_N = viafb_get_clk_value(panel_crt_table[0].clk); + pll_D_N = viafb_get_clk_value(clock); DEBUG_MSG(KERN_INFO "PLL=0x%x", pll_D_N); viafb_set_vclock(pll_D_N, set_iga); lcd_patch_skew(plvds_setting_info, plvds_chip_info); @@ -1064,34 +1018,33 @@ static struct display_timing lcd_centering_timging(struct display_timing bool viafb_lcd_get_mobile_state(bool *mobile) { - unsigned char *romptr, *tableptr; + unsigned char __iomem *romptr, *tableptr, *biosptr; u8 core_base; - unsigned char *biosptr; /* Rom address */ - u32 romaddr = 0x000C0000; - u16 start_pattern = 0; + const u32 romaddr = 0x000C0000; + u16 start_pattern; biosptr = ioremap(romaddr, 0x10000); + start_pattern = readw(biosptr); - memcpy(&start_pattern, biosptr, 2); /* Compare pattern */ if (start_pattern == 0xAA55) { /* Get the start of Table */ /* 0x1B means BIOS offset position */ romptr = biosptr + 0x1B; - tableptr = biosptr + *((u16 *) romptr); + tableptr = biosptr + readw(romptr); /* Get the start of biosver structure */ /* 18 means BIOS version position. */ romptr = tableptr + 18; - romptr = biosptr + *((u16 *) romptr); + romptr = biosptr + readw(romptr); /* The offset should be 44, but the actual image is less three char. */ /* pRom += 44; */ romptr += 41; - core_base = *romptr++; + core_base = readb(romptr); if (core_base & 0x8) *mobile = false; diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h index 2cbe1031b42..4b7831f0d01 100644 --- a/drivers/video/via/share.h +++ b/drivers/video/via/share.h @@ -627,77 +627,6 @@ #define M2048x1536_R60_HSP NEGATIVE #define M2048x1536_R60_VSP POSITIVE -/* define PLL index: */ -#define CLK_25_175M 25175000 -#define CLK_26_880M 26880000 -#define CLK_29_581M 29581000 -#define CLK_31_500M 31500000 -#define CLK_31_728M 31728000 -#define CLK_32_668M 32688000 -#define CLK_36_000M 36000000 -#define CLK_40_000M 40000000 -#define CLK_41_291M 41291000 -#define CLK_43_163M 43163000 -#define CLK_45_250M 45250000 /* 45.46MHz */ -#define CLK_46_000M 46000000 -#define CLK_46_996M 46996000 -#define CLK_48_000M 48000000 -#define CLK_48_875M 48875000 -#define CLK_49_500M 49500000 -#define CLK_52_406M 52406000 -#define CLK_52_977M 52977000 -#define CLK_56_250M 56250000 -#define CLK_57_275M 57275000 -#define CLK_60_466M 60466000 -#define CLK_61_500M 61500000 -#define CLK_65_000M 65000000 -#define CLK_65_178M 65178000 -#define CLK_66_750M 66750000 /* 67.116MHz */ -#define CLK_68_179M 68179000 -#define CLK_69_924M 69924000 -#define CLK_70_159M 70159000 -#define CLK_72_000M 72000000 -#define CLK_74_270M 74270000 -#define CLK_78_750M 78750000 -#define CLK_80_136M 80136000 -#define CLK_83_375M 83375000 -#define CLK_83_950M 83950000 -#define CLK_84_750M 84750000 /* 84.537Mhz */ -#define CLK_85_860M 85860000 -#define CLK_88_750M 88750000 -#define CLK_94_500M 94500000 -#define CLK_97_750M 97750000 -#define CLK_101_000M 101000000 -#define CLK_106_500M 106500000 -#define CLK_108_000M 108000000 -#define CLK_113_309M 113309000 -#define CLK_118_840M 118840000 -#define CLK_119_000M 119000000 -#define CLK_121_750M 121750000 /* 121.704MHz */ -#define CLK_125_104M 125104000 -#define CLK_135_000M 135000000 -#define CLK_136_700M 136700000 -#define CLK_138_400M 138400000 -#define CLK_146_760M 146760000 -#define CLK_148_500M 148500000 - -#define CLK_153_920M 153920000 -#define CLK_156_000M 156000000 -#define CLK_157_500M 157500000 -#define CLK_162_000M 162000000 -#define CLK_187_000M 187000000 -#define CLK_193_295M 193295000 -#define CLK_202_500M 202500000 -#define CLK_204_000M 204000000 -#define CLK_218_500M 218500000 -#define CLK_234_000M 234000000 -#define CLK_267_250M 267250000 -#define CLK_297_500M 297500000 -#define CLK_74_481M 74481000 -#define CLK_172_798M 172798000 -#define CLK_122_614M 122614000 - - /* Definition CRTC Timing Index */ #define H_TOTAL_INDEX 0 #define H_ADDR_INDEX 1 @@ -722,76 +651,7 @@ /* Definition Video Mode Pixel Clock (picoseconds) */ -#define RES_480X640_60HZ_PIXCLOCK 39722 #define RES_640X480_60HZ_PIXCLOCK 39722 -#define RES_640X480_75HZ_PIXCLOCK 31747 -#define RES_640X480_85HZ_PIXCLOCK 27777 -#define RES_640X480_100HZ_PIXCLOCK 23168 -#define RES_640X480_120HZ_PIXCLOCK 19081 -#define RES_720X480_60HZ_PIXCLOCK 37020 -#define RES_720X576_60HZ_PIXCLOCK 30611 -#define RES_800X600_60HZ_PIXCLOCK 25000 -#define RES_800X600_75HZ_PIXCLOCK 20203 -#define RES_800X600_85HZ_PIXCLOCK 17777 -#define RES_800X600_100HZ_PIXCLOCK 14667 -#define RES_800X600_120HZ_PIXCLOCK 11912 -#define RES_800X480_60HZ_PIXCLOCK 33805 -#define RES_848X480_60HZ_PIXCLOCK 31756 -#define RES_856X480_60HZ_PIXCLOCK 31518 -#define RES_1024X512_60HZ_PIXCLOCK 24218 -#define RES_1024X600_60HZ_PIXCLOCK 20460 -#define RES_1024X768_60HZ_PIXCLOCK 15385 -#define RES_1024X768_75HZ_PIXCLOCK 12699 -#define RES_1024X768_85HZ_PIXCLOCK 10582 -#define RES_1024X768_100HZ_PIXCLOCK 8825 -#define RES_1152X864_75HZ_PIXCLOCK 9259 -#define RES_1280X768_60HZ_PIXCLOCK 12480 -#define RES_1280X800_60HZ_PIXCLOCK 11994 -#define RES_1280X960_60HZ_PIXCLOCK 9259 -#define RES_1280X1024_60HZ_PIXCLOCK 9260 -#define RES_1280X1024_75HZ_PIXCLOCK 7408 -#define RES_1280X768_85HZ_PIXCLOCK 6349 -#define RES_1440X1050_60HZ_PIXCLOCK 7993 -#define RES_1600X1200_60HZ_PIXCLOCK 6172 -#define RES_1600X1200_75HZ_PIXCLOCK 4938 -#define RES_1280X720_60HZ_PIXCLOCK 13426 -#define RES_1200X900_60HZ_PIXCLOCK 17459 -#define RES_1920X1080_60HZ_PIXCLOCK 5787 -#define RES_1400X1050_60HZ_PIXCLOCK 8214 -#define RES_1400X1050_75HZ_PIXCLOCK 6410 -#define RES_1368X768_60HZ_PIXCLOCK 11647 -#define RES_960X600_60HZ_PIXCLOCK 22099 -#define RES_1000X600_60HZ_PIXCLOCK 20834 -#define RES_1024X576_60HZ_PIXCLOCK 21278 -#define RES_1088X612_60HZ_PIXCLOCK 18877 -#define RES_1152X720_60HZ_PIXCLOCK 14981 -#define RES_1200X720_60HZ_PIXCLOCK 14253 -#define RES_1280X600_60HZ_PIXCLOCK 16260 -#define RES_1280X720_50HZ_PIXCLOCK 16538 -#define RES_1280X768_50HZ_PIXCLOCK 15342 -#define RES_1366X768_50HZ_PIXCLOCK 14301 -#define RES_1366X768_60HZ_PIXCLOCK 11646 -#define RES_1360X768_60HZ_PIXCLOCK 11799 -#define RES_1440X900_60HZ_PIXCLOCK 9390 -#define RES_1440X900_75HZ_PIXCLOCK 7315 -#define RES_1600X900_60HZ_PIXCLOCK 8415 -#define RES_1600X1024_60HZ_PIXCLOCK 7315 -#define RES_1680X1050_60HZ_PIXCLOCK 6814 -#define RES_1680X1050_75HZ_PIXCLOCK 5348 -#define RES_1792X1344_60HZ_PIXCLOCK 4902 -#define RES_1856X1392_60HZ_PIXCLOCK 4577 -#define RES_1920X1200_60HZ_PIXCLOCK 5173 -#define RES_1920X1440_60HZ_PIXCLOCK 4274 -#define RES_1920X1440_75HZ_PIXCLOCK 3367 -#define RES_2048X1536_60HZ_PIXCLOCK 3742 - -#define RES_1360X768_RB_60HZ_PIXCLOCK 13889 -#define RES_1400X1050_RB_60HZ_PIXCLOCK 9901 -#define RES_1440X900_RB_60HZ_PIXCLOCK 11268 -#define RES_1600X900_RB_60HZ_PIXCLOCK 10230 -#define RES_1680X1050_RB_60HZ_PIXCLOCK 8403 -#define RES_1920X1080_RB_60HZ_PIXCLOCK 7225 -#define RES_1920X1200_RB_60HZ_PIXCLOCK 6497 /* LCD display method */ @@ -822,7 +682,6 @@ struct display_timing { struct crt_mode_table { int refresh_rate; - unsigned long clk; int h_sync_polarity; int v_sync_polarity; struct display_timing crtc; diff --git a/drivers/video/via/tblDPASetting.c b/drivers/video/via/tblDPASetting.c index 0c4c8cc712f..73bb554e7c1 100644 --- a/drivers/video/via/tblDPASetting.c +++ b/drivers/video/via/tblDPASetting.c @@ -20,17 +20,6 @@ */ #include "global.h" -/* For VT3324: */ -struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3324[] = { - /* Panel ID, CLK_SEL_ST1[09], CLK_SEL_ST2[08] */ - {LCD_PANEL_ID0_640X480, 0x00, 0x00}, /* For 640x480 */ - {LCD_PANEL_ID1_800X600, 0x00, 0x00}, /* For 800x600 */ - {LCD_PANEL_ID2_1024X768, 0x00, 0x00}, /* For 1024x768 */ - {LCD_PANEL_ID3_1280X768, 0x00, 0x00}, /* For 1280x768 */ - {LCD_PANEL_ID4_1280X1024, 0x00, 0x00}, /* For 1280x1024 */ - {LCD_PANEL_ID5_1400X1050, 0x00, 0x00}, /* For 1400x1050 */ - {LCD_PANEL_ID6_1600X1200, 0x0B, 0x03} /* For 1600x1200 */ -}; struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[] = { /* ClkRange, DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1, @@ -57,18 +46,6 @@ struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[] = { 0x00}, }; -/* For VT3327: */ -struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3327[] = { - /* Panel ID, CLK_SEL_ST1[09], CLK_SEL_ST2[08] */ - {LCD_PANEL_ID0_640X480, 0x00, 0x00}, /* For 640x480 */ - {LCD_PANEL_ID1_800X600, 0x00, 0x00}, /* For 800x600 */ - {LCD_PANEL_ID2_1024X768, 0x00, 0x00}, /* For 1024x768 */ - {LCD_PANEL_ID3_1280X768, 0x00, 0x00}, /* For 1280x768 */ - {LCD_PANEL_ID4_1280X1024, 0x00, 0x00}, /* For 1280x1024 */ - {LCD_PANEL_ID5_1400X1050, 0x00, 0x00}, /* For 1400x1050 */ - {LCD_PANEL_ID6_1600X1200, 0x00, 0x00} /* For 1600x1200 */ -}; - struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3327[] = { /* ClkRange,DVP0, DVP0DataDriving, DVP0ClockDriving, DVP1, DVP1Driving, DFPHigh, DFPLow */ diff --git a/drivers/video/via/tblDPASetting.h b/drivers/video/via/tblDPASetting.h index b065a83481d..6db61519cb5 100644 --- a/drivers/video/via/tblDPASetting.h +++ b/drivers/video/via/tblDPASetting.h @@ -38,9 +38,7 @@ enum DPA_RANGE { DPA_CLK_RANGE_150M }; -extern struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3324[7]; extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3324[6]; -extern struct VT1636_DPA_SETTING VT1636_DPA_SETTING_TBL_VT3327[7]; extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3327[]; extern struct GFX_DPA_SETTING GFX_DPA_SETTING_TBL_VT3364[6]; diff --git a/drivers/video/via/via_i2c.c b/drivers/video/via/via_i2c.c index 3844b558b7b..78f1405dbab 100644 --- a/drivers/video/via/via_i2c.c +++ b/drivers/video/via/via_i2c.c @@ -32,7 +32,7 @@ */ #define VIAFB_NUM_I2C 5 static struct via_i2c_stuff via_i2c_par[VIAFB_NUM_I2C]; -struct viafb_dev *i2c_vdev; /* Passed in from core */ +static struct viafb_dev *i2c_vdev; /* Passed in from core */ static void via_i2c_setscl(void *data, int state) { @@ -209,7 +209,6 @@ static int create_i2c_bus(struct i2c_adapter *adapter, sprintf(adapter->name, "viafb i2c io_port idx 0x%02x", adap_cfg->ioport_index); adapter->owner = THIS_MODULE; - adapter->id = 0x01FFFF; adapter->class = I2C_CLASS_DDC; adapter->algo_data = algo; if (pdev) diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c index 4e66349e436..f555b891cc7 100644 --- a/drivers/video/via/viafbdev.c +++ b/drivers/video/via/viafbdev.c @@ -43,11 +43,11 @@ static int viafb_second_size; static int viafb_accel = 1; /* Added for specifying active devices.*/ -char *viafb_active_dev; +static char *viafb_active_dev; /*Added for specify lcd output port*/ -char *viafb_lcd_port = ""; -char *viafb_dvi_port = ""; +static char *viafb_lcd_port = ""; +static char *viafb_dvi_port = ""; static void retrieve_device_setting(struct viafb_ioctl_setting *setting_info); diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c index 2dbad3c0f67..8c5bc41ff6a 100644 --- a/drivers/video/via/viamode.c +++ b/drivers/video/via/viamode.c @@ -21,72 +21,6 @@ #include <linux/via-core.h> #include "global.h" -struct res_map_refresh res_map_refresh_tbl[] = { -/*hres, vres, vclock, vmode_refresh*/ - {480, 640, RES_480X640_60HZ_PIXCLOCK, 60}, - {640, 480, RES_640X480_60HZ_PIXCLOCK, 60}, - {640, 480, RES_640X480_75HZ_PIXCLOCK, 75}, - {640, 480, RES_640X480_85HZ_PIXCLOCK, 85}, - {640, 480, RES_640X480_100HZ_PIXCLOCK, 100}, - {640, 480, RES_640X480_120HZ_PIXCLOCK, 120}, - {720, 480, RES_720X480_60HZ_PIXCLOCK, 60}, - {720, 576, RES_720X576_60HZ_PIXCLOCK, 60}, - {800, 480, RES_800X480_60HZ_PIXCLOCK, 60}, - {800, 600, RES_800X600_60HZ_PIXCLOCK, 60}, - {800, 600, RES_800X600_75HZ_PIXCLOCK, 75}, - {800, 600, RES_800X600_85HZ_PIXCLOCK, 85}, - {800, 600, RES_800X600_100HZ_PIXCLOCK, 100}, - {800, 600, RES_800X600_120HZ_PIXCLOCK, 120}, - {848, 480, RES_848X480_60HZ_PIXCLOCK, 60}, - {856, 480, RES_856X480_60HZ_PIXCLOCK, 60}, - {1024, 512, RES_1024X512_60HZ_PIXCLOCK, 60}, - {1024, 600, RES_1024X600_60HZ_PIXCLOCK, 60}, - {1024, 768, RES_1024X768_60HZ_PIXCLOCK, 60}, - {1024, 768, RES_1024X768_75HZ_PIXCLOCK, 75}, - {1024, 768, RES_1024X768_85HZ_PIXCLOCK, 85}, - {1024, 768, RES_1024X768_100HZ_PIXCLOCK, 100}, -/* {1152,864, RES_1152X864_70HZ_PIXCLOCK, 70},*/ - {1152, 864, RES_1152X864_75HZ_PIXCLOCK, 75}, - {1280, 768, RES_1280X768_60HZ_PIXCLOCK, 60}, - {1280, 800, RES_1280X800_60HZ_PIXCLOCK, 60}, - {1280, 960, RES_1280X960_60HZ_PIXCLOCK, 60}, - {1280, 1024, RES_1280X1024_60HZ_PIXCLOCK, 60}, - {1280, 1024, RES_1280X1024_75HZ_PIXCLOCK, 75}, - {1280, 1024, RES_1280X768_85HZ_PIXCLOCK, 85}, - {1440, 1050, RES_1440X1050_60HZ_PIXCLOCK, 60}, - {1600, 1200, RES_1600X1200_60HZ_PIXCLOCK, 60}, - {1600, 1200, RES_1600X1200_75HZ_PIXCLOCK, 75}, - {1280, 720, RES_1280X720_60HZ_PIXCLOCK, 60}, - {1920, 1080, RES_1920X1080_60HZ_PIXCLOCK, 60}, - {1400, 1050, RES_1400X1050_60HZ_PIXCLOCK, 60}, - {1400, 1050, RES_1400X1050_75HZ_PIXCLOCK, 75}, - {1368, 768, RES_1368X768_60HZ_PIXCLOCK, 60}, - {960, 600, RES_960X600_60HZ_PIXCLOCK, 60}, - {1000, 600, RES_1000X600_60HZ_PIXCLOCK, 60}, - {1024, 576, RES_1024X576_60HZ_PIXCLOCK, 60}, - {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60}, - {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60}, - {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60}, - {1200, 900, RES_1200X900_60HZ_PIXCLOCK, 60}, - {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60}, - {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50}, - {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50}, - {1360, 768, RES_1360X768_60HZ_PIXCLOCK, 60}, - {1366, 768, RES_1366X768_50HZ_PIXCLOCK, 50}, - {1366, 768, RES_1366X768_60HZ_PIXCLOCK, 60}, - {1440, 900, RES_1440X900_60HZ_PIXCLOCK, 60}, - {1440, 900, RES_1440X900_75HZ_PIXCLOCK, 75}, - {1600, 900, RES_1600X900_60HZ_PIXCLOCK, 60}, - {1600, 1024, RES_1600X1024_60HZ_PIXCLOCK, 60}, - {1680, 1050, RES_1680X1050_60HZ_PIXCLOCK, 60}, - {1680, 1050, RES_1680X1050_75HZ_PIXCLOCK, 75}, - {1792, 1344, RES_1792X1344_60HZ_PIXCLOCK, 60}, - {1856, 1392, RES_1856X1392_60HZ_PIXCLOCK, 60}, - {1920, 1200, RES_1920X1200_60HZ_PIXCLOCK, 60}, - {1920, 1440, RES_1920X1440_60HZ_PIXCLOCK, 60}, - {1920, 1440, RES_1920X1440_75HZ_PIXCLOCK, 75}, - {2048, 1536, RES_2048X1536_60HZ_PIXCLOCK, 60} -}; struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIASR, SR15, 0x02, 0x02}, @@ -108,20 +42,6 @@ struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR6A, 0xFF, 0x40}, {VIACR, CR6B, 0xFF, 0x00}, {VIACR, CR6C, 0xFF, 0x00}, -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -172,20 +92,6 @@ struct io_reg CN700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR78, 0xFF, 0x00}, /* LCD scaling Factor */ {VIACR, CR79, 0xFF, 0x00}, /* LCD scaling Factor */ {VIACR, CR9F, 0x03, 0x00}, /* LCD scaling Factor */ -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -229,20 +135,6 @@ struct io_reg KM400_ModeXregs[] = { {VIACR, CR36, 0xFF, 0x01}, /* Power Mangement 3 */ {VIACR, CR68, 0xFF, 0x67}, /* Default FIFO For IGA2 */ {VIACR, CR6A, 0x20, 0x20}, /* Extended FIFO On */ - {VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ - {VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ - {VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ - {VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ - {VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ - {VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ - {VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ - {VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ - {VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ - {VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ - {VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ - {VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ - {VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ - {VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -283,20 +175,6 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, {VIACR, CR6A, 0xFF, 0x40}, {VIACR, CR6B, 0xFF, 0x00}, {VIACR, CR6C, 0xFF, 0x00}, -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -342,20 +220,6 @@ struct io_reg VX855_ModeXregs[] = { {VIACR, CR6A, 0xFD, 0x60}, {VIACR, CR6B, 0xFF, 0x00}, {VIACR, CR6C, 0xFF, 0x00}, -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Scaling Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Scaling Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Scaling Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */ {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */ {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */ @@ -390,21 +254,6 @@ struct io_reg CLE266_ModeXregs[] = { {VIASR, SR1E, 0xF0, 0x00}, {VIAGR, GR20, 0xFF, 0x00}, {VIAGR, GR21, 0xFF, 0x00}, {VIAGR, GR22, 0xFF, 0x00}, - /* LCD Parameters */ -{VIACR, CR7A, 0xFF, 0x01}, /* LCD Parameter 1 */ -{VIACR, CR7B, 0xFF, 0x02}, /* LCD Parameter 2 */ -{VIACR, CR7C, 0xFF, 0x03}, /* LCD Parameter 3 */ -{VIACR, CR7D, 0xFF, 0x04}, /* LCD Parameter 4 */ -{VIACR, CR7E, 0xFF, 0x07}, /* LCD Parameter 5 */ -{VIACR, CR7F, 0xFF, 0x0A}, /* LCD Parameter 6 */ -{VIACR, CR80, 0xFF, 0x0D}, /* LCD Parameter 7 */ -{VIACR, CR81, 0xFF, 0x13}, /* LCD Parameter 8 */ -{VIACR, CR82, 0xFF, 0x16}, /* LCD Parameter 9 */ -{VIACR, CR83, 0xFF, 0x19}, /* LCD Parameter 10 */ -{VIACR, CR84, 0xFF, 0x1C}, /* LCD Parameter 11 */ -{VIACR, CR85, 0xFF, 0x1D}, /* LCD Parameter 12 */ -{VIACR, CR86, 0xFF, 0x1E}, /* LCD Parameter 13 */ -{VIACR, CR87, 0xFF, 0x1F}, /* LCD Parameter 14 */ }; @@ -443,328 +292,321 @@ struct VPITTable VPIT = { /********************/ /* 480x640 */ -struct crt_mode_table CRTM480x640[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM480x640[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_25_175M, M480X640_R60_HSP, M480X640_R60_VSP, + {REFRESH_60, M480X640_R60_HSP, M480X640_R60_VSP, {624, 480, 480, 144, 504, 48, 663, 640, 640, 23, 641, 3} } /* GTF*/ }; /* 640x480*/ -struct crt_mode_table CRTM640x480[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM640x480[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_25_175M, M640X480_R60_HSP, M640X480_R60_VSP, + {REFRESH_60, M640X480_R60_HSP, M640X480_R60_VSP, {800, 640, 648, 144, 656, 96, 525, 480, 480, 45, 490, 2} }, - {REFRESH_75, CLK_31_500M, M640X480_R75_HSP, M640X480_R75_VSP, + {REFRESH_75, M640X480_R75_HSP, M640X480_R75_VSP, {840, 640, 640, 200, 656, 64, 500, 480, 480, 20, 481, 3} }, - {REFRESH_85, CLK_36_000M, M640X480_R85_HSP, M640X480_R85_VSP, + {REFRESH_85, M640X480_R85_HSP, M640X480_R85_VSP, {832, 640, 640, 192, 696, 56, 509, 480, 480, 29, 481, 3} }, - {REFRESH_100, CLK_43_163M, M640X480_R100_HSP, M640X480_R100_VSP, + {REFRESH_100, M640X480_R100_HSP, M640X480_R100_VSP, {848, 640, 640, 208, 680, 64, 509, 480, 480, 29, 481, 3} }, /*GTF*/ - {REFRESH_120, CLK_52_406M, M640X480_R120_HSP, - M640X480_R120_VSP, - {848, 640, 640, 208, 680, 64, 515, 480, 480, 35, 481, - 3} } /*GTF*/ + {REFRESH_120, M640X480_R120_HSP, M640X480_R120_VSP, + {848, 640, 640, 208, 680, 64, 515, 480, 480, 35, 481, 3} } /*GTF*/ }; /*720x480 (GTF)*/ -struct crt_mode_table CRTM720x480[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM720x480[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_26_880M, M720X480_R60_HSP, M720X480_R60_VSP, + {REFRESH_60, M720X480_R60_HSP, M720X480_R60_VSP, {896, 720, 720, 176, 736, 72, 497, 480, 480, 17, 481, 3} } }; /*720x576 (GTF)*/ -struct crt_mode_table CRTM720x576[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM720x576[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_32_668M, M720X576_R60_HSP, M720X576_R60_VSP, + {REFRESH_60, M720X576_R60_HSP, M720X576_R60_VSP, {912, 720, 720, 192, 744, 72, 597, 576, 576, 21, 577, 3} } }; /* 800x480 (CVT) */ -struct crt_mode_table CRTM800x480[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM800x480[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_29_581M, M800X480_R60_HSP, M800X480_R60_VSP, + {REFRESH_60, M800X480_R60_HSP, M800X480_R60_VSP, {992, 800, 800, 192, 824, 72, 500, 480, 480, 20, 483, 7} } }; /* 800x600*/ -struct crt_mode_table CRTM800x600[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM800x600[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_40_000M, M800X600_R60_HSP, M800X600_R60_VSP, + {REFRESH_60, M800X600_R60_HSP, M800X600_R60_VSP, {1056, 800, 800, 256, 840, 128, 628, 600, 600, 28, 601, 4} }, - {REFRESH_75, CLK_49_500M, M800X600_R75_HSP, M800X600_R75_VSP, + {REFRESH_75, M800X600_R75_HSP, M800X600_R75_VSP, {1056, 800, 800, 256, 816, 80, 625, 600, 600, 25, 601, 3} }, - {REFRESH_85, CLK_56_250M, M800X600_R85_HSP, M800X600_R85_VSP, + {REFRESH_85, M800X600_R85_HSP, M800X600_R85_VSP, {1048, 800, 800, 248, 832, 64, 631, 600, 600, 31, 601, 3} }, - {REFRESH_100, CLK_68_179M, M800X600_R100_HSP, M800X600_R100_VSP, + {REFRESH_100, M800X600_R100_HSP, M800X600_R100_VSP, {1072, 800, 800, 272, 848, 88, 636, 600, 600, 36, 601, 3} }, - {REFRESH_120, CLK_83_950M, M800X600_R120_HSP, - M800X600_R120_VSP, - {1088, 800, 800, 288, 856, 88, 643, 600, 600, 43, 601, - 3} } + {REFRESH_120, M800X600_R120_HSP, M800X600_R120_VSP, + {1088, 800, 800, 288, 856, 88, 643, 600, 600, 43, 601, 3} } }; /* 848x480 (CVT) */ -struct crt_mode_table CRTM848x480[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM848x480[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_31_500M, M848X480_R60_HSP, M848X480_R60_VSP, + {REFRESH_60, M848X480_R60_HSP, M848X480_R60_VSP, {1056, 848, 848, 208, 872, 80, 500, 480, 480, 20, 483, 5} } }; /*856x480 (GTF) convert to 852x480*/ -struct crt_mode_table CRTM852x480[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM852x480[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_31_728M, M852X480_R60_HSP, M852X480_R60_VSP, + {REFRESH_60, M852X480_R60_HSP, M852X480_R60_VSP, {1064, 856, 856, 208, 872, 88, 497, 480, 480, 17, 481, 3} } }; /*1024x512 (GTF)*/ -struct crt_mode_table CRTM1024x512[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1024x512[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_41_291M, M1024X512_R60_HSP, M1024X512_R60_VSP, + {REFRESH_60, M1024X512_R60_HSP, M1024X512_R60_VSP, {1296, 1024, 1024, 272, 1056, 104, 531, 512, 512, 19, 513, 3} } }; /* 1024x600*/ -struct crt_mode_table CRTM1024x600[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1024x600[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_48_875M, M1024X600_R60_HSP, M1024X600_R60_VSP, + {REFRESH_60, M1024X600_R60_HSP, M1024X600_R60_VSP, {1312, 1024, 1024, 288, 1064, 104, 622, 600, 600, 22, 601, 3} }, }; /* 1024x768*/ -struct crt_mode_table CRTM1024x768[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1024x768[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_65_000M, M1024X768_R60_HSP, M1024X768_R60_VSP, + {REFRESH_60, M1024X768_R60_HSP, M1024X768_R60_VSP, {1344, 1024, 1024, 320, 1048, 136, 806, 768, 768, 38, 771, 6} }, - {REFRESH_75, CLK_78_750M, M1024X768_R75_HSP, M1024X768_R75_VSP, + {REFRESH_75, M1024X768_R75_HSP, M1024X768_R75_VSP, {1312, 1024, 1024, 288, 1040, 96, 800, 768, 768, 32, 769, 3} }, - {REFRESH_85, CLK_94_500M, M1024X768_R85_HSP, M1024X768_R85_VSP, + {REFRESH_85, M1024X768_R85_HSP, M1024X768_R85_VSP, {1376, 1024, 1024, 352, 1072, 96, 808, 768, 768, 40, 769, 3} }, - {REFRESH_100, CLK_113_309M, M1024X768_R100_HSP, M1024X768_R100_VSP, + {REFRESH_100, M1024X768_R100_HSP, M1024X768_R100_VSP, {1392, 1024, 1024, 368, 1096, 112, 814, 768, 768, 46, 769, 3} } }; /* 1152x864*/ -struct crt_mode_table CRTM1152x864[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1152x864[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_75, CLK_108_000M, M1152X864_R75_HSP, M1152X864_R75_VSP, + {REFRESH_75, M1152X864_R75_HSP, M1152X864_R75_VSP, {1600, 1152, 1152, 448, 1216, 128, 900, 864, 864, 36, 865, 3} } }; /* 1280x720 (HDMI 720P)*/ -struct crt_mode_table CRTM1280x720[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1280x720[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_74_481M, M1280X720_R60_HSP, M1280X720_R60_VSP, + {REFRESH_60, M1280X720_R60_HSP, M1280X720_R60_VSP, {1648, 1280, 1280, 368, 1392, 40, 750, 720, 720, 30, 725, 5} }, - {REFRESH_50, CLK_60_466M, M1280X720_R50_HSP, M1280X720_R50_VSP, + {REFRESH_50, M1280X720_R50_HSP, M1280X720_R50_VSP, {1632, 1280, 1280, 352, 1328, 128, 741, 720, 720, 21, 721, 3} } }; /*1280x768 (GTF)*/ -struct crt_mode_table CRTM1280x768[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1280x768[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_80_136M, M1280X768_R60_HSP, M1280X768_R60_VSP, + {REFRESH_60, M1280X768_R60_HSP, M1280X768_R60_VSP, {1680, 1280, 1280, 400, 1344, 136, 795, 768, 768, 27, 769, 3} }, - {REFRESH_50, CLK_65_178M, M1280X768_R50_HSP, M1280X768_R50_VSP, + {REFRESH_50, M1280X768_R50_HSP, M1280X768_R50_VSP, {1648, 1280, 1280, 368, 1336, 128, 791, 768, 768, 23, 769, 3} } }; /* 1280x800 (CVT) */ -struct crt_mode_table CRTM1280x800[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1280x800[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_83_375M, M1280X800_R60_HSP, M1280X800_R60_VSP, + {REFRESH_60, M1280X800_R60_HSP, M1280X800_R60_VSP, {1680, 1280, 1280, 400, 1352, 128, 831, 800, 800, 31, 803, 6} } }; /*1280x960*/ -struct crt_mode_table CRTM1280x960[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1280x960[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_108_000M, M1280X960_R60_HSP, M1280X960_R60_VSP, + {REFRESH_60, M1280X960_R60_HSP, M1280X960_R60_VSP, {1800, 1280, 1280, 520, 1376, 112, 1000, 960, 960, 40, 961, 3} } }; /* 1280x1024*/ -struct crt_mode_table CRTM1280x1024[] = { - /*r_rate,vclk,,hsp,vsp */ +static struct crt_mode_table CRTM1280x1024[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_108_000M, M1280X1024_R60_HSP, M1280X1024_R60_VSP, + {REFRESH_60, M1280X1024_R60_HSP, M1280X1024_R60_VSP, {1688, 1280, 1280, 408, 1328, 112, 1066, 1024, 1024, 42, 1025, 3} }, - {REFRESH_75, CLK_135_000M, M1280X1024_R75_HSP, M1280X1024_R75_VSP, + {REFRESH_75, M1280X1024_R75_HSP, M1280X1024_R75_VSP, {1688, 1280, 1280, 408, 1296, 144, 1066, 1024, 1024, 42, 1025, 3} }, - {REFRESH_85, CLK_157_500M, M1280X1024_R85_HSP, M1280X1024_R85_VSP, + {REFRESH_85, M1280X1024_R85_HSP, M1280X1024_R85_VSP, {1728, 1280, 1280, 448, 1344, 160, 1072, 1024, 1024, 48, 1025, 3} } }; /* 1368x768 (GTF) */ -struct crt_mode_table CRTM1368x768[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1368x768[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, + {REFRESH_60, M1368X768_R60_HSP, M1368X768_R60_VSP, {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} } }; /*1440x1050 (GTF)*/ -struct crt_mode_table CRTM1440x1050[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1440x1050[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_125_104M, M1440X1050_R60_HSP, M1440X1050_R60_VSP, + {REFRESH_60, M1440X1050_R60_HSP, M1440X1050_R60_VSP, {1936, 1440, 1440, 496, 1536, 152, 1077, 1040, 1040, 37, 1041, 3} } }; /* 1600x1200*/ -struct crt_mode_table CRTM1600x1200[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1600x1200[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_162_000M, M1600X1200_R60_HSP, M1600X1200_R60_VSP, + {REFRESH_60, M1600X1200_R60_HSP, M1600X1200_R60_VSP, {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 3} }, - {REFRESH_75, CLK_202_500M, M1600X1200_R75_HSP, M1600X1200_R75_VSP, + {REFRESH_75, M1600X1200_R75_HSP, M1600X1200_R75_VSP, {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 3} } }; /* 1680x1050 (CVT) */ -struct crt_mode_table CRTM1680x1050[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1680x1050[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_146_760M, M1680x1050_R60_HSP, M1680x1050_R60_VSP, + {REFRESH_60, M1680x1050_R60_HSP, M1680x1050_R60_VSP, {2240, 1680, 1680, 560, 1784, 176, 1089, 1050, 1050, 39, 1053, 6} }, - {REFRESH_75, CLK_187_000M, M1680x1050_R75_HSP, M1680x1050_R75_VSP, + {REFRESH_75, M1680x1050_R75_HSP, M1680x1050_R75_VSP, {2272, 1680, 1680, 592, 1800, 176, 1099, 1050, 1050, 49, 1053, 6} } }; /* 1680x1050 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1680x1050_RB[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1680x1050_RB[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_119_000M, M1680x1050_RB_R60_HSP, - M1680x1050_RB_R60_VSP, + {REFRESH_60, M1680x1050_RB_R60_HSP, M1680x1050_RB_R60_VSP, {1840, 1680, 1680, 160, 1728, 32, 1080, 1050, 1050, 30, 1053, 6} } }; /* 1920x1080 (CVT)*/ -struct crt_mode_table CRTM1920x1080[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1920x1080[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_172_798M, M1920X1080_R60_HSP, M1920X1080_R60_VSP, + {REFRESH_60, M1920X1080_R60_HSP, M1920X1080_R60_VSP, {2576, 1920, 1920, 656, 2048, 200, 1120, 1080, 1080, 40, 1083, 5} } }; /* 1920x1080 (CVT with Reduce Blanking) */ -struct crt_mode_table CRTM1920x1080_RB[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1920x1080_RB[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_138_400M, M1920X1080_RB_R60_HSP, - M1920X1080_RB_R60_VSP, + {REFRESH_60, M1920X1080_RB_R60_HSP, M1920X1080_RB_R60_VSP, {2080, 1920, 1920, 160, 1968, 32, 1111, 1080, 1080, 31, 1083, 5} } }; /* 1920x1440*/ -struct crt_mode_table CRTM1920x1440[] = { - /*r_rate,vclk,hsp,vsp */ +static struct crt_mode_table CRTM1920x1440[] = { + /*r_rate,hsp,vsp */ /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_234_000M, M1920X1440_R60_HSP, M1920X1440_R60_VSP, + {REFRESH_60, M1920X1440_R60_HSP, M1920X1440_R60_VSP, {2600, 1920, 1920, 680, 2048, 208, 1500, 1440, 1440, 60, 1441, 3} }, - {REFRESH_75, CLK_297_500M, M1920X1440_R75_HSP, M1920X1440_R75_VSP, + {REFRESH_75, M1920X1440_R75_HSP, M1920X1440_R75_VSP, {2640, 1920, 1920, 720, 2064, 224, 1500, 1440, 1440, 60, 1441, 3} } }; /* 1400x1050 (CVT) */ -struct crt_mode_table CRTM1400x1050[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1400x1050[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_121_750M, M1400X1050_R60_HSP, M1400X1050_R60_VSP, + {REFRESH_60, M1400X1050_R60_HSP, M1400X1050_R60_VSP, {1864, 1400, 1400, 464, 1488, 144, 1089, 1050, 1050, 39, 1053, 4} }, - {REFRESH_75, CLK_156_000M, M1400X1050_R75_HSP, M1400X1050_R75_VSP, + {REFRESH_75, M1400X1050_R75_HSP, M1400X1050_R75_VSP, {1896, 1400, 1400, 496, 1504, 144, 1099, 1050, 1050, 49, 1053, 4} } }; /* 1400x1050 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1400x1050_RB[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1400x1050_RB[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_101_000M, M1400X1050_RB_R60_HSP, - M1400X1050_RB_R60_VSP, + {REFRESH_60, M1400X1050_RB_R60_HSP, M1400X1050_RB_R60_VSP, {1560, 1400, 1400, 160, 1448, 32, 1080, 1050, 1050, 30, 1053, 4} } }; /* 960x600 (CVT) */ -struct crt_mode_table CRTM960x600[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM960x600[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_45_250M, M960X600_R60_HSP, M960X600_R60_VSP, + {REFRESH_60, M960X600_R60_HSP, M960X600_R60_VSP, {1216, 960, 960, 256, 992, 96, 624, 600, 600, 24, 603, 6} } }; /* 1000x600 (GTF) */ -struct crt_mode_table CRTM1000x600[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1000x600[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_48_000M, M1000X600_R60_HSP, M1000X600_R60_VSP, + {REFRESH_60, M1000X600_R60_HSP, M1000X600_R60_VSP, {1288, 1000, 1000, 288, 1040, 104, 622, 600, 600, 22, 601, 3} } }; /* 1024x576 (GTF) */ -struct crt_mode_table CRTM1024x576[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1024x576[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_46_996M, M1024X576_R60_HSP, M1024X576_R60_VSP, + {REFRESH_60, M1024X576_R60_HSP, M1024X576_R60_VSP, {1312, 1024, 1024, 288, 1064, 104, 597, 576, 576, 21, 577, 3} } }; /* 1088x612 (CVT) */ -struct crt_mode_table CRTM1088x612[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1088x612[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_52_977M, M1088X612_R60_HSP, M1088X612_R60_VSP, + {REFRESH_60, M1088X612_R60_HSP, M1088X612_R60_VSP, {1392, 1088, 1088, 304, 1136, 104, 636, 612, 612, 24, 615, 5} } }; /* 1152x720 (CVT) */ -struct crt_mode_table CRTM1152x720[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1152x720[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_66_750M, M1152X720_R60_HSP, M1152X720_R60_VSP, + {REFRESH_60, M1152X720_R60_HSP, M1152X720_R60_VSP, {1488, 1152, 1152, 336, 1208, 112, 748, 720, 720, 28, 723, 6} } }; /* 1200x720 (GTF) */ -struct crt_mode_table CRTM1200x720[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1200x720[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_70_159M, M1200X720_R60_HSP, M1200X720_R60_VSP, + {REFRESH_60, M1200X720_R60_HSP, M1200X720_R60_VSP, {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} } }; /* 1200x900 (DCON) */ -struct crt_mode_table DCON1200x900[] = { - /* r_rate, vclk, hsp, vsp */ - {REFRESH_60, CLK_57_275M, M1200X900_R60_HSP, M1200X900_R60_VSP, +static struct crt_mode_table DCON1200x900[] = { + /* r_rate, hsp, vsp */ + {REFRESH_60, M1200X900_R60_HSP, M1200X900_R60_VSP, /* The correct htotal is 1240, but this doesn't raster on VX855. */ /* Via suggested changing to a multiple of 16, hence 1264. */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ @@ -772,126 +614,122 @@ struct crt_mode_table DCON1200x900[] = { }; /* 1280x600 (GTF) */ -struct crt_mode_table CRTM1280x600[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1280x600[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_61_500M, M1280x600_R60_HSP, M1280x600_R60_VSP, + {REFRESH_60, M1280x600_R60_HSP, M1280x600_R60_VSP, {1648, 1280, 1280, 368, 1336, 128, 622, 600, 600, 22, 601, 3} } }; /* 1360x768 (CVT) */ -struct crt_mode_table CRTM1360x768[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1360x768[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_84_750M, M1360X768_R60_HSP, M1360X768_R60_VSP, + {REFRESH_60, M1360X768_R60_HSP, M1360X768_R60_VSP, {1776, 1360, 1360, 416, 1432, 136, 798, 768, 768, 30, 771, 5} } }; /* 1360x768 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1360x768_RB[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1360x768_RB[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_72_000M, M1360X768_RB_R60_HSP, - M1360X768_RB_R60_VSP, + {REFRESH_60, M1360X768_RB_R60_HSP, M1360X768_RB_R60_VSP, {1520, 1360, 1360, 160, 1408, 32, 790, 768, 768, 22, 771, 5} } }; /* 1366x768 (GTF) */ -struct crt_mode_table CRTM1366x768[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1366x768[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, + {REFRESH_60, M1368X768_R60_HSP, M1368X768_R60_VSP, {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} }, - {REFRESH_50, CLK_69_924M, M1368X768_R50_HSP, M1368X768_R50_VSP, + {REFRESH_50, M1368X768_R50_HSP, M1368X768_R50_VSP, {1768, 1368, 1368, 400, 1424, 144, 791, 768, 768, 23, 769, 3} } }; /* 1440x900 (CVT) */ -struct crt_mode_table CRTM1440x900[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1440x900[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_106_500M, M1440X900_R60_HSP, M1440X900_R60_VSP, + {REFRESH_60, M1440X900_R60_HSP, M1440X900_R60_VSP, {1904, 1440, 1440, 464, 1520, 152, 934, 900, 900, 34, 903, 6} }, - {REFRESH_75, CLK_136_700M, M1440X900_R75_HSP, M1440X900_R75_VSP, + {REFRESH_75, M1440X900_R75_HSP, M1440X900_R75_VSP, {1936, 1440, 1440, 496, 1536, 152, 942, 900, 900, 42, 903, 6} } }; /* 1440x900 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1440x900_RB[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1440x900_RB[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_88_750M, M1440X900_RB_R60_HSP, - M1440X900_RB_R60_VSP, + {REFRESH_60, M1440X900_RB_R60_HSP, M1440X900_RB_R60_VSP, {1600, 1440, 1440, 160, 1488, 32, 926, 900, 900, 26, 903, 6} } }; /* 1600x900 (CVT) */ -struct crt_mode_table CRTM1600x900[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1600x900[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_118_840M, M1600X900_R60_HSP, M1600X900_R60_VSP, + {REFRESH_60, M1600X900_R60_HSP, M1600X900_R60_VSP, {2112, 1600, 1600, 512, 1688, 168, 934, 900, 900, 34, 903, 5} } }; /* 1600x900 (CVT Reduce Blanking) */ -struct crt_mode_table CRTM1600x900_RB[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1600x900_RB[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_97_750M, M1600X900_RB_R60_HSP, - M1600X900_RB_R60_VSP, + {REFRESH_60, M1600X900_RB_R60_HSP, M1600X900_RB_R60_VSP, {1760, 1600, 1600, 160, 1648, 32, 926, 900, 900, 26, 903, 5} } }; /* 1600x1024 (GTF) */ -struct crt_mode_table CRTM1600x1024[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1600x1024[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_136_700M, M1600X1024_R60_HSP, M1600X1024_R60_VSP, + {REFRESH_60, M1600X1024_R60_HSP, M1600X1024_R60_VSP, {2144, 1600, 1600, 544, 1704, 168, 1060, 1024, 1024, 36, 1025, 3} } }; /* 1792x1344 (DMT) */ -struct crt_mode_table CRTM1792x1344[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1792x1344[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_204_000M, M1792x1344_R60_HSP, M1792x1344_R60_VSP, + {REFRESH_60, M1792x1344_R60_HSP, M1792x1344_R60_VSP, {2448, 1792, 1792, 656, 1920, 200, 1394, 1344, 1344, 50, 1345, 3} } }; /* 1856x1392 (DMT) */ -struct crt_mode_table CRTM1856x1392[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1856x1392[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_218_500M, M1856x1392_R60_HSP, M1856x1392_R60_VSP, + {REFRESH_60, M1856x1392_R60_HSP, M1856x1392_R60_VSP, {2528, 1856, 1856, 672, 1952, 224, 1439, 1392, 1392, 47, 1393, 3} } }; /* 1920x1200 (CVT) */ -struct crt_mode_table CRTM1920x1200[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1920x1200[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_193_295M, M1920X1200_R60_HSP, M1920X1200_R60_VSP, + {REFRESH_60, M1920X1200_R60_HSP, M1920X1200_R60_VSP, {2592, 1920, 1920, 672, 2056, 200, 1245, 1200, 1200, 45, 1203, 6} } }; /* 1920x1200 (CVT with Reduce Blanking) */ -struct crt_mode_table CRTM1920x1200_RB[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM1920x1200_RB[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_153_920M, M1920X1200_RB_R60_HSP, - M1920X1200_RB_R60_VSP, + {REFRESH_60, M1920X1200_RB_R60_HSP, M1920X1200_RB_R60_VSP, {2080, 1920, 1920, 160, 1968, 32, 1235, 1200, 1200, 35, 1203, 6} } }; /* 2048x1536 (CVT) */ -struct crt_mode_table CRTM2048x1536[] = { - /* r_rate, vclk, hsp, vsp */ +static struct crt_mode_table CRTM2048x1536[] = { + /* r_rate, hsp, vsp */ /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ - {REFRESH_60, CLK_267_250M, M2048x1536_R60_HSP, M2048x1536_R60_VSP, + {REFRESH_60, M2048x1536_R60_HSP, M2048x1536_R60_VSP, {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} } }; -struct VideoModeTable viafb_modes[] = { +static struct VideoModeTable viafb_modes[] = { /* Display : 480x640 (GTF) */ {CRTM480x640, ARRAY_SIZE(CRTM480x640)}, @@ -1016,7 +854,7 @@ struct VideoModeTable viafb_modes[] = { {CRTM1400x1050, ARRAY_SIZE(CRTM1400x1050)} }; -struct VideoModeTable viafb_rb_modes[] = { +static struct VideoModeTable viafb_rb_modes[] = { /* Display : 1360x768 (CVT Reduce Blanking) */ {CRTM1360x768_RB, ARRAY_SIZE(CRTM1360x768_RB)}, @@ -1040,14 +878,12 @@ struct VideoModeTable viafb_rb_modes[] = { }; struct crt_mode_table CEAM1280x720[] = { - {REFRESH_60, CLK_74_270M, M1280X720_CEA_R60_HSP, - M1280X720_CEA_R60_VSP, + {REFRESH_60, M1280X720_CEA_R60_HSP, M1280X720_CEA_R60_VSP, /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {1650, 1280, 1280, 370, 1390, 40, 750, 720, 720, 30, 725, 5} } }; struct crt_mode_table CEAM1920x1080[] = { - {REFRESH_60, CLK_148_500M, M1920X1080_CEA_R60_HSP, - M1920X1080_CEA_R60_VSP, + {REFRESH_60, M1920X1080_CEA_R60_HSP, M1920X1080_CEA_R60_VSP, /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ {2200, 1920, 1920, 300, 2008, 44, 1125, 1080, 1080, 45, 1084, 5} } }; @@ -1057,7 +893,6 @@ struct VideoModeTable CEA_HDMI_Modes[] = { {CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)} }; -int NUM_TOTAL_RES_MAP_REFRESH = ARRAY_SIZE(res_map_refresh_tbl); int NUM_TOTAL_CEA_MODES = ARRAY_SIZE(CEA_HDMI_Modes); int NUM_TOTAL_CN400_ModeXregs = ARRAY_SIZE(CN400_ModeXregs); int NUM_TOTAL_CN700_ModeXregs = ARRAY_SIZE(CN700_ModeXregs); diff --git a/drivers/video/via/viamode.h b/drivers/video/via/viamode.h index 5b1ced86514..8a67ea1b5ef 100644 --- a/drivers/video/via/viamode.h +++ b/drivers/video/via/viamode.h @@ -41,14 +41,6 @@ struct patch_table { struct io_reg *io_reg_table; }; -struct res_map_refresh { - int hres; - int vres; - int pixclock; - int vmode_refresh; -}; - -extern int NUM_TOTAL_RES_MAP_REFRESH; extern int NUM_TOTAL_CEA_MODES; extern int NUM_TOTAL_CN400_ModeXregs; extern int NUM_TOTAL_CN700_ModeXregs; @@ -66,7 +58,6 @@ extern struct crt_mode_table CEAM1280x720[]; extern struct crt_mode_table CEAM1920x1080[]; extern struct VideoModeTable CEA_HDMI_Modes[]; -extern struct res_map_refresh res_map_refresh_tbl[]; extern struct io_reg CN400_ModeXregs[]; extern struct io_reg CN700_ModeXregs[]; extern struct io_reg KM400_ModeXregs[]; diff --git a/drivers/video/via/vt1636.c b/drivers/video/via/vt1636.c index 60e4192c2b3..ee2903b472c 100644 --- a/drivers/video/via/vt1636.c +++ b/drivers/video/via/vt1636.c @@ -167,22 +167,6 @@ static int get_clk_range_index(u32 Clk) return DPA_CLK_RANGE_150M; } -static int get_lvds_dpa_setting_index(int panel_size_id, - struct VT1636_DPA_SETTING *p_vt1636_dpasetting_tbl, - int tbl_size) -{ - int i; - - for (i = 0; i < tbl_size; i++) { - if (panel_size_id == p_vt1636_dpasetting_tbl->PanelSizeID) - return i; - - p_vt1636_dpasetting_tbl++; - } - - return 0; -} - static void set_dpa_vt1636(struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info, struct VT1636_DPA_SETTING *p_vt1636_dpa_setting) @@ -206,7 +190,9 @@ void viafb_vt1636_patch_skew_on_vt3324( struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { - int index, size; + struct VT1636_DPA_SETTING dpa = {0x00, 0x00}, dpa_16x12 = {0x0B, 0x03}, + *pdpa; + int index; DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3324.\n"); @@ -216,19 +202,21 @@ void viafb_vt1636_patch_skew_on_vt3324( &GFX_DPA_SETTING_TBL_VT3324[index]); /* LVDS Transmitter DPA settings: */ - size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3324); - index = - get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id, - VT1636_DPA_SETTING_TBL_VT3324, size); - set_dpa_vt1636(plvds_setting_info, plvds_chip_info, - &VT1636_DPA_SETTING_TBL_VT3324[index]); + if (plvds_setting_info->lcd_panel_hres == 1600 && + plvds_setting_info->lcd_panel_vres == 1200) + pdpa = &dpa_16x12; + else + pdpa = &dpa; + + set_dpa_vt1636(plvds_setting_info, plvds_chip_info, pdpa); } void viafb_vt1636_patch_skew_on_vt3327( struct lvds_setting_information *plvds_setting_info, struct lvds_chip_information *plvds_chip_info) { - int index, size; + struct VT1636_DPA_SETTING dpa = {0x00, 0x00}; + int index; DEBUG_MSG(KERN_INFO "viafb_vt1636_patch_skew_on_vt3327.\n"); @@ -238,12 +226,7 @@ void viafb_vt1636_patch_skew_on_vt3327( &GFX_DPA_SETTING_TBL_VT3327[index]); /* LVDS Transmitter DPA settings: */ - size = ARRAY_SIZE(VT1636_DPA_SETTING_TBL_VT3327); - index = - get_lvds_dpa_setting_index(plvds_setting_info->lcd_panel_id, - VT1636_DPA_SETTING_TBL_VT3327, size); - set_dpa_vt1636(plvds_setting_info, plvds_chip_info, - &VT1636_DPA_SETTING_TBL_VT3327[index]); + set_dpa_vt1636(plvds_setting_info, plvds_chip_info, &dpa); } void viafb_vt1636_patch_skew_on_vt3364( diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index 68bd23476c6..77dea015ff6 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c @@ -404,8 +404,7 @@ static int xilinxfb_release(struct device *dev) * OF bus binding */ -static int __devinit -xilinxfb_of_probe(struct platform_device *op, const struct of_device_id *match) +static int __devinit xilinxfb_of_probe(struct platform_device *op) { const u32 *prop; u32 *p; @@ -418,8 +417,6 @@ xilinxfb_of_probe(struct platform_device *op, const struct of_device_id *match) /* Copy with the default pdata (not a ptr reference!) */ pdata = xilinx_fb_default_pdata; - dev_dbg(&op->dev, "xilinxfb_of_probe(%p, %p)\n", op, match); - /* Allocate the driver data region */ drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL); if (!drvdata) { @@ -505,7 +502,7 @@ static struct of_device_id xilinxfb_of_match[] __devinitdata = { }; MODULE_DEVICE_TABLE(of, xilinxfb_of_match); -static struct of_platform_driver xilinxfb_of_driver = { +static struct platform_driver xilinxfb_of_driver = { .probe = xilinxfb_of_probe, .remove = __devexit_p(xilinxfb_of_remove), .driver = { @@ -523,13 +520,13 @@ static struct of_platform_driver xilinxfb_of_driver = { static int __init xilinxfb_init(void) { - return of_register_platform_driver(&xilinxfb_of_driver); + return platform_driver_register(&xilinxfb_of_driver); } static void __exit xilinxfb_cleanup(void) { - of_unregister_platform_driver(&xilinxfb_of_driver); + platform_driver_unregister(&xilinxfb_of_driver); } module_init(xilinxfb_init); |