diff options
Diffstat (limited to 'drivers')
31 files changed, 1280 insertions, 361 deletions
diff --git a/drivers/block/viodasd.c b/drivers/block/viodasd.c index 41ca721d252..ebfe038d859 100644 --- a/drivers/block/viodasd.c +++ b/drivers/block/viodasd.c @@ -69,7 +69,7 @@ MODULE_LICENSE("GPL"); enum { PARTITION_SHIFT = 3, MAX_DISKNO = HVMAXARCHITECTEDVIRTUALDISKS, - MAX_DISK_NAME = sizeof(((struct gendisk *)0)->disk_name) + MAX_DISK_NAME = FIELD_SIZEOF(struct gendisk, disk_name) }; static DEFINE_SPINLOCK(viodasd_spinlock); diff --git a/drivers/char/hvc_beat.c b/drivers/char/hvc_beat.c index e74bb949c28..91cdb35a920 100644 --- a/drivers/char/hvc_beat.c +++ b/drivers/char/hvc_beat.c @@ -78,8 +78,8 @@ static int hvc_beat_put_chars(uint32_t vtermno, const char *buf, int cnt) for (rest = cnt; rest > 0; rest -= nlen) { nlen = (rest > 16) ? 16 : rest; memcpy(kb, buf, nlen); - beat_put_term_char(vtermno, rest, kb[0], kb[1]); - rest -= nlen; + beat_put_term_char(vtermno, nlen, kb[0], kb[1]); + buf += nlen; } return cnt; } diff --git a/drivers/char/xilinx_hwicap/buffer_icap.c b/drivers/char/xilinx_hwicap/buffer_icap.c index f577daedb63..aa7f7962a9a 100644 --- a/drivers/char/xilinx_hwicap/buffer_icap.c +++ b/drivers/char/xilinx_hwicap/buffer_icap.c @@ -74,7 +74,7 @@ /** * buffer_icap_get_status - Get the contents of the status register. - * @base_address: is the base address of the device + * @drvdata: a pointer to the drvdata. * * The status register contains the ICAP status and the done bit. * @@ -88,9 +88,9 @@ * D1 - Always 1 * D0 - Done bit **/ -static inline u32 buffer_icap_get_status(void __iomem *base_address) +u32 buffer_icap_get_status(struct hwicap_drvdata *drvdata) { - return in_be32(base_address + XHI_STATUS_REG_OFFSET); + return in_be32(drvdata->base_address + XHI_STATUS_REG_OFFSET); } /** @@ -117,20 +117,8 @@ static inline u32 buffer_icap_get_bram(void __iomem *base_address, **/ static inline bool buffer_icap_busy(void __iomem *base_address) { - return (buffer_icap_get_status(base_address) & 1) == XHI_NOT_FINISHED; -} - -/** - * buffer_icap_busy - Return true if the icap device is not busy - * @base_address: is the base address of the device - * - * The queries the low order bit of the status register, which - * indicates whether the current configuration or readback operation - * has completed. - **/ -static inline bool buffer_icap_done(void __iomem *base_address) -{ - return (buffer_icap_get_status(base_address) & 1) == XHI_FINISHED; + u32 status = in_be32(base_address + XHI_STATUS_REG_OFFSET); + return (status & 1) == XHI_NOT_FINISHED; } /** diff --git a/drivers/char/xilinx_hwicap/buffer_icap.h b/drivers/char/xilinx_hwicap/buffer_icap.h index 03184959fa0..c5b1840906b 100644 --- a/drivers/char/xilinx_hwicap/buffer_icap.h +++ b/drivers/char/xilinx_hwicap/buffer_icap.h @@ -44,8 +44,6 @@ #include <asm/io.h> #include "xilinx_hwicap.h" -void buffer_icap_reset(struct hwicap_drvdata *drvdata); - /* Loads a partial bitstream from system memory. */ int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data, u32 Size); @@ -54,4 +52,7 @@ int buffer_icap_set_configuration(struct hwicap_drvdata *drvdata, u32 *data, int buffer_icap_get_configuration(struct hwicap_drvdata *drvdata, u32 *data, u32 Size); +u32 buffer_icap_get_status(struct hwicap_drvdata *drvdata); +void buffer_icap_reset(struct hwicap_drvdata *drvdata); + #endif diff --git a/drivers/char/xilinx_hwicap/fifo_icap.c b/drivers/char/xilinx_hwicap/fifo_icap.c index 6f45dbd4712..776b5052847 100644 --- a/drivers/char/xilinx_hwicap/fifo_icap.c +++ b/drivers/char/xilinx_hwicap/fifo_icap.c @@ -78,13 +78,6 @@ #define XHI_CR_READ_MASK 0x00000002 /* Read from ICAP to FIFO */ #define XHI_CR_WRITE_MASK 0x00000001 /* Write from FIFO to ICAP */ -/* Status Register (SR) */ -#define XHI_SR_CFGERR_N_MASK 0x00000100 /* Config Error Mask */ -#define XHI_SR_DALIGN_MASK 0x00000080 /* Data Alignment Mask */ -#define XHI_SR_RIP_MASK 0x00000040 /* Read back Mask */ -#define XHI_SR_IN_ABORT_N_MASK 0x00000020 /* Select Map Abort Mask */ -#define XHI_SR_DONE_MASK 0x00000001 /* Done bit Mask */ - #define XHI_WFO_MAX_VACANCY 1024 /* Max Write FIFO Vacancy, in words */ #define XHI_RFO_MAX_OCCUPANCY 256 /* Max Read FIFO Occupancy, in words */ @@ -152,13 +145,35 @@ static inline void fifo_icap_start_readback(struct hwicap_drvdata *drvdata) } /** + * fifo_icap_get_status - Get the contents of the status register. + * @drvdata: a pointer to the drvdata. + * + * The status register contains the ICAP status and the done bit. + * + * D8 - cfgerr + * D7 - dalign + * D6 - rip + * D5 - in_abort_l + * D4 - Always 1 + * D3 - Always 1 + * D2 - Always 1 + * D1 - Always 1 + * D0 - Done bit + **/ +u32 fifo_icap_get_status(struct hwicap_drvdata *drvdata) +{ + u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET); + dev_dbg(drvdata->dev, "Getting status = %x\n", status); + return status; +} + +/** * fifo_icap_busy - Return true if the ICAP is still processing a transaction. * @drvdata: a pointer to the drvdata. **/ static inline u32 fifo_icap_busy(struct hwicap_drvdata *drvdata) { u32 status = in_be32(drvdata->base_address + XHI_SR_OFFSET); - dev_dbg(drvdata->dev, "Getting status = %x\n", status); return (status & XHI_SR_DONE_MASK) ? 0 : 1; } diff --git a/drivers/char/xilinx_hwicap/fifo_icap.h b/drivers/char/xilinx_hwicap/fifo_icap.h index 4d3068dd040..ffabd3ba2bd 100644 --- a/drivers/char/xilinx_hwicap/fifo_icap.h +++ b/drivers/char/xilinx_hwicap/fifo_icap.h @@ -56,6 +56,7 @@ int fifo_icap_set_configuration( u32 *FrameBuffer, u32 NumWords); +u32 fifo_icap_get_status(struct hwicap_drvdata *drvdata); void fifo_icap_reset(struct hwicap_drvdata *drvdata); void fifo_icap_flush_fifo(struct hwicap_drvdata *drvdata); diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.c b/drivers/char/xilinx_hwicap/xilinx_hwicap.c index 2284fa2a5a5..016f90567a5 100644 --- a/drivers/char/xilinx_hwicap/xilinx_hwicap.c +++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.c @@ -36,7 +36,7 @@ *****************************************************************************/ /* - * This is the code behind /dev/xilinx_icap -- it allows a user-space + * This is the code behind /dev/icap* -- it allows a user-space * application to use the Xilinx ICAP subsystem. * * The following operations are possible: @@ -67,7 +67,7 @@ * user-space application code that uses this device. The simplest * way to use this interface is simply: * - * cp foo.bit /dev/xilinx_icap + * cp foo.bit /dev/icap0 * * Note that unless foo.bit is an appropriately constructed partial * bitstream, this has a high likelyhood of overwriting the design @@ -105,18 +105,14 @@ #include "buffer_icap.h" #include "fifo_icap.h" -#define DRIVER_NAME "xilinx_icap" +#define DRIVER_NAME "icap" #define HWICAP_REGS (0x10000) -/* dynamically allocate device number */ -static int xhwicap_major; -static int xhwicap_minor; +#define XHWICAP_MAJOR 259 +#define XHWICAP_MINOR 0 #define HWICAP_DEVICES 1 -module_param(xhwicap_major, int, S_IRUGO); -module_param(xhwicap_minor, int, S_IRUGO); - /* An array, which is set to true when the device is registered. */ static bool probed_devices[HWICAP_DEVICES]; static struct mutex icap_sem; @@ -250,8 +246,26 @@ static int hwicap_get_configuration_register(struct hwicap_drvdata *drvdata, * Create the data to be written to the ICAP. */ buffer[index++] = XHI_DUMMY_PACKET; + buffer[index++] = XHI_NOOP_PACKET; buffer[index++] = XHI_SYNC_PACKET; buffer[index++] = XHI_NOOP_PACKET; + buffer[index++] = XHI_NOOP_PACKET; + + /* + * Write the data to the FIFO and initiate the transfer of data present + * in the FIFO to the ICAP device. + */ + status = drvdata->config->set_configuration(drvdata, + &buffer[0], index); + if (status) + return status; + + /* If the syncword was not found, then we need to start over. */ + status = drvdata->config->get_status(drvdata); + if ((status & XHI_SR_DALIGN_MASK) != XHI_SR_DALIGN_MASK) + return -EIO; + + index = 0; buffer[index++] = hwicap_type_1_read(reg) | 1; buffer[index++] = XHI_NOOP_PACKET; buffer[index++] = XHI_NOOP_PACKET; @@ -587,7 +601,7 @@ static int __devinit hwicap_setup(struct device *dev, int id, probed_devices[id] = 1; mutex_unlock(&icap_sem); - devt = MKDEV(xhwicap_major, xhwicap_minor + id); + devt = MKDEV(XHWICAP_MAJOR, XHWICAP_MINOR + id); drvdata = kzalloc(sizeof(struct hwicap_drvdata), GFP_KERNEL); if (!drvdata) { @@ -664,12 +678,14 @@ static int __devinit hwicap_setup(struct device *dev, int id, static struct hwicap_driver_config buffer_icap_config = { .get_configuration = buffer_icap_get_configuration, .set_configuration = buffer_icap_set_configuration, + .get_status = buffer_icap_get_status, .reset = buffer_icap_reset, }; static struct hwicap_driver_config fifo_icap_config = { .get_configuration = fifo_icap_get_configuration, .set_configuration = fifo_icap_set_configuration, + .get_status = fifo_icap_get_status, .reset = fifo_icap_reset, }; @@ -690,7 +706,7 @@ static int __devexit hwicap_remove(struct device *dev) dev_set_drvdata(dev, NULL); mutex_lock(&icap_sem); - probed_devices[MINOR(dev->devt)-xhwicap_minor] = 0; + probed_devices[MINOR(dev->devt)-XHWICAP_MINOR] = 0; mutex_unlock(&icap_sem); return 0; /* success */ } @@ -830,23 +846,12 @@ static int __init hwicap_module_init(void) icap_class = class_create(THIS_MODULE, "xilinx_config"); mutex_init(&icap_sem); - if (xhwicap_major) { - devt = MKDEV(xhwicap_major, xhwicap_minor); - retval = register_chrdev_region( - devt, - HWICAP_DEVICES, - DRIVER_NAME); - if (retval < 0) - return retval; - } else { - retval = alloc_chrdev_region(&devt, - xhwicap_minor, - HWICAP_DEVICES, - DRIVER_NAME); - if (retval < 0) - return retval; - xhwicap_major = MAJOR(devt); - } + devt = MKDEV(XHWICAP_MAJOR, XHWICAP_MINOR); + retval = register_chrdev_region(devt, + HWICAP_DEVICES, + DRIVER_NAME); + if (retval < 0) + return retval; retval = platform_driver_register(&hwicap_platform_driver); @@ -871,7 +876,7 @@ static int __init hwicap_module_init(void) static void __exit hwicap_module_cleanup(void) { - dev_t devt = MKDEV(xhwicap_major, xhwicap_minor); + dev_t devt = MKDEV(XHWICAP_MAJOR, XHWICAP_MINOR); class_destroy(icap_class); diff --git a/drivers/char/xilinx_hwicap/xilinx_hwicap.h b/drivers/char/xilinx_hwicap/xilinx_hwicap.h index 405fee7e189..1f9c8b082db 100644 --- a/drivers/char/xilinx_hwicap/xilinx_hwicap.h +++ b/drivers/char/xilinx_hwicap/xilinx_hwicap.h @@ -65,10 +65,27 @@ struct hwicap_drvdata { }; struct hwicap_driver_config { + /* Read configuration data given by size into the data buffer. + Return 0 if successful. */ int (*get_configuration)(struct hwicap_drvdata *drvdata, u32 *data, u32 size); + /* Write configuration data given by size from the data buffer. + Return 0 if successful. */ int (*set_configuration)(struct hwicap_drvdata *drvdata, u32 *data, u32 size); + /* Get the status register, bit pattern given by: + * D8 - 0 = configuration error + * D7 - 1 = alignment found + * D6 - 1 = readback in progress + * D5 - 0 = abort in progress + * D4 - Always 1 + * D3 - Always 1 + * D2 - Always 1 + * D1 - Always 1 + * D0 - 1 = operation completed + */ + u32 (*get_status)(struct hwicap_drvdata *drvdata); + /* Reset the hw */ void (*reset)(struct hwicap_drvdata *drvdata); }; @@ -163,6 +180,13 @@ struct config_registers { /* Constant to use for CRC check when CRC has been disabled */ #define XHI_DISABLED_AUTO_CRC 0x0000DEFCUL +/* Meanings of the bits returned by get_status */ +#define XHI_SR_CFGERR_N_MASK 0x00000100 /* Config Error Mask */ +#define XHI_SR_DALIGN_MASK 0x00000080 /* Data Alignment Mask */ +#define XHI_SR_RIP_MASK 0x00000040 /* Read back Mask */ +#define XHI_SR_IN_ABORT_N_MASK 0x00000020 /* Select Map Abort Mask */ +#define XHI_SR_DONE_MASK 0x00000001 /* Done bit Mask */ + /** * hwicap_type_1_read - Generates a Type 1 read packet header. * @reg: is the address of the register to be read back. diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c index b025dfe0b27..378b7aa6381 100644 --- a/drivers/mtd/nand/fsl_elbc_nand.c +++ b/drivers/mtd/nand/fsl_elbc_nand.c @@ -36,207 +36,12 @@ #include <linux/mtd/partitions.h> #include <asm/io.h> - +#include <asm/fsl_lbc.h> #define MAX_BANKS 8 #define ERR_BYTE 0xFF /* Value returned for read bytes when read failed */ #define FCM_TIMEOUT_MSECS 500 /* Maximum number of mSecs to wait for FCM */ -struct elbc_bank { - __be32 br; /**< Base Register */ -#define BR_BA 0xFFFF8000 -#define BR_BA_SHIFT 15 -#define BR_PS 0x00001800 -#define BR_PS_SHIFT 11 -#define BR_PS_8 0x00000800 /* Port Size 8 bit */ -#define BR_PS_16 0x00001000 /* Port Size 16 bit */ -#define BR_PS_32 0x00001800 /* Port Size 32 bit */ -#define BR_DECC 0x00000600 -#define BR_DECC_SHIFT 9 -#define BR_DECC_OFF 0x00000000 /* HW ECC checking and generation off */ -#define BR_DECC_CHK 0x00000200 /* HW ECC checking on, generation off */ -#define BR_DECC_CHK_GEN 0x00000400 /* HW ECC checking and generation on */ -#define BR_WP 0x00000100 -#define BR_WP_SHIFT 8 -#define BR_MSEL 0x000000E0 -#define BR_MSEL_SHIFT 5 -#define BR_MS_GPCM 0x00000000 /* GPCM */ -#define BR_MS_FCM 0x00000020 /* FCM */ -#define BR_MS_SDRAM 0x00000060 /* SDRAM */ -#define BR_MS_UPMA 0x00000080 /* UPMA */ -#define BR_MS_UPMB 0x000000A0 /* UPMB */ -#define BR_MS_UPMC 0x000000C0 /* UPMC */ -#define BR_V 0x00000001 -#define BR_V_SHIFT 0 -#define BR_RES ~(BR_BA|BR_PS|BR_DECC|BR_WP|BR_MSEL|BR_V) - - __be32 or; /**< Base Register */ -#define OR0 0x5004 -#define OR1 0x500C -#define OR2 0x5014 -#define OR3 0x501C -#define OR4 0x5024 -#define OR5 0x502C -#define OR6 0x5034 -#define OR7 0x503C - -#define OR_FCM_AM 0xFFFF8000 -#define OR_FCM_AM_SHIFT 15 -#define OR_FCM_BCTLD 0x00001000 -#define OR_FCM_BCTLD_SHIFT 12 -#define OR_FCM_PGS 0x00000400 -#define OR_FCM_PGS_SHIFT 10 -#define OR_FCM_CSCT 0x00000200 -#define OR_FCM_CSCT_SHIFT 9 -#define OR_FCM_CST 0x00000100 -#define OR_FCM_CST_SHIFT 8 -#define OR_FCM_CHT 0x00000080 -#define OR_FCM_CHT_SHIFT 7 -#define OR_FCM_SCY 0x00000070 -#define OR_FCM_SCY_SHIFT 4 -#define OR_FCM_SCY_1 0x00000010 -#define OR_FCM_SCY_2 0x00000020 -#define OR_FCM_SCY_3 0x00000030 -#define OR_FCM_SCY_4 0x00000040 -#define OR_FCM_SCY_5 0x00000050 -#define OR_FCM_SCY_6 0x00000060 -#define OR_FCM_SCY_7 0x00000070 -#define OR_FCM_RST 0x00000008 -#define OR_FCM_RST_SHIFT 3 -#define OR_FCM_TRLX 0x00000004 -#define OR_FCM_TRLX_SHIFT 2 -#define OR_FCM_EHTR 0x00000002 -#define OR_FCM_EHTR_SHIFT 1 -}; - -struct elbc_regs { - struct elbc_bank bank[8]; - u8 res0[0x28]; - __be32 mar; /**< UPM Address Register */ - u8 res1[0x4]; - __be32 mamr; /**< UPMA Mode Register */ - __be32 mbmr; /**< UPMB Mode Register */ - __be32 mcmr; /**< UPMC Mode Register */ - u8 res2[0x8]; - __be32 mrtpr; /**< Memory Refresh Timer Prescaler Register */ - __be32 mdr; /**< UPM Data Register */ - u8 res3[0x4]; - __be32 lsor; /**< Special Operation Initiation Register */ - __be32 lsdmr; /**< SDRAM Mode Register */ - u8 res4[0x8]; - __be32 lurt; /**< UPM Refresh Timer */ - __be32 lsrt; /**< SDRAM Refresh Timer */ - u8 res5[0x8]; - __be32 ltesr; /**< Transfer Error Status Register */ -#define LTESR_BM 0x80000000 -#define LTESR_FCT 0x40000000 -#define LTESR_PAR 0x20000000 -#define LTESR_WP 0x04000000 -#define LTESR_ATMW 0x00800000 -#define LTESR_ATMR 0x00400000 -#define LTESR_CS 0x00080000 -#define LTESR_CC 0x00000001 -#define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC) - __be32 ltedr; /**< Transfer Error Disable Register */ - __be32 lteir; /**< Transfer Error Interrupt Register */ - __be32 lteatr; /**< Transfer Error Attributes Register */ - __be32 ltear; /**< Transfer Error Address Register */ - u8 res6[0xC]; - __be32 lbcr; /**< Configuration Register */ -#define LBCR_LDIS 0x80000000 -#define LBCR_LDIS_SHIFT 31 -#define LBCR_BCTLC 0x00C00000 -#define LBCR_BCTLC_SHIFT 22 -#define LBCR_AHD 0x00200000 -#define LBCR_LPBSE 0x00020000 -#define LBCR_LPBSE_SHIFT 17 -#define LBCR_EPAR 0x00010000 -#define LBCR_EPAR_SHIFT 16 -#define LBCR_BMT 0x0000FF00 -#define LBCR_BMT_SHIFT 8 -#define LBCR_INIT 0x00040000 - __be32 lcrr; /**< Clock Ratio Register */ -#define LCRR_DBYP 0x80000000 -#define LCRR_DBYP_SHIFT 31 -#define LCRR_BUFCMDC 0x30000000 -#define LCRR_BUFCMDC_SHIFT 28 -#define LCRR_ECL 0x03000000 -#define LCRR_ECL_SHIFT 24 -#define LCRR_EADC 0x00030000 -#define LCRR_EADC_SHIFT 16 -#define LCRR_CLKDIV 0x0000000F -#define LCRR_CLKDIV_SHIFT 0 - u8 res7[0x8]; - __be32 fmr; /**< Flash Mode Register */ -#define FMR_CWTO 0x0000F000 -#define FMR_CWTO_SHIFT 12 -#define FMR_BOOT 0x00000800 -#define FMR_ECCM 0x00000100 -#define FMR_AL 0x00000030 -#define FMR_AL_SHIFT 4 -#define FMR_OP 0x00000003 -#define FMR_OP_SHIFT 0 - __be32 fir; /**< Flash Instruction Register */ -#define FIR_OP0 0xF0000000 -#define FIR_OP0_SHIFT 28 -#define FIR_OP1 0x0F000000 -#define FIR_OP1_SHIFT 24 -#define FIR_OP2 0x00F00000 -#define FIR_OP2_SHIFT 20 -#define FIR_OP3 0x000F0000 -#define FIR_OP3_SHIFT 16 -#define FIR_OP4 0x0000F000 -#define FIR_OP4_SHIFT 12 -#define FIR_OP5 0x00000F00 -#define FIR_OP5_SHIFT 8 -#define FIR_OP6 0x000000F0 -#define FIR_OP6_SHIFT 4 -#define FIR_OP7 0x0000000F -#define FIR_OP7_SHIFT 0 -#define FIR_OP_NOP 0x0 /* No operation and end of sequence */ -#define FIR_OP_CA 0x1 /* Issue current column address */ -#define FIR_OP_PA 0x2 /* Issue current block+page address */ -#define FIR_OP_UA 0x3 /* Issue user defined address */ -#define FIR_OP_CM0 0x4 /* Issue command from FCR[CMD0] */ -#define FIR_OP_CM1 0x5 /* Issue command from FCR[CMD1] */ -#define FIR_OP_CM2 0x6 /* Issue command from FCR[CMD2] */ -#define FIR_OP_CM3 0x7 /* Issue command from FCR[CMD3] */ -#define FIR_OP_WB 0x8 /* Write FBCR bytes from FCM buffer */ -#define FIR_OP_WS 0x9 /* Write 1 or 2 bytes from MDR[AS] */ -#define FIR_OP_RB 0xA /* Read FBCR bytes to FCM buffer */ -#define FIR_OP_RS 0xB /* Read 1 or 2 bytes to MDR[AS] */ -#define FIR_OP_CW0 0xC /* Wait then issue FCR[CMD0] */ -#define FIR_OP_CW1 0xD /* Wait then issue FCR[CMD1] */ -#define FIR_OP_RBW 0xE /* Wait then read FBCR bytes */ -#define FIR_OP_RSW 0xE /* Wait then read 1 or 2 bytes */ - __be32 fcr; /**< Flash Command Register */ -#define FCR_CMD0 0xFF000000 -#define FCR_CMD0_SHIFT 24 -#define FCR_CMD1 0x00FF0000 -#define FCR_CMD1_SHIFT 16 -#define FCR_CMD2 0x0000FF00 -#define FCR_CMD2_SHIFT 8 -#define FCR_CMD3 0x000000FF -#define FCR_CMD3_SHIFT 0 - __be32 fbar; /**< Flash Block Address Register */ -#define FBAR_BLK 0x00FFFFFF - __be32 fpar; /**< Flash Page Address Register */ -#define FPAR_SP_PI 0x00007C00 -#define FPAR_SP_PI_SHIFT 10 -#define FPAR_SP_MS 0x00000200 -#define FPAR_SP_CI 0x000001FF -#define FPAR_SP_CI_SHIFT 0 -#define FPAR_LP_PI 0x0003F000 -#define FPAR_LP_PI_SHIFT 12 -#define FPAR_LP_MS 0x00000800 -#define FPAR_LP_CI 0x000007FF -#define FPAR_LP_CI_SHIFT 0 - __be32 fbcr; /**< Flash Byte Count Register */ -#define FBCR_BC 0x00000FFF - u8 res11[0x8]; - u8 res8[0xF00]; -}; - struct fsl_elbc_ctrl; /* mtd information per set */ @@ -261,7 +66,7 @@ struct fsl_elbc_ctrl { /* device info */ struct device *dev; - struct elbc_regs __iomem *regs; + struct fsl_lbc_regs __iomem *regs; int irq; wait_queue_head_t irq_wait; unsigned int irq_status; /* status read from LTESR by irq handler */ @@ -322,7 +127,7 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob) struct nand_chip *chip = mtd->priv; struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; int buf_num; ctrl->page = page_addr; @@ -363,7 +168,7 @@ static int fsl_elbc_run_command(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; /* Setup the FMR[OP] to execute without write protection */ out_be32(&lbc->fmr, priv->fmr | 3); @@ -406,7 +211,7 @@ static void fsl_elbc_do_read(struct nand_chip *chip, int oob) { struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; if (priv->page_size) { out_be32(&lbc->fir, @@ -439,7 +244,7 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command, struct nand_chip *chip = mtd->priv; struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; ctrl->use_mdr = 0; @@ -775,7 +580,7 @@ static int fsl_elbc_wait(struct mtd_info *mtd, struct nand_chip *chip) { struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; if (ctrl->status != LTESR_CC) return NAND_STATUS_FAIL; @@ -807,7 +612,7 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd) struct nand_chip *chip = mtd->priv; struct fsl_elbc_mtd *priv = chip->priv; struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; unsigned int al; /* calculate FMR Address Length field */ @@ -922,7 +727,7 @@ static void fsl_elbc_write_page(struct mtd_info *mtd, static int fsl_elbc_chip_init(struct fsl_elbc_mtd *priv) { struct fsl_elbc_ctrl *ctrl = priv->ctrl; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; struct nand_chip *chip = &priv->chip; dev_dbg(priv->dev, "eLBC Set Information for bank %d\n", priv->bank); @@ -986,7 +791,7 @@ static int fsl_elbc_chip_remove(struct fsl_elbc_mtd *priv) static int fsl_elbc_chip_probe(struct fsl_elbc_ctrl *ctrl, struct device_node *node) { - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; struct fsl_elbc_mtd *priv; struct resource res; #ifdef CONFIG_MTD_PARTITIONS @@ -1083,7 +888,7 @@ err: static int __devinit fsl_elbc_ctrl_init(struct fsl_elbc_ctrl *ctrl) { - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; /* clear event registers */ setbits32(&lbc->ltesr, LTESR_NAND_MASK); @@ -1128,7 +933,7 @@ static int __devexit fsl_elbc_ctrl_remove(struct of_device *ofdev) static irqreturn_t fsl_elbc_ctrl_irq(int irqno, void *data) { struct fsl_elbc_ctrl *ctrl = data; - struct elbc_regs __iomem *lbc = ctrl->regs; + struct fsl_lbc_regs __iomem *lbc = ctrl->regs; __be32 status = in_be32(&lbc->ltesr) & LTESR_NAND_MASK; if (status) { diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 4d71729e85e..2f1f3f2739f 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile @@ -218,7 +218,8 @@ obj-$(CONFIG_SMC911X) += smc911x.o obj-$(CONFIG_BFIN_MAC) += bfin_mac.o obj-$(CONFIG_DM9000) += dm9000.o obj-$(CONFIG_FEC_8XX) += fec_8xx/ -obj-$(CONFIG_PASEMI_MAC) += pasemi_mac.o +obj-$(CONFIG_PASEMI_MAC) += pasemi_mac_driver.o +pasemi_mac_driver-objs := pasemi_mac.o pasemi_mac_ethtool.o obj-$(CONFIG_MLX4_CORE) += mlx4/ obj-$(CONFIG_ENC28J60) += enc28j60.o diff --git a/drivers/net/iseries_veth.c b/drivers/net/iseries_veth.c index 58d3bb622da..b8d0639c1cd 100644 --- a/drivers/net/iseries_veth.c +++ b/drivers/net/iseries_veth.c @@ -308,7 +308,8 @@ static void veth_complete_allocation(void *parm, int number) static int veth_allocate_events(HvLpIndex rlp, int number) { - struct veth_allocation vc = { COMPLETION_INITIALIZER(vc.c), 0 }; + struct veth_allocation vc = + { COMPLETION_INITIALIZER_ONSTACK(vc.c), 0 }; mf_allocate_lp_events(rlp, HvLpEvent_Type_VirtualLan, sizeof(struct veth_lpevent), number, diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c index bcd7f9814ed..3b2a6c59808 100644 --- a/drivers/net/pasemi_mac.c +++ b/drivers/net/pasemi_mac.c @@ -55,15 +55,10 @@ * - Multiqueue RX/TX */ - -/* Must be a power of two */ -#define RX_RING_SIZE 2048 -#define TX_RING_SIZE 4096 - #define LRO_MAX_AGGR 64 #define PE_MIN_MTU 64 -#define PE_MAX_MTU 1500 +#define PE_MAX_MTU 9000 #define PE_DEF_MTU ETH_DATA_LEN #define DEFAULT_MSG_ENABLE \ @@ -76,16 +71,6 @@ NETIF_MSG_RX_ERR | \ NETIF_MSG_TX_ERR) -#define TX_DESC(tx, num) ((tx)->chan.ring_virt[(num) & (TX_RING_SIZE-1)]) -#define TX_DESC_INFO(tx, num) ((tx)->ring_info[(num) & (TX_RING_SIZE-1)]) -#define RX_DESC(rx, num) ((rx)->chan.ring_virt[(num) & (RX_RING_SIZE-1)]) -#define RX_DESC_INFO(rx, num) ((rx)->ring_info[(num) & (RX_RING_SIZE-1)]) -#define RX_BUFF(rx, num) ((rx)->buffers[(num) & (RX_RING_SIZE-1)]) - -#define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \ - & ((ring)->size - 1)) -#define RING_AVAIL(ring) ((ring->size) - RING_USED(ring)) - MODULE_LICENSE("GPL"); MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>"); MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver"); @@ -94,6 +79,8 @@ static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */ module_param(debug, int, 0); MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value"); +extern const struct ethtool_ops pasemi_mac_ethtool_ops; + static int translation_enabled(void) { #if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE) @@ -322,6 +309,104 @@ static int pasemi_mac_unmap_tx_skb(struct pasemi_mac *mac, return (nfrags + 3) & ~1; } +static struct pasemi_mac_csring *pasemi_mac_setup_csring(struct pasemi_mac *mac) +{ + struct pasemi_mac_csring *ring; + u32 val; + unsigned int cfg; + int chno; + + ring = pasemi_dma_alloc_chan(TXCHAN, sizeof(struct pasemi_mac_csring), + offsetof(struct pasemi_mac_csring, chan)); + + if (!ring) { + dev_err(&mac->pdev->dev, "Can't allocate checksum channel\n"); + goto out_chan; + } + + chno = ring->chan.chno; + + ring->size = CS_RING_SIZE; + ring->next_to_fill = 0; + + /* Allocate descriptors */ + if (pasemi_dma_alloc_ring(&ring->chan, CS_RING_SIZE)) + goto out_ring_desc; + + write_dma_reg(PAS_DMA_TXCHAN_BASEL(chno), + PAS_DMA_TXCHAN_BASEL_BRBL(ring->chan.ring_dma)); + val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->chan.ring_dma >> 32); + val |= PAS_DMA_TXCHAN_BASEU_SIZ(CS_RING_SIZE >> 3); + + write_dma_reg(PAS_DMA_TXCHAN_BASEU(chno), val); + + ring->events[0] = pasemi_dma_alloc_flag(); + ring->events[1] = pasemi_dma_alloc_flag(); + if (ring->events[0] < 0 || ring->events[1] < 0) + goto out_flags; + + pasemi_dma_clear_flag(ring->events[0]); + pasemi_dma_clear_flag(ring->events[1]); + + ring->fun = pasemi_dma_alloc_fun(); + if (ring->fun < 0) + goto out_fun; + + cfg = PAS_DMA_TXCHAN_CFG_TY_FUNC | PAS_DMA_TXCHAN_CFG_UP | + PAS_DMA_TXCHAN_CFG_TATTR(ring->fun) | + PAS_DMA_TXCHAN_CFG_LPSQ | PAS_DMA_TXCHAN_CFG_LPDQ; + + if (translation_enabled()) + cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR; + + write_dma_reg(PAS_DMA_TXCHAN_CFG(chno), cfg); + + /* enable channel */ + pasemi_dma_start_chan(&ring->chan, PAS_DMA_TXCHAN_TCMDSTA_SZ | + PAS_DMA_TXCHAN_TCMDSTA_DB | + PAS_DMA_TXCHAN_TCMDSTA_DE | + PAS_DMA_TXCHAN_TCMDSTA_DA); + + return ring; + +out_fun: +out_flags: + if (ring->events[0] >= 0) + pasemi_dma_free_flag(ring->events[0]); + if (ring->events[1] >= 0) + pasemi_dma_free_flag(ring->events[1]); + pasemi_dma_free_ring(&ring->chan); +out_ring_desc: + pasemi_dma_free_chan(&ring->chan); +out_chan: + + return NULL; +} + +static void pasemi_mac_setup_csrings(struct pasemi_mac *mac) +{ + int i; + mac->cs[0] = pasemi_mac_setup_csring(mac); + if (mac->type == MAC_TYPE_XAUI) + mac->cs[1] = pasemi_mac_setup_csring(mac); + else + mac->cs[1] = 0; + + for (i = 0; i < MAX_CS; i++) + if (mac->cs[i]) + mac->num_cs++; +} + +static void pasemi_mac_free_csring(struct pasemi_mac_csring *csring) +{ + pasemi_dma_stop_chan(&csring->chan); + pasemi_dma_free_flag(csring->events[0]); + pasemi_dma_free_flag(csring->events[1]); + pasemi_dma_free_ring(&csring->chan); + pasemi_dma_free_chan(&csring->chan); + pasemi_dma_free_fun(csring->fun); +} + static int pasemi_mac_setup_rx_resources(const struct net_device *dev) { struct pasemi_mac_rxring *ring; @@ -445,7 +530,7 @@ pasemi_mac_setup_tx_resources(const struct net_device *dev) cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE | PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) | PAS_DMA_TXCHAN_CFG_UP | - PAS_DMA_TXCHAN_CFG_WT(2); + PAS_DMA_TXCHAN_CFG_WT(4); if (translation_enabled()) cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR; @@ -810,13 +895,21 @@ restart: u64 mactx = TX_DESC(txring, i); struct sk_buff *skb; - skb = TX_DESC_INFO(txring, i+1).skb; - nr_frags = TX_DESC_INFO(txring, i).dma; - if ((mactx & XCT_MACTX_E) || (*chan->status & PAS_STATUS_ERROR)) pasemi_mac_tx_error(mac, mactx); + /* Skip over control descriptors */ + if (!(mactx & XCT_MACTX_LLEN_M)) { + TX_DESC(txring, i) = 0; + TX_DESC(txring, i+1) = 0; + buf_count = 2; + continue; + } + + skb = TX_DESC_INFO(txring, i+1).skb; + nr_frags = TX_DESC_INFO(txring, i).dma; + if (unlikely(mactx & XCT_MACTX_O)) /* Not yet transmitted */ break; @@ -1041,13 +1134,7 @@ static int pasemi_mac_open(struct net_device *dev) { struct pasemi_mac *mac = netdev_priv(dev); unsigned int flags; - int ret; - - /* enable rx section */ - write_dma_reg(PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN); - - /* enable tx section */ - write_dma_reg(PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN); + int i, ret; flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) | PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) | @@ -1064,6 +1151,19 @@ static int pasemi_mac_open(struct net_device *dev) if (!mac->tx) goto out_tx_ring; + /* We might already have allocated rings in case mtu was changed + * before interface was brought up. + */ + if (dev->mtu > 1500 && !mac->num_cs) { + pasemi_mac_setup_csrings(mac); + if (!mac->num_cs) + goto out_tx_ring; + } + + /* Zero out rmon counters */ + for (i = 0; i < 32; i++) + write_mac_reg(mac, PAS_MAC_RMON(i), 0); + /* 0x3ff with 33MHz clock is about 31us */ write_iob_reg(PAS_IOB_DMA_COM_TIMEOUTCFG, PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0x3ff)); @@ -1247,7 +1347,7 @@ static int pasemi_mac_close(struct net_device *dev) { struct pasemi_mac *mac = netdev_priv(dev); unsigned int sta; - int rxch, txch; + int rxch, txch, i; rxch = rx_ring(mac)->chan.chno; txch = tx_ring(mac)->chan.chno; @@ -1292,6 +1392,13 @@ static int pasemi_mac_close(struct net_device *dev) free_irq(mac->tx->chan.irq, mac->tx); free_irq(mac->rx->chan.irq, mac->rx); + for (i = 0; i < mac->num_cs; i++) { + pasemi_mac_free_csring(mac->cs[i]); + mac->cs[i] = NULL; + } + + mac->num_cs = 0; + /* Free resources */ pasemi_mac_free_rx_resources(mac); pasemi_mac_free_tx_resources(mac); @@ -1299,35 +1406,113 @@ static int pasemi_mac_close(struct net_device *dev) return 0; } +static void pasemi_mac_queue_csdesc(const struct sk_buff *skb, + const dma_addr_t *map, + const unsigned int *map_size, + struct pasemi_mac_txring *txring, + struct pasemi_mac_csring *csring) +{ + u64 fund; + dma_addr_t cs_dest; + const int nh_off = skb_network_offset(skb); + const int nh_len = skb_network_header_len(skb); + const int nfrags = skb_shinfo(skb)->nr_frags; + int cs_size, i, fill, hdr, cpyhdr, evt; + dma_addr_t csdma; + + fund = XCT_FUN_ST | XCT_FUN_RR_8BRES | + XCT_FUN_O | XCT_FUN_FUN(csring->fun) | + XCT_FUN_CRM_SIG | XCT_FUN_LLEN(skb->len - nh_off) | + XCT_FUN_SHL(nh_len >> 2) | XCT_FUN_SE; + + switch (ip_hdr(skb)->protocol) { + case IPPROTO_TCP: + fund |= XCT_FUN_SIG_TCP4; + /* TCP checksum is 16 bytes into the header */ + cs_dest = map[0] + skb_transport_offset(skb) + 16; + break; + case IPPROTO_UDP: + fund |= XCT_FUN_SIG_UDP4; + /* UDP checksum is 6 bytes into the header */ + cs_dest = map[0] + skb_transport_offset(skb) + 6; + break; + default: + BUG(); + } + + /* Do the checksum offloaded */ + fill = csring->next_to_fill; + hdr = fill; + + CS_DESC(csring, fill++) = fund; + /* Room for 8BRES. Checksum result is really 2 bytes into it */ + csdma = csring->chan.ring_dma + (fill & (CS_RING_SIZE-1)) * 8 + 2; + CS_DESC(csring, fill++) = 0; + + CS_DESC(csring, fill) = XCT_PTR_LEN(map_size[0]-nh_off) | XCT_PTR_ADDR(map[0]+nh_off); + for (i = 1; i <= nfrags; i++) + CS_DESC(csring, fill+i) = XCT_PTR_LEN(map_size[i]) | XCT_PTR_ADDR(map[i]); + + fill += i; + if (fill & 1) + fill++; + + /* Copy the result into the TCP packet */ + cpyhdr = fill; + CS_DESC(csring, fill++) = XCT_FUN_O | XCT_FUN_FUN(csring->fun) | + XCT_FUN_LLEN(2) | XCT_FUN_SE; + CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(cs_dest) | XCT_PTR_T; + CS_DESC(csring, fill++) = XCT_PTR_LEN(2) | XCT_PTR_ADDR(csdma); + fill++; + + evt = !csring->last_event; + csring->last_event = evt; + + /* Event handshaking with MAC TX */ + CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O | + CTRL_CMD_ETYPE_SET | CTRL_CMD_REG(csring->events[evt]); + CS_DESC(csring, fill++) = 0; + CS_DESC(csring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O | + CTRL_CMD_ETYPE_WCLR | CTRL_CMD_REG(csring->events[!evt]); + CS_DESC(csring, fill++) = 0; + csring->next_to_fill = fill & (CS_RING_SIZE-1); + + cs_size = fill - hdr; + write_dma_reg(PAS_DMA_TXCHAN_INCR(csring->chan.chno), (cs_size) >> 1); + + /* TX-side event handshaking */ + fill = txring->next_to_fill; + TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O | + CTRL_CMD_ETYPE_WSET | CTRL_CMD_REG(csring->events[evt]); + TX_DESC(txring, fill++) = 0; + TX_DESC(txring, fill++) = CTRL_CMD_T | CTRL_CMD_META_EVT | CTRL_CMD_O | + CTRL_CMD_ETYPE_CLR | CTRL_CMD_REG(csring->events[!evt]); + TX_DESC(txring, fill++) = 0; + txring->next_to_fill = fill; + + write_dma_reg(PAS_DMA_TXCHAN_INCR(txring->chan.chno), 2); + + return; +} + static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev) { - struct pasemi_mac *mac = netdev_priv(dev); - struct pasemi_mac_txring *txring; - u64 dflags, mactx; + struct pasemi_mac * const mac = netdev_priv(dev); + struct pasemi_mac_txring * const txring = tx_ring(mac); + struct pasemi_mac_csring *csring; + u64 dflags = 0; + u64 mactx; dma_addr_t map[MAX_SKB_FRAGS+1]; unsigned int map_size[MAX_SKB_FRAGS+1]; unsigned long flags; int i, nfrags; int fill; + const int nh_off = skb_network_offset(skb); + const int nh_len = skb_network_header_len(skb); - dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD; - - if (skb->ip_summed == CHECKSUM_PARTIAL) { - const unsigned char *nh = skb_network_header(skb); + prefetch(&txring->ring_info); - switch (ip_hdr(skb)->protocol) { - case IPPROTO_TCP: - dflags |= XCT_MACTX_CSUM_TCP; - dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2); - dflags |= XCT_MACTX_IPO(nh - skb->data); - break; - case IPPROTO_UDP: - dflags |= XCT_MACTX_CSUM_UDP; - dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2); - dflags |= XCT_MACTX_IPO(nh - skb->data); - break; - } - } + dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_CRC_PAD; nfrags = skb_shinfo(skb)->nr_frags; @@ -1350,24 +1535,46 @@ static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev) } } - mactx = dflags | XCT_MACTX_LLEN(skb->len); + if (skb->ip_summed == CHECKSUM_PARTIAL && skb->len <= 1540) { + switch (ip_hdr(skb)->protocol) { + case IPPROTO_TCP: + dflags |= XCT_MACTX_CSUM_TCP; + dflags |= XCT_MACTX_IPH(nh_len >> 2); + dflags |= XCT_MACTX_IPO(nh_off); + break; + case IPPROTO_UDP: + dflags |= XCT_MACTX_CSUM_UDP; + dflags |= XCT_MACTX_IPH(nh_len >> 2); + dflags |= XCT_MACTX_IPO(nh_off); + break; + default: + WARN_ON(1); + } + } - txring = tx_ring(mac); + mactx = dflags | XCT_MACTX_LLEN(skb->len); spin_lock_irqsave(&txring->lock, flags); - fill = txring->next_to_fill; - /* Avoid stepping on the same cache line that the DMA controller * is currently about to send, so leave at least 8 words available. * Total free space needed is mactx + fragments + 8 */ - if (RING_AVAIL(txring) < nfrags + 10) { + if (RING_AVAIL(txring) < nfrags + 14) { /* no room -- stop the queue and wait for tx intr */ netif_stop_queue(dev); goto out_err; } + /* Queue up checksum + event descriptors, if needed */ + if (mac->num_cs && skb->ip_summed == CHECKSUM_PARTIAL && skb->len > 1540) { + csring = mac->cs[mac->last_cs]; + mac->last_cs = (mac->last_cs + 1) % mac->num_cs; + + pasemi_mac_queue_csdesc(skb, map, map_size, txring, csring); + } + + fill = txring->next_to_fill; TX_DESC(txring, fill) = mactx; TX_DESC_INFO(txring, fill).dma = nfrags; fill++; @@ -1441,12 +1648,33 @@ static int pasemi_mac_poll(struct napi_struct *napi, int budget) return pkts; } +#ifdef CONFIG_NET_POLL_CONTROLLER +/* + * Polling 'interrupt' - used by things like netconsole to send skbs + * without having to re-enable interrupts. It's not called while + * the interrupt routine is executing. + */ +static void pasemi_mac_netpoll(struct net_device *dev) +{ + const struct pasemi_mac *mac = netdev_priv(dev); + + disable_irq(mac->tx->chan.irq); + pasemi_mac_tx_intr(mac->tx->chan.irq, mac->tx); + enable_irq(mac->tx->chan.irq); + + disable_irq(mac->rx->chan.irq); + pasemi_mac_rx_intr(mac->rx->chan.irq, mac->rx); + enable_irq(mac->rx->chan.irq); +} +#endif + static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu) { struct pasemi_mac *mac = netdev_priv(dev); unsigned int reg; - unsigned int rcmdsta; + unsigned int rcmdsta = 0; int running; + int ret = 0; if (new_mtu < PE_MIN_MTU || new_mtu > PE_MAX_MTU) return -EINVAL; @@ -1468,6 +1696,16 @@ static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu) pasemi_mac_pause_rxint(mac); pasemi_mac_clean_rx(rx_ring(mac), RX_RING_SIZE); pasemi_mac_free_rx_buffers(mac); + + } + + /* Setup checksum channels if large MTU and none already allocated */ + if (new_mtu > 1500 && !mac->num_cs) { + pasemi_mac_setup_csrings(mac); + if (!mac->num_cs) { + ret = -ENOMEM; + goto out; + } } /* Change maxf, i.e. what size frames are accepted. @@ -1482,6 +1720,7 @@ static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu) /* MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */ mac->bufsz = new_mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128; +out: if (running) { write_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if), rcmdsta | PAS_DMA_RXINT_RCMDSTA_EN); @@ -1494,7 +1733,7 @@ static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu) pasemi_mac_intf_enable(mac); } - return 0; + return ret; } static int __devinit @@ -1528,7 +1767,7 @@ pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent) netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64); dev->features = NETIF_F_IP_CSUM | NETIF_F_LLTX | NETIF_F_SG | - NETIF_F_HIGHDMA; + NETIF_F_HIGHDMA | NETIF_F_GSO; mac->lro_mgr.max_aggr = LRO_MAX_AGGR; mac->lro_mgr.max_desc = MAX_LRO_DESCRIPTORS; @@ -1588,8 +1827,12 @@ pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent) dev->mtu = PE_DEF_MTU; /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */ mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128; +#ifdef CONFIG_NET_POLL_CONTROLLER + dev->poll_controller = pasemi_mac_netpoll; +#endif dev->change_mtu = pasemi_mac_change_mtu; + dev->ethtool_ops = &pasemi_mac_ethtool_ops; if (err) goto out; diff --git a/drivers/net/pasemi_mac.h b/drivers/net/pasemi_mac.h index 99e7b9329a6..1a115ec60b5 100644 --- a/drivers/net/pasemi_mac.h +++ b/drivers/net/pasemi_mac.h @@ -26,7 +26,14 @@ #include <linux/spinlock.h> #include <linux/phy.h> +/* Must be a power of two */ +#define RX_RING_SIZE 2048 +#define TX_RING_SIZE 4096 +#define CS_RING_SIZE (TX_RING_SIZE*2) + + #define MAX_LRO_DESCRIPTORS 8 +#define MAX_CS 2 struct pasemi_mac_txring { struct pasemi_dmachan chan; /* Must be first */ @@ -51,6 +58,15 @@ struct pasemi_mac_rxring { struct pasemi_mac *mac; /* Needed in intr handler */ }; +struct pasemi_mac_csring { + struct pasemi_dmachan chan; + unsigned int size; + unsigned int next_to_fill; + int events[2]; + int last_event; + int fun; +}; + struct pasemi_mac { struct net_device *netdev; struct pci_dev *pdev; @@ -60,10 +76,12 @@ struct pasemi_mac { struct napi_struct napi; int bufsz; /* RX ring buffer size */ + int last_cs; + int num_cs; + u32 dma_if; u8 type; #define MAC_TYPE_GMAC 1 #define MAC_TYPE_XAUI 2 - u32 dma_if; u8 mac_addr[6]; @@ -74,6 +92,7 @@ struct pasemi_mac { struct pasemi_mac_txring *tx; struct pasemi_mac_rxring *rx; + struct pasemi_mac_csring *cs[MAX_CS]; char tx_irq_name[10]; /* "eth%d tx" */ char rx_irq_name[10]; /* "eth%d rx" */ int link; @@ -90,6 +109,16 @@ struct pasemi_mac_buffer { dma_addr_t dma; }; +#define TX_DESC(tx, num) ((tx)->chan.ring_virt[(num) & (TX_RING_SIZE-1)]) +#define TX_DESC_INFO(tx, num) ((tx)->ring_info[(num) & (TX_RING_SIZE-1)]) +#define RX_DESC(rx, num) ((rx)->chan.ring_virt[(num) & (RX_RING_SIZE-1)]) +#define RX_DESC_INFO(rx, num) ((rx)->ring_info[(num) & (RX_RING_SIZE-1)]) +#define RX_BUFF(rx, num) ((rx)->buffers[(num) & (RX_RING_SIZE-1)]) +#define CS_DESC(cs, num) ((cs)->chan.ring_virt[(num) & (CS_RING_SIZE-1)]) + +#define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \ + & ((ring)->size - 1)) +#define RING_AVAIL(ring) ((ring->size) - RING_USED(ring)) /* PCI register offsets and formats */ @@ -101,6 +130,7 @@ enum { PAS_MAC_CFG_ADR0 = 0x8c, PAS_MAC_CFG_ADR1 = 0x90, PAS_MAC_CFG_TXP = 0x98, + PAS_MAC_CFG_RMON = 0x100, PAS_MAC_IPC_CHNL = 0x208, }; @@ -172,6 +202,8 @@ enum { #define PAS_MAC_CFG_TXP_TIFG(x) (((x) << PAS_MAC_CFG_TXP_TIFG_S) & \ PAS_MAC_CFG_TXP_TIFG_M) +#define PAS_MAC_RMON(r) (0x100+(r)*4) + #define PAS_MAC_IPC_CHNL_DCHNO_M 0x003f0000 #define PAS_MAC_IPC_CHNL_DCHNO_S 16 #define PAS_MAC_IPC_CHNL_DCHNO(x) (((x) << PAS_MAC_IPC_CHNL_DCHNO_S) & \ @@ -181,4 +213,5 @@ enum { #define PAS_MAC_IPC_CHNL_BCH(x) (((x) << PAS_MAC_IPC_CHNL_BCH_S) & \ PAS_MAC_IPC_CHNL_BCH_M) + #endif /* PASEMI_MAC_H */ diff --git a/drivers/net/pasemi_mac_ethtool.c b/drivers/net/pasemi_mac_ethtool.c new file mode 100644 index 00000000000..5e8df3afea6 --- /dev/null +++ b/drivers/net/pasemi_mac_ethtool.c @@ -0,0 +1,159 @@ +/* + * Copyright (C) 2006-2008 PA Semi, Inc + * + * Ethtool hooks for the PA Semi PWRficient onchip 1G/10G Ethernet MACs + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + + +#include <linux/netdevice.h> +#include <linux/ethtool.h> +#include <linux/pci.h> +#include <linux/inet_lro.h> + +#include <asm/pasemi_dma.h> +#include "pasemi_mac.h" + +static struct { + const char str[ETH_GSTRING_LEN]; +} ethtool_stats_keys[] = { + { "rx-drops" }, + { "rx-bytes" }, + { "rx-packets" }, + { "rx-broadcast-packets" }, + { "rx-multicast-packets" }, + { "rx-crc-errors" }, + { "rx-undersize-errors" }, + { "rx-oversize-errors" }, + { "rx-short-fragment-errors" }, + { "rx-jabber-errors" }, + { "rx-64-byte-packets" }, + { "rx-65-127-byte-packets" }, + { "rx-128-255-byte-packets" }, + { "rx-256-511-byte-packets" }, + { "rx-512-1023-byte-packets" }, + { "rx-1024-1518-byte-packets" }, + { "rx-pause-frames" }, + { "tx-bytes" }, + { "tx-packets" }, + { "tx-broadcast-packets" }, + { "tx-multicast-packets" }, + { "tx-collisions" }, + { "tx-late-collisions" }, + { "tx-excessive-collisions" }, + { "tx-crc-errors" }, + { "tx-undersize-errors" }, + { "tx-oversize-errors" }, + { "tx-64-byte-packets" }, + { "tx-65-127-byte-packets" }, + { "tx-128-255-byte-packets" }, + { "tx-256-511-byte-packets" }, + { "tx-512-1023-byte-packets" }, + { "tx-1024-1518-byte-packets" }, +}; + +static int +pasemi_mac_ethtool_get_settings(struct net_device *netdev, + struct ethtool_cmd *cmd) +{ + struct pasemi_mac *mac = netdev_priv(netdev); + struct phy_device *phydev = mac->phydev; + + return phy_ethtool_gset(phydev, cmd); +} + +static void +pasemi_mac_ethtool_get_drvinfo(struct net_device *netdev, + struct ethtool_drvinfo *drvinfo) +{ + struct pasemi_mac *mac; + mac = netdev_priv(netdev); + + /* clear and fill out info */ + memset(drvinfo, 0, sizeof(struct ethtool_drvinfo)); + strncpy(drvinfo->driver, "pasemi_mac", 12); + strcpy(drvinfo->version, "N/A"); + strcpy(drvinfo->fw_version, "N/A"); + strncpy(drvinfo->bus_info, pci_name(mac->pdev), 32); +} + +static u32 +pasemi_mac_ethtool_get_msglevel(struct net_device *netdev) +{ + struct pasemi_mac *mac = netdev_priv(netdev); + return mac->msg_enable; +} + +static void +pasemi_mac_ethtool_set_msglevel(struct net_device *netdev, + u32 level) +{ + struct pasemi_mac *mac = netdev_priv(netdev); + mac->msg_enable = level; +} + + +static void +pasemi_mac_ethtool_get_ringparam(struct net_device *netdev, + struct ethtool_ringparam *ering) +{ + struct pasemi_mac *mac = netdev->priv; + + ering->tx_max_pending = TX_RING_SIZE/2; + ering->tx_pending = RING_USED(mac->tx)/2; + ering->rx_max_pending = RX_RING_SIZE/4; + ering->rx_pending = RING_USED(mac->rx)/4; +} + +static int pasemi_mac_get_sset_count(struct net_device *netdev, int sset) +{ + switch (sset) { + case ETH_SS_STATS: + return ARRAY_SIZE(ethtool_stats_keys); + default: + return -EOPNOTSUPP; + } +} + +static void pasemi_mac_get_ethtool_stats(struct net_device *netdev, + struct ethtool_stats *stats, u64 *data) +{ + struct pasemi_mac *mac = netdev->priv; + int i; + + data[0] = pasemi_read_dma_reg(PAS_DMA_RXINT_RCMDSTA(mac->dma_if)) + >> PAS_DMA_RXINT_RCMDSTA_DROPS_S; + for (i = 0; i < 32; i++) + data[1+i] = pasemi_read_mac_reg(mac->dma_if, PAS_MAC_RMON(i)); +} + +static void pasemi_mac_get_strings(struct net_device *netdev, u32 stringset, + u8 *data) +{ + memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys)); +} + +const struct ethtool_ops pasemi_mac_ethtool_ops = { + .get_settings = pasemi_mac_ethtool_get_settings, + .get_drvinfo = pasemi_mac_ethtool_get_drvinfo, + .get_msglevel = pasemi_mac_ethtool_get_msglevel, + .set_msglevel = pasemi_mac_ethtool_set_msglevel, + .get_link = ethtool_op_get_link, + .get_ringparam = pasemi_mac_ethtool_get_ringparam, + .get_strings = pasemi_mac_get_strings, + .get_sset_count = pasemi_mac_get_sset_count, + .get_ethtool_stats = pasemi_mac_get_ethtool_stats, +}; + diff --git a/drivers/net/ps3_gelic_net.c b/drivers/net/ps3_gelic_net.c index 7eb6e7e848f..e365efb3c62 100644 --- a/drivers/net/ps3_gelic_net.c +++ b/drivers/net/ps3_gelic_net.c @@ -1266,6 +1266,85 @@ int gelic_net_set_rx_csum(struct net_device *netdev, u32 data) return 0; } +static void gelic_net_get_wol(struct net_device *netdev, + struct ethtool_wolinfo *wol) +{ + if (0 <= ps3_compare_firmware_version(2, 2, 0)) + wol->supported = WAKE_MAGIC; + else + wol->supported = 0; + + wol->wolopts = ps3_sys_manager_get_wol() ? wol->supported : 0; + memset(&wol->sopass, 0, sizeof(wol->sopass)); +} +static int gelic_net_set_wol(struct net_device *netdev, + struct ethtool_wolinfo *wol) +{ + int status; + struct gelic_card *card; + u64 v1, v2; + + if (ps3_compare_firmware_version(2, 2, 0) < 0 || + !capable(CAP_NET_ADMIN)) + return -EPERM; + + if (wol->wolopts & ~WAKE_MAGIC) + return -EINVAL; + + card = netdev_card(netdev); + if (wol->wolopts & WAKE_MAGIC) { + status = lv1_net_control(bus_id(card), dev_id(card), + GELIC_LV1_SET_WOL, + GELIC_LV1_WOL_MAGIC_PACKET, + 0, GELIC_LV1_WOL_MP_ENABLE, + &v1, &v2); + if (status) { + pr_info("%s: enabling WOL failed %d\n", __func__, + status); + status = -EIO; + goto done; + } + status = lv1_net_control(bus_id(card), dev_id(card), + GELIC_LV1_SET_WOL, + GELIC_LV1_WOL_ADD_MATCH_ADDR, + 0, GELIC_LV1_WOL_MATCH_ALL, + &v1, &v2); + if (!status) + ps3_sys_manager_set_wol(1); + else { + pr_info("%s: enabling WOL filter failed %d\n", + __func__, status); + status = -EIO; + } + } else { + status = lv1_net_control(bus_id(card), dev_id(card), + GELIC_LV1_SET_WOL, + GELIC_LV1_WOL_MAGIC_PACKET, + 0, GELIC_LV1_WOL_MP_DISABLE, + &v1, &v2); + if (status) { + pr_info("%s: disabling WOL failed %d\n", __func__, + status); + status = -EIO; + goto done; + } + status = lv1_net_control(bus_id(card), dev_id(card), + GELIC_LV1_SET_WOL, + GELIC_LV1_WOL_DELETE_MATCH_ADDR, + 0, GELIC_LV1_WOL_MATCH_ALL, + &v1, &v2); + if (!status) + ps3_sys_manager_set_wol(0); + else { + pr_info("%s: removing WOL filter failed %d\n", + __func__, status); + status = -EIO; + } + } +done: + return status; +} + static struct ethtool_ops gelic_ether_ethtool_ops = { .get_drvinfo = gelic_net_get_drvinfo, .get_settings = gelic_ether_get_settings, @@ -1274,6 +1353,8 @@ static struct ethtool_ops gelic_ether_ethtool_ops = { .set_tx_csum = ethtool_op_set_tx_csum, .get_rx_csum = gelic_net_get_rx_csum, .set_rx_csum = gelic_net_set_rx_csum, + .get_wol = gelic_net_get_wol, + .set_wol = gelic_net_set_wol, }; /** diff --git a/drivers/net/ps3_gelic_net.h b/drivers/net/ps3_gelic_net.h index 1d39d06797e..520f143c2c0 100644 --- a/drivers/net/ps3_gelic_net.h +++ b/drivers/net/ps3_gelic_net.h @@ -182,12 +182,32 @@ enum gelic_lv1_net_control_code { GELIC_LV1_GET_ETH_PORT_STATUS = 2, GELIC_LV1_SET_NEGOTIATION_MODE = 3, GELIC_LV1_GET_VLAN_ID = 4, + GELIC_LV1_SET_WOL = 5, GELIC_LV1_GET_CHANNEL = 6, GELIC_LV1_POST_WLAN_CMD = 9, GELIC_LV1_GET_WLAN_CMD_RESULT = 10, GELIC_LV1_GET_WLAN_EVENT = 11 }; +/* for GELIC_LV1_SET_WOL */ +enum gelic_lv1_wol_command { + GELIC_LV1_WOL_MAGIC_PACKET = 1, + GELIC_LV1_WOL_ADD_MATCH_ADDR = 6, + GELIC_LV1_WOL_DELETE_MATCH_ADDR = 7, +}; + +/* for GELIC_LV1_WOL_MAGIC_PACKET */ +enum gelic_lv1_wol_mp_arg { + GELIC_LV1_WOL_MP_DISABLE = 0, + GELIC_LV1_WOL_MP_ENABLE = 1, +}; + +/* for GELIC_LV1_WOL_{ADD,DELETE}_MATCH_ADDR */ +enum gelic_lv1_wol_match_arg { + GELIC_LV1_WOL_MATCH_INDIVIDUAL = 0, + GELIC_LV1_WOL_MATCH_ALL = 1, +}; + /* status returened from GET_ETH_PORT_STATUS */ enum gelic_lv1_ether_port_status { GELIC_LV1_ETHER_LINK_UP = 0x0000000000000001L, diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c index 29a4d650e8a..2f11254bcc0 100644 --- a/drivers/net/ucc_geth.c +++ b/drivers/net/ucc_geth.c @@ -3853,7 +3853,13 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma ugeth_vdbg("%s: IN", __FUNCTION__); - prop = of_get_property(np, "device-id", NULL); + prop = of_get_property(np, "cell-index", NULL); + if (!prop) { + prop = of_get_property(np, "device-id", NULL); + if (!prop) + return -ENODEV; + } + ucc_num = *prop - 1; if ((ucc_num < 0) || (ucc_num > 7)) return -ENODEV; diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c index e4d3f330bac..2af49078100 100644 --- a/drivers/net/ucc_geth_mii.c +++ b/drivers/net/ucc_geth_mii.c @@ -203,9 +203,14 @@ static int uec_mdio_probe(struct of_device *ofdev, const struct of_device_id *ma if ((res.start >= tempres.start) && (res.end <= tempres.end)) { /* set this UCC to be the MII master */ - const u32 *id = of_get_property(tempnp, "device-id", NULL); - if (id == NULL) - goto bus_register_fail; + const u32 *id; + + id = of_get_property(tempnp, "cell-index", NULL); + if (!id) { + id = of_get_property(tempnp, "device-id", NULL); + if (!id) + goto bus_register_fail; + } ucc_set_qe_mux_mii_mng(*id - 1); diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index c03072b12f4..3a7a11a75fb 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -1,3 +1,15 @@ config OF_DEVICE def_bool y depends on OF && (SPARC || PPC_OF) + +config OF_GPIO + def_bool y + depends on OF && PPC_OF && HAVE_GPIO_LIB + help + OpenFirmware GPIO accessors + +config OF_I2C + def_tristate I2C + depends on PPC_OF && I2C + help + OpenFirmware I2C accessors diff --git a/drivers/of/Makefile b/drivers/of/Makefile index ab9be5d5255..548772e871f 100644 --- a/drivers/of/Makefile +++ b/drivers/of/Makefile @@ -1,2 +1,4 @@ obj-y = base.o obj-$(CONFIG_OF_DEVICE) += device.o platform.o +obj-$(CONFIG_OF_GPIO) += gpio.o +obj-$(CONFIG_OF_I2C) += of_i2c.o diff --git a/drivers/of/base.c b/drivers/of/base.c index 80c9deca5f3..9bd7c4a3125 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -117,6 +117,32 @@ int of_device_is_compatible(const struct device_node *device, EXPORT_SYMBOL(of_device_is_compatible); /** + * of_device_is_available - check if a device is available for use + * + * @device: Node to check for availability + * + * Returns 1 if the status property is absent or set to "okay" or "ok", + * 0 otherwise + */ +int of_device_is_available(const struct device_node *device) +{ + const char *status; + int statlen; + + status = of_get_property(device, "status", &statlen); + if (status == NULL) + return 1; + + if (statlen > 0) { + if (!strcmp(status, "okay") || !strcmp(status, "ok")) + return 1; + } + + return 0; +} +EXPORT_SYMBOL(of_device_is_available); + +/** * of_get_parent - Get a node's parent if any * @node: Node to get parent * diff --git a/drivers/of/gpio.c b/drivers/of/gpio.c new file mode 100644 index 00000000000..000681e98f2 --- /dev/null +++ b/drivers/of/gpio.c @@ -0,0 +1,242 @@ +/* + * OF helpers for the GPIO API + * + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * + * Author: Anton Vorontsov <avorontsov@ru.mvista.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/kernel.h> +#include <linux/errno.h> +#include <linux/io.h> +#include <linux/of.h> +#include <linux/of_gpio.h> +#include <asm/prom.h> + +/** + * of_get_gpio - Get a GPIO number from the device tree to use with GPIO API + * @np: device node to get GPIO from + * @index: index of the GPIO + * + * Returns GPIO number to use with Linux generic GPIO API, or one of the errno + * value on the error condition. + */ +int of_get_gpio(struct device_node *np, int index) +{ + int ret = -EINVAL; + struct device_node *gc; + struct of_gpio_chip *of_gc = NULL; + int size; + const u32 *gpios; + u32 nr_cells; + int i; + const void *gpio_spec; + const u32 *gpio_cells; + int gpio_index = 0; + + gpios = of_get_property(np, "gpios", &size); + if (!gpios) { + ret = -ENOENT; + goto err0; + } + nr_cells = size / sizeof(u32); + + for (i = 0; i < nr_cells; gpio_index++) { + const phandle *gpio_phandle; + + gpio_phandle = gpios + i; + gpio_spec = gpio_phandle + 1; + + /* one cell hole in the gpios = <>; */ + if (!*gpio_phandle) { + if (gpio_index == index) + return -ENOENT; + i++; + continue; + } + + gc = of_find_node_by_phandle(*gpio_phandle); + if (!gc) { + pr_debug("%s: could not find phandle for gpios\n", + np->full_name); + goto err0; + } + + of_gc = gc->data; + if (!of_gc) { + pr_debug("%s: gpio controller %s isn't registered\n", + np->full_name, gc->full_name); + goto err1; + } + + gpio_cells = of_get_property(gc, "#gpio-cells", &size); + if (!gpio_cells || size != sizeof(*gpio_cells) || + *gpio_cells != of_gc->gpio_cells) { + pr_debug("%s: wrong #gpio-cells for %s\n", + np->full_name, gc->full_name); + goto err1; + } + + /* Next phandle is at phandle cells + #gpio-cells */ + i += sizeof(*gpio_phandle) / sizeof(u32) + *gpio_cells; + if (i >= nr_cells + 1) { + pr_debug("%s: insufficient gpio-spec length\n", + np->full_name); + goto err1; + } + + if (gpio_index == index) + break; + + of_gc = NULL; + of_node_put(gc); + } + + if (!of_gc) { + ret = -ENOENT; + goto err0; + } + + ret = of_gc->xlate(of_gc, np, gpio_spec); + if (ret < 0) + goto err1; + + ret += of_gc->gc.base; +err1: + of_node_put(gc); +err0: + pr_debug("%s exited with status %d\n", __func__, ret); + return ret; +} +EXPORT_SYMBOL(of_get_gpio); + +/** + * of_gpio_simple_xlate - translate gpio_spec to the GPIO number + * @of_gc: pointer to the of_gpio_chip structure + * @np: device node of the GPIO chip + * @gpio_spec: gpio specifier as found in the device tree + * + * This is simple translation function, suitable for the most 1:1 mapped + * gpio chips. This function performs only one sanity check: whether gpio + * is less than ngpios (that is specified in the gpio_chip). + */ +int of_gpio_simple_xlate(struct of_gpio_chip *of_gc, struct device_node *np, + const void *gpio_spec) +{ + const u32 *gpio = gpio_spec; + + if (*gpio > of_gc->gc.ngpio) + return -EINVAL; + + return *gpio; +} +EXPORT_SYMBOL(of_gpio_simple_xlate); + +/* Should be sufficient for now, later we'll use dynamic bases. */ +#if defined(CONFIG_PPC32) || defined(CONFIG_SPARC32) +#define GPIOS_PER_CHIP 32 +#else +#define GPIOS_PER_CHIP 64 +#endif + +static int of_get_gpiochip_base(struct device_node *np) +{ + struct device_node *gc = NULL; + int gpiochip_base = 0; + + while ((gc = of_find_all_nodes(gc))) { + if (!of_get_property(gc, "gpio-controller", NULL)) + continue; + + if (gc != np) { + gpiochip_base += GPIOS_PER_CHIP; + continue; + } + + of_node_put(gc); + + if (gpiochip_base >= ARCH_NR_GPIOS) + return -ENOSPC; + + return gpiochip_base; + } + + return -ENOENT; +} + +/** + * of_mm_gpiochip_add - Add memory mapped GPIO chip (bank) + * @np: device node of the GPIO chip + * @mm_gc: pointer to the of_mm_gpio_chip allocated structure + * + * To use this function you should allocate and fill mm_gc with: + * + * 1) In the gpio_chip structure: + * - all the callbacks + * + * 2) In the of_gpio_chip structure: + * - gpio_cells + * - xlate callback (optional) + * + * 3) In the of_mm_gpio_chip structure: + * - save_regs callback (optional) + * + * If succeeded, this function will map bank's memory and will + * do all necessary work for you. Then you'll able to use .regs + * to manage GPIOs from the callbacks. + */ +int of_mm_gpiochip_add(struct device_node *np, + struct of_mm_gpio_chip *mm_gc) +{ + int ret = -ENOMEM; + struct of_gpio_chip *of_gc = &mm_gc->of_gc; + struct gpio_chip *gc = &of_gc->gc; + + gc->label = kstrdup(np->full_name, GFP_KERNEL); + if (!gc->label) + goto err0; + + mm_gc->regs = of_iomap(np, 0); + if (!mm_gc->regs) + goto err1; + + gc->base = of_get_gpiochip_base(np); + if (gc->base < 0) { + ret = gc->base; + goto err1; + } + + if (!of_gc->xlate) + of_gc->xlate = of_gpio_simple_xlate; + + if (mm_gc->save_regs) + mm_gc->save_regs(mm_gc); + + np->data = of_gc; + + ret = gpiochip_add(gc); + if (ret) + goto err2; + + /* We don't want to lose the node and its ->data */ + of_node_get(np); + + pr_debug("%s: registered as generic GPIO chip, base is %d\n", + np->full_name, gc->base); + return 0; +err2: + np->data = NULL; + iounmap(mm_gc->regs); +err1: + kfree(gc->label); +err0: + pr_err("%s: GPIO chip registration failed with status %d\n", + np->full_name, ret); + return ret; +} +EXPORT_SYMBOL(of_mm_gpiochip_add); diff --git a/drivers/of/of_i2c.c b/drivers/of/of_i2c.c new file mode 100644 index 00000000000..63168917115 --- /dev/null +++ b/drivers/of/of_i2c.c @@ -0,0 +1,115 @@ +/* + * OF helpers for the I2C API + * + * Copyright (c) 2008 Jochen Friedrich <jochen@scram.de> + * + * Based on a previous patch from Jon Smirl <jonsmirl@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <linux/i2c.h> +#include <linux/of.h> + +struct i2c_driver_device { + char *of_device; + char *i2c_type; +}; + +static struct i2c_driver_device i2c_devices[] = { + { "dallas,ds1374", "rtc-ds1374" }, +}; + +static int of_find_i2c_driver(struct device_node *node, + struct i2c_board_info *info) +{ + int i, cplen; + const char *compatible; + const char *p; + + /* 1. search for exception list entry */ + for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) { + if (!of_device_is_compatible(node, i2c_devices[i].of_device)) + continue; + if (strlcpy(info->type, i2c_devices[i].i2c_type, + I2C_NAME_SIZE) >= I2C_NAME_SIZE) + return -ENOMEM; + + return 0; + } + + compatible = of_get_property(node, "compatible", &cplen); + if (!compatible) + return -ENODEV; + + /* 2. search for linux,<i2c-type> entry */ + p = compatible; + while (cplen > 0) { + if (!strncmp(p, "linux,", 6)) { + p += 6; + if (strlcpy(info->type, p, + I2C_NAME_SIZE) >= I2C_NAME_SIZE) + return -ENOMEM; + return 0; + } + + i = strlen(p) + 1; + p += i; + cplen -= i; + } + + /* 3. take fist compatible entry and strip manufacturer */ + p = strchr(compatible, ','); + if (!p) + return -ENODEV; + p++; + if (strlcpy(info->type, p, I2C_NAME_SIZE) >= I2C_NAME_SIZE) + return -ENOMEM; + return 0; +} + +void of_register_i2c_devices(struct i2c_adapter *adap, + struct device_node *adap_node) +{ + void *result; + struct device_node *node; + + for_each_child_of_node(adap_node, node) { + struct i2c_board_info info = {}; + const u32 *addr; + int len; + + addr = of_get_property(node, "reg", &len); + if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) { + printk(KERN_ERR + "of-i2c: invalid i2c device entry\n"); + continue; + } + + info.irq = irq_of_parse_and_map(node, 0); + if (info.irq == NO_IRQ) + info.irq = -1; + + if (of_find_i2c_driver(node, &info) < 0) { + irq_dispose_mapping(info.irq); + continue; + } + + info.addr = *addr; + + request_module(info.type); + + result = i2c_new_device(adap, &info); + if (result == NULL) { + printk(KERN_ERR + "of-i2c: Failed to load driver for %s\n", + info.type); + irq_dispose_mapping(info.irq); + continue; + } + } +} +EXPORT_SYMBOL(of_register_i2c_devices); diff --git a/drivers/ps3/ps3-sys-manager.c b/drivers/ps3/ps3-sys-manager.c index d4f6f960dd1..7605453b74f 100644 --- a/drivers/ps3/ps3-sys-manager.c +++ b/drivers/ps3/ps3-sys-manager.c @@ -24,6 +24,7 @@ #include <linux/reboot.h> #include <asm/firmware.h> +#include <asm/lv1call.h> #include <asm/ps3.h> #include "vuart.h" @@ -187,6 +188,7 @@ enum ps3_sys_manager_next_op { * controller, and bluetooth controller. * @PS3_SM_WAKE_RTC: * @PS3_SM_WAKE_RTC_ERROR: + * @PS3_SM_WAKE_W_O_L: Ether or wireless LAN. * @PS3_SM_WAKE_P_O_R: Power on reset. * * Additional wakeup sources when specifying PS3_SM_NEXT_OP_SYS_SHUTDOWN. @@ -200,10 +202,19 @@ enum ps3_sys_manager_wake_source { PS3_SM_WAKE_DEFAULT = 0, PS3_SM_WAKE_RTC = 0x00000040, PS3_SM_WAKE_RTC_ERROR = 0x00000080, + PS3_SM_WAKE_W_O_L = 0x00000400, PS3_SM_WAKE_P_O_R = 0x80000000, }; /** + * user_wake_sources - User specified wakeup sources. + * + * Logical OR of enum ps3_sys_manager_wake_source types. + */ + +static u32 user_wake_sources = PS3_SM_WAKE_DEFAULT; + +/** * enum ps3_sys_manager_cmd - Command from system manager to guest. * * The guest completes the actions needed, then acks or naks the command via @@ -581,6 +592,23 @@ fail_id: return -EIO; } +static void ps3_sys_manager_fin(struct ps3_system_bus_device *dev) +{ + ps3_sys_manager_send_request_shutdown(dev); + + pr_emerg("System Halted, OK to turn off power\n"); + + while (ps3_sys_manager_handle_msg(dev)) { + /* pause until next DEC interrupt */ + lv1_pause(0); + } + + while (1) { + /* pause, ignoring DEC interrupt */ + lv1_pause(1); + } +} + /** * ps3_sys_manager_final_power_off - The final platform machine_power_off routine. * @@ -601,13 +629,9 @@ static void ps3_sys_manager_final_power_off(struct ps3_system_bus_device *dev) ps3_vuart_cancel_async(dev); ps3_sys_manager_send_next_op(dev, PS3_SM_NEXT_OP_SYS_SHUTDOWN, - PS3_SM_WAKE_DEFAULT); - ps3_sys_manager_send_request_shutdown(dev); - - pr_emerg("System Halted, OK to turn off power\n"); + user_wake_sources); - while (1) - ps3_sys_manager_handle_msg(dev); + ps3_sys_manager_fin(dev); } /** @@ -638,14 +662,42 @@ static void ps3_sys_manager_final_restart(struct ps3_system_bus_device *dev) ps3_sys_manager_send_attr(dev, 0); ps3_sys_manager_send_next_op(dev, PS3_SM_NEXT_OP_SYS_REBOOT, - PS3_SM_WAKE_DEFAULT); - ps3_sys_manager_send_request_shutdown(dev); + user_wake_sources); - pr_emerg("System Halted, OK to turn off power\n"); + ps3_sys_manager_fin(dev); +} + +/** + * ps3_sys_manager_get_wol - Get wake-on-lan setting. + */ + +int ps3_sys_manager_get_wol(void) +{ + pr_debug("%s:%d\n", __func__, __LINE__); + + return (user_wake_sources & PS3_SM_WAKE_W_O_L) != 0; +} +EXPORT_SYMBOL_GPL(ps3_sys_manager_get_wol); + +/** + * ps3_sys_manager_set_wol - Set wake-on-lan setting. + */ + +void ps3_sys_manager_set_wol(int state) +{ + static DEFINE_MUTEX(mutex); + + mutex_lock(&mutex); + + pr_debug("%s:%d: %d\n", __func__, __LINE__, state); - while (1) - ps3_sys_manager_handle_msg(dev); + if (state) + user_wake_sources |= PS3_SM_WAKE_W_O_L; + else + user_wake_sources &= ~PS3_SM_WAKE_W_O_L; + mutex_unlock(&mutex); } +EXPORT_SYMBOL_GPL(ps3_sys_manager_set_wol); /** * ps3_sys_manager_work - Asynchronous read handler. diff --git a/drivers/ps3/sys-manager-core.c b/drivers/ps3/sys-manager-core.c index 31648f7d9ae..474225852b6 100644 --- a/drivers/ps3/sys-manager-core.c +++ b/drivers/ps3/sys-manager-core.c @@ -19,6 +19,7 @@ */ #include <linux/kernel.h> +#include <asm/lv1call.h> #include <asm/ps3.h> /** @@ -50,10 +51,7 @@ void ps3_sys_manager_power_off(void) if (ps3_sys_manager_ops.power_off) ps3_sys_manager_ops.power_off(ps3_sys_manager_ops.dev); - printk(KERN_EMERG "System Halted, OK to turn off power\n"); - local_irq_disable(); - while (1) - (void)0; + ps3_sys_manager_halt(); } void ps3_sys_manager_restart(void) @@ -61,8 +59,14 @@ void ps3_sys_manager_restart(void) if (ps3_sys_manager_ops.restart) ps3_sys_manager_ops.restart(ps3_sys_manager_ops.dev); - printk(KERN_EMERG "System Halted, OK to turn off power\n"); + ps3_sys_manager_halt(); +} + +void ps3_sys_manager_halt(void) +{ + pr_emerg("System Halted, OK to turn off power\n"); local_irq_disable(); while (1) - (void)0; + lv1_pause(1); } + diff --git a/drivers/serial/cpm_uart/cpm_uart.h b/drivers/serial/cpm_uart/cpm_uart.h index 32b9737759c..0cc39f82d7c 100644 --- a/drivers/serial/cpm_uart/cpm_uart.h +++ b/drivers/serial/cpm_uart/cpm_uart.h @@ -92,6 +92,9 @@ extern struct uart_cpm_port cpm_uart_ports[UART_NR]; /* these are located in their respective files */ void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd); +void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, + struct device_node *np); +void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram); int cpm_uart_init_portdesc(void); int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con); void cpm_uart_freebuf(struct uart_cpm_port *pinfo); diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c index 236af9d3385..a638ba0679a 100644 --- a/drivers/serial/cpm_uart/cpm_uart_core.c +++ b/drivers/serial/cpm_uart/cpm_uart_core.c @@ -966,24 +966,23 @@ static int cpm_uart_init_port(struct device_node *np, if (!mem) return -ENOMEM; - pram = of_iomap(np, 1); - if (!pram) { - ret = -ENOMEM; - goto out_mem; - } - if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") || of_device_is_compatible(np, "fsl,cpm2-scc-uart")) { pinfo->sccp = mem; - pinfo->sccup = pram; + pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np); } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") || of_device_is_compatible(np, "fsl,cpm2-smc-uart")) { pinfo->flags |= FLAG_SMC; pinfo->smcp = mem; - pinfo->smcup = pram; + pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np); } else { ret = -ENODEV; - goto out_pram; + goto out_mem; + } + + if (!pram) { + ret = -ENOMEM; + goto out_mem; } pinfo->tx_nrfifos = TX_NUM_FIFO; @@ -1007,7 +1006,7 @@ static int cpm_uart_init_port(struct device_node *np, return cpm_uart_request_port(&pinfo->port); out_pram: - iounmap(pram); + cpm_uart_unmap_pram(pinfo, pram); out_mem: iounmap(mem); return ret; diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c index 6ea0366e26a..74f1432bb24 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c @@ -45,6 +45,8 @@ #include <linux/serial_core.h> #include <linux/kernel.h> +#include <linux/of.h> + #include "cpm_uart.h" /**************************************************************/ @@ -54,6 +56,18 @@ void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) { cpm_command(port->command, cmd); } + +void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, + struct device_node *np) +{ + return of_iomap(np, 1); +} + +void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) +{ + iounmap(pram); +} + #else void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) { diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c index d9af06a791b..bb862e2f54c 100644 --- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c +++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c @@ -41,6 +41,9 @@ #include <asm/io.h> #include <asm/irq.h> #include <asm/fs_pd.h> +#ifdef CONFIG_PPC_CPM_NEW_BINDING +#include <asm/prom.h> +#endif #include <linux/serial_core.h> #include <linux/kernel.h> @@ -54,6 +57,55 @@ void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) { cpm_command(port->command, cmd); } + +void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port, + struct device_node *np) +{ + void __iomem *pram; + unsigned long offset; + struct resource res; + unsigned long len; + + /* Don't remap parameter RAM if it has already been initialized + * during console setup. + */ + if (IS_SMC(port) && port->smcup) + return port->smcup; + else if (!IS_SMC(port) && port->sccup) + return port->sccup; + + if (of_address_to_resource(np, 1, &res)) + return NULL; + + len = 1 + res.end - res.start; + pram = ioremap(res.start, len); + if (!pram) + return NULL; + + if (!IS_SMC(port)) + return pram; + + if (len != 2) { + printk(KERN_WARNING "cpm_uart[%d]: device tree references " + "SMC pram, using boot loader/wrapper pram mapping. " + "Please fix your device tree to reference the pram " + "base register instead.\n", + port->port.line); + return pram; + } + + offset = cpm_dpalloc(PROFF_SMC_SIZE, 64); + out_be16(pram, offset); + iounmap(pram); + return cpm_muram_addr(offset); +} + +void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram) +{ + if (!IS_SMC(port)) + iounmap(pram); +} + #else void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd) { diff --git a/drivers/serial/of_serial.c b/drivers/serial/of_serial.c index c0e50a46105..8aacfb78dea 100644 --- a/drivers/serial/of_serial.c +++ b/drivers/serial/of_serial.c @@ -56,7 +56,9 @@ static int __devinit of_platform_serial_setup(struct of_device *ofdev, port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP | UPF_FIXED_PORT; port->dev = &ofdev->dev; - port->custom_divisor = *clk / (16 * (*spd)); + /* If current-speed was set, then try not to change it. */ + if (spd) + port->custom_divisor = *clk / (16 * (*spd)); return 0; } diff --git a/drivers/serial/ucc_uart.c b/drivers/serial/ucc_uart.c index e0994f06100..5e4310ccd59 100644 --- a/drivers/serial/ucc_uart.c +++ b/drivers/serial/ucc_uart.c @@ -1270,10 +1270,18 @@ static int ucc_uart_probe(struct of_device *ofdev, /* Get the UCC number (device ID) */ /* UCCs are numbered 1-7 */ - iprop = of_get_property(np, "device-id", NULL); - if (!iprop || (*iprop < 1) || (*iprop > UCC_MAX_NUM)) { - dev_err(&ofdev->dev, - "missing or invalid UCC specified in device tree\n"); + iprop = of_get_property(np, "cell-index", NULL); + if (!iprop) { + iprop = of_get_property(np, "device-id", NULL); + if (!iprop) { + dev_err(&ofdev->dev, "UCC is unspecified in " + "device tree\n"); + return -EINVAL; + } + } + + if ((*iprop < 1) || (*iprop > UCC_MAX_NUM)) { + dev_err(&ofdev->dev, "no support for UCC%u\n", *iprop); kfree(qe_port); return -ENODEV; } |