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-rw-r--r--drivers/scsi/aic7xxx_old/aic7xxx.seq2
-rw-r--r--drivers/serial/nwpserial.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/drivers/scsi/aic7xxx_old/aic7xxx.seq b/drivers/scsi/aic7xxx_old/aic7xxx.seq
index f6fc4b75b5a..5997e7c3a19 100644
--- a/drivers/scsi/aic7xxx_old/aic7xxx.seq
+++ b/drivers/scsi/aic7xxx_old/aic7xxx.seq
@@ -615,7 +615,7 @@ ultra2_dmafifoflush:
* went empty and the next bit of data is copied from
* the SCSI fifo into the PCI fifo. It should only
* come on when both FIFOs (meaning the entire FIFO
- * chain) are emtpy. Since it can take up to 4 cycles
+ * chain) are empty. Since it can take up to 4 cycles
* for new data to be copied from the SCSI fifo into
* the PCI fifo, testing for FIFOEMP status for 4
* extra times gives the needed time for any
diff --git a/drivers/serial/nwpserial.c b/drivers/serial/nwpserial.c
index 3c02fa96f28..e65b0d9202a 100644
--- a/drivers/serial/nwpserial.c
+++ b/drivers/serial/nwpserial.c
@@ -81,7 +81,7 @@ nwpserial_console_write(struct console *co, const char *s, unsigned int count)
uart_console_write(&up->port, s, count, nwpserial_console_putchar);
- /* wait for transmitter to become emtpy */
+ /* wait for transmitter to become empty */
while ((dcr_read(up->dcr_host, UART_LSR) & UART_LSR_THRE) == 0)
cpu_relax();