diff options
Diffstat (limited to 'include/asm-arm')
-rw-r--r-- | include/asm-arm/arch-at91/io.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/board-palmte.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/clock.h | 5 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/entry-macro.S | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/gpio.h | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-omap/hardware.h | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/hardware.h | 12 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/mfp-pxa27x.h | 1 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/palmtx.h | 106 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/pxa27x-udc.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/pxa2xx-gpio.h | 9 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/pxafb.h | 3 | ||||
-rw-r--r-- | include/asm-arm/arch-pxa/regs-lcd.h | 11 | ||||
-rw-r--r-- | include/asm-arm/arch-sa1100/collie.h | 4 | ||||
-rw-r--r-- | include/asm-arm/page.h | 4 | ||||
-rw-r--r-- | include/asm-arm/pgtable-nommu.h | 1 | ||||
-rw-r--r-- | include/asm-arm/spinlock.h | 2 | ||||
-rw-r--r-- | include/asm-arm/system.h | 29 |
18 files changed, 169 insertions, 27 deletions
diff --git a/include/asm-arm/arch-at91/io.h b/include/asm-arm/arch-at91/io.h index 80073fd36b8..f8beaa22846 100644 --- a/include/asm-arm/arch-at91/io.h +++ b/include/asm-arm/arch-at91/io.h @@ -21,8 +21,6 @@ #ifndef __ASM_ARCH_IO_H #define __ASM_ARCH_IO_H -#include <asm/io.h> - #define IO_SPACE_LIMIT 0xFFFFFFFF #define __io(a) ((void __iomem *)(a)) diff --git a/include/asm-arm/arch-omap/board-palmte.h b/include/asm-arm/arch-omap/board-palmte.h index cd22035a716..6fac2c8935b 100644 --- a/include/asm-arm/arch-omap/board-palmte.h +++ b/include/asm-arm/arch-omap/board-palmte.h @@ -14,8 +14,6 @@ #ifndef __OMAP_BOARD_PALMTE_H #define __OMAP_BOARD_PALMTE_H -#include <asm/arch/gpio.h> - #define PALMTE_USBDETECT_GPIO 0 #define PALMTE_USB_OR_DC_GPIO 1 #define PALMTE_TSC_GPIO 4 diff --git a/include/asm-arm/arch-omap/clock.h b/include/asm-arm/arch-omap/clock.h index 57523bdb642..12a5e4de951 100644 --- a/include/asm-arm/arch-omap/clock.h +++ b/include/asm-arm/arch-omap/clock.h @@ -73,6 +73,8 @@ struct clk { #endif }; +struct cpufreq_frequency_table; + struct clk_functions { int (*clk_enable)(struct clk *clk); void (*clk_disable)(struct clk *clk); @@ -83,6 +85,9 @@ struct clk_functions { void (*clk_allow_idle)(struct clk *clk); void (*clk_deny_idle)(struct clk *clk); void (*clk_disable_unused)(struct clk *clk); +#ifdef CONFIG_CPU_FREQ + void (*clk_init_cpufreq_table)(struct cpufreq_frequency_table **); +#endif }; extern unsigned int mpurate; diff --git a/include/asm-arm/arch-omap/entry-macro.S b/include/asm-arm/arch-omap/entry-macro.S index 74cd57221c8..369093a45fc 100644 --- a/include/asm-arm/arch-omap/entry-macro.S +++ b/include/asm-arm/arch-omap/entry-macro.S @@ -8,6 +8,7 @@ * warranty of any kind, whether express or implied. */ #include <asm/hardware.h> +#include <asm/arch/io.h> #include <asm/arch/irqs.h> #if defined(CONFIG_ARCH_OMAP1) diff --git a/include/asm-arm/arch-omap/gpio.h b/include/asm-arm/arch-omap/gpio.h index 86621a04cd8..5ee6a49864c 100644 --- a/include/asm-arm/arch-omap/gpio.h +++ b/include/asm-arm/arch-omap/gpio.h @@ -26,7 +26,6 @@ #ifndef __ASM_ARCH_OMAP_GPIO_H #define __ASM_ARCH_OMAP_GPIO_H -#include <asm/hardware.h> #include <asm/arch/irqs.h> #include <asm/io.h> diff --git a/include/asm-arm/arch-omap/hardware.h b/include/asm-arm/arch-omap/hardware.h index da572092e25..91d85b3417b 100644 --- a/include/asm-arm/arch-omap/hardware.h +++ b/include/asm-arm/arch-omap/hardware.h @@ -41,7 +41,6 @@ #include <asm/types.h> #include <asm/arch/cpu.h> #endif -#include <asm/arch/io.h> #include <asm/arch/serial.h> /* diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index d9af6dabc89..b6a8317c2ec 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h @@ -69,6 +69,12 @@ _id == 0x212; \ }) +#define __cpu_is_pxa255(id) \ + ({ \ + unsigned int _id = (id) >> 4 & 0xfff; \ + _id == 0x2d0; \ + }) + #define __cpu_is_pxa25x(id) \ ({ \ unsigned int _id = (id) >> 4 & 0xfff; \ @@ -76,6 +82,7 @@ }) #else #define __cpu_is_pxa21x(id) (0) +#define __cpu_is_pxa255(id) (0) #define __cpu_is_pxa25x(id) (0) #endif @@ -124,6 +131,11 @@ __cpu_is_pxa21x(read_cpuid_id()); \ }) +#define cpu_is_pxa255() \ + ({ \ + __cpu_is_pxa255(read_cpuid_id()); \ + }) + #define cpu_is_pxa25x() \ ({ \ __cpu_is_pxa25x(read_cpuid_id()); \ diff --git a/include/asm-arm/arch-pxa/mfp-pxa27x.h b/include/asm-arm/arch-pxa/mfp-pxa27x.h index eb6eaa174f8..bc73ab84167 100644 --- a/include/asm-arm/arch-pxa/mfp-pxa27x.h +++ b/include/asm-arm/arch-pxa/mfp-pxa27x.h @@ -112,6 +112,7 @@ #define GPIO57_nIOIS16 MFP_CFG_IN(GPIO57, AF1) #define GPIO56_nPWAIT MFP_CFG_IN(GPIO56, AF1) #define GPIO79_PSKTSEL MFP_CFG_OUT(GPIO79, AF1, DRIVE_HIGH) +#define GPIO104_PSKTSEL MFP_CFG_OUT(GPIO104, AF1, DRIVE_HIGH) /* I2C */ #define GPIO117_I2C_SCL MFP_CFG_IN(GPIO117, AF1) diff --git a/include/asm-arm/arch-pxa/palmtx.h b/include/asm-arm/arch-pxa/palmtx.h new file mode 100644 index 00000000000..1e8bccbda51 --- /dev/null +++ b/include/asm-arm/arch-pxa/palmtx.h @@ -0,0 +1,106 @@ +/* + * GPIOs and interrupts for Palm T|X Handheld Computer + * + * Based on palmld-gpio.h by Alex Osborne + * + * Authors: Marek Vasut <marek.vasut@gmail.com> + * Cristiano P. <cristianop@users.sourceforge.net> + * Jan Herman <2hp@seznam.cz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef _INCLUDE_PALMTX_H_ +#define _INCLUDE_PALMTX_H_ + +/** HERE ARE GPIOs **/ + +/* GPIOs */ +#define GPIO_NR_PALMTX_GPIO_RESET 1 + +#define GPIO_NR_PALMTX_POWER_DETECT 12 /* 90 */ +#define GPIO_NR_PALMTX_HOTSYNC_BUTTON_N 10 +#define GPIO_NR_PALMTX_EARPHONE_DETECT 107 + +/* SD/MMC */ +#define GPIO_NR_PALMTX_SD_DETECT_N 14 +#define GPIO_NR_PALMTX_SD_POWER 114 /* probably */ +#define GPIO_NR_PALMTX_SD_READONLY 115 /* probably */ + +/* TOUCHSCREEN */ +#define GPIO_NR_PALMTX_WM9712_IRQ 27 + +/* IRDA - disable GPIO connected to SD pin of tranceiver (TFBS4710?) ? */ +#define GPIO_NR_PALMTX_IR_DISABLE 40 + +/* USB */ +#define GPIO_NR_PALMTX_USB_DETECT_N 13 +#define GPIO_NR_PALMTX_USB_POWER 95 +#define GPIO_NR_PALMTX_USB_PULLUP 93 + +/* LCD/BACKLIGHT */ +#define GPIO_NR_PALMTX_BL_POWER 84 +#define GPIO_NR_PALMTX_LCD_POWER 96 + +/* LCD BORDER */ +#define GPIO_NR_PALMTX_BORDER_SWITCH 98 +#define GPIO_NR_PALMTX_BORDER_SELECT 22 + +/* BLUETOOTH */ +#define GPIO_NR_PALMTX_BT_POWER 17 +#define GPIO_NR_PALMTX_BT_RESET 83 + +/* PCMCIA (WiFi) */ +#define GPIO_NR_PALMTX_PCMCIA_POWER1 94 +#define GPIO_NR_PALMTX_PCMCIA_POWER2 108 +#define GPIO_NR_PALMTX_PCMCIA_RESET 79 +#define GPIO_NR_PALMTX_PCMCIA_READY 116 + +/* NAND Flash ... this GPIO may be incorrect! */ +#define GPIO_NR_PALMTX_NAND_BUFFER_DIR 79 + +/* INTERRUPTS */ +#define IRQ_GPIO_PALMTX_SD_DETECT_N IRQ_GPIO(GPIO_NR_PALMTX_SD_DETECT_N) +#define IRQ_GPIO_PALMTX_WM9712_IRQ IRQ_GPIO(GPIO_NR_PALMTX_WM9712_IRQ) +#define IRQ_GPIO_PALMTX_USB_DETECT IRQ_GPIO(GPIO_NR_PALMTX_USB_DETECT) +#define IRQ_GPIO_PALMTX_GPIO_RESET IRQ_GPIO(GPIO_NR_PALMTX_GPIO_RESET) + +/** HERE ARE INIT VALUES **/ + +/* Various addresses */ +#define PALMTX_PCMCIA_PHYS 0x28000000 +#define PALMTX_PCMCIA_VIRT 0xf0000000 +#define PALMTX_PCMCIA_SIZE 0x100000 + +#define PALMTX_PHYS_RAM_START 0xa0000000 +#define PALMTX_PHYS_IO_START 0x40000000 + +#define PALMTX_PHYS_FLASH_START PXA_CS0_PHYS /* ChipSelect 0 */ +#define PALMTX_PHYS_NAND_START PXA_CS1_PHYS /* ChipSelect 1 */ + +/* TOUCHSCREEN */ +#define AC97_LINK_FRAME 21 + + +/* BATTERY */ +#define PALMTX_BAT_MAX_VOLTAGE 4000 /* 4.00v current voltage */ +#define PALMTX_BAT_MIN_VOLTAGE 3550 /* 3.55v critical voltage */ +#define PALMTX_BAT_MAX_CURRENT 0 /* unknokn */ +#define PALMTX_BAT_MIN_CURRENT 0 /* unknown */ +#define PALMTX_BAT_MAX_CHARGE 1 /* unknown */ +#define PALMTX_BAT_MIN_CHARGE 1 /* unknown */ +#define PALMTX_MAX_LIFE_MINS 360 /* on-life in minutes */ + +#define PALMTX_BAT_MEASURE_DELAY (HZ * 1) + +/* BACKLIGHT */ +#define PALMTX_MAX_INTENSITY 0xFE +#define PALMTX_DEFAULT_INTENSITY 0x7E +#define PALMTX_LIMIT_MASK 0x7F +#define PALMTX_PRESCALER 0x3F +#define PALMTX_PERIOD_NS 3500 + +#endif diff --git a/include/asm-arm/arch-pxa/pxa27x-udc.h b/include/asm-arm/arch-pxa/pxa27x-udc.h index bc1cf7d0773..ab1443f8bd8 100644 --- a/include/asm-arm/arch-pxa/pxa27x-udc.h +++ b/include/asm-arm/arch-pxa/pxa27x-udc.h @@ -97,7 +97,7 @@ #define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */ #define UP2OCR_HXS (1 << 16) /* Host Port 2 Transceiver Output Select */ #define UP2OCR_HXOE (1 << 17) /* Host Port 2 Transceiver Output Enable */ -#define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ +#define UP2OCR_SEOS(x) ((x & 7) << 24) /* Single-Ended Output Select */ #define UDCCSN(x) __REG2(0x40600100, (x) << 2) #define UDCCSR0 __REG(0x40600100) /* UDC Control/Status register - Endpoint 0 */ diff --git a/include/asm-arm/arch-pxa/pxa2xx-gpio.h b/include/asm-arm/arch-pxa/pxa2xx-gpio.h index a6e60f69161..6ef1dd09970 100644 --- a/include/asm-arm/arch-pxa/pxa2xx-gpio.h +++ b/include/asm-arm/arch-pxa/pxa2xx-gpio.h @@ -136,7 +136,11 @@ #define GPIO93_CIF_DD_6 93 /* Camera data pin 6 */ #define GPIO94_CIF_DD_5 94 /* Camera data pin 5 */ #define GPIO95_CIF_DD_4 95 /* Camera data pin 4 */ +#define GPIO96_FFRXD 96 /* FFUART recieve */ +#define GPIO98_FFRTS 98 /* FFUART request to send */ #define GPIO98_CIF_DD_0 98 /* Camera data pin 0 */ +#define GPIO99_FFTXD 99 /* FFUART transmit data */ +#define GPIO100_FFCTS 100 /* FFUART Clear to send */ #define GPIO102_nPCE_1 102 /* PCMCIA (PXA27x) */ #define GPIO103_CIF_DD_3 103 /* Camera data pin 3 */ #define GPIO104_CIF_DD_2 104 /* Camera data pin 2 */ @@ -318,6 +322,8 @@ #define GPIO85_nPCE_1_MD (85 | GPIO_ALT_FN_1_OUT) #define GPIO85_CIF_LV_MD (85 | GPIO_ALT_FN_3_IN) #define GPIO86_nPCE_1_MD (86 | GPIO_ALT_FN_1_OUT) +#define GPIO88_USBH1_PWR_MD (88 | GPIO_ALT_FN_1_IN) +#define GPIO89_USBH1_PEN_MD (89 | GPIO_ALT_FN_2_OUT) #define GPIO90_CIF_DD_4_MD (90 | GPIO_ALT_FN_3_IN) #define GPIO91_CIF_DD_5_MD (91 | GPIO_ALT_FN_3_IN) #define GPIO92_MMCDAT0_MD (92 | GPIO_ALT_FN_1_OUT) @@ -326,8 +332,11 @@ #define GPIO95_CIF_DD_4_MD (95 | GPIO_ALT_FN_2_IN) #define GPIO95_KP_MKIN6_MD (95 | GPIO_ALT_FN_3_IN) #define GPIO96_KP_DKIN3_MD (96 | GPIO_ALT_FN_1_IN) +#define GPIO96_FFRXD_MD (96 | GPIO_ALT_FN_3_IN) #define GPIO97_KP_MKIN3_MD (97 | GPIO_ALT_FN_3_IN) #define GPIO98_CIF_DD_0_MD (98 | GPIO_ALT_FN_2_IN) +#define GPIO98_FFRTS_MD (98 | GPIO_ALT_FN_3_OUT) +#define GPIO99_FFTXD_MD (99 | GPIO_ALT_FN_3_OUT) #define GPIO100_KP_MKIN0_MD (100 | GPIO_ALT_FN_1_IN) #define GPIO101_KP_MKIN1_MD (101 | GPIO_ALT_FN_1_IN) #define GPIO102_nPCE_1_MD (102 | GPIO_ALT_FN_1_OUT) diff --git a/include/asm-arm/arch-pxa/pxafb.h b/include/asm-arm/arch-pxa/pxafb.h index bbd22396841..daf018d0c60 100644 --- a/include/asm-arm/arch-pxa/pxafb.h +++ b/include/asm-arm/arch-pxa/pxafb.h @@ -71,7 +71,8 @@ struct pxafb_mode_info { u_char bpp; u_int cmap_greyscale:1, - unused:31; + depth:8, + unused:23; /* Parallel Mode Timing */ u_char hsync_len; diff --git a/include/asm-arm/arch-pxa/regs-lcd.h b/include/asm-arm/arch-pxa/regs-lcd.h index f762493f514..820a189684a 100644 --- a/include/asm-arm/arch-pxa/regs-lcd.h +++ b/include/asm-arm/arch-pxa/regs-lcd.h @@ -1,5 +1,8 @@ #ifndef __ASM_ARCH_REGS_LCD_H #define __ASM_ARCH_REGS_LCD_H + +#include <asm/arch/bitfield.h> + /* * LCD Controller Registers and Bits Definitions */ @@ -24,6 +27,12 @@ #define LCCR3_4BPP (2 << 24) #define LCCR3_8BPP (3 << 24) #define LCCR3_16BPP (4 << 24) +#define LCCR3_18BPP (5 << 24) +#define LCCR3_18BPP_P (6 << 24) +#define LCCR3_19BPP (7 << 24) +#define LCCR3_19BPP_P (1 << 29) +#define LCCR3_24BPP ((1 << 29) | (1 << 24)) +#define LCCR3_25BPP ((1 << 29) | (2 << 24)) #define LCCR3_PDFOR_0 (0 << 30) #define LCCR3_PDFOR_1 (1 << 30) @@ -69,7 +78,7 @@ #define LCCR0_QDM (1 << 11) /* LCD Quick Disable mask */ #define LCCR0_PDD (0xff << 12) /* Palette DMA request delay */ #define LCCR0_PDD_S 12 -#define LCCR0_BM (1 << 20) /* Branch mask */ +#define LCCR0_BM (1 << 20) /* Branch mask */ #define LCCR0_OUM (1 << 21) /* Output FIFO underrun mask */ #define LCCR0_LCDT (1 << 22) /* LCD panel type */ #define LCCR0_RDSTM (1 << 23) /* Read status interrupt mask */ diff --git a/include/asm-arm/arch-sa1100/collie.h b/include/asm-arm/arch-sa1100/collie.h index 14a344aa3cc..762eba53581 100644 --- a/include/asm-arm/arch-sa1100/collie.h +++ b/include/asm-arm/arch-sa1100/collie.h @@ -34,9 +34,12 @@ #define COLLIE_GPIO_ON_KEY GPIO_GPIO (0) #define COLLIE_GPIO_AC_IN GPIO_GPIO (1) +#define COLLIE_GPIO_SDIO_INT GPIO_GPIO (11) #define COLLIE_GPIO_CF_IRQ GPIO_GPIO (14) #define COLLIE_GPIO_nREMOCON_INT GPIO_GPIO (15) #define COLLIE_GPIO_UCB1x00_RESET GPIO_GPIO (16) +#define COLLIE_GPIO_nMIC_ON GPIO_GPIO (17) +#define COLLIE_GPIO_nREMOCON_ON GPIO_GPIO (18) #define COLLIE_GPIO_CO GPIO_GPIO (20) #define COLLIE_GPIO_MCP_CLK GPIO_GPIO (21) #define COLLIE_GPIO_CF_CD GPIO_GPIO (22) @@ -49,6 +52,7 @@ #define COLLIE_IRQ_GPIO_ON_KEY IRQ_GPIO0 #define COLLIE_IRQ_GPIO_AC_IN IRQ_GPIO1 +#define COLLIE_IRQ_GPIO_SDIO_IRQ IRQ_GPIO11 #define COLLIE_IRQ_GPIO_CF_IRQ IRQ_GPIO14 #define COLLIE_IRQ_GPIO_nREMOCON_INT IRQ_GPIO15 #define COLLIE_IRQ_GPIO_CO IRQ_GPIO20 diff --git a/include/asm-arm/page.h b/include/asm-arm/page.h index 5c22b011210..8e05bdb5f12 100644 --- a/include/asm-arm/page.h +++ b/include/asm-arm/page.h @@ -179,10 +179,10 @@ typedef unsigned long pgprot_t; #endif /* STRICT_MM_TYPECHECKS */ -typedef struct page *pgtable_t; - #endif /* CONFIG_MMU */ +typedef struct page *pgtable_t; + #include <asm/memory.h> #endif /* !__ASSEMBLY__ */ diff --git a/include/asm-arm/pgtable-nommu.h b/include/asm-arm/pgtable-nommu.h index 2e5868bbe03..386fcc10a97 100644 --- a/include/asm-arm/pgtable-nommu.h +++ b/include/asm-arm/pgtable-nommu.h @@ -16,7 +16,6 @@ #include <linux/slab.h> #include <asm/processor.h> #include <asm/page.h> -#include <asm/io.h> /* * Trivial page table functions. diff --git a/include/asm-arm/spinlock.h b/include/asm-arm/spinlock.h index 800ba5254da..2b41ebbfa7f 100644 --- a/include/asm-arm/spinlock.h +++ b/include/asm-arm/spinlock.h @@ -142,7 +142,7 @@ static inline void __raw_write_unlock(raw_rwlock_t *rw) } /* write_can_lock - would write_trylock() succeed? */ -#define __raw_write_can_lock(x) ((x)->lock == 0x80000000) +#define __raw_write_can_lock(x) ((x)->lock == 0) /* * Read locks are a bit more hairy: diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 6335de9a2bb..514af792a59 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -48,20 +48,6 @@ #define CPUID_TCM 2 #define CPUID_TLBTYPE 3 -#ifdef CONFIG_CPU_CP15 -#define read_cpuid(reg) \ - ({ \ - unsigned int __val; \ - asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ - : "=r" (__val) \ - : \ - : "cc"); \ - __val; \ - }) -#else -#define read_cpuid(reg) (processor_id) -#endif - /* * This is used to ensure the compiler did actually allocate the register we * asked it for some inline assembly sequences. Apparently we can't trust @@ -78,6 +64,21 @@ #include <linux/stringify.h> #include <linux/irqflags.h> +#ifdef CONFIG_CPU_CP15 +#define read_cpuid(reg) \ + ({ \ + unsigned int __val; \ + asm("mrc p15, 0, %0, c0, c0, " __stringify(reg) \ + : "=r" (__val) \ + : \ + : "cc"); \ + __val; \ + }) +#else +extern unsigned int processor_id; +#define read_cpuid(reg) (processor_id) +#endif + /* * The CPU ID never changes at run time, so we might as well tell the * compiler that it's constant. Use this function to read the CPU ID |