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-rw-r--r--include/asm-frv/mem-layout.h2
-rw-r--r--include/asm-frv/pgtable.h19
-rw-r--r--include/asm-frv/spr-regs.h14
-rw-r--r--include/asm-frv/system.h21
4 files changed, 44 insertions, 12 deletions
diff --git a/include/asm-frv/mem-layout.h b/include/asm-frv/mem-layout.h
index 83532252b8b..734a1d0583b 100644
--- a/include/asm-frv/mem-layout.h
+++ b/include/asm-frv/mem-layout.h
@@ -60,7 +60,7 @@
*/
#define BRK_BASE __UL(2 * 1024 * 1024 + PAGE_SIZE)
#define STACK_TOP __UL(2 * 1024 * 1024)
-#define STACK_TOP_MAX STACK_TOP
+#define STACK_TOP_MAX __UL(0xc0000000)
/* userspace process size */
#ifdef CONFIG_MMU
diff --git a/include/asm-frv/pgtable.h b/include/asm-frv/pgtable.h
index 6c0682ed5fc..4e219046fe4 100644
--- a/include/asm-frv/pgtable.h
+++ b/include/asm-frv/pgtable.h
@@ -507,13 +507,22 @@ static inline int pte_file(pte_t pte)
*/
static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t pte)
{
+ struct mm_struct *mm;
unsigned long ampr;
- pgd_t *pge = pgd_offset(current->mm, address);
- pud_t *pue = pud_offset(pge, address);
- pmd_t *pme = pmd_offset(pue, address);
- ampr = pme->ste[0] & 0xffffff00;
- ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C | xAMPRx_V;
+ mm = current->mm;
+ if (mm) {
+ pgd_t *pge = pgd_offset(mm, address);
+ pud_t *pue = pud_offset(pge, address);
+ pmd_t *pme = pmd_offset(pue, address);
+
+ ampr = pme->ste[0] & 0xffffff00;
+ ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C |
+ xAMPRx_V;
+ } else {
+ address = ULONG_MAX;
+ ampr = 0;
+ }
asm volatile("movgs %0,scr0\n"
"movgs %0,scr1\n"
diff --git a/include/asm-frv/spr-regs.h b/include/asm-frv/spr-regs.h
index c2a541ef828..01e6af5e99b 100644
--- a/include/asm-frv/spr-regs.h
+++ b/include/asm-frv/spr-regs.h
@@ -99,9 +99,23 @@
#define TBR_TT_TRAP1 (0x81 << 4)
#define TBR_TT_TRAP2 (0x82 << 4)
#define TBR_TT_TRAP3 (0x83 << 4)
+#define TBR_TT_TRAP120 (0xf8 << 4)
+#define TBR_TT_TRAP121 (0xf9 << 4)
+#define TBR_TT_TRAP122 (0xfa << 4)
+#define TBR_TT_TRAP123 (0xfb << 4)
+#define TBR_TT_TRAP124 (0xfc << 4)
+#define TBR_TT_TRAP125 (0xfd << 4)
#define TBR_TT_TRAP126 (0xfe << 4)
#define TBR_TT_BREAK (0xff << 4)
+#define TBR_TT_ATOMIC_CMPXCHG32 TBR_TT_TRAP120
+#define TBR_TT_ATOMIC_XCHG32 TBR_TT_TRAP121
+#define TBR_TT_ATOMIC_XOR TBR_TT_TRAP122
+#define TBR_TT_ATOMIC_OR TBR_TT_TRAP123
+#define TBR_TT_ATOMIC_AND TBR_TT_TRAP124
+#define TBR_TT_ATOMIC_SUB TBR_TT_TRAP125
+#define TBR_TT_ATOMIC_ADD TBR_TT_TRAP126
+
#define __get_TBR() ({ unsigned long x; asm volatile("movsg tbr,%0" : "=r"(x)); x; })
/*
diff --git a/include/asm-frv/system.h b/include/asm-frv/system.h
index 2c57f473474..30a67a9da11 100644
--- a/include/asm-frv/system.h
+++ b/include/asm-frv/system.h
@@ -179,14 +179,23 @@ do { \
#define mb() asm volatile ("membar" : : :"memory")
#define rmb() asm volatile ("membar" : : :"memory")
#define wmb() asm volatile ("membar" : : :"memory")
-#define set_mb(var, value) do { var = value; mb(); } while (0)
+#define read_barrier_depends() barrier()
-#define smp_mb() mb()
-#define smp_rmb() rmb()
-#define smp_wmb() wmb()
-
-#define read_barrier_depends() do {} while(0)
+#ifdef CONFIG_SMP
+#define smp_mb() mb()
+#define smp_rmb() rmb()
+#define smp_wmb() wmb()
#define smp_read_barrier_depends() read_barrier_depends()
+#define set_mb(var, value) \
+ do { xchg(&var, (value)); } while (0)
+#else
+#define smp_mb() barrier()
+#define smp_rmb() barrier()
+#define smp_wmb() barrier()
+#define smp_read_barrier_depends() do {} while(0)
+#define set_mb(var, value) \
+ do { var = (value); barrier(); } while (0)
+#endif
#define HARD_RESET_NOW() \
do { \