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-rw-r--r--include/asm-mips/jmr3927/jmr3927.h9
-rw-r--r--include/asm-mips/jmr3927/tx3927.h4
-rw-r--r--include/asm-mips/jmr3927/txx927.h37
-rw-r--r--include/asm-mips/tx4927/tx4927_pci.h3
-rw-r--r--include/asm-mips/tx4938/tx4938.h1
-rw-r--r--include/asm-mips/txx9tmr.h67
6 files changed, 72 insertions, 49 deletions
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h
index b2dc35f5618..81602c8047e 100644
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ b/include/asm-mips/jmr3927/jmr3927.h
@@ -132,9 +132,7 @@
#define JMR3927_IRQ_IRC_DMA (JMR3927_IRQ_IRC + TX3927_IR_DMA)
#define JMR3927_IRQ_IRC_PIO (JMR3927_IRQ_IRC + TX3927_IR_PIO)
#define JMR3927_IRQ_IRC_PCI (JMR3927_IRQ_IRC + TX3927_IR_PCI)
-#define JMR3927_IRQ_IRC_TMR0 (JMR3927_IRQ_IRC + TX3927_IR_TMR0)
-#define JMR3927_IRQ_IRC_TMR1 (JMR3927_IRQ_IRC + TX3927_IR_TMR1)
-#define JMR3927_IRQ_IRC_TMR2 (JMR3927_IRQ_IRC + TX3927_IR_TMR2)
+#define JMR3927_IRQ_IRC_TMR(ch) (JMR3927_IRQ_IRC + TX3927_IR_TMR(ch))
#define JMR3927_IRQ_IOC_PCIA (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIA)
#define JMR3927_IRQ_IOC_PCIB (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIB)
#define JMR3927_IRQ_IOC_PCIC (JMR3927_IRQ_IOC + JMR3927_IOC_INTB_PCIC)
@@ -148,17 +146,12 @@
#define JMR3927_IRQ_IOCINT JMR3927_IRQ_IRC_INT1
/* TC35815 100M Ether (JMR-TX3912:JPW4:2-3 Short) */
#define JMR3927_IRQ_ETHER0 JMR3927_IRQ_IRC_INT3
-/* Clock Tick (10ms) */
-#define JMR3927_IRQ_TICK JMR3927_IRQ_IRC_TMR0
/* Clocks */
#define JMR3927_CORECLK 132710400 /* 132.7MHz */
#define JMR3927_GBUSCLK (JMR3927_CORECLK / 2) /* 66.35MHz */
#define JMR3927_IMCLK (JMR3927_CORECLK / 4) /* 33.17MHz */
-#define jmr3927_tmrptr tx3927_tmrptr(0) /* TMR0 */
-
-
/*
* TX3927 Pin Configuration:
*
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h
index 211bcf47fff..338f99882a3 100644
--- a/include/asm-mips/jmr3927/tx3927.h
+++ b/include/asm-mips/jmr3927/tx3927.h
@@ -222,9 +222,7 @@ struct tx3927_ccfg_reg {
#define TX3927_IR_DMA 8
#define TX3927_IR_PIO 9
#define TX3927_IR_PCI 10
-#define TX3927_IR_TMR0 13
-#define TX3927_IR_TMR1 14
-#define TX3927_IR_TMR2 15
+#define TX3927_IR_TMR(ch) (13 + (ch))
#define TX3927_NUM_IR 16
/*
diff --git a/include/asm-mips/jmr3927/txx927.h b/include/asm-mips/jmr3927/txx927.h
index 58a8ff6be81..0474fe8dac3 100644
--- a/include/asm-mips/jmr3927/txx927.h
+++ b/include/asm-mips/jmr3927/txx927.h
@@ -10,22 +10,6 @@
#ifndef __ASM_TXX927_H
#define __ASM_TXX927_H
-struct txx927_tmr_reg {
- volatile unsigned long tcr;
- volatile unsigned long tisr;
- volatile unsigned long cpra;
- volatile unsigned long cprb;
- volatile unsigned long itmr;
- volatile unsigned long unused0[3];
- volatile unsigned long ccdr;
- volatile unsigned long unused1[3];
- volatile unsigned long pgmr;
- volatile unsigned long unused2[3];
- volatile unsigned long wtmr;
- volatile unsigned long unused3[43];
- volatile unsigned long trr;
-};
-
struct txx927_sio_reg {
volatile unsigned long lcr;
volatile unsigned long dicr;
@@ -51,27 +35,6 @@ struct txx927_pio_reg {
};
/*
- * TMR
- */
-/* TMTCR : Timer Control */
-#define TXx927_TMTCR_TCE 0x00000080
-#define TXx927_TMTCR_CCDE 0x00000040
-#define TXx927_TMTCR_CRE 0x00000020
-#define TXx927_TMTCR_ECES 0x00000008
-#define TXx927_TMTCR_CCS 0x00000004
-#define TXx927_TMTCR_TMODE_MASK 0x00000003
-#define TXx927_TMTCR_TMODE_ITVL 0x00000000
-
-/* TMTISR : Timer Int. Status */
-#define TXx927_TMTISR_TPIBS 0x00000004
-#define TXx927_TMTISR_TPIAS 0x00000002
-#define TXx927_TMTISR_TIIS 0x00000001
-
-/* TMTITMR : Interval Timer Mode */
-#define TXx927_TMTITMR_TIIE 0x00008000
-#define TXx927_TMTITMR_TZCE 0x00000001
-
-/*
* SIO
*/
/* SILCR : Line Control */
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
index f98b2bb719d..3f1e470192e 100644
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ b/include/asm-mips/tx4927/tx4927_pci.h
@@ -9,6 +9,7 @@
#define __ASM_TX4927_TX4927_PCI_H
#define TX4927_CCFG_TOE 0x00004000
+#define TX4927_CCFG_TINTDIS 0x01000000
#define TX4927_PCIMEM 0x08000000
#define TX4927_PCIMEM_SIZE 0x08000000
@@ -20,6 +21,8 @@
#define TX4927_PCIC_REG 0xff1fd000
#define TX4927_CCFG_REG 0xff1fe000
#define TX4927_IRC_REG 0xff1ff600
+#define TX4927_NR_TMR 3
+#define TX4927_TMR_REG(ch) (0xff1ff000 + (ch) * 0x100)
#define TX4927_CE3 0x17f00000 /* 1M */
#define TX4927_PCIRESET_ADDR 0xbc00f006
#define TX4927_PCI_CLK_ADDR (KSEG1 + TX4927_CE3 + 0x00040020)
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/tx4938/tx4938.h
index 650b010761f..f7c448b9057 100644
--- a/include/asm-mips/tx4938/tx4938.h
+++ b/include/asm-mips/tx4938/tx4938.h
@@ -641,7 +641,6 @@ struct tx4938_ccfg_reg {
#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG)
#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG)
#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG)
-#define tx4938_tmrptr(ch) ((struct tx4938_tmr_reg *)TX4938_TMR_REG(ch))
#define tx4938_sioptr(ch) ((struct tx4938_sio_reg *)TX4938_SIO_REG(ch))
#define tx4938_pioptr ((struct tx4938_pio_reg *)TX4938_PIO_REG)
#define tx4938_aclcptr ((struct tx4938_aclc_reg *)TX4938_ACLC_REG)
diff --git a/include/asm-mips/txx9tmr.h b/include/asm-mips/txx9tmr.h
new file mode 100644
index 00000000000..67f70a8f09b
--- /dev/null
+++ b/include/asm-mips/txx9tmr.h
@@ -0,0 +1,67 @@
+/*
+ * include/asm-mips/txx9tmr.h
+ * TX39/TX49 timer controller definitions.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9TMR_H
+#define __ASM_TXX9TMR_H
+
+#include <linux/types.h>
+
+struct txx9_tmr_reg {
+ u32 tcr;
+ u32 tisr;
+ u32 cpra;
+ u32 cprb;
+ u32 itmr;
+ u32 unused0[3];
+ u32 ccdr;
+ u32 unused1[3];
+ u32 pgmr;
+ u32 unused2[3];
+ u32 wtmr;
+ u32 unused3[43];
+ u32 trr;
+};
+
+/* TMTCR : Timer Control */
+#define TXx9_TMTCR_TCE 0x00000080
+#define TXx9_TMTCR_CCDE 0x00000040
+#define TXx9_TMTCR_CRE 0x00000020
+#define TXx9_TMTCR_ECES 0x00000008
+#define TXx9_TMTCR_CCS 0x00000004
+#define TXx9_TMTCR_TMODE_MASK 0x00000003
+#define TXx9_TMTCR_TMODE_ITVL 0x00000000
+#define TXx9_TMTCR_TMODE_PGEN 0x00000001
+#define TXx9_TMTCR_TMODE_WDOG 0x00000002
+
+/* TMTISR : Timer Int. Status */
+#define TXx9_TMTISR_TPIBS 0x00000004
+#define TXx9_TMTISR_TPIAS 0x00000002
+#define TXx9_TMTISR_TIIS 0x00000001
+
+/* TMITMR : Interval Timer Mode */
+#define TXx9_TMITMR_TIIE 0x00008000
+#define TXx9_TMITMR_TZCE 0x00000001
+
+/* TMWTMR : Watchdog Timer Mode */
+#define TXx9_TMWTMR_TWIE 0x00008000
+#define TXx9_TMWTMR_WDIS 0x00000080
+#define TXx9_TMWTMR_TWC 0x00000001
+
+void txx9_clocksource_init(unsigned long baseaddr,
+ unsigned int imbusclk);
+void txx9_clockevent_init(unsigned long baseaddr, int irq,
+ unsigned int imbusclk);
+void txx9_tmr_init(unsigned long baseaddr);
+
+#ifdef CONFIG_CPU_TX39XX
+#define TXX9_TIMER_BITS 24
+#else
+#define TXX9_TIMER_BITS 32
+#endif
+
+#endif /* __ASM_TXX9TMR_H */
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-11-30 09:40:50 +0000