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-rw-r--r--include/asm-parisc/assembly.h2
-rw-r--r--include/asm-parisc/compat.h11
-rw-r--r--include/asm-parisc/pdc.h21
-rw-r--r--include/asm-parisc/pgtable.h8
-rw-r--r--include/asm-parisc/processor.h14
-rw-r--r--include/asm-parisc/system.h26
-rw-r--r--include/asm-parisc/uaccess.h9
-rw-r--r--include/asm-parisc/unistd.h5
8 files changed, 61 insertions, 35 deletions
diff --git a/include/asm-parisc/assembly.h b/include/asm-parisc/assembly.h
index 3ce3440d1b0..1a7bfe699e0 100644
--- a/include/asm-parisc/assembly.h
+++ b/include/asm-parisc/assembly.h
@@ -48,6 +48,7 @@
#define CALLEE_SAVE_FRAME_SIZE (CALLEE_REG_FRAME_SIZE + CALLEE_FLOAT_FRAME_SIZE)
#ifdef CONFIG_PA20
+#define LDCW ldcw,co
#define BL b,l
# ifdef CONFIG_64BIT
# define LEVEL 2.0w
@@ -55,6 +56,7 @@
# define LEVEL 2.0
# endif
#else
+#define LDCW ldcw
#define BL bl
#define LEVEL 1.1
#endif
diff --git a/include/asm-parisc/compat.h b/include/asm-parisc/compat.h
index 289624d8b2d..71b4eeea205 100644
--- a/include/asm-parisc/compat.h
+++ b/include/asm-parisc/compat.h
@@ -5,6 +5,7 @@
*/
#include <linux/types.h>
#include <linux/sched.h>
+#include <linux/personality.h>
#define COMPAT_USER_HZ 100
@@ -149,4 +150,14 @@ static __inline__ void __user *compat_alloc_user_space(long len)
return (void __user *)regs->gr[30];
}
+static inline int __is_compat_task(struct task_struct *t)
+{
+ return personality(t->personality) == PER_LINUX32;
+}
+
+static inline int is_compat_task(void)
+{
+ return __is_compat_task(current);
+}
+
#endif /* _ASM_PARISC_COMPAT_H */
diff --git a/include/asm-parisc/pdc.h b/include/asm-parisc/pdc.h
index 08364f957e7..c9b2e35326e 100644
--- a/include/asm-parisc/pdc.h
+++ b/include/asm-parisc/pdc.h
@@ -278,12 +278,11 @@ typedef struct {
/* constants for OS (NVM...) */
#define OS_ID_NONE 0 /* Undefined OS ID */
#define OS_ID_HPUX 1 /* HP-UX OS */
-#define OS_ID_LINUX OS_ID_HPUX /* just use the same value as hpux */
#define OS_ID_MPEXL 2 /* MPE XL OS */
#define OS_ID_OSF 3 /* OSF OS */
#define OS_ID_HPRT 4 /* HP-RT OS */
#define OS_ID_NOVEL 5 /* NOVELL OS */
-#define OS_ID_NT 6 /* NT OS */
+#define OS_ID_LINUX 6 /* Linux */
/* constants for PDC_CHASSIS */
@@ -352,8 +351,8 @@ struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
- cc_pad1 : 5, /* reserved */
- cc_assoc: 8; /* associativity of I/D-cache */
+ cc_pad1 : 10, /* reserved */
+ cc_hv : 3; /* hversion dependent */
};
struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
@@ -719,6 +718,7 @@ void setup_pdc(void); /* in inventory.c */
int pdc_add_valid(unsigned long address);
int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
int pdc_chassis_disp(unsigned long disp);
+int pdc_chassis_warn(unsigned long *warn);
int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
void *iodc_data, unsigned int iodc_data_size);
@@ -732,6 +732,7 @@ int pdc_model_cpuid(unsigned long *cpu_id);
int pdc_model_versions(unsigned long *versions, int id);
int pdc_model_capabilities(unsigned long *capabilities);
int pdc_cache_info(struct pdc_cache_info *cache);
+int pdc_spaceid_bits(unsigned long *space_bits);
#ifndef CONFIG_PA20
int pdc_btlb_info(struct pdc_btlb_info *btlb);
int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
@@ -775,6 +776,18 @@ int pdc_sti_call(unsigned long func, unsigned long flags,
extern void pdc_init(void);
+static inline char * os_id_to_string(u16 os_id) {
+ switch(os_id) {
+ case OS_ID_NONE: return "No OS";
+ case OS_ID_HPUX: return "HP-UX";
+ case OS_ID_MPEXL: return "MPE-iX";
+ case OS_ID_OSF: return "OSF";
+ case OS_ID_HPRT: return "HP-RT";
+ case OS_ID_NOVEL: return "Novell Netware";
+ case OS_ID_LINUX: return "Linux";
+ default: return "Unknown";
+ }
+}
#endif /* __ASSEMBLY__ */
#endif /* _PARISC_PDC_H */
diff --git a/include/asm-parisc/pgtable.h b/include/asm-parisc/pgtable.h
index b6bcc672ba8..5066c54dae0 100644
--- a/include/asm-parisc/pgtable.h
+++ b/include/asm-parisc/pgtable.h
@@ -506,13 +506,13 @@ static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
/* TLB page size encoding - see table 3-1 in parisc20.pdf */
#define _PAGE_SIZE_ENCODING_4K 0
-#define _PAGE_SIZE_ENCODING_16K 1
-#define _PAGE_SIZE_ENCODING_64K 2
+#define _PAGE_SIZE_ENCODING_16K 1
+#define _PAGE_SIZE_ENCODING_64K 2
#define _PAGE_SIZE_ENCODING_256K 3
#define _PAGE_SIZE_ENCODING_1M 4
#define _PAGE_SIZE_ENCODING_4M 5
-#define _PAGE_SIZE_ENCODING_16M 6
-#define _PAGE_SIZE_ENCODING_64M 7
+#define _PAGE_SIZE_ENCODING_16M 6
+#define _PAGE_SIZE_ENCODING_64M 7
#if defined(CONFIG_PARISC_PAGE_SIZE_4KB)
# define _PAGE_SIZE_ENCODING_DEFAULT _PAGE_SIZE_ENCODING_4K
diff --git a/include/asm-parisc/processor.h b/include/asm-parisc/processor.h
index ca49dc91f4f..b73626f040d 100644
--- a/include/asm-parisc/processor.h
+++ b/include/asm-parisc/processor.h
@@ -26,14 +26,12 @@
* Default implementation of macro that returns current
* instruction pointer ("program counter").
*/
-
-/* We cannot use MFIA as it was added for PA2.0 - prumpf
-
- At one point there were no "0f/0b" type local symbols in gas for
- PA-RISC. This is no longer true, but this still seems like the
- nicest way to implement this. */
-
-#define current_text_addr() ({ void *pc; __asm__("\n\tblr 0,%0\n\tnop":"=r" (pc)); pc; })
+#ifdef CONFIG_PA20
+#define current_ia(x) __asm__("mfia %0" : "=r"(x))
+#else /* mfia added in pa2.0 */
+#define current_ia(x) __asm__("blr 0,%0\n\tnop" : "=r"(x))
+#endif
+#define current_text_addr() ({ void *pc; current_ia(pc); pc; })
#define TASK_SIZE (current->thread.task_size)
#define TASK_UNMAPPED_BASE (current->thread.map_base)
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
index 863876134b2..5fe2d2329ab 100644
--- a/include/asm-parisc/system.h
+++ b/include/asm-parisc/system.h
@@ -155,13 +155,14 @@ static inline void set_eiem(unsigned long val)
type and dynamically select the 16-byte aligned int from the array
for the semaphore. */
-#define __PA_LDCW_ALIGNMENT 16
-#define __ldcw_align(a) ({ \
- unsigned long __ret = (unsigned long) &(a)->lock[0]; \
- __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) & ~(__PA_LDCW_ALIGNMENT - 1); \
- (volatile unsigned int *) __ret; \
+#define __PA_LDCW_ALIGNMENT 16
+#define __ldcw_align(a) ({ \
+ unsigned long __ret = (unsigned long) &(a)->lock[0]; \
+ __ret = (__ret + __PA_LDCW_ALIGNMENT - 1) \
+ & ~(__PA_LDCW_ALIGNMENT - 1); \
+ (volatile unsigned int *) __ret; \
})
-#define LDCW "ldcw"
+#define __LDCW "ldcw"
#else /*CONFIG_PA20*/
/* From: "Jim Hull" <jim.hull of hp.com>
@@ -171,17 +172,18 @@ static inline void set_eiem(unsigned long val)
they only require "natural" alignment (4-byte for ldcw, 8-byte for
ldcd). */
-#define __PA_LDCW_ALIGNMENT 4
+#define __PA_LDCW_ALIGNMENT 4
#define __ldcw_align(a) ((volatile unsigned int *)a)
-#define LDCW "ldcw,co"
+#define __LDCW "ldcw,co"
#endif /*!CONFIG_PA20*/
/* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */
-#define __ldcw(a) ({ \
- unsigned __ret; \
- __asm__ __volatile__(LDCW " 0(%1),%0" : "=r" (__ret) : "r" (a)); \
- __ret; \
+#define __ldcw(a) ({ \
+ unsigned __ret; \
+ __asm__ __volatile__(__LDCW " 0(%1),%0" \
+ : "=r" (__ret) : "r" (a)); \
+ __ret; \
})
#ifdef CONFIG_SMP
diff --git a/include/asm-parisc/uaccess.h b/include/asm-parisc/uaccess.h
index f6c417c8c48..d973e8b3466 100644
--- a/include/asm-parisc/uaccess.h
+++ b/include/asm-parisc/uaccess.h
@@ -172,7 +172,11 @@ struct exception_data {
/*
* The "__put_user/kernel_asm()" macros tell gcc they read from memory
* instead of writing. This is because they do not write to any memory
- * gcc knows about, so there are no aliasing issues.
+ * gcc knows about, so there are no aliasing issues. These macros must
+ * also be aware that "fixup_put_user_skip_[12]" are executed in the
+ * context of the fault, and any registers used there must be listed
+ * as clobbers. In this case only "r1" is used by the current routines.
+ * r8/r9 are already listed as err/val.
*/
#ifdef __LP64__
@@ -183,7 +187,8 @@ struct exception_data {
"\t.dword\t1b,fixup_put_user_skip_1\n" \
"\t.previous" \
: "=r"(__pu_err) \
- : "r"(ptr), "r"(x), "0"(__pu_err))
+ : "r"(ptr), "r"(x), "0"(__pu_err) \
+ : "r1")
#define __put_user_asm(stx,x,ptr) \
__asm__ __volatile__ ( \
diff --git a/include/asm-parisc/unistd.h b/include/asm-parisc/unistd.h
index 12b867238a4..27bcfad1c3e 100644
--- a/include/asm-parisc/unistd.h
+++ b/include/asm-parisc/unistd.h
@@ -797,11 +797,6 @@
#define SYS_ify(syscall_name) __NR_##syscall_name
-/* Assume all syscalls are done from PIC code just to be
- * safe. The worst case scenario is that you lose a register
- * and save/restore r19 across the syscall. */
-#define PIC
-
#ifndef ASM_LINE_SEP
# define ASM_LINE_SEP ;
#endif
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-11-25 06:17:32 +0000