summaryrefslogtreecommitdiffstats
path: root/include/asm-sh/hw_irq.h
diff options
context:
space:
mode:
Diffstat (limited to 'include/asm-sh/hw_irq.h')
-rw-r--r--include/asm-sh/hw_irq.h77
1 files changed, 74 insertions, 3 deletions
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index 4ca3f765bac..20d42959f52 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -1,6 +1,7 @@
#ifndef __ASM_SH_HW_IRQ_H
#define __ASM_SH_HW_IRQ_H
+#include <linux/init.h>
#include <asm/atomic.h>
extern atomic_t irq_err_count;
@@ -22,7 +23,6 @@ struct intc2_desc {
};
void register_intc2_controller(struct intc2_desc *);
-void init_IRQ_intc2(void);
struct ipr_data {
unsigned char irq;
@@ -40,11 +40,82 @@ struct ipr_desc {
};
void register_ipr_controller(struct ipr_desc *);
-void init_IRQ_ipr(void);
/*
* Enable individual interrupt mode for external IPR IRQs.
*/
-void ipr_irq_enable_irlm(void);
+void __init ipr_irq_enable_irlm(void);
+
+typedef unsigned char intc_enum;
+
+struct intc_vect {
+ intc_enum enum_id;
+ unsigned short vect;
+};
+
+#define INTC_VECT(enum_id, vect) { enum_id, vect }
+
+struct intc_prio {
+ intc_enum enum_id;
+ unsigned char priority;
+};
+
+#define INTC_PRIO(enum_id, prio) { enum_id, prio }
+
+struct intc_group {
+ intc_enum enum_id;
+ intc_enum *enum_ids;
+};
+
+#define INTC_GROUP(enum_id, ids...) { enum_id, (intc_enum []) { ids, 0 } }
+
+struct intc_mask_reg {
+ unsigned long set_reg, clr_reg, reg_width;
+ intc_enum enum_ids[32];
+};
+
+struct intc_prio_reg {
+ unsigned long reg, reg_width, field_width;
+ intc_enum enum_ids[16];
+};
+
+struct intc_sense_reg {
+ unsigned long reg, reg_width, field_width;
+ intc_enum enum_ids[16];
+};
+
+struct intc_desc {
+ struct intc_vect *vectors;
+ unsigned int nr_vectors;
+ struct intc_group *groups;
+ unsigned int nr_groups;
+ struct intc_prio *priorities;
+ unsigned int nr_priorities;
+ struct intc_mask_reg *mask_regs;
+ unsigned int nr_mask_regs;
+ struct intc_prio_reg *prio_regs;
+ unsigned int nr_prio_regs;
+ struct intc_sense_reg *sense_regs;
+ unsigned int nr_sense_regs;
+ struct irq_chip chip;
+};
+
+#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
+#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
+ priorities, mask_regs, prio_regs, sense_regs) \
+struct intc_desc symbol = { \
+ _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
+ _INTC_ARRAY(priorities), \
+ _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
+ _INTC_ARRAY(sense_regs), \
+ .chip.name = chipname, \
+}
+
+void __init register_intc_controller(struct intc_desc *desc);
+
+void __init plat_irq_setup(void);
+
+enum { IRQ_MODE_IRQ, IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };
+void __init plat_irq_setup_pins(int mode);
#endif /* __ASM_SH_HW_IRQ_H */