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-rw-r--r--include/asm-sparc64/cache.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/asm-sparc64/cache.h b/include/asm-sparc64/cache.h
new file mode 100644
index 00000000000..ade5ec3bfd5
--- /dev/null
+++ b/include/asm-sparc64/cache.h
@@ -0,0 +1,17 @@
+/*
+ * include/asm-sparc64/cache.h
+ */
+#ifndef __ARCH_SPARC64_CACHE_H
+#define __ARCH_SPARC64_CACHE_H
+
+/* bytes per L1 cache line */
+#define L1_CACHE_SHIFT 5
+#define L1_CACHE_BYTES 32 /* Two 16-byte sub-blocks per line. */
+
+#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES-1))&~(L1_CACHE_BYTES-1))
+#define L1_CACHE_SHIFT_MAX 5 /* largest L1 which this arch supports */
+
+#define SMP_CACHE_BYTES_SHIFT 6
+#define SMP_CACHE_BYTES (1 << SMP_CACHE_BYTES_SHIFT) /* L2 cache line size. */
+
+#endif