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-rw-r--r--include/asm-sparc64/backoff.h3
-rw-r--r--include/asm-sparc64/cpudata.h2
-rw-r--r--include/asm-sparc64/dcu.h41
-rw-r--r--include/asm-sparc64/hvtramp.h2
-rw-r--r--include/asm-sparc64/irq.h1
-rw-r--r--include/asm-sparc64/kvm.h6
-rw-r--r--include/asm-sparc64/pgtable.h12
-rw-r--r--include/asm-sparc64/processor.h3
-rw-r--r--include/asm-sparc64/spitfire.h2
-rw-r--r--include/asm-sparc64/stacktrace.h6
-rw-r--r--include/asm-sparc64/timer.h9
11 files changed, 56 insertions, 31 deletions
diff --git a/include/asm-sparc64/backoff.h b/include/asm-sparc64/backoff.h
index dadd6c385c6..fa1fdf67e35 100644
--- a/include/asm-sparc64/backoff.h
+++ b/include/asm-sparc64/backoff.h
@@ -12,7 +12,8 @@
mov reg, tmp; \
88: brnz,pt tmp, 88b; \
sub tmp, 1, tmp; \
- cmp reg, BACKOFF_LIMIT; \
+ set BACKOFF_LIMIT, tmp; \
+ cmp reg, tmp; \
bg,pn %xcc, label; \
nop; \
ba,pt %xcc, label; \
diff --git a/include/asm-sparc64/cpudata.h b/include/asm-sparc64/cpudata.h
index 542421460a1..532975ecfe1 100644
--- a/include/asm-sparc64/cpudata.h
+++ b/include/asm-sparc64/cpudata.h
@@ -86,6 +86,8 @@ extern struct trap_per_cpu trap_block[NR_CPUS];
extern void init_cur_cpu_trap(struct thread_info *);
extern void setup_tba(void);
extern int ncpus_probed;
+extern void __init cpu_probe(void);
+extern const struct seq_operations cpuinfo_op;
extern unsigned long real_hard_smp_processor_id(void);
diff --git a/include/asm-sparc64/dcu.h b/include/asm-sparc64/dcu.h
index ecbed2ae548..0f704e106a1 100644
--- a/include/asm-sparc64/dcu.h
+++ b/include/asm-sparc64/dcu.h
@@ -1,26 +1,27 @@
-/* $Id: dcu.h,v 1.2 2001/03/01 23:23:33 davem Exp $ */
#ifndef _SPARC64_DCU_H
#define _SPARC64_DCU_H
+#include <linux/const.h>
+
/* UltraSparc-III Data Cache Unit Control Register */
-#define DCU_CP 0x0002000000000000 /* Physical Cache Enable w/o mmu*/
-#define DCU_CV 0x0001000000000000 /* Virtual Cache Enable w/o mmu */
-#define DCU_ME 0x0000800000000000 /* NC-store Merging Enable */
-#define DCU_RE 0x0000400000000000 /* RAW bypass Enable */
-#define DCU_PE 0x0000200000000000 /* PCache Enable */
-#define DCU_HPE 0x0000100000000000 /* HW prefetch Enable */
-#define DCU_SPE 0x0000080000000000 /* SW prefetch Enable */
-#define DCU_SL 0x0000040000000000 /* Secondary load steering Enab */
-#define DCU_WE 0x0000020000000000 /* WCache enable */
-#define DCU_PM 0x000001fe00000000 /* PA Watchpoint Byte Mask */
-#define DCU_VM 0x00000001fe000000 /* VA Watchpoint Byte Mask */
-#define DCU_PR 0x0000000001000000 /* PA Watchpoint Read Enable */
-#define DCU_PW 0x0000000000800000 /* PA Watchpoint Write Enable */
-#define DCU_VR 0x0000000000400000 /* VA Watchpoint Read Enable */
-#define DCU_VW 0x0000000000200000 /* VA Watchpoint Write Enable */
-#define DCU_DM 0x0000000000000008 /* DMMU Enable */
-#define DCU_IM 0x0000000000000004 /* IMMU Enable */
-#define DCU_DC 0x0000000000000002 /* Data Cache Enable */
-#define DCU_IC 0x0000000000000001 /* Instruction Cache Enable */
+#define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
+#define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
+#define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */
+#define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */
+#define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */
+#define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */
+#define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */
+#define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
+#define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */
+#define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */
+#define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */
+#define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */
+#define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/
+#define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
+#define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
+#define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */
+#define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */
+#define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */
+#define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */
#endif /* _SPARC64_DCU_H */
diff --git a/include/asm-sparc64/hvtramp.h b/include/asm-sparc64/hvtramp.h
index c7dd6ad056d..b2b9b947b3a 100644
--- a/include/asm-sparc64/hvtramp.h
+++ b/include/asm-sparc64/hvtramp.h
@@ -16,7 +16,7 @@ struct hvtramp_descr {
__u64 fault_info_va;
__u64 fault_info_pa;
__u64 thread_reg;
- struct hvtramp_mapping maps[2];
+ struct hvtramp_mapping maps[1];
};
extern void hv_cpu_startup(unsigned long hvdescr_pa);
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index 30cb76b47be..0bb9bf53174 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -64,6 +64,7 @@ extern unsigned char virt_irq_alloc(unsigned int dev_handle,
extern void virt_irq_free(unsigned int virt_irq);
#endif
+extern void __init init_IRQ(void);
extern void fixup_irqs(void);
static inline void set_softint(unsigned long bits)
diff --git a/include/asm-sparc64/kvm.h b/include/asm-sparc64/kvm.h
new file mode 100644
index 00000000000..380537a77bf
--- /dev/null
+++ b/include/asm-sparc64/kvm.h
@@ -0,0 +1,6 @@
+#ifndef __LINUX_KVM_SPARC64_H
+#define __LINUX_KVM_SPARC64_H
+
+/* sparc64 does not support KVM */
+
+#endif
diff --git a/include/asm-sparc64/pgtable.h b/include/asm-sparc64/pgtable.h
index 3167ccff64f..549e45266b6 100644
--- a/include/asm-sparc64/pgtable.h
+++ b/include/asm-sparc64/pgtable.h
@@ -23,9 +23,9 @@
#include <asm/page.h>
#include <asm/processor.h>
-/* The kernel image occupies 0x4000000 to 0x1000000 (4MB --> 32MB).
- * The page copy blockops can use 0x2000000 to 0x4000000.
- * The TSB is mapped in the 0x4000000 to 0x6000000 range.
+/* The kernel image occupies 0x4000000 to 0x6000000 (4MB --> 96MB).
+ * The page copy blockops can use 0x6000000 to 0x8000000.
+ * The TSB is mapped in the 0x8000000 to 0xa000000 range.
* The PROM resides in an area spanning 0xf0000000 to 0x100000000.
* The vmalloc area spans 0x100000000 to 0x200000000.
* Since modules need to be in the lowest 32-bits of the address space,
@@ -33,8 +33,8 @@
* There is a single static kernel PMD which maps from 0x0 to address
* 0x400000000.
*/
-#define TLBTEMP_BASE _AC(0x0000000002000000,UL)
-#define TSBMAP_BASE _AC(0x0000000004000000,UL)
+#define TLBTEMP_BASE _AC(0x0000000006000000,UL)
+#define TSBMAP_BASE _AC(0x0000000008000000,UL)
#define MODULES_VADDR _AC(0x0000000010000000,UL)
#define MODULES_LEN _AC(0x00000000e0000000,UL)
#define MODULES_END _AC(0x00000000f0000000,UL)
@@ -761,6 +761,8 @@ extern unsigned long get_fb_unmapped_area(struct file *filp, unsigned long,
extern void pgtable_cache_init(void);
extern void sun4v_register_fault_status(void);
extern void sun4v_ktsb_register(void);
+extern void __init cheetah_ecache_flush_init(void);
+extern void sun4v_patch_tlb_handlers(void);
extern unsigned long cmdline_memory_size;
diff --git a/include/asm-sparc64/processor.h b/include/asm-sparc64/processor.h
index 8da484c1982..885b6a1dcae 100644
--- a/include/asm-sparc64/processor.h
+++ b/include/asm-sparc64/processor.h
@@ -37,6 +37,9 @@
#endif
#define TASK_SIZE ((unsigned long)-VPTE_SIZE)
+#define TASK_SIZE_OF(tsk) \
+ (test_tsk_thread_flag(tsk,TIF_32BIT) ? \
+ (1UL << 32UL) : TASK_SIZE)
#ifdef __KERNEL__
#define STACK_TOP32 ((1UL << 32UL) - PAGE_SIZE)
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index 63b7040e813..985ea7e3199 100644
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -63,6 +63,8 @@ extern void cheetah_enable_pcache(void);
SPITFIRE_HIGHEST_LOCKED_TLBENT : \
CHEETAH_HIGHEST_LOCKED_TLBENT)
+extern int num_kernel_image_mappings;
+
/* The data cache is write through, so this just invalidates the
* specified line.
*/
diff --git a/include/asm-sparc64/stacktrace.h b/include/asm-sparc64/stacktrace.h
new file mode 100644
index 00000000000..6cee39adf6d
--- /dev/null
+++ b/include/asm-sparc64/stacktrace.h
@@ -0,0 +1,6 @@
+#ifndef _SPARC64_STACKTRACE_H
+#define _SPARC64_STACKTRACE_H
+
+extern void stack_trace_flush(void);
+
+#endif /* _SPARC64_STACKTRACE_H */
diff --git a/include/asm-sparc64/timer.h b/include/asm-sparc64/timer.h
index ccbd6944886..5b779fd1f78 100644
--- a/include/asm-sparc64/timer.h
+++ b/include/asm-sparc64/timer.h
@@ -1,14 +1,13 @@
-/* $Id: timer.h,v 1.3 2000/05/09 17:40:15 davem Exp $
- * timer.h: System timer definitions for sun5.
+/* timer.h: System timer definitions for sun5.
*
- * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
+ * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
*/
#ifndef _SPARC64_TIMER_H
#define _SPARC64_TIMER_H
#include <linux/types.h>
-
+#include <linux/init.h>
struct sparc64_tick_ops {
unsigned long (*get_tick)(void);
@@ -25,5 +24,7 @@ struct sparc64_tick_ops {
extern struct sparc64_tick_ops *tick_ops;
extern unsigned long sparc64_get_clock_tick(unsigned int cpu);
+extern void __devinit setup_sparc64_timer(void);
+extern void __init time_init(void);
#endif /* _SPARC64_TIMER_H */
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-12-17 08:38:06 +0000