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-rw-r--r--include/linux/mfd/abx500/ab8500.h2
-rw-r--r--include/linux/mfd/arizona/registers.h6
-rw-r--r--include/linux/mfd/dbx500-prcmu.h2
-rw-r--r--include/linux/mfd/pm8xxx/rtc.h25
-rw-r--r--include/linux/mfd/samsung/core.h3
-rw-r--r--include/linux/mfd/samsung/s2mps14.h2
-rw-r--r--include/linux/mfd/samsung/s5m8767.h7
-rw-r--r--include/linux/mfd/syscon/imx6q-iomuxc-gpr.h18
8 files changed, 32 insertions, 33 deletions
diff --git a/include/linux/mfd/abx500/ab8500.h b/include/linux/mfd/abx500/ab8500.h
index a86ca1406fb..4e7fe7417fc 100644
--- a/include/linux/mfd/abx500/ab8500.h
+++ b/include/linux/mfd/abx500/ab8500.h
@@ -347,7 +347,6 @@ struct ab8500 {
struct mutex lock;
struct mutex irq_lock;
atomic_t transfer_ongoing;
- int irq_base;
int irq;
struct irq_domain *domain;
enum ab8500_version version;
@@ -378,7 +377,6 @@ struct ab8500_sysctrl_platform_data;
* @regulator: machine-specific constraints for regulators
*/
struct ab8500_platform_data {
- int irq_base;
void (*init) (struct ab8500 *);
struct ab8500_regulator_platform_data *regulator;
struct ab8500_codec_platform_data *codec;
diff --git a/include/linux/mfd/arizona/registers.h b/include/linux/mfd/arizona/registers.h
index 90d57aec34e..7b35c21170d 100644
--- a/include/linux/mfd/arizona/registers.h
+++ b/include/linux/mfd/arizona/registers.h
@@ -1786,9 +1786,9 @@
/*
* R373 (0x175) - FLL1 Control 5
*/
-#define ARIZONA_FLL1_FRATIO_MASK 0x0700 /* FLL1_FRATIO - [10:8] */
-#define ARIZONA_FLL1_FRATIO_SHIFT 8 /* FLL1_FRATIO - [10:8] */
-#define ARIZONA_FLL1_FRATIO_WIDTH 3 /* FLL1_FRATIO - [10:8] */
+#define ARIZONA_FLL1_FRATIO_MASK 0x0F00 /* FLL1_FRATIO - [11:8] */
+#define ARIZONA_FLL1_FRATIO_SHIFT 8 /* FLL1_FRATIO - [11:8] */
+#define ARIZONA_FLL1_FRATIO_WIDTH 4 /* FLL1_FRATIO - [11:8] */
#define ARIZONA_FLL1_OUTDIV_MASK 0x000E /* FLL1_OUTDIV - [3:1] */
#define ARIZONA_FLL1_OUTDIV_SHIFT 1 /* FLL1_OUTDIV - [3:1] */
#define ARIZONA_FLL1_OUTDIV_WIDTH 3 /* FLL1_OUTDIV - [3:1] */
diff --git a/include/linux/mfd/dbx500-prcmu.h b/include/linux/mfd/dbx500-prcmu.h
index 060e11256fb..bf5109d38a2 100644
--- a/include/linux/mfd/dbx500-prcmu.h
+++ b/include/linux/mfd/dbx500-prcmu.h
@@ -183,8 +183,6 @@ struct prcmu_pdata
bool enable_set_ddr_opp;
bool enable_ape_opp_100_voltage;
struct ab8500_platform_data *ab_platdata;
- int ab_irq;
- int irq_base;
u32 version_offset;
u32 legacy_offset;
u32 adt_offset;
diff --git a/include/linux/mfd/pm8xxx/rtc.h b/include/linux/mfd/pm8xxx/rtc.h
deleted file mode 100644
index 14f1983eaec..00000000000
--- a/include/linux/mfd/pm8xxx/rtc.h
+++ /dev/null
@@ -1,25 +0,0 @@
-/* Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 and
- * only version 2 as published by the Free Software Foundation.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __RTC_PM8XXX_H__
-#define __RTC_PM8XXX_H__
-
-#define PM8XXX_RTC_DEV_NAME "rtc-pm8xxx"
-/**
- * struct pm8xxx_rtc_pdata - RTC driver platform data
- * @rtc_write_enable: variable stating RTC write capability
- */
-struct pm8xxx_rtc_platform_data {
- bool rtc_write_enable;
-};
-
-#endif /* __RTC_PM8XXX_H__ */
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 900bc9e1888..157e32b6ca2 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -126,7 +126,8 @@ struct sec_platform_data {
struct sec_regulator_data {
int id;
struct regulator_init_data *initdata;
- struct device_node *reg_node;
+ struct device_node *reg_node;
+ int ext_control_gpio;
};
/*
diff --git a/include/linux/mfd/samsung/s2mps14.h b/include/linux/mfd/samsung/s2mps14.h
index ec1e0857ddd..4b449b8ac54 100644
--- a/include/linux/mfd/samsung/s2mps14.h
+++ b/include/linux/mfd/samsung/s2mps14.h
@@ -146,6 +146,8 @@ enum s2mps14_regulators {
#define S2MPS14_BUCK_VSEL_MASK 0xFF
#define S2MPS14_ENABLE_MASK (0x03 << S2MPS14_ENABLE_SHIFT)
#define S2MPS14_ENABLE_SHIFT 6
+/* On/Off controlled by PWREN */
+#define S2MPS14_ENABLE_SUSPEND (0x01 << S2MPS14_ENABLE_SHIFT)
#define S2MPS14_LDO_N_VOLTAGES (S2MPS14_LDO_VSEL_MASK + 1)
#define S2MPS14_BUCK_N_VOLTAGES (S2MPS14_BUCK_VSEL_MASK + 1)
diff --git a/include/linux/mfd/samsung/s5m8767.h b/include/linux/mfd/samsung/s5m8767.h
index 2ab0b0f0364..243b58fec33 100644
--- a/include/linux/mfd/samsung/s5m8767.h
+++ b/include/linux/mfd/samsung/s5m8767.h
@@ -183,10 +183,17 @@ enum s5m8767_regulators {
S5M8767_REG_MAX,
};
+/* LDO_EN/BUCK_EN field in registers */
#define S5M8767_ENCTRL_SHIFT 6
#define S5M8767_ENCTRL_MASK (0x3 << S5M8767_ENCTRL_SHIFT)
/*
+ * LDO_EN/BUCK_EN register value for controlling this Buck or LDO
+ * by GPIO (PWREN, BUCKEN).
+ */
+#define S5M8767_ENCTRL_USE_GPIO 0x1
+
+/*
* Values for BUCK_RAMP field in DVS_RAMP register, matching raw values
* in mV/us.
*/
diff --git a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
index 866e355fa40..ff44374a1a4 100644
--- a/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
+++ b/include/linux/mfd/syscon/imx6q-iomuxc-gpr.h
@@ -242,6 +242,24 @@
#define IMX6Q_GPR5_L2_CLK_STOP BIT(8)
+#define IMX6Q_GPR6_IPU1_ID00_WR_QOS_MASK (0xf << 0)
+#define IMX6Q_GPR6_IPU1_ID01_WR_QOS_MASK (0xf << 4)
+#define IMX6Q_GPR6_IPU1_ID10_WR_QOS_MASK (0xf << 8)
+#define IMX6Q_GPR6_IPU1_ID11_WR_QOS_MASK (0xf << 12)
+#define IMX6Q_GPR6_IPU1_ID00_RD_QOS_MASK (0xf << 16)
+#define IMX6Q_GPR6_IPU1_ID01_RD_QOS_MASK (0xf << 20)
+#define IMX6Q_GPR6_IPU1_ID10_RD_QOS_MASK (0xf << 24)
+#define IMX6Q_GPR6_IPU1_ID11_RD_QOS_MASK (0xf << 28)
+
+#define IMX6Q_GPR7_IPU2_ID00_WR_QOS_MASK (0xf << 0)
+#define IMX6Q_GPR7_IPU2_ID01_WR_QOS_MASK (0xf << 4)
+#define IMX6Q_GPR7_IPU2_ID10_WR_QOS_MASK (0xf << 8)
+#define IMX6Q_GPR7_IPU2_ID11_WR_QOS_MASK (0xf << 12)
+#define IMX6Q_GPR7_IPU2_ID00_RD_QOS_MASK (0xf << 16)
+#define IMX6Q_GPR7_IPU2_ID01_RD_QOS_MASK (0xf << 20)
+#define IMX6Q_GPR7_IPU2_ID10_RD_QOS_MASK (0xf << 24)
+#define IMX6Q_GPR7_IPU2_ID11_RD_QOS_MASK (0xf << 28)
+
#define IMX6Q_GPR8_TX_SWING_LOW (0x7f << 25)
#define IMX6Q_GPR8_TX_SWING_FULL (0x7f << 18)
#define IMX6Q_GPR8_TX_DEEMPH_GEN2_6DB (0x3f << 12)