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-rw-r--r--include/linux/platform_data/exynos_thermal.h (renamed from include/linux/platform_data/exynos4_tmu.h)47
-rw-r--r--include/linux/platform_data/mipi-csis.h30
2 files changed, 52 insertions, 25 deletions
diff --git a/include/linux/platform_data/exynos4_tmu.h b/include/linux/platform_data/exynos_thermal.h
index 39e038cca59..a7bdb2f63b7 100644
--- a/include/linux/platform_data/exynos4_tmu.h
+++ b/include/linux/platform_data/exynos_thermal.h
@@ -1,5 +1,5 @@
/*
- * exynos4_tmu.h - Samsung EXYNOS4 TMU (Thermal Management Unit)
+ * exynos_thermal.h - Samsung EXYNOS TMU (Thermal Management Unit)
*
* Copyright (C) 2011 Samsung Electronics
* Donggeun Kim <dg77.kim@samsung.com>
@@ -19,8 +19,9 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#ifndef _LINUX_EXYNOS4_TMU_H
-#define _LINUX_EXYNOS4_TMU_H
+#ifndef _LINUX_EXYNOS_THERMAL_H
+#define _LINUX_EXYNOS_THERMAL_H
+#include <linux/cpu_cooling.h>
enum calibration_type {
TYPE_ONE_POINT_TRIMMING,
@@ -28,8 +29,28 @@ enum calibration_type {
TYPE_NONE,
};
+enum soc_type {
+ SOC_ARCH_EXYNOS4210 = 1,
+ SOC_ARCH_EXYNOS,
+};
+/**
+ * struct freq_clip_table
+ * @freq_clip_max: maximum frequency allowed for this cooling state.
+ * @temp_level: Temperature level at which the temperature clipping will
+ * happen.
+ * @mask_val: cpumask of the allowed cpu's where the clipping will take place.
+ *
+ * This structure is required to be filled and passed to the
+ * cpufreq_cooling_unregister function.
+ */
+struct freq_clip_table {
+ unsigned int freq_clip_max;
+ unsigned int temp_level;
+ const struct cpumask *mask_val;
+};
+
/**
- * struct exynos4_tmu_platform_data
+ * struct exynos_tmu_platform_data
* @threshold: basic temperature for generating interrupt
* 25 <= threshold <= 125 [unit: degree Celsius]
* @trigger_levels: array for each interrupt levels
@@ -63,11 +84,18 @@ enum calibration_type {
* @reference_voltage: reference voltage of amplifier
* in the positive-TC generator block
* 0 <= reference_voltage <= 31
+ * @noise_cancel_mode: noise cancellation mode
+ * 000, 100, 101, 110 and 111 can be different modes
+ * @type: determines the type of SOC
+ * @efuse_value: platform defined fuse value
* @cal_type: calibration type for temperature
+ * @freq_clip_table: Table representing frequency reduction percentage.
+ * @freq_tab_count: Count of the above table as frequency reduction may
+ * applicable to only some of the trigger levels.
*
- * This structure is required for configuration of exynos4_tmu driver.
+ * This structure is required for configuration of exynos_tmu driver.
*/
-struct exynos4_tmu_platform_data {
+struct exynos_tmu_platform_data {
u8 threshold;
u8 trigger_levels[4];
bool trigger_level0_en;
@@ -77,7 +105,12 @@ struct exynos4_tmu_platform_data {
u8 gain;
u8 reference_voltage;
+ u8 noise_cancel_mode;
+ u32 efuse_value;
enum calibration_type cal_type;
+ enum soc_type type;
+ struct freq_clip_table freq_tab[4];
+ unsigned int freq_tab_count;
};
-#endif /* _LINUX_EXYNOS4_TMU_H */
+#endif /* _LINUX_EXYNOS_THERMAL_H */
diff --git a/include/linux/platform_data/mipi-csis.h b/include/linux/platform_data/mipi-csis.h
index c45b1e8d4c2..bf34e17cee7 100644
--- a/include/linux/platform_data/mipi-csis.h
+++ b/include/linux/platform_data/mipi-csis.h
@@ -1,7 +1,7 @@
/*
- * Copyright (C) 2010-2011 Samsung Electronics Co., Ltd.
+ * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
*
- * S5P series MIPI CSI slave device support
+ * Samsung S5P/Exynos SoC series MIPI CSIS device support
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -11,33 +11,27 @@
#ifndef __PLAT_SAMSUNG_MIPI_CSIS_H_
#define __PLAT_SAMSUNG_MIPI_CSIS_H_ __FILE__
-struct platform_device;
-
/**
* struct s5p_platform_mipi_csis - platform data for S5P MIPI-CSIS driver
- * @clk_rate: bus clock frequency
- * @lanes: number of data lanes used
- * @alignment: data alignment in bits
- * @hs_settle: HS-RX settle time
- * @fixed_phy_vdd: false to enable external D-PHY regulator management in the
- * driver or true in case this regulator has no enable function
- * @phy_enable: pointer to a callback controlling D-PHY enable/reset
+ * @clk_rate: bus clock frequency
+ * @wclk_source: CSI wrapper clock selection: 0 - bus clock, 1 - ext. SCLK_CAM
+ * @lanes: number of data lanes used
+ * @hs_settle: HS-RX settle time
*/
struct s5p_platform_mipi_csis {
unsigned long clk_rate;
+ u8 wclk_source;
u8 lanes;
- u8 alignment;
u8 hs_settle;
- bool fixed_phy_vdd;
- int (*phy_enable)(struct platform_device *pdev, bool on);
};
/**
* s5p_csis_phy_enable - global MIPI-CSI receiver D-PHY control
- * @pdev: MIPI-CSIS platform device
- * @on: true to enable D-PHY and deassert its reset
- * false to disable D-PHY
+ * @id: MIPI-CSIS harware instance index (0...1)
+ * @on: true to enable D-PHY and deassert its reset
+ * false to disable D-PHY
+ * @return: 0 on success, or negative error code on failure
*/
-int s5p_csis_phy_enable(struct platform_device *pdev, bool on);
+int s5p_csis_phy_enable(int id, bool on);
#endif /* __PLAT_SAMSUNG_MIPI_CSIS_H_ */