diff options
Diffstat (limited to 'include/linux/ssb/ssb.h')
| -rw-r--r-- | include/linux/ssb/ssb.h | 97 |
1 files changed, 34 insertions, 63 deletions
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h index 2b5c312c496..e18f5c23b93 100644 --- a/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h @@ -15,22 +15,19 @@ struct pcmcia_device; struct ssb_bus; struct ssb_driver; - -struct ssb_sprom_r1 { - u16 pci_spid; /* Subsystem Product ID for PCI */ - u16 pci_svid; /* Subsystem Vendor ID for PCI */ - u16 pci_pid; /* Product ID for PCI */ +struct ssb_sprom { + u8 revision; u8 il0mac[6]; /* MAC address for 802.11b/g */ u8 et0mac[6]; /* MAC address for Ethernet */ u8 et1mac[6]; /* MAC address for 802.11a */ - u8 et0phyaddr:5; /* MII address for enet0 */ - u8 et1phyaddr:5; /* MII address for enet1 */ - u8 et0mdcport:1; /* MDIO for enet0 */ - u8 et1mdcport:1; /* MDIO for enet1 */ - u8 board_rev; /* Board revision */ - u8 country_code:4; /* Country Code */ - u8 antenna_a:2; /* Antenna 0/1 available for A-PHY */ - u8 antenna_bg:2; /* Antenna 0/1 available for B-PHY and G-PHY */ + u8 et0phyaddr; /* MII address for enet0 */ + u8 et1phyaddr; /* MII address for enet1 */ + u8 et0mdcport; /* MDIO for enet0 */ + u8 et1mdcport; /* MDIO for enet1 */ + u8 board_rev; /* Board revision number from SPROM. */ + u8 country_code; /* Country Code */ + u8 ant_available_a; /* A-PHY antenna available bits (up to 4) */ + u8 ant_available_bg; /* B/G-PHY antenna available bits (up to 4) */ u16 pa0b0; u16 pa0b1; u16 pa0b2; @@ -41,61 +38,26 @@ struct ssb_sprom_r1 { u8 gpio1; /* GPIO pin 1 */ u8 gpio2; /* GPIO pin 2 */ u8 gpio3; /* GPIO pin 3 */ - u16 maxpwr_a; /* A-PHY Power Amplifier Max Power (in dBm Q5.2) */ - u16 maxpwr_bg; /* B/G-PHY Power Amplifier Max Power (in dBm Q5.2) */ + u16 maxpwr_a; /* A-PHY Amplifier Max Power (in dBm Q5.2) */ + u16 maxpwr_bg; /* B/G-PHY Amplifier Max Power (in dBm Q5.2) */ u8 itssi_a; /* Idle TSSI Target for A-PHY */ u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */ u16 boardflags_lo; /* Boardflags (low 16 bits) */ - u8 antenna_gain_a; /* A-PHY Antenna gain (in dBm Q5.2) */ - u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */ - u8 oem[8]; /* OEM string (rev 1 only) */ -}; - -struct ssb_sprom_r2 { u16 boardflags_hi; /* Boardflags (high 16 bits) */ - u8 maxpwr_a_lo; /* A-PHY Max Power Low */ - u8 maxpwr_a_hi; /* A-PHY Max Power High */ - u16 pa1lob0; /* A-PHY PA Low Settings */ - u16 pa1lob1; /* A-PHY PA Low Settings */ - u16 pa1lob2; /* A-PHY PA Low Settings */ - u16 pa1hib0; /* A-PHY PA High Settings */ - u16 pa1hib1; /* A-PHY PA High Settings */ - u16 pa1hib2; /* A-PHY PA High Settings */ - u8 ofdm_pwr_off; /* OFDM Power Offset from CCK Level */ - u8 country_str[2]; /* Two char Country Code */ -}; - -struct ssb_sprom_r3 { - u32 ofdmapo; /* A-PHY OFDM Mid Power Offset */ - u32 ofdmalpo; /* A-PHY OFDM Low Power Offset */ - u32 ofdmahpo; /* A-PHY OFDM High Power Offset */ - u8 gpioldc_on_cnt; /* GPIO LED Powersave Duty Cycle ON count */ - u8 gpioldc_off_cnt; /* GPIO LED Powersave Duty Cycle OFF count */ - u8 cckpo_1M:4; /* CCK Power Offset for Rate 1M */ - u8 cckpo_2M:4; /* CCK Power Offset for Rate 2M */ - u8 cckpo_55M:4; /* CCK Power Offset for Rate 5.5M */ - u8 cckpo_11M:4; /* CCK Power Offset for Rate 11M */ - u32 ofdmgpo; /* G-PHY OFDM Power Offset */ -}; - -struct ssb_sprom_r4 { - /* TODO */ -}; -struct ssb_sprom { - u8 revision; - u8 crc; - /* The valid r# fields are selected by the "revision". - * Revision 3 and lower inherit from lower revisions. - */ - union { + /* Antenna gain values for up to 4 antennas + * on each band. Values in dBm/4 (Q5.2). Negative gain means the + * loss in the connectors is bigger than the gain. */ + struct { struct { - struct ssb_sprom_r1 r1; - struct ssb_sprom_r2 r2; - struct ssb_sprom_r3 r3; - }; - struct ssb_sprom_r4 r4; - }; + s8 a0, a1, a2, a3; + } ghz24; /* 2.4GHz band */ + struct { + s8 a0, a1, a2, a3; + } ghz5; /* 5GHz band */ + } antenna_gain; + + /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */ }; /* Information about the PCB the circuitry is soldered on. */ @@ -270,7 +232,8 @@ struct ssb_bus { struct ssb_device *mapped_device; /* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */ u8 mapped_pcmcia_seg; - /* Lock for core and segment switching. */ + /* Lock for core and segment switching. + * On PCMCIA-host busses this is used to protect the whole MMIO access. */ spinlock_t bar_lock; /* The bus this backplane is running on. */ @@ -288,6 +251,7 @@ struct ssb_bus { /* ID information about the Chip. */ u16 chip_id; u16 chip_rev; + u16 sprom_size; /* number of words in sprom */ u8 chip_package; /* List of devices (cores) on the backplane. */ @@ -402,6 +366,13 @@ static inline void ssb_pcihost_unregister(struct pci_driver *driver) { pci_unregister_driver(driver); } + +static inline +void ssb_pcihost_set_power_state(struct ssb_device *sdev, pci_power_t state) +{ + if (sdev->bus->bustype == SSB_BUSTYPE_PCI) + pci_set_power_state(sdev->bus->host_pci, state); +} #endif /* CONFIG_SSB_PCIHOST */ |