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-rw-r--r--include/acpi/acpi_bus.h10
-rw-r--r--include/acpi/acpi_drivers.h4
-rw-r--r--include/acpi/acpixf.h2
-rw-r--r--include/acpi/acstruct.h2
-rw-r--r--include/acpi/processor.h2
-rw-r--r--include/asm-arm/arch-at91/irqs.h3
-rw-r--r--include/asm-arm/arch-omap/irda.h1
-rw-r--r--include/asm-arm/cacheflush.h7
-rw-r--r--include/asm-arm/plat-s3c/map.h12
-rw-r--r--include/asm-blackfin/mach-bf533/bfin_serial_5xx.h11
-rw-r--r--include/asm-blackfin/mach-bf537/bfin_serial_5xx.h23
-rw-r--r--include/asm-blackfin/mach-bf537/portmux.h35
-rw-r--r--include/asm-blackfin/mach-bf561/bfin_serial_5xx.h11
-rw-r--r--include/asm-blackfin/mach-bf561/cdefBF561.h4
-rw-r--r--include/asm-blackfin/portmux.h55
-rw-r--r--include/asm-blackfin/string.h129
-rw-r--r--include/asm-blackfin/unistd.h56
-rw-r--r--include/asm-generic/termios.h2
-rw-r--r--include/asm-h8300/flat.h3
-rw-r--r--include/asm-i386/io.h3
-rw-r--r--include/asm-i386/io_apic.h1
-rw-r--r--include/asm-i386/system.h5
-rw-r--r--include/asm-ia64/hpsim.h16
-rw-r--r--include/asm-ia64/sn/arch.h1
-rw-r--r--include/asm-ia64/sn/intr.h1
-rw-r--r--include/asm-ia64/sn/sn_feature_sets.h1
-rw-r--r--include/asm-m32r/assembler.h16
-rw-r--r--include/asm-m32r/flat.h3
-rw-r--r--include/asm-m32r/m32r.h20
-rw-r--r--include/asm-m68k/unistd.h12
-rw-r--r--include/asm-m68knommu/flat.h3
-rw-r--r--include/asm-m68knommu/pgtable.h2
-rw-r--r--include/asm-m68knommu/unistd.h12
-rw-r--r--include/asm-mips/bcache.h1
-rw-r--r--include/asm-mips/cmpxchg.h107
-rw-r--r--include/asm-mips/compiler.h4
-rw-r--r--include/asm-mips/edac.h17
-rw-r--r--include/asm-mips/fcntl.h1
-rw-r--r--include/asm-mips/gt64240.h1235
-rw-r--r--include/asm-mips/hazards.h1
-rw-r--r--include/asm-mips/ioctls.h4
-rw-r--r--include/asm-mips/irq.h32
-rw-r--r--include/asm-mips/jmr3927/jmr3927.h3
-rw-r--r--include/asm-mips/jmr3927/tx3927.h36
-rw-r--r--include/asm-mips/local.h69
-rw-r--r--include/asm-mips/mach-generic/ide.h83
-rw-r--r--include/asm-mips/mach-ocelot/mach-gt64120.h30
-rw-r--r--include/asm-mips/marvell.h59
-rw-r--r--include/asm-mips/page.h2
-rw-r--r--include/asm-mips/pgtable-32.h16
-rw-r--r--include/asm-mips/pgtable.h12
-rw-r--r--include/asm-mips/sibyte/bcm1480_regs.h5
-rw-r--r--include/asm-mips/smtc.h10
-rw-r--r--include/asm-mips/stacktrace.h6
-rw-r--r--include/asm-mips/system.h261
-rw-r--r--include/asm-mips/termbits.h7
-rw-r--r--include/asm-mips/termios.h6
-rw-r--r--include/asm-mips/tx4927/toshiba_rbtx4927.h2
-rw-r--r--include/asm-mips/tx4927/tx4927.h49
-rw-r--r--include/asm-mips/tx4927/tx4927_pci.h23
-rw-r--r--include/asm-mips/tx4938/rbtx4938.h25
-rw-r--r--include/asm-mips/tx4938/tx4938.h41
-rw-r--r--include/asm-mips/txx9irq.h30
-rw-r--r--include/asm-parisc/io.h10
-rw-r--r--include/asm-parisc/vga.h6
-rw-r--r--include/asm-powerpc/spu.h2
-rw-r--r--include/asm-powerpc/time.h5
-rw-r--r--include/asm-sh/flat.h3
-rw-r--r--include/asm-sparc/tlbflush.h6
-rw-r--r--include/asm-sparc64/device.h2
-rw-r--r--include/asm-sparc64/irq.h25
-rw-r--r--include/asm-sparc64/oplib.h4
-rw-r--r--include/asm-um/common.lds.S124
-rw-r--r--include/asm-um/elf-x86_64.h40
-rw-r--r--include/asm-v850/flat.h4
-rw-r--r--include/asm-x86_64/io_apic.h6
-rw-r--r--include/asm-x86_64/pgalloc.h73
-rw-r--r--include/asm-x86_64/pgtable.h1
-rw-r--r--include/asm-x86_64/processor.h2
-rw-r--r--include/asm-xtensa/bugs.h6
-rw-r--r--include/asm-xtensa/cache.h9
-rw-r--r--include/asm-xtensa/cacheflush.h81
-rw-r--r--include/asm-xtensa/elf.h50
-rw-r--r--include/asm-xtensa/io.h1
-rw-r--r--include/asm-xtensa/ioctls.h4
-rw-r--r--include/asm-xtensa/page.h106
-rw-r--r--include/asm-xtensa/pgalloc.h107
-rw-r--r--include/asm-xtensa/pgtable.h235
-rw-r--r--include/asm-xtensa/processor.h2
-rw-r--r--include/asm-xtensa/syscall.h24
-rw-r--r--include/asm-xtensa/termbits.h5
-rw-r--r--include/asm-xtensa/termios.h6
-rw-r--r--include/asm-xtensa/timex.h4
-rw-r--r--include/asm-xtensa/tlb.h30
-rw-r--r--include/asm-xtensa/types.h9
-rw-r--r--include/asm-xtensa/unistd.h128
-rw-r--r--include/linux/Kbuild1
-rw-r--r--include/linux/aer.h25
-rw-r--r--include/linux/ata.h13
-rw-r--r--include/linux/audit.h4
-rw-r--r--include/linux/cpu.h6
-rw-r--r--include/linux/cpufreq.h19
-rw-r--r--include/linux/hugetlb.h10
-rw-r--r--include/linux/ide.h13
-rw-r--r--include/linux/if_pppol2tp.h4
-rw-r--r--include/linux/init_task.h2
-rw-r--r--include/linux/input.h8
-rw-r--r--include/linux/isa.h11
-rw-r--r--include/linux/kernel.h1
-rw-r--r--include/linux/keyboard.h4
-rw-r--r--include/linux/leds.h1
-rw-r--r--include/linux/libata.h1
-rw-r--r--include/linux/mempolicy.h4
-rw-r--r--include/linux/netfilter.h5
-rw-r--r--include/linux/nfs_fs.h1
-rw-r--r--include/linux/pci.h4
-rw-r--r--include/linux/pci_ids.h10
-rw-r--r--include/linux/pmu.h2
-rw-r--r--include/linux/poll.h2
-rw-r--r--include/linux/rtnetlink.h2
-rw-r--r--include/linux/sched.h17
-rw-r--r--include/linux/signalfd.h40
-rw-r--r--include/linux/skbuff.h40
-rw-r--r--include/linux/slub_def.h8
-rw-r--r--include/linux/user_namespace.h2
-rw-r--r--include/linux/writeback.h2
-rw-r--r--include/media/v4l2-dev.h5
-rw-r--r--include/net/rose.h2
-rw-r--r--include/net/sctp/sctp.h1
-rw-r--r--include/net/sctp/sm.h6
-rw-r--r--include/net/sctp/structs.h15
-rw-r--r--include/net/sctp/ulpqueue.h1
-rw-r--r--include/net/tcp.h6
-rw-r--r--include/scsi/libiscsi.h7
134 files changed, 1558 insertions, 2512 deletions
diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h
index 3d0fea235bf..86aea44ce6d 100644
--- a/include/acpi/acpi_bus.h
+++ b/include/acpi/acpi_bus.h
@@ -321,8 +321,7 @@ struct acpi_bus_event {
};
extern struct kset acpi_subsys;
-extern int acpi_bus_generate_genetlink_event(struct acpi_device *device,
- u8 type, int data);
+extern int acpi_bus_generate_netlink_event(const char*, const char*, u8, int);
/*
* External Functions
*/
@@ -332,8 +331,13 @@ void acpi_bus_data_handler(acpi_handle handle, u32 function, void *context);
int acpi_bus_get_status(struct acpi_device *device);
int acpi_bus_get_power(acpi_handle handle, int *state);
int acpi_bus_set_power(acpi_handle handle, int state);
-int acpi_bus_generate_event(struct acpi_device *device, u8 type, int data);
+#ifdef CONFIG_ACPI_PROC_EVENT
+int acpi_bus_generate_proc_event(struct acpi_device *device, u8 type, int data);
int acpi_bus_receive_event(struct acpi_bus_event *event);
+#else
+static inline int acpi_bus_generate_proc_event(struct acpi_device *device, u8 type, int data)
+ { return 0; }
+#endif
int acpi_bus_register_driver(struct acpi_driver *driver);
void acpi_bus_unregister_driver(struct acpi_driver *driver);
int acpi_bus_add(struct acpi_device **child, struct acpi_device *parent,
diff --git a/include/acpi/acpi_drivers.h b/include/acpi/acpi_drivers.h
index 202acb9ff4d..f85f77a538a 100644
--- a/include/acpi/acpi_drivers.h
+++ b/include/acpi/acpi_drivers.h
@@ -147,10 +147,6 @@ static inline void unregister_hotplug_dock_device(acpi_handle handle)
/*--------------------------------------------------------------------------
Suspend/Resume
-------------------------------------------------------------------------- */
-#ifdef CONFIG_ACPI_SLEEP
extern int acpi_sleep_init(void);
-#else
-static inline int acpi_sleep_init(void) { return 0; }
-#endif
#endif /*__ACPI_DRIVERS_H__*/
diff --git a/include/acpi/acpixf.h b/include/acpi/acpixf.h
index b5cca5daa34..3d7ab9e0c9f 100644
--- a/include/acpi/acpixf.h
+++ b/include/acpi/acpixf.h
@@ -130,7 +130,7 @@ acpi_walk_namespace(acpi_object_type type,
void *context, void **return_value);
acpi_status
-acpi_get_devices(char *HID,
+acpi_get_devices(const char *HID,
acpi_walk_callback user_function,
void *context, void **return_value);
diff --git a/include/acpi/acstruct.h b/include/acpi/acstruct.h
index aeb4498e5e0..88482655407 100644
--- a/include/acpi/acstruct.h
+++ b/include/acpi/acstruct.h
@@ -146,7 +146,7 @@ struct acpi_init_walk_info {
struct acpi_get_devices_info {
acpi_walk_callback user_function;
void *context;
- char *hid;
+ const char *hid;
};
union acpi_aml_operands {
diff --git a/include/acpi/processor.h b/include/acpi/processor.h
index ec3ffdadb4d..99934a999e6 100644
--- a/include/acpi/processor.h
+++ b/include/acpi/processor.h
@@ -320,6 +320,8 @@ int acpi_processor_power_init(struct acpi_processor *pr,
int acpi_processor_cst_has_changed(struct acpi_processor *pr);
int acpi_processor_power_exit(struct acpi_processor *pr,
struct acpi_device *device);
+int acpi_processor_suspend(struct acpi_device * device, pm_message_t state);
+int acpi_processor_resume(struct acpi_device * device);
/* in processor_thermal.c */
int acpi_processor_get_limit_info(struct acpi_processor *pr);
diff --git a/include/asm-arm/arch-at91/irqs.h b/include/asm-arm/arch-at91/irqs.h
index 1127a3b5e92..70b1216dce5 100644
--- a/include/asm-arm/arch-at91/irqs.h
+++ b/include/asm-arm/arch-at91/irqs.h
@@ -42,4 +42,7 @@
*/
#define NR_IRQS (NR_AIC_IRQS + (5 * 32))
+/* FIQ is AIC source 0. */
+#define FIQ_START AT91_ID_FIQ
+
#endif
diff --git a/include/asm-arm/arch-omap/irda.h b/include/asm-arm/arch-omap/irda.h
index 345a649ec83..96bb12fab43 100644
--- a/include/asm-arm/arch-omap/irda.h
+++ b/include/asm-arm/arch-omap/irda.h
@@ -31,6 +31,7 @@ struct omap_irda_config {
unsigned long src_start;
int tx_trigger;
int rx_trigger;
+ int mode;
};
#endif
diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h
index d1294a46c70..6c1c968b298 100644
--- a/include/asm-arm/cacheflush.h
+++ b/include/asm-arm/cacheflush.h
@@ -426,6 +426,13 @@ static inline void flush_anon_page(struct vm_area_struct *vma,
*/
#define flush_icache_page(vma,page) do { } while (0)
+static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt,
+ unsigned offset, size_t size)
+{
+ const void *start = (void __force *)virt + offset;
+ dmac_inv_range(start, start + size);
+}
+
#define __cacheid_present(val) (val != read_cpuid(CPUID_ID))
#define __cacheid_type_v7(val) ((val & (7 << 29)) == (4 << 29))
diff --git a/include/asm-arm/plat-s3c/map.h b/include/asm-arm/plat-s3c/map.h
index 95a82b0e84a..b84289d32a5 100644
--- a/include/asm-arm/plat-s3c/map.h
+++ b/include/asm-arm/plat-s3c/map.h
@@ -30,11 +30,11 @@
#define S3C_ADDR(x) (S3C_ADDR_BASE + (x))
#endif
-#define S3C_VA_IRQ S3C_ADDR(0x000000000) /* irq controller(s) */
-#define S3C_VA_SYS S3C_ADDR(0x001000000) /* system control */
-#define S3C_VA_MEM S3C_ADDR(0x002000000) /* system control */
-#define S3C_VA_TIMER S3C_ADDR(0x003000000) /* timer block */
-#define S3C_VA_WATCHDOG S3C_ADDR(0x004000000) /* watchdog */
-#define S3C_VA_UART S3C_ADDR(0x010000000) /* UART */
+#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */
+#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */
+#define S3C_VA_MEM S3C_ADDR(0x00200000) /* system control */
+#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */
+#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */
+#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */
#endif /* __ASM_PLAT_MAP_H */
diff --git a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
index e043cafa3c4..69b9f8e120e 100644
--- a/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf533/bfin_serial_5xx.h
@@ -1,5 +1,6 @@
#include <linux/serial.h>
#include <asm/dma.h>
+#include <asm/portmux.h>
#define NR_PORTS 1
@@ -92,18 +93,24 @@ struct bfin_serial_res bfin_serial_resource[] = {
}
};
+#define DRIVER_NAME "bfin-uart"
int nr_ports = NR_PORTS;
static void bfin_serial_hw_init(struct bfin_serial_port *uart)
{
+#ifdef CONFIG_SERIAL_BFIN_UART0
+ peripheral_request(P_UART0_TX, DRIVER_NAME);
+ peripheral_request(P_UART0_RX, DRIVER_NAME);
+#endif
+
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
if (uart->cts_pin >= 0) {
- gpio_request(uart->cts_pin, NULL);
+ gpio_request(uart->cts_pin, DRIVER_NAME);
gpio_direction_input(uart->cts_pin);
}
if (uart->rts_pin >= 0) {
- gpio_request(uart->rts_pin, NULL);
+ gpio_request(uart->rts_pin, DRIVER_NAME);
gpio_direction_input(uart->rts_pin);
}
#endif
diff --git a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
index 8f5d9c4d8d5..6fb328f5186 100644
--- a/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf537/bfin_serial_5xx.h
@@ -1,5 +1,6 @@
#include <linux/serial.h>
#include <asm/dma.h>
+#include <asm/portmux.h>
#define NR_PORTS 2
@@ -122,25 +123,29 @@ struct bfin_serial_res bfin_serial_resource[] = {
int nr_ports = ARRAY_SIZE(bfin_serial_resource);
+#define DRIVER_NAME "bfin-uart"
+
static void bfin_serial_hw_init(struct bfin_serial_port *uart)
{
- unsigned short val;
- val = bfin_read16(BFIN_PORT_MUX);
- val &= ~(PFDE | PFTE);
- bfin_write16(BFIN_PORT_MUX, val);
- val = bfin_read16(PORTF_FER);
- val |= 0xF;
- bfin_write16(PORTF_FER, val);
+#ifdef CONFIG_SERIAL_BFIN_UART0
+ peripheral_request(P_UART0_TX, DRIVER_NAME);
+ peripheral_request(P_UART0_RX, DRIVER_NAME);
+#endif
+
+#ifdef CONFIG_SERIAL_BFIN_UART1
+ peripheral_request(P_UART1_TX, DRIVER_NAME);
+ peripheral_request(P_UART1_RX, DRIVER_NAME);
+#endif
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
if (uart->cts_pin >= 0) {
- gpio_request(uart->cts_pin, NULL);
+ gpio_request(uart->cts_pin, DRIVER_NAME);
gpio_direction_input(uart->cts_pin);
}
if (uart->rts_pin >= 0) {
- gpio_request(uart->rts_pin, NULL);
+ gpio_request(uart->rts_pin, DRIVER_NAME);
gpio_direction_output(uart->rts_pin);
}
#endif
diff --git a/include/asm-blackfin/mach-bf537/portmux.h b/include/asm-blackfin/mach-bf537/portmux.h
index 23e13c5abc4..ae6c53b2845 100644
--- a/include/asm-blackfin/mach-bf537/portmux.h
+++ b/include/asm-blackfin/mach-bf537/portmux.h
@@ -106,4 +106,37 @@
#define P_SPI0_SSEL2 (P_DEFINED | P_IDENT(PORT_PJ11) | P_FUNCT(1))
#define P_SPI0_SSEL7 (P_DEFINED | P_IDENT(PORT_PJ5) | P_FUNCT(2))
-#endif /* _MACH_PORTMUX_H_ */
+#define P_MII0 {\
+ P_MII0_ETxD0, \
+ P_MII0_ETxD1, \
+ P_MII0_ETxD2, \
+ P_MII0_ETxD3, \
+ P_MII0_ETxEN, \
+ P_MII0_TxCLK, \
+ P_MII0_PHYINT, \
+ P_MII0_COL, \
+ P_MII0_ERxD0, \
+ P_MII0_ERxD1, \
+ P_MII0_ERxD2, \
+ P_MII0_ERxD3, \
+ P_MII0_ERxDV, \
+ P_MII0_ERxCLK, \
+ P_MII0_ERxER, \
+ P_MII0_CRS, \
+ P_MDC, \
+ P_MDIO, 0}
+
+
+#define P_RMII0 {\
+ P_MII0_ETxD0, \
+ P_MII0_ETxD1, \
+ P_MII0_ETxEN, \
+ P_MII0_ERxD0, \
+ P_MII0_ERxD1, \
+ P_MII0_ERxER, \
+ P_RMII0_REF_CLK, \
+ P_RMII0_MDINT, \
+ P_RMII0_CRS_DV, \
+ P_MDC, \
+ P_MDIO, 0}
+#endif /* _MACH_PORTMUX_H_ */
diff --git a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
index e043cafa3c4..69b9f8e120e 100644
--- a/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
+++ b/include/asm-blackfin/mach-bf561/bfin_serial_5xx.h
@@ -1,5 +1,6 @@
#include <linux/serial.h>
#include <asm/dma.h>
+#include <asm/portmux.h>
#define NR_PORTS 1
@@ -92,18 +93,24 @@ struct bfin_serial_res bfin_serial_resource[] = {
}
};
+#define DRIVER_NAME "bfin-uart"
int nr_ports = NR_PORTS;
static void bfin_serial_hw_init(struct bfin_serial_port *uart)
{
+#ifdef CONFIG_SERIAL_BFIN_UART0
+ peripheral_request(P_UART0_TX, DRIVER_NAME);
+ peripheral_request(P_UART0_RX, DRIVER_NAME);
+#endif
+
#ifdef CONFIG_SERIAL_BFIN_CTSRTS
if (uart->cts_pin >= 0) {
- gpio_request(uart->cts_pin, NULL);
+ gpio_request(uart->cts_pin, DRIVER_NAME);
gpio_direction_input(uart->cts_pin);
}
if (uart->rts_pin >= 0) {
- gpio_request(uart->rts_pin, NULL);
+ gpio_request(uart->rts_pin, DRIVER_NAME);
gpio_direction_input(uart->rts_pin);
}
#endif
diff --git a/include/asm-blackfin/mach-bf561/cdefBF561.h b/include/asm-blackfin/mach-bf561/cdefBF561.h
index 6e87ab269ff..73d4d65249c 100644
--- a/include/asm-blackfin/mach-bf561/cdefBF561.h
+++ b/include/asm-blackfin/mach-bf561/cdefBF561.h
@@ -83,9 +83,9 @@ static __inline__ void bfin_write_VR_CTL(unsigned int val)
/* For MMR's that are reserved on Core B, set up defines to better integrate with other ports */
#define bfin_read_SWRST() bfin_read_SICA_SWRST()
-#define bfin_write_SWRST() bfin_write_SICA_SWRST()
+#define bfin_write_SWRST(val) bfin_write_SICA_SWRST(val)
#define bfin_read_SYSCR() bfin_read_SICA_SYSCR()
-#define bfin_write_SYSCR() bfin_write_SICA_SYSCR()
+#define bfin_write_SYSCR(val) bfin_write_SICA_SYSCR(val)
/* System Reset and Interrupt Controller registers for core A (0xFFC0 0100-0xFFC0 01FF) */
#define bfin_read_SICA_SWRST() bfin_read16(SICA_SWRST)
diff --git a/include/asm-blackfin/portmux.h b/include/asm-blackfin/portmux.h
index 9d3681e4211..0d3f650d2d9 100644
--- a/include/asm-blackfin/portmux.h
+++ b/include/asm-blackfin/portmux.h
@@ -14,6 +14,12 @@
#define P_MAYSHARE 0x2000
#define P_DONTCARE 0x1000
+
+int peripheral_request(unsigned short per, const char *label);
+void peripheral_free(unsigned short per);
+int peripheral_request_list(unsigned short per[], const char *label);
+void peripheral_free_list(unsigned short per[]);
+
#include <asm/gpio.h>
#include <asm/mach/portmux.h>
@@ -145,6 +151,22 @@
#define P_SPI2_SSEL3 P_UNDEF
#endif
+#ifndef P_SPI2_SSEL4
+#define P_SPI2_SSEL4 P_UNDEF
+#endif
+
+#ifndef P_SPI2_SSEL5
+#define P_SPI2_SSEL5 P_UNDEF
+#endif
+
+#ifndef P_SPI2_SSEL6
+#define P_SPI2_SSEL6 P_UNDEF
+#endif
+
+#ifndef P_SPI2_SSEL7
+#define P_SPI2_SSEL7 P_UNDEF
+#endif
+
#ifndef P_SPI2_SCK
#define P_SPI2_SCK P_UNDEF
#endif
@@ -513,6 +535,22 @@
#define P_SPI0_SSEL3 P_UNDEF
#endif
+#ifndef P_SPI0_SSEL4
+#define P_SPI0_SSEL4 P_UNDEF
+#endif
+
+#ifndef P_SPI0_SSEL5
+#define P_SPI0_SSEL5 P_UNDEF
+#endif
+
+#ifndef P_SPI0_SSEL6
+#define P_SPI0_SSEL6 P_UNDEF
+#endif
+
+#ifndef P_SPI0_SSEL7
+#define P_SPI0_SSEL7 P_UNDEF
+#endif
+
#ifndef P_UART0_TX
#define P_UART0_TX P_UNDEF
#endif
@@ -741,6 +779,23 @@
#define P_SPI1_SSEL3 P_UNDEF
#endif
+
+#ifndef P_SPI1_SSEL4
+#define P_SPI1_SSEL4 P_UNDEF
+#endif
+
+#ifndef P_SPI1_SSEL5
+#define P_SPI1_SSEL5 P_UNDEF
+#endif
+
+#ifndef P_SPI1_SSEL6
+#define P_SPI1_SSEL6 P_UNDEF
+#endif
+
+#ifndef P_SPI1_SSEL7
+#define P_SPI1_SSEL7 P_UNDEF
+#endif
+
#ifndef P_SPI1_SCK
#define P_SPI1_SCK P_UNDEF
#endif
diff --git a/include/asm-blackfin/string.h b/include/asm-blackfin/string.h
index 6f1eb7d6d3c..e8ada91ab00 100644
--- a/include/asm-blackfin/string.h
+++ b/include/asm-blackfin/string.h
@@ -9,13 +9,16 @@ extern inline char *strcpy(char *dest, const char *src)
char *xdest = dest;
char temp = 0;
- __asm__ __volatile__
- ("1:\t%2 = B [%1++] (Z);\n\t"
- "B [%0++] = %2;\n\t"
- "CC = %2;\n\t"
- "if cc jump 1b (bp);\n"
- : "+&a" (dest), "+&a" (src), "=&d" (temp)
- ::"memory", "CC");
+ __asm__ __volatile__ (
+ "1:"
+ "%2 = B [%1++] (Z);"
+ "B [%0++] = %2;"
+ "CC = %2;"
+ "if cc jump 1b (bp);"
+ : "+&a" (dest), "+&a" (src), "=&d" (temp)
+ :
+ : "memory", "CC");
+
return xdest;
}
@@ -28,37 +31,56 @@ extern inline char *strncpy(char *dest, const char *src, size_t n)
if (n == 0)
return xdest;
- __asm__ __volatile__
- ("1:\t%3 = B [%1++] (Z);\n\t"
- "B [%0++] = %3;\n\t"
- "CC = %3;\n\t"
- "if ! cc jump 2f;\n\t"
- "%2 += -1;\n\t"
- "CC = %2 == 0;\n\t"
- "if ! cc jump 1b (bp);\n"
- "2:\n"
- : "+&a" (dest), "+&a" (src), "+&da" (n), "=&d" (temp)
- ::"memory", "CC");
+ __asm__ __volatile__ (
+ "1:"
+ "%3 = B [%1++] (Z);"
+ "B [%0++] = %3;"
+ "CC = %3;"
+ "if ! cc jump 2f;"
+ "%2 += -1;"
+ "CC = %2 == 0;"
+ "if ! cc jump 1b (bp);"
+ "jump 4f;"
+ "2:"
+ /* if src is shorter than n, we need to null pad bytes now */
+ "%3 = 0;"
+ "3:"
+ "%2 += -1;"
+ "CC = %2 == 0;"
+ "if cc jump 4f;"
+ "B [%0++] = %3;"
+ "jump 3b;"
+ "4:"
+ : "+&a" (dest), "+&a" (src), "+&da" (n), "=&d" (temp)
+ :
+ : "memory", "CC");
+
return xdest;
}
#define __HAVE_ARCH_STRCMP
extern inline int strcmp(const char *cs, const char *ct)
{
- char __res1, __res2;
-
- __asm__
- ("1:\t%2 = B[%0++] (Z);\n\t" /* get *cs */
- "%3 = B[%1++] (Z);\n\t" /* get *ct */
- "CC = %2 == %3;\n\t" /* compare a byte */
- "if ! cc jump 2f;\n\t" /* not equal, break out */
- "CC = %2;\n\t" /* at end of cs? */
- "if cc jump 1b (bp);\n\t" /* no, keep going */
- "jump.s 3f;\n" /* strings are equal */
- "2:\t%2 = %2 - %3;\n" /* *cs - *ct */
- "3:\n"
- : "+&a" (cs), "+&a" (ct), "=&d" (__res1), "=&d" (__res2)
- : : "CC");
+ /* need to use int's here so the char's in the assembly don't get
+ * sign extended incorrectly when we don't want them to be
+ */
+ int __res1, __res2;
+
+ __asm__ __volatile__ (
+ "1:"
+ "%2 = B[%0++] (Z);" /* get *cs */
+ "%3 = B[%1++] (Z);" /* get *ct */
+ "CC = %2 == %3;" /* compare a byte */
+ "if ! cc jump 2f;" /* not equal, break out */
+ "CC = %2;" /* at end of cs? */
+ "if cc jump 1b (bp);" /* no, keep going */
+ "jump.s 3f;" /* strings are equal */
+ "2:"
+ "%2 = %2 - %3;" /* *cs - *ct */
+ "3:"
+ : "+&a" (cs), "+&a" (ct), "=&d" (__res1), "=&d" (__res2)
+ :
+ : "memory", "CC");
return __res1;
}
@@ -66,26 +88,35 @@ extern inline int strcmp(const char *cs, const char *ct)
#define __HAVE_ARCH_STRNCMP
extern inline int strncmp(const char *cs, const char *ct, size_t count)
{
- char __res1, __res2;
+ /* need to use int's here so the char's in the assembly don't get
+ * sign extended incorrectly when we don't want them to be
+ */
+ int __res1, __res2;
if (!count)
return 0;
- __asm__
- ("1:\t%3 = B[%0++] (Z);\n\t" /* get *cs */
- "%4 = B[%1++] (Z);\n\t" /* get *ct */
- "CC = %3 == %4;\n\t" /* compare a byte */
- "if ! cc jump 3f;\n\t" /* not equal, break out */
- "CC = %3;\n\t" /* at end of cs? */
- "if ! cc jump 4f;\n\t" /* yes, all done */
- "%2 += -1;\n\t" /* no, adjust count */
- "CC = %2 == 0;\n\t"
- "if ! cc jump 1b;\n" /* more to do, keep going */
- "2:\t%3 = 0;\n\t" /* strings are equal */
- "jump.s 4f;\n"
- "3:\t%3 = %3 - %4;\n" /* *cs - *ct */
- "4:"
- : "+&a" (cs), "+&a" (ct), "+&da" (count), "=&d" (__res1), "=&d" (__res2)
- : : "CC");
+
+ __asm__ __volatile__ (
+ "1:"
+ "%3 = B[%0++] (Z);" /* get *cs */
+ "%4 = B[%1++] (Z);" /* get *ct */
+ "CC = %3 == %4;" /* compare a byte */
+ "if ! cc jump 3f;" /* not equal, break out */
+ "CC = %3;" /* at end of cs? */
+ "if ! cc jump 4f;" /* yes, all done */
+ "%2 += -1;" /* no, adjust count */
+ "CC = %2 == 0;"
+ "if ! cc jump 1b;" /* more to do, keep going */
+ "2:"
+ "%3 = 0;" /* strings are equal */
+ "jump.s 4f;"
+ "3:"
+ "%3 = %3 - %4;" /* *cs - *ct */
+ "4:"
+ : "+&a" (cs), "+&a" (ct), "+&da" (count), "=&d" (__res1), "=&d" (__res2)
+ :
+ : "memory", "CC");
+
return __res1;
}
diff --git a/include/asm-blackfin/unistd.h b/include/asm-blackfin/unistd.h
index 0df9f2d322a..07ffe8b718c 100644
--- a/include/asm-blackfin/unistd.h
+++ b/include/asm-blackfin/unistd.h
@@ -3,6 +3,7 @@
/*
* This file contains the system call numbers.
*/
+#define __NR_restart_syscall 0
#define __NR_exit 1
#define __NR_fork 2
#define __NR_read 3
@@ -165,13 +166,13 @@
#define __NR_sched_get_priority_min 160
#define __NR_sched_rr_get_interval 161
#define __NR_nanosleep 162
- /* 163 __NR_mremap */
+#define __NR_mremap 163
#define __NR_setresuid 164
#define __NR_getresuid 165
/* 166 __NR_vm86 */
/* 167 __NR_query_module */
/* 168 __NR_poll */
- /* 169 __NR_nfsservctl */
+#define __NR_nfsservctl 169
#define __NR_setresgid 170
#define __NR_getresgid 171
#define __NR_prctl 172
@@ -227,7 +228,7 @@
/* 222 reserved for TUX */
/* 223 reserved for TUX */
#define __NR_gettid 224
- /* 225 __NR_readahead */
+#define __NR_readahead 225
#define __NR_setxattr 226
#define __NR_lsetxattr 227
#define __NR_fsetxattr 228
@@ -287,7 +288,7 @@
#define __NR_mq_timedreceive (__NR_mq_open+3)
#define __NR_mq_notify (__NR_mq_open+4)
#define __NR_mq_getsetattr (__NR_mq_open+5)
- /* 284 __NR_sys_kexec_load */
+#define __NR_kexec_load 284
#define __NR_waitid 285
#define __NR_add_key 286
#define __NR_request_key 287
@@ -352,9 +353,54 @@
#define __NR_shmdt 340
#define __NR_shmget 341
-#define __NR_syscall 342
+#define __NR_splice 342
+#define __NR_sync_file_range 343
+#define __NR_tee 344
+#define __NR_vmsplice 345
+
+#define __NR_epoll_pwait 346
+#define __NR_utimensat 347
+#define __NR_signalfd 348
+#define __NR_timerfd 349
+#define __NR_eventfd 350
+#define __NR_pread64 351
+#define __NR_pwrite64 352
+#define __NR_fadvise64 353
+#define __NR_set_robust_list 354
+#define __NR_get_robust_list 355
+#define __NR_fallocate 356
+
+#define __NR_syscall 357
#define NR_syscalls __NR_syscall
+/* Old optional stuff no one actually uses */
+#define __IGNORE_sysfs
+#define __IGNORE_uselib
+
+/* Implement the newer interfaces */
+#define __IGNORE_mmap
+#define __IGNORE_poll
+#define __IGNORE_select
+#define __IGNORE_utime
+
+/* Not relevant on no-mmu */
+#define __IGNORE_swapon
+#define __IGNORE_swapoff
+#define __IGNORE_msync
+#define __IGNORE_mlock
+#define __IGNORE_munlock
+#define __IGNORE_mlockall
+#define __IGNORE_munlockall
+#define __IGNORE_mincore
+#define __IGNORE_madvise
+#define __IGNORE_remap_file_pages
+#define __IGNORE_mbind
+#define __IGNORE_get_mempolicy
+#define __IGNORE_set_mempolicy
+#define __IGNORE_migrate_pages
+#define __IGNORE_move_pages
+#define __IGNORE_getcpu
+
#ifdef __KERNEL__
#define __ARCH_WANT_IPC_PARSE_VERSION
#define __ARCH_WANT_STAT64
diff --git a/include/asm-generic/termios.h b/include/asm-generic/termios.h
index 3769e6bd63b..33dca30a3c4 100644
--- a/include/asm-generic/termios.h
+++ b/include/asm-generic/termios.h
@@ -63,6 +63,8 @@ static inline int kernel_termios_to_user_termio(struct termio __user *termio,
#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
+#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
#endif /* __ARCH_TERMIO_GETPUT */
diff --git a/include/asm-h8300/flat.h b/include/asm-h8300/flat.h
index c20eee767d6..2a873508a9a 100644
--- a/include/asm-h8300/flat.h
+++ b/include/asm-h8300/flat.h
@@ -9,6 +9,7 @@
#define flat_argvp_envp_on_stack() 1
#define flat_old_ram_flag(flags) 1
#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
+#define flat_set_persistent(relval, p) 0
/*
* on the H8 a couple of the relocations have an instruction in the
@@ -18,7 +19,7 @@
*/
#define flat_get_relocate_addr(rel) (rel)
-#define flat_get_addr_from_rp(rp, relval, flags) \
+#define flat_get_addr_from_rp(rp, relval, flags, persistent) \
(get_unaligned(rp) & ((flags & FLAT_FLAG_GOTPIC) ? 0xffffffff: 0x00ffffff))
#define flat_put_addr_at_rp(rp, addr, rel) \
put_unaligned (((*(char *)(rp)) << 24) | ((addr) & 0x00ffffff), rp)
diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h
index 7b65b5b0003..e8e0bd64112 100644
--- a/include/asm-i386/io.h
+++ b/include/asm-i386/io.h
@@ -112,6 +112,9 @@ extern void __iomem * __ioremap(unsigned long offset, unsigned long size, unsign
* writew/writel functions and the other mmio helpers. The returned
* address is not guaranteed to be usable directly as a virtual
* address.
+ *
+ * If the area you are trying to map is a PCI BAR you should have a
+ * look at pci_iomap().
*/
static inline void __iomem * ioremap(unsigned long offset, unsigned long size)
diff --git a/include/asm-i386/io_apic.h b/include/asm-i386/io_apic.h
index 340764076d5..dbe734ddf2a 100644
--- a/include/asm-i386/io_apic.h
+++ b/include/asm-i386/io_apic.h
@@ -150,7 +150,6 @@ extern int (*ioapic_renumber_irq)(int ioapic, int irq);
#else /* !CONFIG_X86_IO_APIC */
#define io_apic_assign_pci_irqs 0
-static inline void disable_ioapic_setup(void) { }
#endif
#endif
diff --git a/include/asm-i386/system.h b/include/asm-i386/system.h
index 609756c6167..d69ba937e09 100644
--- a/include/asm-i386/system.h
+++ b/include/asm-i386/system.h
@@ -214,11 +214,6 @@ static inline unsigned long get_limit(unsigned long segment)
*/
-/*
- * Actually only lfence would be needed for mb() because all stores done
- * by the kernel should be already ordered. But keep a full barrier for now.
- */
-
#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
diff --git a/include/asm-ia64/hpsim.h b/include/asm-ia64/hpsim.h
new file mode 100644
index 00000000000..892ab198a9d
--- /dev/null
+++ b/include/asm-ia64/hpsim.h
@@ -0,0 +1,16 @@
+#ifndef _ASMIA64_HPSIM_H
+#define _ASMIA64_HPSIM_H
+
+#ifndef CONFIG_HP_SIMSERIAL_CONSOLE
+static inline int simcons_register(void) { return 1; }
+#else
+int simcons_register(void);
+#endif
+
+struct tty_driver;
+extern struct tty_driver *hp_simserial_driver;
+
+void ia64_ssc_connect_irq(long intr, long irq);
+void ia64_ctl_trace(long on);
+
+#endif
diff --git a/include/asm-ia64/sn/arch.h b/include/asm-ia64/sn/arch.h
index 16adc93d7a7..7caa1f44cd9 100644
--- a/include/asm-ia64/sn/arch.h
+++ b/include/asm-ia64/sn/arch.h
@@ -81,5 +81,6 @@ extern u8 sn_sharing_domain_size;
extern u8 sn_region_size;
extern void sn_flush_all_caches(long addr, long bytes);
+extern bool sn_cpu_disable_allowed(int cpu);
#endif /* _ASM_IA64_SN_ARCH_H */
diff --git a/include/asm-ia64/sn/intr.h b/include/asm-ia64/sn/intr.h
index 12b54ddb06b..e0487aa9741 100644
--- a/include/asm-ia64/sn/intr.h
+++ b/include/asm-ia64/sn/intr.h
@@ -60,6 +60,7 @@ extern u64 sn_intr_alloc(nasid_t, int,
int, nasid_t, int);
extern void sn_intr_free(nasid_t, int, struct sn_irq_info *);
extern struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *, nasid_t, int);
+extern void sn_set_err_irq_affinity(unsigned int);
extern struct list_head **sn_irq_lh;
#define CPU_VECTOR_TO_IRQ(cpuid,vector) (vector)
diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h
index bfdc36273ed..8e83ac117ac 100644
--- a/include/asm-ia64/sn/sn_feature_sets.h
+++ b/include/asm-ia64/sn/sn_feature_sets.h
@@ -31,6 +31,7 @@ extern int sn_prom_feature_available(int id);
#define PRF_PAL_CACHE_FLUSH_SAFE 0
#define PRF_DEVICE_FLUSH_LIST 1
#define PRF_HOTPLUG_SUPPORT 2
+#define PRF_CPU_DISABLE_SUPPORT 3
/* --------------------- OS Features -------------------------------*/
diff --git a/include/asm-m32r/assembler.h b/include/asm-m32r/assembler.h
index 47041d19d4a..26351539b5f 100644
--- a/include/asm-m32r/assembler.h
+++ b/include/asm-m32r/assembler.h
@@ -52,27 +52,27 @@
.endm
#if !(defined(CONFIG_CHIP_M32102) || defined(CONFIG_CHIP_M32104))
-#define STI(reg) STI_M reg
- .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+ .macro ENABLE_INTERRUPTS reg
setpsw #0x40 -> nop
; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
.endm
-#define CLI(reg) CLI_M reg
- .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+ .macro DISABLE_INTERRUPTS reg
clrpsw #0x40 -> nop
; WORKAROUND: "-> nop" is a workaround for the M32700(TS1).
.endm
#else /* CONFIG_CHIP_M32102 || CONFIG_CHIP_M32104 */
-#define STI(reg) STI_M reg
- .macro STI_M reg
+#define ENABLE_INTERRUPTS(reg) ENABLE_INTERRUPTS reg
+ .macro ENABLE_INTERRUPTS reg
mvfc \reg, psw
or3 \reg, \reg, #0x0040
mvtc \reg, psw
.endm
-#define CLI(reg) CLI_M reg
- .macro CLI_M reg
+#define DISABLE_INTERRUPTS(reg) DISABLE_INTERRUPTS reg
+ .macro DISABLE_INTERRUPTS reg
mvfc \reg, psw
and3 \reg, \reg, #0xffbf
mvtc \reg, psw
diff --git a/include/asm-m32r/flat.h b/include/asm-m32r/flat.h
index 1b285f65cab..d851cf0c4aa 100644
--- a/include/asm-m32r/flat.h
+++ b/include/asm-m32r/flat.h
@@ -15,9 +15,10 @@
#define flat_stack_align(sp) (*sp += (*sp & 3 ? (4 - (*sp & 3)): 0))
#define flat_argvp_envp_on_stack() 0
#define flat_old_ram_flag(flags) (flags)
+#define flat_set_persistent(relval, p) 0
#define flat_reloc_valid(reloc, size) \
(((reloc) - textlen_for_m32r_lo16_data) <= (size))
-#define flat_get_addr_from_rp(rp, relval, flags) \
+#define flat_get_addr_from_rp(rp, relval, flags, persistent) \
m32r_flat_get_addr_from_rp(rp, relval, (text_len) )
#define flat_put_addr_at_rp(rp, addr, relval) \
diff --git a/include/asm-m32r/m32r.h b/include/asm-m32r/m32r.h
index decfc59907c..214b44b4075 100644
--- a/include/asm-m32r/m32r.h
+++ b/include/asm-m32r/m32r.h
@@ -22,12 +22,26 @@
#include <asm/m32700ut/m32700ut_pld.h>
#include <asm/m32700ut/m32700ut_lan.h>
#include <asm/m32700ut/m32700ut_lcd.h>
+/* for ei_handler:linux/arch/m32r/kernel/entry.S */
+#define M32R_INT1ICU_ISTS PLD_ICUISTS
+#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
+#define M32R_INT0ICU_ISTS M32700UT_LAN_ICUISTS
+#define M32R_INT0ICU_IRQ_BASE M32700UT_LAN_PLD_IRQ_BASE
+#define M32R_INT2ICU_ISTS M32700UT_LCD_ICUISTS
+#define M32R_INT2ICU_IRQ_BASE M32700UT_LCD_PLD_IRQ_BASE
#endif /* CONFIG_PLAT_M32700UT */
#if defined(CONFIG_PLAT_OPSPUT)
#include <asm/opsput/opsput_pld.h>
#include <asm/opsput/opsput_lan.h>
#include <asm/opsput/opsput_lcd.h>
+/* for ei_handler:linux/arch/m32r/kernel/entry.S */
+#define M32R_INT1ICU_ISTS PLD_ICUISTS
+#define M32R_INT1ICU_IRQ_BASE OPSPUT_PLD_IRQ_BASE
+#define M32R_INT0ICU_ISTS OPSPUT_LAN_ICUISTS
+#define M32R_INT0ICU_IRQ_BASE OPSPUT_LAN_PLD_IRQ_BASE
+#define M32R_INT2ICU_ISTS OPSPUT_LCD_ICUISTS
+#define M32R_INT2ICU_IRQ_BASE OPSPUT_LCD_PLD_IRQ_BASE
#endif /* CONFIG_PLAT_OPSPUT */
#if defined(CONFIG_PLAT_MAPPI2)
@@ -40,10 +54,16 @@
#if defined(CONFIG_PLAT_USRV)
#include <asm/m32700ut/m32700ut_pld.h>
+/* for ei_handler:linux/arch/m32r/kernel/entry.S */
+#define M32R_INT1ICU_ISTS PLD_ICUISTS
+#define M32R_INT1ICU_IRQ_BASE M32700UT_PLD_IRQ_BASE
#endif
#if defined(CONFIG_PLAT_M32104UT)
#include <asm/m32104ut/m32104ut_pld.h>
+/* for ei_handler:linux/arch/m32r/kernel/entry.S */
+#define M32R_INT1ICU_ISTS PLD_ICUISTS
+#define M32R_INT1ICU_IRQ_BASE M32104UT_PLD_IRQ_BASE
#endif /* CONFIG_PLAT_M32104 */
/*
diff --git a/include/asm-m68k/unistd.h b/include/asm-m68k/unistd.h
index fdbb60e6a0d..a30fe9c6414 100644
--- a/include/asm-m68k/unistd.h
+++ b/include/asm-m68k/unistd.h
@@ -313,10 +313,20 @@
#define __NR_tee 308
#define __NR_vmsplice 309
#define __NR_move_pages 310
+#define __NR_sched_setaffinity 311
+#define __NR_sched_getaffinity 312
+#define __NR_kexec_load 313
+#define __NR_getcpu 314
+#define __NR_epoll_pwait 315
+#define __NR_utimensat 316
+#define __NR_signalfd 317
+#define __NR_timerfd 318
+#define __NR_eventfd 319
+#define __NR_fallocate 320
#ifdef __KERNEL__
-#define NR_syscalls 311
+#define NR_syscalls 321
#define __ARCH_WANT_IPC_PARSE_VERSION
#define __ARCH_WANT_OLD_READDIR
diff --git a/include/asm-m68knommu/flat.h b/include/asm-m68knommu/flat.h
index 2d836edc434..814b5174a8e 100644
--- a/include/asm-m68knommu/flat.h
+++ b/include/asm-m68knommu/flat.h
@@ -9,8 +9,9 @@
#define flat_argvp_envp_on_stack() 1
#define flat_old_ram_flag(flags) (flags)
#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
-#define flat_get_addr_from_rp(rp, relval, flags) get_unaligned(rp)
+#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp)
#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp)
#define flat_get_relocate_addr(rel) (rel)
+#define flat_set_persistent(relval, p) 0
#endif /* __M68KNOMMU_FLAT_H__ */
diff --git a/include/asm-m68knommu/pgtable.h b/include/asm-m68knommu/pgtable.h
index e1e6a1d2333..46251016e82 100644
--- a/include/asm-m68knommu/pgtable.h
+++ b/include/asm-m68knommu/pgtable.h
@@ -65,4 +65,6 @@ extern unsigned int kobjsize(const void *objp);
#define VMALLOC_START 0
#define VMALLOC_END 0xffffffff
+#include <asm-generic/pgtable.h>
+
#endif /* _M68KNOMMU_PGTABLE_H */
diff --git a/include/asm-m68knommu/unistd.h b/include/asm-m68knommu/unistd.h
index 82e03195f32..eb1b566793f 100644
--- a/include/asm-m68knommu/unistd.h
+++ b/include/asm-m68knommu/unistd.h
@@ -314,10 +314,20 @@
#define __NR_tee 308
#define __NR_vmsplice 309
#define __NR_move_pages 310
+#define __NR_sched_setaffinity 311
+#define __NR_sched_getaffinity 312
+#define __NR_kexec_load 313
+#define __NR_getcpu 314
+#define __NR_epoll_pwait 315
+#define __NR_utimensat 316
+#define __NR_signalfd 317
+#define __NR_timerfd 318
+#define __NR_eventfd 319
+#define __NR_fallocate 320
#ifdef __KERNEL__
-#define NR_syscalls 311
+#define NR_syscalls 321
#define __ARCH_WANT_IPC_PARSE_VERSION
#define __ARCH_WANT_OLD_READDIR
diff --git a/include/asm-mips/bcache.h b/include/asm-mips/bcache.h
index 3646a3f2ed3..0ba9d6ef76a 100644
--- a/include/asm-mips/bcache.h
+++ b/include/asm-mips/bcache.h
@@ -21,7 +21,6 @@ struct bcache_ops {
};
extern void indy_sc_init(void);
-extern void sni_pcimt_sc_init(void);
#ifdef CONFIG_BOARD_SCACHE
diff --git a/include/asm-mips/cmpxchg.h b/include/asm-mips/cmpxchg.h
new file mode 100644
index 00000000000..c5b4708e003
--- /dev/null
+++ b/include/asm-mips/cmpxchg.h
@@ -0,0 +1,107 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003, 06, 07 by Ralf Baechle (ralf@linux-mips.org)
+ */
+#ifndef __ASM_CMPXCHG_H
+#define __ASM_CMPXCHG_H
+
+#include <linux/irqflags.h>
+
+#define __HAVE_ARCH_CMPXCHG 1
+
+#define __cmpxchg_asm(ld, st, m, old, new) \
+({ \
+ __typeof(*(m)) __ret; \
+ \
+ if (cpu_has_llsc && R10000_LLSC_WAR) { \
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set noat \n" \
+ " .set mips3 \n" \
+ "1: " ld " %0, %2 # __cmpxchg_asm \n" \
+ " bne %0, %z3, 2f \n" \
+ " .set mips0 \n" \
+ " move $1, %z4 \n" \
+ " .set mips3 \n" \
+ " " st " $1, %1 \n" \
+ " beqzl $1, 1b \n" \
+ "2: \n" \
+ " .set pop \n" \
+ : "=&r" (__ret), "=R" (*m) \
+ : "R" (*m), "Jr" (old), "Jr" (new) \
+ : "memory"); \
+ } else if (cpu_has_llsc) { \
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set noat \n" \
+ " .set mips3 \n" \
+ "1: " ld " %0, %2 # __cmpxchg_asm \n" \
+ " bne %0, %z3, 2f \n" \
+ " .set mips0 \n" \
+ " move $1, %z4 \n" \
+ " .set mips3 \n" \
+ " " st " $1, %1 \n" \
+ " beqz $1, 3f \n" \
+ "2: \n" \
+ " .subsection 2 \n" \
+ "3: b 1b \n" \
+ " .previous \n" \
+ " .set pop \n" \
+ : "=&r" (__ret), "=R" (*m) \
+ : "R" (*m), "Jr" (old), "Jr" (new) \
+ : "memory"); \
+ } else { \
+ unsigned long __flags; \
+ \
+ raw_local_irq_save(__flags); \
+ __ret = *m; \
+ if (__ret == old) \
+ *m = new; \
+ raw_local_irq_restore(__flags); \
+ } \
+ \
+ __ret; \
+})
+
+/*
+ * This function doesn't exist, so you'll get a linker error
+ * if something tries to do an invalid cmpxchg().
+ */
+extern void __cmpxchg_called_with_bad_pointer(void);
+
+#define __cmpxchg(ptr,old,new,barrier) \
+({ \
+ __typeof__(ptr) __ptr = (ptr); \
+ __typeof__(*(ptr)) __old = (old); \
+ __typeof__(*(ptr)) __new = (new); \
+ __typeof__(*(ptr)) __res = 0; \
+ \
+ barrier; \
+ \
+ switch (sizeof(*(__ptr))) { \
+ case 4: \
+ __res = __cmpxchg_asm("ll", "sc", __ptr, __old, __new); \
+ break; \
+ case 8: \
+ if (sizeof(long) == 8) { \
+ __res = __cmpxchg_asm("lld", "scd", __ptr, \
+ __old, __new); \
+ break; \
+ } \
+ default: \
+ __cmpxchg_called_with_bad_pointer(); \
+ break; \
+ } \
+ \
+ barrier; \
+ \
+ __res; \
+})
+
+#define cmpxchg(ptr, old, new) __cmpxchg(ptr, old, new, smp_llsc_mb())
+#define cmpxchg_local(ptr, old, new) __cmpxchg(ptr, old, new,)
+
+#endif /* __ASM_CMPXCHG_H */
diff --git a/include/asm-mips/compiler.h b/include/asm-mips/compiler.h
index 169ae26105e..aa6b876bbd7 100644
--- a/include/asm-mips/compiler.h
+++ b/include/asm-mips/compiler.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2004 Maciej W. Rozycki
+ * Copyright (C) 2004, 2007 Maciej W. Rozycki
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
@@ -9,8 +9,10 @@
#define _ASM_COMPILER_H
#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
+#define GCC_IMM_ASM "n"
#define GCC_REG_ACCUM "$0"
#else
+#define GCC_IMM_ASM "rn"
#define GCC_REG_ACCUM "accum"
#endif
diff --git a/include/asm-mips/edac.h b/include/asm-mips/edac.h
index 83719eee2d1..4da0c1fe30d 100644
--- a/include/asm-mips/edac.h
+++ b/include/asm-mips/edac.h
@@ -9,8 +9,7 @@ static inline void atomic_scrub(void *va, u32 size)
unsigned long temp;
u32 i;
- for (i = 0; i < size / sizeof(unsigned long); i++, virt_addr++) {
-
+ for (i = 0; i < size / sizeof(unsigned long); i++) {
/*
* Very carefully read and write to memory atomically
* so we are interrupt, DMA and SMP safe.
@@ -19,16 +18,16 @@ static inline void atomic_scrub(void *va, u32 size)
*/
__asm__ __volatile__ (
- " .set mips3 \n"
- "1: ll %0, %1 # atomic_add \n"
- " ll %0, %1 # atomic_add \n"
- " addu %0, $0 \n"
- " sc %0, %1 \n"
- " beqz %0, 1b \n"
- " .set mips0 \n"
+ " .set mips2 \n"
+ "1: ll %0, %1 # atomic_scrub \n"
+ " addu %0, $0 \n"
+ " sc %0, %1 \n"
+ " beqz %0, 1b \n"
+ " .set mips0 \n"
: "=&r" (temp), "=m" (*virt_addr)
: "m" (*virt_addr));
+ virt_addr++;
}
}
diff --git a/include/asm-mips/fcntl.h b/include/asm-mips/fcntl.h
index 00a50ec1c19..2a52333a062 100644
--- a/include/asm-mips/fcntl.h
+++ b/include/asm-mips/fcntl.h
@@ -13,6 +13,7 @@
#define O_SYNC 0x0010
#define O_NONBLOCK 0x0080
#define O_CREAT 0x0100 /* not fcntl */
+#define O_TRUNC 0x0200 /* not fcntl */
#define O_EXCL 0x0400 /* not fcntl */
#define O_NOCTTY 0x0800 /* not fcntl */
#define FASYNC 0x1000 /* fcntl, for BSD compatibility */
diff --git a/include/asm-mips/gt64240.h b/include/asm-mips/gt64240.h
deleted file mode 100644
index 8f9bd341ed4..00000000000
--- a/include/asm-mips/gt64240.h
+++ /dev/null
@@ -1,1235 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright - Galileo technology.
- * Copyright (C) 2004 by Ralf Baechle
- */
-#ifndef __ASM_MIPS_MV64240_H
-#define __ASM_MIPS_MV64240_H
-
-#include <asm/addrspace.h>
-#include <asm/marvell.h>
-
-/*
- * CPU Control Registers
- */
-
-#define CPU_CONFIGURATION 0x000
-#define CPU_MODE 0x120
-#define CPU_READ_RESPONSE_CROSSBAR_LOW 0x170
-#define CPU_READ_RESPONSE_CROSSBAR_HIGH 0x178
-
-/*
- * Processor Address Space
- */
-
-/* Sdram's BAR'S */
-#define SCS_0_LOW_DECODE_ADDRESS 0x008
-#define SCS_0_HIGH_DECODE_ADDRESS 0x010
-#define SCS_1_LOW_DECODE_ADDRESS 0x208
-#define SCS_1_HIGH_DECODE_ADDRESS 0x210
-#define SCS_2_LOW_DECODE_ADDRESS 0x018
-#define SCS_2_HIGH_DECODE_ADDRESS 0x020
-#define SCS_3_LOW_DECODE_ADDRESS 0x218
-#define SCS_3_HIGH_DECODE_ADDRESS 0x220
-/* Devices BAR'S */
-#define CS_0_LOW_DECODE_ADDRESS 0x028
-#define CS_0_HIGH_DECODE_ADDRESS 0x030
-#define CS_1_LOW_DECODE_ADDRESS 0x228
-#define CS_1_HIGH_DECODE_ADDRESS 0x230
-#define CS_2_LOW_DECODE_ADDRESS 0x248
-#define CS_2_HIGH_DECODE_ADDRESS 0x250
-#define CS_3_LOW_DECODE_ADDRESS 0x038
-#define CS_3_HIGH_DECODE_ADDRESS 0x040
-#define BOOTCS_LOW_DECODE_ADDRESS 0x238
-#define BOOTCS_HIGH_DECODE_ADDRESS 0x240
-
-#define PCI_0I_O_LOW_DECODE_ADDRESS 0x048
-#define PCI_0I_O_HIGH_DECODE_ADDRESS 0x050
-#define PCI_0MEMORY0_LOW_DECODE_ADDRESS 0x058
-#define PCI_0MEMORY0_HIGH_DECODE_ADDRESS 0x060
-#define PCI_0MEMORY1_LOW_DECODE_ADDRESS 0x080
-#define PCI_0MEMORY1_HIGH_DECODE_ADDRESS 0x088
-#define PCI_0MEMORY2_LOW_DECODE_ADDRESS 0x258
-#define PCI_0MEMORY2_HIGH_DECODE_ADDRESS 0x260
-#define PCI_0MEMORY3_LOW_DECODE_ADDRESS 0x280
-#define PCI_0MEMORY3_HIGH_DECODE_ADDRESS 0x288
-
-#define PCI_1I_O_LOW_DECODE_ADDRESS 0x090
-#define PCI_1I_O_HIGH_DECODE_ADDRESS 0x098
-#define PCI_1MEMORY0_LOW_DECODE_ADDRESS 0x0a0
-#define PCI_1MEMORY0_HIGH_DECODE_ADDRESS 0x0a8
-#define PCI_1MEMORY1_LOW_DECODE_ADDRESS 0x0b0
-#define PCI_1MEMORY1_HIGH_DECODE_ADDRESS 0x0b8
-#define PCI_1MEMORY2_LOW_DECODE_ADDRESS 0x2a0
-#define PCI_1MEMORY2_HIGH_DECODE_ADDRESS 0x2a8
-#define PCI_1MEMORY3_LOW_DECODE_ADDRESS 0x2b0
-#define PCI_1MEMORY3_HIGH_DECODE_ADDRESS 0x2b8
-
-#define INTERNAL_SPACE_DECODE 0x068
-
-#define CPU_0_LOW_DECODE_ADDRESS 0x290
-#define CPU_0_HIGH_DECODE_ADDRESS 0x298
-#define CPU_1_LOW_DECODE_ADDRESS 0x2c0
-#define CPU_1_HIGH_DECODE_ADDRESS 0x2c8
-
-#define PCI_0I_O_ADDRESS_REMAP 0x0f0
-#define PCI_0MEMORY0_ADDRESS_REMAP 0x0f8
-#define PCI_0MEMORY0_HIGH_ADDRESS_REMAP 0x320
-#define PCI_0MEMORY1_ADDRESS_REMAP 0x100
-#define PCI_0MEMORY1_HIGH_ADDRESS_REMAP 0x328
-#define PCI_0MEMORY2_ADDRESS_REMAP 0x2f8
-#define PCI_0MEMORY2_HIGH_ADDRESS_REMAP 0x330
-#define PCI_0MEMORY3_ADDRESS_REMAP 0x300
-#define PCI_0MEMORY3_HIGH_ADDRESS_REMAP 0x338
-
-#define PCI_1I_O_ADDRESS_REMAP 0x108
-#define PCI_1MEMORY0_ADDRESS_REMAP 0x110
-#define PCI_1MEMORY0_HIGH_ADDRESS_REMAP 0x340
-#define PCI_1MEMORY1_ADDRESS_REMAP 0x118
-#define PCI_1MEMORY1_HIGH_ADDRESS_REMAP 0x348
-#define PCI_1MEMORY2_ADDRESS_REMAP 0x310
-#define PCI_1MEMORY2_HIGH_ADDRESS_REMAP 0x350
-#define PCI_1MEMORY3_ADDRESS_REMAP 0x318
-#define PCI_1MEMORY3_HIGH_ADDRESS_REMAP 0x358
-
-/*
- * CPU Sync Barrier
- */
-
-#define PCI_0SYNC_BARIER_VIRTUAL_REGISTER 0x0c0
-#define PCI_1SYNC_BARIER_VIRTUAL_REGISTER 0x0c8
-
-
-/*
- * CPU Access Protect
- */
-
-#define CPU_LOW_PROTECT_ADDRESS_0 0X180
-#define CPU_HIGH_PROTECT_ADDRESS_0 0X188
-#define CPU_LOW_PROTECT_ADDRESS_1 0X190
-#define CPU_HIGH_PROTECT_ADDRESS_1 0X198
-#define CPU_LOW_PROTECT_ADDRESS_2 0X1a0
-#define CPU_HIGH_PROTECT_ADDRESS_2 0X1a8
-#define CPU_LOW_PROTECT_ADDRESS_3 0X1b0
-#define CPU_HIGH_PROTECT_ADDRESS_3 0X1b8
-#define CPU_LOW_PROTECT_ADDRESS_4 0X1c0
-#define CPU_HIGH_PROTECT_ADDRESS_4 0X1c8
-#define CPU_LOW_PROTECT_ADDRESS_5 0X1d0
-#define CPU_HIGH_PROTECT_ADDRESS_5 0X1d8
-#define CPU_LOW_PROTECT_ADDRESS_6 0X1e0
-#define CPU_HIGH_PROTECT_ADDRESS_6 0X1e8
-#define CPU_LOW_PROTECT_ADDRESS_7 0X1f0
-#define CPU_HIGH_PROTECT_ADDRESS_7 0X1f8
-
-
-/*
- * Snoop Control
- */
-
-#define SNOOP_BASE_ADDRESS_0 0x380
-#define SNOOP_TOP_ADDRESS_0 0x388
-#define SNOOP_BASE_ADDRESS_1 0x390
-#define SNOOP_TOP_ADDRESS_1 0x398
-#define SNOOP_BASE_ADDRESS_2 0x3a0
-#define SNOOP_TOP_ADDRESS_2 0x3a8
-#define SNOOP_BASE_ADDRESS_3 0x3b0
-#define SNOOP_TOP_ADDRESS_3 0x3b8
-
-/*
- * CPU Error Report
- */
-
-#define CPU_ERROR_ADDRESS_LOW 0x070
-#define CPU_ERROR_ADDRESS_HIGH 0x078
-#define CPU_ERROR_DATA_LOW 0x128
-#define CPU_ERROR_DATA_HIGH 0x130
-#define CPU_ERROR_PARITY 0x138
-#define CPU_ERROR_CAUSE 0x140
-#define CPU_ERROR_MASK 0x148
-
-/*
- * Pslave Debug
- */
-
-#define X_0_ADDRESS 0x360
-#define X_0_COMMAND_ID 0x368
-#define X_1_ADDRESS 0x370
-#define X_1_COMMAND_ID 0x378
-#define WRITE_DATA_LOW 0x3c0
-#define WRITE_DATA_HIGH 0x3c8
-#define WRITE_BYTE_ENABLE 0X3e0
-#define READ_DATA_LOW 0x3d0
-#define READ_DATA_HIGH 0x3d8
-#define READ_ID 0x3e8
-
-
-/*
- * SDRAM and Device Address Space
- */
-
-
-/*
- * SDRAM Configuration
- */
-
-#define SDRAM_CONFIGURATION 0x448
-#define SDRAM_OPERATION_MODE 0x474
-#define SDRAM_ADDRESS_DECODE 0x47C
-#define SDRAM_TIMING_PARAMETERS 0x4b4
-#define SDRAM_UMA_CONTROL 0x4a4
-#define SDRAM_CROSS_BAR_CONTROL_LOW 0x4a8
-#define SDRAM_CROSS_BAR_CONTROL_HIGH 0x4ac
-#define SDRAM_CROSS_BAR_TIMEOUT 0x4b0
-
-
-/*
- * SDRAM Parameters
- */
-
-#define SDRAM_BANK0PARAMETERS 0x44C
-#define SDRAM_BANK1PARAMETERS 0x450
-#define SDRAM_BANK2PARAMETERS 0x454
-#define SDRAM_BANK3PARAMETERS 0x458
-
-
-/*
- * SDRAM Error Report
- */
-
-#define SDRAM_ERROR_DATA_LOW 0x484
-#define SDRAM_ERROR_DATA_HIGH 0x480
-#define SDRAM_AND_DEVICE_ERROR_ADDRESS 0x490
-#define SDRAM_RECEIVED_ECC 0x488
-#define SDRAM_CALCULATED_ECC 0x48c
-#define SDRAM_ECC_CONTROL 0x494
-#define SDRAM_ECC_ERROR_COUNTER 0x498
-
-
-/*
- * SDunit Debug (for internal use)
- */
-
-#define X0_ADDRESS 0x500
-#define X0_COMMAND_AND_ID 0x504
-#define X0_WRITE_DATA_LOW 0x508
-#define X0_WRITE_DATA_HIGH 0x50c
-#define X0_WRITE_BYTE_ENABLE 0x518
-#define X0_READ_DATA_LOW 0x510
-#define X0_READ_DATA_HIGH 0x514
-#define X0_READ_ID 0x51c
-#define X1_ADDRESS 0x520
-#define X1_COMMAND_AND_ID 0x524
-#define X1_WRITE_DATA_LOW 0x528
-#define X1_WRITE_DATA_HIGH 0x52c
-#define X1_WRITE_BYTE_ENABLE 0x538
-#define X1_READ_DATA_LOW 0x530
-#define X1_READ_DATA_HIGH 0x534
-#define X1_READ_ID 0x53c
-#define X0_SNOOP_ADDRESS 0x540
-#define X0_SNOOP_COMMAND 0x544
-#define X1_SNOOP_ADDRESS 0x548
-#define X1_SNOOP_COMMAND 0x54c
-
-
-/*
- * Device Parameters
- */
-
-#define DEVICE_BANK0PARAMETERS 0x45c
-#define DEVICE_BANK1PARAMETERS 0x460
-#define DEVICE_BANK2PARAMETERS 0x464
-#define DEVICE_BANK3PARAMETERS 0x468
-#define DEVICE_BOOT_BANK_PARAMETERS 0x46c
-#define DEVICE_CONTROL 0x4c0
-#define DEVICE_CROSS_BAR_CONTROL_LOW 0x4c8
-#define DEVICE_CROSS_BAR_CONTROL_HIGH 0x4cc
-#define DEVICE_CROSS_BAR_TIMEOUT 0x4c4
-
-
-/*
- * Device Interrupt
- */
-
-#define DEVICE_INTERRUPT_CAUSE 0x4d0
-#define DEVICE_INTERRUPT_MASK 0x4d4
-#define DEVICE_ERROR_ADDRESS 0x4d8
-
-/*
- * DMA Record
- */
-
-#define CHANNEL0_DMA_BYTE_COUNT 0x800
-#define CHANNEL1_DMA_BYTE_COUNT 0x804
-#define CHANNEL2_DMA_BYTE_COUNT 0x808
-#define CHANNEL3_DMA_BYTE_COUNT 0x80C
-#define CHANNEL4_DMA_BYTE_COUNT 0x900
-#define CHANNEL5_DMA_BYTE_COUNT 0x904
-#define CHANNEL6_DMA_BYTE_COUNT 0x908
-#define CHANNEL7_DMA_BYTE_COUNT 0x90C
-#define CHANNEL0_DMA_SOURCE_ADDRESS 0x810
-#define CHANNEL1_DMA_SOURCE_ADDRESS 0x814
-#define CHANNEL2_DMA_SOURCE_ADDRESS 0x818
-#define CHANNEL3_DMA_SOURCE_ADDRESS 0x81C
-#define CHANNEL4_DMA_SOURCE_ADDRESS 0x910
-#define CHANNEL5_DMA_SOURCE_ADDRESS 0x914
-#define CHANNEL6_DMA_SOURCE_ADDRESS 0x918
-#define CHANNEL7_DMA_SOURCE_ADDRESS 0x91C
-#define CHANNEL0_DMA_DESTINATION_ADDRESS 0x820
-#define CHANNEL1_DMA_DESTINATION_ADDRESS 0x824
-#define CHANNEL2_DMA_DESTINATION_ADDRESS 0x828
-#define CHANNEL3_DMA_DESTINATION_ADDRESS 0x82C
-#define CHANNEL4_DMA_DESTINATION_ADDRESS 0x920
-#define CHANNEL5_DMA_DESTINATION_ADDRESS 0x924
-#define CHANNEL6_DMA_DESTINATION_ADDRESS 0x928
-#define CHANNEL7_DMA_DESTINATION_ADDRESS 0x92C
-#define CHANNEL0NEXT_RECORD_POINTER 0x830
-#define CHANNEL1NEXT_RECORD_POINTER 0x834
-#define CHANNEL2NEXT_RECORD_POINTER 0x838
-#define CHANNEL3NEXT_RECORD_POINTER 0x83C
-#define CHANNEL4NEXT_RECORD_POINTER 0x930
-#define CHANNEL5NEXT_RECORD_POINTER 0x934
-#define CHANNEL6NEXT_RECORD_POINTER 0x938
-#define CHANNEL7NEXT_RECORD_POINTER 0x93C
-#define CHANNEL0CURRENT_DESCRIPTOR_POINTER 0x870
-#define CHANNEL1CURRENT_DESCRIPTOR_POINTER 0x874
-#define CHANNEL2CURRENT_DESCRIPTOR_POINTER 0x878
-#define CHANNEL3CURRENT_DESCRIPTOR_POINTER 0x87C
-#define CHANNEL4CURRENT_DESCRIPTOR_POINTER 0x970
-#define CHANNEL5CURRENT_DESCRIPTOR_POINTER 0x974
-#define CHANNEL6CURRENT_DESCRIPTOR_POINTER 0x978
-#define CHANNEL7CURRENT_DESCRIPTOR_POINTER 0x97C
-#define CHANNEL0_DMA_SOURCE_HIGH_PCI_ADDRESS 0x890
-#define CHANNEL1_DMA_SOURCE_HIGH_PCI_ADDRESS 0x894
-#define CHANNEL2_DMA_SOURCE_HIGH_PCI_ADDRESS 0x898
-#define CHANNEL3_DMA_SOURCE_HIGH_PCI_ADDRESS 0x89c
-#define CHANNEL4_DMA_SOURCE_HIGH_PCI_ADDRESS 0x990
-#define CHANNEL5_DMA_SOURCE_HIGH_PCI_ADDRESS 0x994
-#define CHANNEL6_DMA_SOURCE_HIGH_PCI_ADDRESS 0x998
-#define CHANNEL7_DMA_SOURCE_HIGH_PCI_ADDRESS 0x99c
-#define CHANNEL0_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a0
-#define CHANNEL1_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a4
-#define CHANNEL2_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8a8
-#define CHANNEL3_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x8ac
-#define CHANNEL4_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a0
-#define CHANNEL5_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a4
-#define CHANNEL6_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9a8
-#define CHANNEL7_DMA_DESTINATION_HIGH_PCI_ADDRESS 0x9ac
-#define CHANNEL0_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b0
-#define CHANNEL1_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b4
-#define CHANNEL2_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8b8
-#define CHANNEL3_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x8bc
-#define CHANNEL4_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b0
-#define CHANNEL5_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b4
-#define CHANNEL6_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9b8
-#define CHANNEL7_DMA_NEXT_RECORD_POINTER_HIGH_PCI_ADDRESS 0x9bc
-
-/*
- * DMA Channel Control
- */
-
-#define CHANNEL0CONTROL 0x840
-#define CHANNEL0CONTROL_HIGH 0x880
-
-#define CHANNEL1CONTROL 0x844
-#define CHANNEL1CONTROL_HIGH 0x884
-
-#define CHANNEL2CONTROL 0x848
-#define CHANNEL2CONTROL_HIGH 0x888
-
-#define CHANNEL3CONTROL 0x84C
-#define CHANNEL3CONTROL_HIGH 0x88C
-
-#define CHANNEL4CONTROL 0x940
-#define CHANNEL4CONTROL_HIGH 0x980
-
-#define CHANNEL5CONTROL 0x944
-#define CHANNEL5CONTROL_HIGH 0x984
-
-#define CHANNEL6CONTROL 0x948
-#define CHANNEL6CONTROL_HIGH 0x988
-
-#define CHANNEL7CONTROL 0x94C
-#define CHANNEL7CONTROL_HIGH 0x98C
-
-
-/*
- * DMA Arbiter
- */
-
-#define ARBITER_CONTROL_0_3 0x860
-#define ARBITER_CONTROL_4_7 0x960
-
-
-/*
- * DMA Interrupt
- */
-
-#define CHANELS0_3_INTERRUPT_CAUSE 0x8c0
-#define CHANELS0_3_INTERRUPT_MASK 0x8c4
-#define CHANELS0_3_ERROR_ADDRESS 0x8c8
-#define CHANELS0_3_ERROR_SELECT 0x8cc
-#define CHANELS4_7_INTERRUPT_CAUSE 0x9c0
-#define CHANELS4_7_INTERRUPT_MASK 0x9c4
-#define CHANELS4_7_ERROR_ADDRESS 0x9c8
-#define CHANELS4_7_ERROR_SELECT 0x9cc
-
-
-/*
- * DMA Debug (for internal use)
- */
-
-#define DMA_X0_ADDRESS 0x8e0
-#define DMA_X0_COMMAND_AND_ID 0x8e4
-#define DMA_X0_WRITE_DATA_LOW 0x8e8
-#define DMA_X0_WRITE_DATA_HIGH 0x8ec
-#define DMA_X0_WRITE_BYTE_ENABLE 0x8f8
-#define DMA_X0_READ_DATA_LOW 0x8f0
-#define DMA_X0_READ_DATA_HIGH 0x8f4
-#define DMA_X0_READ_ID 0x8fc
-#define DMA_X1_ADDRESS 0x9e0
-#define DMA_X1_COMMAND_AND_ID 0x9e4
-#define DMA_X1_WRITE_DATA_LOW 0x9e8
-#define DMA_X1_WRITE_DATA_HIGH 0x9ec
-#define DMA_X1_WRITE_BYTE_ENABLE 0x9f8
-#define DMA_X1_READ_DATA_LOW 0x9f0
-#define DMA_X1_READ_DATA_HIGH 0x9f4
-#define DMA_X1_READ_ID 0x9fc
-
-/*
- * Timer_Counter
- */
-
-#define TIMER_COUNTER0 0x850
-#define TIMER_COUNTER1 0x854
-#define TIMER_COUNTER2 0x858
-#define TIMER_COUNTER3 0x85C
-#define TIMER_COUNTER_0_3_CONTROL 0x864
-#define TIMER_COUNTER_0_3_INTERRUPT_CAUSE 0x868
-#define TIMER_COUNTER_0_3_INTERRUPT_MASK 0x86c
-#define TIMER_COUNTER4 0x950
-#define TIMER_COUNTER5 0x954
-#define TIMER_COUNTER6 0x958
-#define TIMER_COUNTER7 0x95C
-#define TIMER_COUNTER_4_7_CONTROL 0x964
-#define TIMER_COUNTER_4_7_INTERRUPT_CAUSE 0x968
-#define TIMER_COUNTER_4_7_INTERRUPT_MASK 0x96c
-
-/*
- * PCI Slave Address Decoding
- */
-
-#define PCI_0SCS_0_BANK_SIZE 0xc08
-#define PCI_1SCS_0_BANK_SIZE 0xc88
-#define PCI_0SCS_1_BANK_SIZE 0xd08
-#define PCI_1SCS_1_BANK_SIZE 0xd88
-#define PCI_0SCS_2_BANK_SIZE 0xc0c
-#define PCI_1SCS_2_BANK_SIZE 0xc8c
-#define PCI_0SCS_3_BANK_SIZE 0xd0c
-#define PCI_1SCS_3_BANK_SIZE 0xd8c
-#define PCI_0CS_0_BANK_SIZE 0xc10
-#define PCI_1CS_0_BANK_SIZE 0xc90
-#define PCI_0CS_1_BANK_SIZE 0xd10
-#define PCI_1CS_1_BANK_SIZE 0xd90
-#define PCI_0CS_2_BANK_SIZE 0xd18
-#define PCI_1CS_2_BANK_SIZE 0xd98
-#define PCI_0CS_3_BANK_SIZE 0xc14
-#define PCI_1CS_3_BANK_SIZE 0xc94
-#define PCI_0CS_BOOT_BANK_SIZE 0xd14
-#define PCI_1CS_BOOT_BANK_SIZE 0xd94
-#define PCI_0P2P_MEM0_BAR_SIZE 0xd1c
-#define PCI_1P2P_MEM0_BAR_SIZE 0xd9c
-#define PCI_0P2P_MEM1_BAR_SIZE 0xd20
-#define PCI_1P2P_MEM1_BAR_SIZE 0xda0
-#define PCI_0P2P_I_O_BAR_SIZE 0xd24
-#define PCI_1P2P_I_O_BAR_SIZE 0xda4
-#define PCI_0CPU_BAR_SIZE 0xd28
-#define PCI_1CPU_BAR_SIZE 0xda8
-#define PCI_0DAC_SCS_0_BANK_SIZE 0xe00
-#define PCI_1DAC_SCS_0_BANK_SIZE 0xe80
-#define PCI_0DAC_SCS_1_BANK_SIZE 0xe04
-#define PCI_1DAC_SCS_1_BANK_SIZE 0xe84
-#define PCI_0DAC_SCS_2_BANK_SIZE 0xe08
-#define PCI_1DAC_SCS_2_BANK_SIZE 0xe88
-#define PCI_0DAC_SCS_3_BANK_SIZE 0xe0c
-#define PCI_1DAC_SCS_3_BANK_SIZE 0xe8c
-#define PCI_0DAC_CS_0_BANK_SIZE 0xe10
-#define PCI_1DAC_CS_0_BANK_SIZE 0xe90
-#define PCI_0DAC_CS_1_BANK_SIZE 0xe14
-#define PCI_1DAC_CS_1_BANK_SIZE 0xe94
-#define PCI_0DAC_CS_2_BANK_SIZE 0xe18
-#define PCI_1DAC_CS_2_BANK_SIZE 0xe98
-#define PCI_0DAC_CS_3_BANK_SIZE 0xe1c
-#define PCI_1DAC_CS_3_BANK_SIZE 0xe9c
-#define PCI_0DAC_BOOTCS_BANK_SIZE 0xe20
-#define PCI_1DAC_BOOTCS_BANK_SIZE 0xea0
-#define PCI_0DAC_P2P_MEM0_BAR_SIZE 0xe24
-#define PCI_1DAC_P2P_MEM0_BAR_SIZE 0xea4
-#define PCI_0DAC_P2P_MEM1_BAR_SIZE 0xe28
-#define PCI_1DAC_P2P_MEM1_BAR_SIZE 0xea8
-#define PCI_0DAC_CPU_BAR_SIZE 0xe2c
-#define PCI_1DAC_CPU_BAR_SIZE 0xeac
-#define PCI_0EXPANSION_ROM_BAR_SIZE 0xd2c
-#define PCI_1EXPANSION_ROM_BAR_SIZE 0xdac
-#define PCI_0BASE_ADDRESS_REGISTERS_ENABLE 0xc3c
-#define PCI_1BASE_ADDRESS_REGISTERS_ENABLE 0xcbc
-#define PCI_0SCS_0_BASE_ADDRESS_REMAP 0xc48
-#define PCI_1SCS_0_BASE_ADDRESS_REMAP 0xcc8
-#define PCI_0SCS_1_BASE_ADDRESS_REMAP 0xd48
-#define PCI_1SCS_1_BASE_ADDRESS_REMAP 0xdc8
-#define PCI_0SCS_2_BASE_ADDRESS_REMAP 0xc4c
-#define PCI_1SCS_2_BASE_ADDRESS_REMAP 0xccc
-#define PCI_0SCS_3_BASE_ADDRESS_REMAP 0xd4c
-#define PCI_1SCS_3_BASE_ADDRESS_REMAP 0xdcc
-#define PCI_0CS_0_BASE_ADDRESS_REMAP 0xc50
-#define PCI_1CS_0_BASE_ADDRESS_REMAP 0xcd0
-#define PCI_0CS_1_BASE_ADDRESS_REMAP 0xd50
-#define PCI_1CS_1_BASE_ADDRESS_REMAP 0xdd0
-#define PCI_0CS_2_BASE_ADDRESS_REMAP 0xd58
-#define PCI_1CS_2_BASE_ADDRESS_REMAP 0xdd8
-#define PCI_0CS_3_BASE_ADDRESS_REMAP 0xc54
-#define PCI_1CS_3_BASE_ADDRESS_REMAP 0xcd4
-#define PCI_0CS_BOOTCS_BASE_ADDRESS_REMAP 0xd54
-#define PCI_1CS_BOOTCS_BASE_ADDRESS_REMAP 0xdd4
-#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xd5c
-#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xddc
-#define PCI_0P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xd60
-#define PCI_1P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xde0
-#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xd64
-#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xde4
-#define PCI_0P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xd68
-#define PCI_1P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xde8
-#define PCI_0P2P_I_O_BASE_ADDRESS_REMAP 0xd6c
-#define PCI_1P2P_I_O_BASE_ADDRESS_REMAP 0xdec
-#define PCI_0CPU_BASE_ADDRESS_REMAP 0xd70
-#define PCI_1CPU_BASE_ADDRESS_REMAP 0xdf0
-#define PCI_0DAC_SCS_0_BASE_ADDRESS_REMAP 0xf00
-#define PCI_1DAC_SCS_0_BASE_ADDRESS_REMAP 0xff0
-#define PCI_0DAC_SCS_1_BASE_ADDRESS_REMAP 0xf04
-#define PCI_1DAC_SCS_1_BASE_ADDRESS_REMAP 0xf84
-#define PCI_0DAC_SCS_2_BASE_ADDRESS_REMAP 0xf08
-#define PCI_1DAC_SCS_2_BASE_ADDRESS_REMAP 0xf88
-#define PCI_0DAC_SCS_3_BASE_ADDRESS_REMAP 0xf0c
-#define PCI_1DAC_SCS_3_BASE_ADDRESS_REMAP 0xf8c
-#define PCI_0DAC_CS_0_BASE_ADDRESS_REMAP 0xf10
-#define PCI_1DAC_CS_0_BASE_ADDRESS_REMAP 0xf90
-#define PCI_0DAC_CS_1_BASE_ADDRESS_REMAP 0xf14
-#define PCI_1DAC_CS_1_BASE_ADDRESS_REMAP 0xf94
-#define PCI_0DAC_CS_2_BASE_ADDRESS_REMAP 0xf18
-#define PCI_1DAC_CS_2_BASE_ADDRESS_REMAP 0xf98
-#define PCI_0DAC_CS_3_BASE_ADDRESS_REMAP 0xf1c
-#define PCI_1DAC_CS_3_BASE_ADDRESS_REMAP 0xf9c
-#define PCI_0DAC_BOOTCS_BASE_ADDRESS_REMAP 0xf20
-#define PCI_1DAC_BOOTCS_BASE_ADDRESS_REMAP 0xfa0
-#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xf24
-#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_LOW 0xfa4
-#define PCI_0DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xf28
-#define PCI_1DAC_P2P_MEM0_BASE_ADDRESS_REMAP_HIGH 0xfa8
-#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xf2c
-#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_LOW 0xfac
-#define PCI_0DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xf30
-#define PCI_1DAC_P2P_MEM1_BASE_ADDRESS_REMAP_HIGH 0xfb0
-#define PCI_0DAC_CPU_BASE_ADDRESS_REMAP 0xf34
-#define PCI_1DAC_CPU_BASE_ADDRESS_REMAP 0xfb4
-#define PCI_0EXPANSION_ROM_BASE_ADDRESS_REMAP 0xf38
-#define PCI_1EXPANSION_ROM_BASE_ADDRESS_REMAP 0xfb8
-#define PCI_0ADDRESS_DECODE_CONTROL 0xd3c
-#define PCI_1ADDRESS_DECODE_CONTROL 0xdbc
-
-/*
- * PCI Control
- */
-
-#define PCI_0COMMAND 0xc00
-#define PCI_1COMMAND 0xc80
-#define PCI_0MODE 0xd00
-#define PCI_1MODE 0xd80
-#define PCI_0TIMEOUT_RETRY 0xc04
-#define PCI_1TIMEOUT_RETRY 0xc84
-#define PCI_0READ_BUFFER_DISCARD_TIMER 0xd04
-#define PCI_1READ_BUFFER_DISCARD_TIMER 0xd84
-#define MSI_0TRIGGER_TIMER 0xc38
-#define MSI_1TRIGGER_TIMER 0xcb8
-#define PCI_0ARBITER_CONTROL 0x1d00
-#define PCI_1ARBITER_CONTROL 0x1d80
-/* changing untill here */
-#define PCI_0CROSS_BAR_CONTROL_LOW 0x1d08
-#define PCI_0CROSS_BAR_CONTROL_HIGH 0x1d0c
-#define PCI_0CROSS_BAR_TIMEOUT 0x1d04
-#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d18
-#define PCI_0READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d1c
-#define PCI_0SYNC_BARRIER_VIRTUAL_REGISTER 0x1d10
-#define PCI_0P2P_CONFIGURATION 0x1d14
-#define PCI_0ACCESS_CONTROL_BASE_0_LOW 0x1e00
-#define PCI_0ACCESS_CONTROL_BASE_0_HIGH 0x1e04
-#define PCI_0ACCESS_CONTROL_TOP_0 0x1e08
-#define PCI_0ACCESS_CONTROL_BASE_1_LOW 0c1e10
-#define PCI_0ACCESS_CONTROL_BASE_1_HIGH 0x1e14
-#define PCI_0ACCESS_CONTROL_TOP_1 0x1e18
-#define PCI_0ACCESS_CONTROL_BASE_2_LOW 0c1e20
-#define PCI_0ACCESS_CONTROL_BASE_2_HIGH 0x1e24
-#define PCI_0ACCESS_CONTROL_TOP_2 0x1e28
-#define PCI_0ACCESS_CONTROL_BASE_3_LOW 0c1e30
-#define PCI_0ACCESS_CONTROL_BASE_3_HIGH 0x1e34
-#define PCI_0ACCESS_CONTROL_TOP_3 0x1e38
-#define PCI_0ACCESS_CONTROL_BASE_4_LOW 0c1e40
-#define PCI_0ACCESS_CONTROL_BASE_4_HIGH 0x1e44
-#define PCI_0ACCESS_CONTROL_TOP_4 0x1e48
-#define PCI_0ACCESS_CONTROL_BASE_5_LOW 0c1e50
-#define PCI_0ACCESS_CONTROL_BASE_5_HIGH 0x1e54
-#define PCI_0ACCESS_CONTROL_TOP_5 0x1e58
-#define PCI_0ACCESS_CONTROL_BASE_6_LOW 0c1e60
-#define PCI_0ACCESS_CONTROL_BASE_6_HIGH 0x1e64
-#define PCI_0ACCESS_CONTROL_TOP_6 0x1e68
-#define PCI_0ACCESS_CONTROL_BASE_7_LOW 0c1e70
-#define PCI_0ACCESS_CONTROL_BASE_7_HIGH 0x1e74
-#define PCI_0ACCESS_CONTROL_TOP_7 0x1e78
-#define PCI_1CROSS_BAR_CONTROL_LOW 0x1d88
-#define PCI_1CROSS_BAR_CONTROL_HIGH 0x1d8c
-#define PCI_1CROSS_BAR_TIMEOUT 0x1d84
-#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_LOW 0x1d98
-#define PCI_1READ_RESPONSE_CROSS_BAR_CONTROL_HIGH 0x1d9c
-#define PCI_1SYNC_BARRIER_VIRTUAL_REGISTER 0x1d90
-#define PCI_1P2P_CONFIGURATION 0x1d94
-#define PCI_1ACCESS_CONTROL_BASE_0_LOW 0x1e80
-#define PCI_1ACCESS_CONTROL_BASE_0_HIGH 0x1e84
-#define PCI_1ACCESS_CONTROL_TOP_0 0x1e88
-#define PCI_1ACCESS_CONTROL_BASE_1_LOW 0c1e90
-#define PCI_1ACCESS_CONTROL_BASE_1_HIGH 0x1e94
-#define PCI_1ACCESS_CONTROL_TOP_1 0x1e98
-#define PCI_1ACCESS_CONTROL_BASE_2_LOW 0c1ea0
-#define PCI_1ACCESS_CONTROL_BASE_2_HIGH 0x1ea4
-#define PCI_1ACCESS_CONTROL_TOP_2 0x1ea8
-#define PCI_1ACCESS_CONTROL_BASE_3_LOW 0c1eb0
-#define PCI_1ACCESS_CONTROL_BASE_3_HIGH 0x1eb4
-#define PCI_1ACCESS_CONTROL_TOP_3 0x1eb8
-#define PCI_1ACCESS_CONTROL_BASE_4_LOW 0c1ec0
-#define PCI_1ACCESS_CONTROL_BASE_4_HIGH 0x1ec4
-#define PCI_1ACCESS_CONTROL_TOP_4 0x1ec8
-#define PCI_1ACCESS_CONTROL_BASE_5_LOW 0c1ed0
-#define PCI_1ACCESS_CONTROL_BASE_5_HIGH 0x1ed4
-#define PCI_1ACCESS_CONTROL_TOP_5 0x1ed8
-#define PCI_1ACCESS_CONTROL_BASE_6_LOW 0c1ee0
-#define PCI_1ACCESS_CONTROL_BASE_6_HIGH 0x1ee4
-#define PCI_1ACCESS_CONTROL_TOP_6 0x1ee8
-#define PCI_1ACCESS_CONTROL_BASE_7_LOW 0c1ef0
-#define PCI_1ACCESS_CONTROL_BASE_7_HIGH 0x1ef4
-#define PCI_1ACCESS_CONTROL_TOP_7 0x1ef8
-
-/*
- * PCI Snoop Control
- */
-
-#define PCI_0SNOOP_CONTROL_BASE_0_LOW 0x1f00
-#define PCI_0SNOOP_CONTROL_BASE_0_HIGH 0x1f04
-#define PCI_0SNOOP_CONTROL_TOP_0 0x1f08
-#define PCI_0SNOOP_CONTROL_BASE_1_0_LOW 0x1f10
-#define PCI_0SNOOP_CONTROL_BASE_1_0_HIGH 0x1f14
-#define PCI_0SNOOP_CONTROL_TOP_1 0x1f18
-#define PCI_0SNOOP_CONTROL_BASE_2_0_LOW 0x1f20
-#define PCI_0SNOOP_CONTROL_BASE_2_0_HIGH 0x1f24
-#define PCI_0SNOOP_CONTROL_TOP_2 0x1f28
-#define PCI_0SNOOP_CONTROL_BASE_3_0_LOW 0x1f30
-#define PCI_0SNOOP_CONTROL_BASE_3_0_HIGH 0x1f34
-#define PCI_0SNOOP_CONTROL_TOP_3 0x1f38
-#define PCI_1SNOOP_CONTROL_BASE_0_LOW 0x1f80
-#define PCI_1SNOOP_CONTROL_BASE_0_HIGH 0x1f84
-#define PCI_1SNOOP_CONTROL_TOP_0 0x1f88
-#define PCI_1SNOOP_CONTROL_BASE_1_0_LOW 0x1f90
-#define PCI_1SNOOP_CONTROL_BASE_1_0_HIGH 0x1f94
-#define PCI_1SNOOP_CONTROL_TOP_1 0x1f98
-#define PCI_1SNOOP_CONTROL_BASE_2_0_LOW 0x1fa0
-#define PCI_1SNOOP_CONTROL_BASE_2_0_HIGH 0x1fa4
-#define PCI_1SNOOP_CONTROL_TOP_2 0x1fa8
-#define PCI_1SNOOP_CONTROL_BASE_3_0_LOW 0x1fb0
-#define PCI_1SNOOP_CONTROL_BASE_3_0_HIGH 0x1fb4
-#define PCI_1SNOOP_CONTROL_TOP_3 0x1fb8
-
-/*
- * PCI Configuration Address
- */
-
-#define PCI_0CONFIGURATION_ADDRESS 0xcf8
-#define PCI_0CONFIGURATION_DATA_VIRTUAL_REGISTER 0xcfc
-#define PCI_1CONFIGURATION_ADDRESS 0xc78
-#define PCI_1CONFIGURATION_DATA_VIRTUAL_REGISTER 0xc7c
-#define PCI_0INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xc34
-#define PCI_1INTERRUPT_ACKNOWLEDGE_VIRTUAL_REGISTER 0xcb4
-
-/*
- * PCI Error Report
- */
-
-#define PCI_0SERR_MASK 0xc28
-#define PCI_0ERROR_ADDRESS_LOW 0x1d40
-#define PCI_0ERROR_ADDRESS_HIGH 0x1d44
-#define PCI_0ERROR_DATA_LOW 0x1d48
-#define PCI_0ERROR_DATA_HIGH 0x1d4c
-#define PCI_0ERROR_COMMAND 0x1d50
-#define PCI_0ERROR_CAUSE 0x1d58
-#define PCI_0ERROR_MASK 0x1d5c
-
-#define PCI_1SERR_MASK 0xca8
-#define PCI_1ERROR_ADDRESS_LOW 0x1dc0
-#define PCI_1ERROR_ADDRESS_HIGH 0x1dc4
-#define PCI_1ERROR_DATA_LOW 0x1dc8
-#define PCI_1ERROR_DATA_HIGH 0x1dcc
-#define PCI_1ERROR_COMMAND 0x1dd0
-#define PCI_1ERROR_CAUSE 0x1dd8
-#define PCI_1ERROR_MASK 0x1ddc
-
-
-/*
- * Lslave Debug (for internal use)
- */
-
-#define L_SLAVE_X0_ADDRESS 0x1d20
-#define L_SLAVE_X0_COMMAND_AND_ID 0x1d24
-#define L_SLAVE_X1_ADDRESS 0x1d28
-#define L_SLAVE_X1_COMMAND_AND_ID 0x1d2c
-#define L_SLAVE_WRITE_DATA_LOW 0x1d30
-#define L_SLAVE_WRITE_DATA_HIGH 0x1d34
-#define L_SLAVE_WRITE_BYTE_ENABLE 0x1d60
-#define L_SLAVE_READ_DATA_LOW 0x1d38
-#define L_SLAVE_READ_DATA_HIGH 0x1d3c
-#define L_SLAVE_READ_ID 0x1d64
-
-#if 0 /* Disabled because PCI_* namespace belongs to PCI subsystem ... */
-
-/*
- * PCI Configuration Function 0
- */
-
-#define PCI_DEVICE_AND_VENDOR_ID 0x000
-#define PCI_STATUS_AND_COMMAND 0x004
-#define PCI_CLASS_CODE_AND_REVISION_ID 0x008
-#define PCI_BIST_HEADER_TYPE_LATENCY_TIMER_CACHE_LINE 0x00C
-#define PCI_SCS_0_BASE_ADDRESS 0x010
-#define PCI_SCS_1_BASE_ADDRESS 0x014
-#define PCI_SCS_2_BASE_ADDRESS 0x018
-#define PCI_SCS_3_BASE_ADDRESS 0x01C
-#define PCI_INTERNAL_REGISTERS_MEMORY_MAPPED_BASE_ADDRESS 0x020
-#define PCI_INTERNAL_REGISTERS_I_OMAPPED_BASE_ADDRESS 0x024
-#define PCI_SUBSYSTEM_ID_AND_SUBSYSTEM_VENDOR_ID 0x02C
-#define PCI_EXPANSION_ROM_BASE_ADDRESS_REGISTER 0x030
-#define PCI_CAPABILTY_LIST_POINTER 0x034
-#define PCI_INTERRUPT_PIN_AND_LINE 0x03C
-#define PCI_POWER_MANAGEMENT_CAPABILITY 0x040
-#define PCI_POWER_MANAGEMENT_STATUS_AND_CONTROL 0x044
-#define PCI_VPD_ADDRESS 0x048
-#define PCI_VPD_DATA 0X04c
-#define PCI_MSI_MESSAGE_CONTROL 0x050
-#define PCI_MSI_MESSAGE_ADDRESS 0x054
-#define PCI_MSI_MESSAGE_UPPER_ADDRESS 0x058
-#define PCI_MSI_MESSAGE_DATA 0x05c
-#define PCI_COMPACT_PCI_HOT_SWAP_CAPABILITY 0x058
-
-/*
- * PCI Configuration Function 1
- */
-
-#define PCI_CS_0_BASE_ADDRESS 0x110
-#define PCI_CS_1_BASE_ADDRESS 0x114
-#define PCI_CS_2_BASE_ADDRESS 0x118
-#define PCI_CS_3_BASE_ADDRESS 0x11c
-#define PCI_BOOTCS_BASE_ADDRESS 0x120
-
-/*
- * PCI Configuration Function 2
- */
-
-#define PCI_P2P_MEM0_BASE_ADDRESS 0x210
-#define PCI_P2P_MEM1_BASE_ADDRESS 0x214
-#define PCI_P2P_I_O_BASE_ADDRESS 0x218
-#define PCI_CPU_BASE_ADDRESS 0x21c
-
-/*
- * PCI Configuration Function 4
- */
-
-#define PCI_DAC_SCS_0_BASE_ADDRESS_LOW 0x410
-#define PCI_DAC_SCS_0_BASE_ADDRESS_HIGH 0x414
-#define PCI_DAC_SCS_1_BASE_ADDRESS_LOW 0x418
-#define PCI_DAC_SCS_1_BASE_ADDRESS_HIGH 0x41c
-#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_LOW 0x420
-#define PCI_DAC_P2P_MEM0_BASE_ADDRESS_HIGH 0x424
-
-
-/*
- * PCI Configuration Function 5
- */
-
-#define PCI_DAC_SCS_2_BASE_ADDRESS_LOW 0x510
-#define PCI_DAC_SCS_2_BASE_ADDRESS_HIGH 0x514
-#define PCI_DAC_SCS_3_BASE_ADDRESS_LOW 0x518
-#define PCI_DAC_SCS_3_BASE_ADDRESS_HIGH 0x51c
-#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_LOW 0x520
-#define PCI_DAC_P2P_MEM1_BASE_ADDRESS_HIGH 0x524
-
-
-/*
- * PCI Configuration Function 6
- */
-
-#define PCI_DAC_CS_0_BASE_ADDRESS_LOW 0x610
-#define PCI_DAC_CS_0_BASE_ADDRESS_HIGH 0x614
-#define PCI_DAC_CS_1_BASE_ADDRESS_LOW 0x618
-#define PCI_DAC_CS_1_BASE_ADDRESS_HIGH 0x61c
-#define PCI_DAC_CS_2_BASE_ADDRESS_LOW 0x620
-#define PCI_DAC_CS_2_BASE_ADDRESS_HIGH 0x624
-
-/*
- * PCI Configuration Function 7
- */
-
-#define PCI_DAC_CS_3_BASE_ADDRESS_LOW 0x710
-#define PCI_DAC_CS_3_BASE_ADDRESS_HIGH 0x714
-#define PCI_DAC_BOOTCS_BASE_ADDRESS_LOW 0x718
-#define PCI_DAC_BOOTCS_BASE_ADDRESS_HIGH 0x71c
-#define PCI_DAC_CPU_BASE_ADDRESS_LOW 0x720
-#define PCI_DAC_CPU_BASE_ADDRESS_HIGH 0x724
-#endif
-
-/*
- * Interrupts
- */
-
-#define LOW_INTERRUPT_CAUSE_REGISTER 0xc18
-#define HIGH_INTERRUPT_CAUSE_REGISTER 0xc68
-#define CPU_INTERRUPT_MASK_REGISTER_LOW 0xc1c
-#define CPU_INTERRUPT_MASK_REGISTER_HIGH 0xc6c
-#define CPU_SELECT_CAUSE_REGISTER 0xc70
-#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_LOW 0xc24
-#define PCI_0INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0xc64
-#define PCI_0SELECT_CAUSE 0xc74
-#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_LOW 0xca4
-#define PCI_1INTERRUPT_CAUSE_MASK_REGISTER_HIGH 0xce4
-#define PCI_1SELECT_CAUSE 0xcf4
-#define CPU_INT_0_MASK 0xe60
-#define CPU_INT_1_MASK 0xe64
-#define CPU_INT_2_MASK 0xe68
-#define CPU_INT_3_MASK 0xe6c
-
-/*
- * I20 Support registers
- */
-
-#define INBOUND_MESSAGE_REGISTER0_PCI0_SIDE 0x010
-#define INBOUND_MESSAGE_REGISTER1_PCI0_SIDE 0x014
-#define OUTBOUND_MESSAGE_REGISTER0_PCI0_SIDE 0x018
-#define OUTBOUND_MESSAGE_REGISTER1_PCI0_SIDE 0x01C
-#define INBOUND_DOORBELL_REGISTER_PCI0_SIDE 0x020
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE 0x024
-#define INBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE 0x028
-#define OUTBOUND_DOORBELL_REGISTER_PCI0_SIDE 0x02C
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI0_SIDE 0x030
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI0_SIDE 0x034
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE 0x040
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI0_SIDE 0x044
-#define QUEUE_CONTROL_REGISTER_PCI0_SIDE 0x050
-#define QUEUE_BASE_ADDRESS_REGISTER_PCI0_SIDE 0x054
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE 0x060
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE 0x064
-#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE 0x068
-#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE 0x06C
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI0_SIDE 0x070
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI0_SIDE 0x074
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI0_SIDE 0x0F8
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI0_SIDE 0x0FC
-
-#define INBOUND_MESSAGE_REGISTER0_PCI1_SIDE 0x090
-#define INBOUND_MESSAGE_REGISTER1_PCI1_SIDE 0x094
-#define OUTBOUND_MESSAGE_REGISTER0_PCI1_SIDE 0x098
-#define OUTBOUND_MESSAGE_REGISTER1_PCI1_SIDE 0x09C
-#define INBOUND_DOORBELL_REGISTER_PCI1_SIDE 0x0A0
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE 0x0A4
-#define INBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE 0x0A8
-#define OUTBOUND_DOORBELL_REGISTER_PCI1_SIDE 0x0AC
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_PCI1_SIDE 0x0B0
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_PCI1_SIDE 0x0B4
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE 0x0C0
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_PCI1_SIDE 0x0C4
-#define QUEUE_CONTROL_REGISTER_PCI1_SIDE 0x0D0
-#define QUEUE_BASE_ADDRESS_REGISTER_PCI1_SIDE 0x0D4
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0E0
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0E4
-#define INBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0E8
-#define INBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0EC
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_PCI1_SIDE 0x0F0
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_PCI1_SIDE 0x0F4
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_PCI1_SIDE 0x078
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_PCI1_SIDE 0x07C
-
-#define INBOUND_MESSAGE_REGISTER0_CPU0_SIDE 0X1C10
-#define INBOUND_MESSAGE_REGISTER1_CPU0_SIDE 0X1C14
-#define OUTBOUND_MESSAGE_REGISTER0_CPU0_SIDE 0X1C18
-#define OUTBOUND_MESSAGE_REGISTER1_CPU0_SIDE 0X1C1C
-#define INBOUND_DOORBELL_REGISTER_CPU0_SIDE 0X1C20
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE 0X1C24
-#define INBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE 0X1C28
-#define OUTBOUND_DOORBELL_REGISTER_CPU0_SIDE 0X1C2C
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU0_SIDE 0X1C30
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU0_SIDE 0X1C34
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE 0X1C40
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU0_SIDE 0X1C44
-#define QUEUE_CONTROL_REGISTER_CPU0_SIDE 0X1C50
-#define QUEUE_BASE_ADDRESS_REGISTER_CPU0_SIDE 0X1C54
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C60
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C64
-#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C68
-#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C6C
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1C70
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1C74
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU0_SIDE 0X1CF8
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU0_SIDE 0X1CFC
-
-#define INBOUND_MESSAGE_REGISTER0_CPU1_SIDE 0X1C90
-#define INBOUND_MESSAGE_REGISTER1_CPU1_SIDE 0X1C94
-#define OUTBOUND_MESSAGE_REGISTER0_CPU1_SIDE 0X1C98
-#define OUTBOUND_MESSAGE_REGISTER1_CPU1_SIDE 0X1C9C
-#define INBOUND_DOORBELL_REGISTER_CPU1_SIDE 0X1CA0
-#define INBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE 0X1CA4
-#define INBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE 0X1CA8
-#define OUTBOUND_DOORBELL_REGISTER_CPU1_SIDE 0X1CAC
-#define OUTBOUND_INTERRUPT_CAUSE_REGISTER_CPU1_SIDE 0X1CB0
-#define OUTBOUND_INTERRUPT_MASK_REGISTER_CPU1_SIDE 0X1CB4
-#define INBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE 0X1CC0
-#define OUTBOUND_QUEUE_PORT_VIRTUAL_REGISTER_CPU1_SIDE 0X1CC4
-#define QUEUE_CONTROL_REGISTER_CPU1_SIDE 0X1CD0
-#define QUEUE_BASE_ADDRESS_REGISTER_CPU1_SIDE 0X1CD4
-#define INBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CE0
-#define INBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CE4
-#define INBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CE8
-#define INBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CEC
-#define OUTBOUND_FREE_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1CF0
-#define OUTBOUND_FREE_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1CF4
-#define OUTBOUND_POST_HEAD_POINTER_REGISTER_CPU1_SIDE 0X1C78
-#define OUTBOUND_POST_TAIL_POINTER_REGISTER_CPU1_SIDE 0X1C7C
-
-/*
- * Communication Unit Registers
- */
-
-#define ETHERNET_0_ADDRESS_CONTROL_LOW
-#define ETHERNET_0_ADDRESS_CONTROL_HIGH 0xf204
-#define ETHERNET_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf208
-#define ETHERNET_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf20c
-#define ETHERNET_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf210
-#define ETHERNET_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf214
-#define ETHERNET_0_HASH_TABLE_PCI_HIGH_ADDRESS 0xf218
-#define ETHERNET_1_ADDRESS_CONTROL_LOW 0xf220
-#define ETHERNET_1_ADDRESS_CONTROL_HIGH 0xf224
-#define ETHERNET_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf228
-#define ETHERNET_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf22c
-#define ETHERNET_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf230
-#define ETHERNET_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf234
-#define ETHERNET_1_HASH_TABLE_PCI_HIGH_ADDRESS 0xf238
-#define ETHERNET_2_ADDRESS_CONTROL_LOW 0xf240
-#define ETHERNET_2_ADDRESS_CONTROL_HIGH 0xf244
-#define ETHERNET_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf248
-#define ETHERNET_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf24c
-#define ETHERNET_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf250
-#define ETHERNET_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf254
-#define ETHERNET_2_HASH_TABLE_PCI_HIGH_ADDRESS 0xf258
-#define MPSC_0_ADDRESS_CONTROL_LOW 0xf280
-#define MPSC_0_ADDRESS_CONTROL_HIGH 0xf284
-#define MPSC_0_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf288
-#define MPSC_0_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf28c
-#define MPSC_0_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf290
-#define MPSC_0_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf294
-#define MPSC_1_ADDRESS_CONTROL_LOW 0xf2a0
-#define MPSC_1_ADDRESS_CONTROL_HIGH 0xf2a4
-#define MPSC_1_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2a8
-#define MPSC_1_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2ac
-#define MPSC_1_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2b0
-#define MPSC_1_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2b4
-#define MPSC_2_ADDRESS_CONTROL_LOW 0xf2c0
-#define MPSC_2_ADDRESS_CONTROL_HIGH 0xf2c4
-#define MPSC_2_RECEIVE_BUFFER_PCI_HIGH_ADDRESS 0xf2c8
-#define MPSC_2_TRANSMIT_BUFFER_PCI_HIGH_ADDRESS 0xf2cc
-#define MPSC_2_RECEIVE_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d0
-#define MPSC_2_TRANSMIT_DESCRIPTOR_PCI_HIGH_ADDRESS 0xf2d4
-#define SERIAL_INIT_PCI_HIGH_ADDRESS 0xf320
-#define SERIAL_INIT_LAST_DATA 0xf324
-#define SERIAL_INIT_STATUS_AND_CONTROL 0xf328
-#define COMM_UNIT_ARBITER_CONTROL 0xf300
-#define COMM_UNIT_CROSS_BAR_TIMEOUT 0xf304
-#define COMM_UNIT_INTERRUPT_CAUSE 0xf310
-#define COMM_UNIT_INTERRUPT_MASK 0xf314
-#define COMM_UNIT_ERROR_ADDRESS 0xf314
-
-/*
- * Cunit Debug (for internal use)
- */
-
-#define CUNIT_ADDRESS 0xf340
-#define CUNIT_COMMAND_AND_ID 0xf344
-#define CUNIT_WRITE_DATA_LOW 0xf348
-#define CUNIT_WRITE_DATA_HIGH 0xf34c
-#define CUNIT_WRITE_BYTE_ENABLE 0xf358
-#define CUNIT_READ_DATA_LOW 0xf350
-#define CUNIT_READ_DATA_HIGH 0xf354
-#define CUNIT_READ_ID 0xf35c
-
-/*
- * Fast Ethernet Unit Registers
- */
-
-/* Ethernet */
-
-#define ETHERNET_PHY_ADDRESS_REGISTER 0x2000
-#define ETHERNET_SMI_REGISTER 0x2010
-
-/* Ethernet 0 */
-
-#define ETHERNET0_PORT_CONFIGURATION_REGISTER 0x2400
-#define ETHERNET0_PORT_CONFIGURATION_EXTEND_REGISTER 0x2408
-#define ETHERNET0_PORT_COMMAND_REGISTER 0x2410
-#define ETHERNET0_PORT_STATUS_REGISTER 0x2418
-#define ETHERNET0_SERIAL_PARAMETRS_REGISTER 0x2420
-#define ETHERNET0_HASH_TABLE_POINTER_REGISTER 0x2428
-#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2430
-#define ETHERNET0_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2438
-#define ETHERNET0_SDMA_CONFIGURATION_REGISTER 0x2440
-#define ETHERNET0_SDMA_COMMAND_REGISTER 0x2448
-#define ETHERNET0_INTERRUPT_CAUSE_REGISTER 0x2450
-#define ETHERNET0_INTERRUPT_MASK_REGISTER 0x2458
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER0 0x2480
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER1 0x2484
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER2 0x2488
-#define ETHERNET0_FIRST_RX_DESCRIPTOR_POINTER3 0x248c
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER0 0x24a0
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER1 0x24a4
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER2 0x24a8
-#define ETHERNET0_CURRENT_RX_DESCRIPTOR_POINTER3 0x24ac
-#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER0 0x24e0
-#define ETHERNET0_CURRENT_TX_DESCRIPTOR_POINTER1 0x24e4
-#define ETHERNET0_MIB_COUNTER_BASE 0x2500
-
-/* Ethernet 1 */
-
-#define ETHERNET1_PORT_CONFIGURATION_REGISTER 0x2800
-#define ETHERNET1_PORT_CONFIGURATION_EXTEND_REGISTER 0x2808
-#define ETHERNET1_PORT_COMMAND_REGISTER 0x2810
-#define ETHERNET1_PORT_STATUS_REGISTER 0x2818
-#define ETHERNET1_SERIAL_PARAMETRS_REGISTER 0x2820
-#define ETHERNET1_HASH_TABLE_POINTER_REGISTER 0x2828
-#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2830
-#define ETHERNET1_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2838
-#define ETHERNET1_SDMA_CONFIGURATION_REGISTER 0x2840
-#define ETHERNET1_SDMA_COMMAND_REGISTER 0x2848
-#define ETHERNET1_INTERRUPT_CAUSE_REGISTER 0x2850
-#define ETHERNET1_INTERRUPT_MASK_REGISTER 0x2858
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER0 0x2880
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER1 0x2884
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER2 0x2888
-#define ETHERNET1_FIRST_RX_DESCRIPTOR_POINTER3 0x288c
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER0 0x28a0
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER1 0x28a4
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER2 0x28a8
-#define ETHERNET1_CURRENT_RX_DESCRIPTOR_POINTER3 0x28ac
-#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER0 0x28e0
-#define ETHERNET1_CURRENT_TX_DESCRIPTOR_POINTER1 0x28e4
-#define ETHERNET1_MIB_COUNTER_BASE 0x2900
-
-/* Ethernet 2 */
-
-#define ETHERNET2_PORT_CONFIGURATION_REGISTER 0x2c00
-#define ETHERNET2_PORT_CONFIGURATION_EXTEND_REGISTER 0x2c08
-#define ETHERNET2_PORT_COMMAND_REGISTER 0x2c10
-#define ETHERNET2_PORT_STATUS_REGISTER 0x2c18
-#define ETHERNET2_SERIAL_PARAMETRS_REGISTER 0x2c20
-#define ETHERNET2_HASH_TABLE_POINTER_REGISTER 0x2c28
-#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_LOW 0x2c30
-#define ETHERNET2_FLOW_CONTROL_SOURCE_ADDRESS_HIGH 0x2c38
-#define ETHERNET2_SDMA_CONFIGURATION_REGISTER 0x2c40
-#define ETHERNET2_SDMA_COMMAND_REGISTER 0x2c48
-#define ETHERNET2_INTERRUPT_CAUSE_REGISTER 0x2c50
-#define ETHERNET2_INTERRUPT_MASK_REGISTER 0x2c58
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER0 0x2c80
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER1 0x2c84
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER2 0x2c88
-#define ETHERNET2_FIRST_RX_DESCRIPTOR_POINTER3 0x2c8c
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER0 0x2ca0
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER1 0x2ca4
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER2 0x2ca8
-#define ETHERNET2_CURRENT_RX_DESCRIPTOR_POINTER3 0x2cac
-#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER0 0x2ce0
-#define ETHERNET2_CURRENT_TX_DESCRIPTOR_POINTER1 0x2ce4
-#define ETHERNET2_MIB_COUNTER_BASE 0x2d00
-
-/*
- * SDMA Registers
- */
-
-#define SDMA_GROUP_CONFIGURATION_REGISTER 0xb1f0
-#define CHANNEL0_CONFIGURATION_REGISTER 0x4000
-#define CHANNEL0_COMMAND_REGISTER 0x4008
-#define CHANNEL0_RX_CMD_STATUS 0x4800
-#define CHANNEL0_RX_PACKET_AND_BUFFER_SIZES 0x4804
-#define CHANNEL0_RX_BUFFER_POINTER 0x4808
-#define CHANNEL0_RX_NEXT_POINTER 0x480c
-#define CHANNEL0_CURRENT_RX_DESCRIPTOR_POINTER 0x4810
-#define CHANNEL0_TX_CMD_STATUS 0x4C00
-#define CHANNEL0_TX_PACKET_SIZE 0x4C04
-#define CHANNEL0_TX_BUFFER_POINTER 0x4C08
-#define CHANNEL0_TX_NEXT_POINTER 0x4C0c
-#define CHANNEL0_CURRENT_TX_DESCRIPTOR_POINTER 0x4c10
-#define CHANNEL0_FIRST_TX_DESCRIPTOR_POINTER 0x4c14
-#define CHANNEL1_CONFIGURATION_REGISTER 0x6000
-#define CHANNEL1_COMMAND_REGISTER 0x6008
-#define CHANNEL1_RX_CMD_STATUS 0x6800
-#define CHANNEL1_RX_PACKET_AND_BUFFER_SIZES 0x6804
-#define CHANNEL1_RX_BUFFER_POINTER 0x6808
-#define CHANNEL1_RX_NEXT_POINTER 0x680c
-#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x6810
-#define CHANNEL1_TX_CMD_STATUS 0x6C00
-#define CHANNEL1_TX_PACKET_SIZE 0x6C04
-#define CHANNEL1_TX_BUFFER_POINTER 0x6C08
-#define CHANNEL1_TX_NEXT_POINTER 0x6C0c
-#define CHANNEL1_CURRENT_RX_DESCRIPTOR_POINTER 0x6810
-#define CHANNEL1_CURRENT_TX_DESCRIPTOR_POINTER 0x6c10
-#define CHANNEL1_FIRST_TX_DESCRIPTOR_POINTER 0x6c14
-
-/* SDMA Interrupt */
-
-#define SDMA_CAUSE 0xb820
-#define SDMA_MASK 0xb8a0
-
-
-/*
- * Baude Rate Generators Registers
- */
-
-/* BRG 0 */
-
-#define BRG0_CONFIGURATION_REGISTER 0xb200
-#define BRG0_BAUDE_TUNING_REGISTER 0xb204
-
-/* BRG 1 */
-
-#define BRG1_CONFIGURATION_REGISTER 0xb208
-#define BRG1_BAUDE_TUNING_REGISTER 0xb20c
-
-/* BRG 2 */
-
-#define BRG2_CONFIGURATION_REGISTER 0xb210
-#define BRG2_BAUDE_TUNING_REGISTER 0xb214
-
-/* BRG Interrupts */
-
-#define BRG_CAUSE_REGISTER 0xb834
-#define BRG_MASK_REGISTER 0xb8b4
-
-/* MISC */
-
-#define MAIN_ROUTING_REGISTER 0xb400
-#define RECEIVE_CLOCK_ROUTING_REGISTER 0xb404
-#define TRANSMIT_CLOCK_ROUTING_REGISTER 0xb408
-#define COMM_UNIT_ARBITER_CONFIGURATION_REGISTER 0xb40c
-#define WATCHDOG_CONFIGURATION_REGISTER 0xb410
-#define WATCHDOG_VALUE_REGISTER 0xb414
-
-
-/*
- * Flex TDM Registers
- */
-
-/* FTDM Port */
-
-#define FLEXTDM_TRANSMIT_READ_POINTER 0xa800
-#define FLEXTDM_RECEIVE_READ_POINTER 0xa804
-#define FLEXTDM_CONFIGURATION_REGISTER 0xa808
-#define FLEXTDM_AUX_CHANNELA_TX_REGISTER 0xa80c
-#define FLEXTDM_AUX_CHANNELA_RX_REGISTER 0xa810
-#define FLEXTDM_AUX_CHANNELB_TX_REGISTER 0xa814
-#define FLEXTDM_AUX_CHANNELB_RX_REGISTER 0xa818
-
-/* FTDM Interrupts */
-
-#define FTDM_CAUSE_REGISTER 0xb830
-#define FTDM_MASK_REGISTER 0xb8b0
-
-
-/*
- * GPP Interface Registers
- */
-
-#define GPP_IO_CONTROL 0xf100
-#define GPP_LEVEL_CONTROL 0xf110
-#define GPP_VALUE 0xf104
-#define GPP_INTERRUPT_CAUSE 0xf108
-#define GPP_INTERRUPT_MASK 0xf10c
-
-#define MPP_CONTROL0 0xf000
-#define MPP_CONTROL1 0xf004
-#define MPP_CONTROL2 0xf008
-#define MPP_CONTROL3 0xf00c
-#define DEBUG_PORT_MULTIPLEX 0xf014
-#define SERIAL_PORT_MULTIPLEX 0xf010
-
-/*
- * I2C Registers
- */
-
-#define I2C_SLAVE_ADDRESS 0xc000
-#define I2C_EXTENDED_SLAVE_ADDRESS 0xc040
-#define I2C_DATA 0xc004
-#define I2C_CONTROL 0xc008
-#define I2C_STATUS_BAUDE_RATE 0xc00C
-#define I2C_SOFT_RESET 0xc01c
-
-/*
- * MPSC Registers
- */
-
-/*
- * MPSC0
- */
-
-#define MPSC0_MAIN_CONFIGURATION_LOW 0x8000
-#define MPSC0_MAIN_CONFIGURATION_HIGH 0x8004
-#define MPSC0_PROTOCOL_CONFIGURATION 0x8008
-#define CHANNEL0_REGISTER1 0x800c
-#define CHANNEL0_REGISTER2 0x8010
-#define CHANNEL0_REGISTER3 0x8014
-#define CHANNEL0_REGISTER4 0x8018
-#define CHANNEL0_REGISTER5 0x801c
-#define CHANNEL0_REGISTER6 0x8020
-#define CHANNEL0_REGISTER7 0x8024
-#define CHANNEL0_REGISTER8 0x8028
-#define CHANNEL0_REGISTER9 0x802c
-#define CHANNEL0_REGISTER10 0x8030
-#define CHANNEL0_REGISTER11 0x8034
-
-/*
- * MPSC1
- */
-
-#define MPSC1_MAIN_CONFIGURATION_LOW 0x9000
-#define MPSC1_MAIN_CONFIGURATION_HIGH 0x9004
-#define MPSC1_PROTOCOL_CONFIGURATION 0x9008
-#define CHANNEL1_REGISTER1 0x900c
-#define CHANNEL1_REGISTER2 0x9010
-#define CHANNEL1_REGISTER3 0x9014
-#define CHANNEL1_REGISTER4 0x9018
-#define CHANNEL1_REGISTER5 0x901c
-#define CHANNEL1_REGISTER6 0x9020
-#define CHANNEL1_REGISTER7 0x9024
-#define CHANNEL1_REGISTER8 0x9028
-#define CHANNEL1_REGISTER9 0x902c
-#define CHANNEL1_REGISTER10 0x9030
-#define CHANNEL1_REGISTER11 0x9034
-
-/*
- * MPSCs Interupts
- */
-
-#define MPSC0_CAUSE 0xb804
-#define MPSC0_MASK 0xb884
-#define MPSC1_CAUSE 0xb80c
-#define MPSC1_MASK 0xb88c
-
-#endif /* __ASM_MIPS_MV64240_H */
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 918a4894b58..6a5fa32f615 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -172,6 +172,7 @@ ASMMACRO(tlb_probe_hazard,
nop; nop; nop
)
ASMMACRO(irq_enable_hazard,
+ _ssnop; _ssnop; _ssnop;
)
ASMMACRO(irq_disable_hazard,
nop; nop; nop
diff --git a/include/asm-mips/ioctls.h b/include/asm-mips/ioctls.h
index 92f6c36aac4..5097cbf183a 100644
--- a/include/asm-mips/ioctls.h
+++ b/include/asm-mips/ioctls.h
@@ -77,6 +77,10 @@
#define TIOCSBRK 0x5427 /* BSD compatibility */
#define TIOCCBRK 0x5428 /* BSD compatibility */
#define TIOCGSID 0x7416 /* Return the session ID of FD */
+#define TCGETS2 _IOR('T',0x2A, struct termios2)
+#define TCSETS2 _IOW('T',0x2B, struct termios2)
+#define TCSETSW2 _IOW('T',0x2C, struct termios2)
+#define TCSETSF2 _IOW('T',0x2D, struct termios2)
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index 97102ebc54b..2cb52cf8bd4 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -24,7 +24,30 @@ static inline int irq_canonicalize(int irq)
#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
#endif
+#ifdef CONFIG_MIPS_MT_SMTC
+
+struct irqaction;
+
+extern unsigned long irq_hwmask[];
+extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
+ unsigned long hwmask);
+
+static inline void smtc_im_ack_irq(unsigned int irq)
+{
+ if (irq_hwmask[irq] & ST0_IM)
+ set_c0_status(irq_hwmask[irq] & ST0_IM);
+}
+
+#else
+
+static inline void smtc_im_ack_irq(unsigned int irq)
+{
+}
+
+#endif /* CONFIG_MIPS_MT_SMTC */
+
#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
+
/*
* Clear interrupt mask handling "backstop" if irq_hwmask
* entry so indicates. This implies that the ack() or end()
@@ -38,6 +61,7 @@ do { \
~(irq_hwmask[irq] & 0x0000ff00)); \
} while (0)
#else
+
#define __DO_IRQ_SMTC_HOOK(irq) do { } while (0)
#endif
@@ -60,14 +84,6 @@ do { \
extern void arch_init_irq(void);
extern void spurious_interrupt(void);
-#ifdef CONFIG_MIPS_MT_SMTC
-struct irqaction;
-
-extern unsigned long irq_hwmask[];
-extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
- unsigned long hwmask);
-#endif /* CONFIG_MIPS_MT_SMTC */
-
extern int allocate_irqno(void);
extern void alloc_legacy_irqno(void);
extern void free_irqno(unsigned int irq);
diff --git a/include/asm-mips/jmr3927/jmr3927.h b/include/asm-mips/jmr3927/jmr3927.h
index 958e29706e2..b2dc35f5618 100644
--- a/include/asm-mips/jmr3927/jmr3927.h
+++ b/include/asm-mips/jmr3927/jmr3927.h
@@ -13,6 +13,7 @@
#include <asm/jmr3927/tx3927.h>
#include <asm/addrspace.h>
#include <asm/system.h>
+#include <asm/txx9irq.h>
/* CS */
#define JMR3927_ROMCE0 0x1fc00000 /* 4M */
@@ -115,7 +116,7 @@
#define JMR3927_NR_IRQ_IRC 16 /* On-Chip IRC */
#define JMR3927_NR_IRQ_IOC 8 /* PCI/MODEM/INT[6:7] */
-#define JMR3927_IRQ_IRC 16
+#define JMR3927_IRQ_IRC TXX9_IRQ_BASE
#define JMR3927_IRQ_IOC (JMR3927_IRQ_IRC + JMR3927_NR_IRQ_IRC)
#define JMR3927_IRQ_END (JMR3927_IRQ_IOC + JMR3927_NR_IRQ_IOC)
diff --git a/include/asm-mips/jmr3927/tx3927.h b/include/asm-mips/jmr3927/tx3927.h
index 0b9073bfb75..4be2f25f70d 100644
--- a/include/asm-mips/jmr3927/tx3927.h
+++ b/include/asm-mips/jmr3927/tx3927.h
@@ -50,21 +50,6 @@ struct tx3927_dma_reg {
volatile unsigned long unused0;
};
-struct tx3927_irc_reg {
- volatile unsigned long cer;
- volatile unsigned long cr[2];
- volatile unsigned long unused0;
- volatile unsigned long ilr[8];
- volatile unsigned long unused1[4];
- volatile unsigned long imr;
- volatile unsigned long unused2[7];
- volatile unsigned long scr;
- volatile unsigned long unused3[7];
- volatile unsigned long ssr;
- volatile unsigned long unused4[7];
- volatile unsigned long csr;
-};
-
#include <asm/byteorder.h>
#ifdef __BIG_ENDIAN
@@ -225,26 +210,6 @@ struct tx3927_ccfg_reg {
/*
* IRC
*/
-#define TX3927_IR_MAX_LEVEL 7
-
-/* IRCER : Int. Control Enable */
-#define TX3927_IRCER_ICE 0x00000001
-
-/* IRCR : Int. Control */
-#define TX3927_IRCR_LOW 0x00000000
-#define TX3927_IRCR_HIGH 0x00000001
-#define TX3927_IRCR_DOWN 0x00000002
-#define TX3927_IRCR_UP 0x00000003
-
-/* IRSCR : Int. Status Control */
-#define TX3927_IRSCR_EIClrE 0x00000100
-#define TX3927_IRSCR_EIClr_MASK 0x0000000f
-
-/* IRCSR : Int. Current Status */
-#define TX3927_IRCSR_IF 0x00010000
-#define TX3927_IRCSR_ILV_MASK 0x00000700
-#define TX3927_IRCSR_IVL_MASK 0x0000001f
-
#define TX3927_IR_INT0 0
#define TX3927_IR_INT1 1
#define TX3927_IR_INT2 2
@@ -347,7 +312,6 @@ struct tx3927_ccfg_reg {
#define tx3927_sdramcptr ((struct tx3927_sdramc_reg *)TX3927_SDRAMC_REG)
#define tx3927_romcptr ((struct tx3927_romc_reg *)TX3927_ROMC_REG)
#define tx3927_dmaptr ((struct tx3927_dma_reg *)TX3927_DMA_REG)
-#define tx3927_ircptr ((struct tx3927_irc_reg *)TX3927_IRC_REG)
#define tx3927_pcicptr ((struct tx3927_pcic_reg *)TX3927_PCIC_REG)
#define tx3927_ccfgptr ((struct tx3927_ccfg_reg *)TX3927_CCFG_REG)
#define tx3927_tmrptr(ch) ((struct txx927_tmr_reg *)TX3927_TMR_REG(ch))
diff --git a/include/asm-mips/local.h b/include/asm-mips/local.h
index ed882c88e0c..f9a5ce5c9af 100644
--- a/include/asm-mips/local.h
+++ b/include/asm-mips/local.h
@@ -4,6 +4,7 @@
#include <linux/percpu.h>
#include <linux/bitops.h>
#include <asm/atomic.h>
+#include <asm/cmpxchg.h>
#include <asm/war.h>
typedef struct
@@ -114,68 +115,6 @@ static __inline__ long local_sub_return(long i, local_t * l)
return result;
}
-/*
- * local_sub_if_positive - conditionally subtract integer from atomic variable
- * @i: integer value to subtract
- * @l: pointer of type local_t
- *
- * Atomically test @l and subtract @i if @l is greater or equal than @i.
- * The function returns the old value of @l minus @i.
- */
-static __inline__ long local_sub_if_positive(long i, local_t * l)
-{
- unsigned long result;
-
- if (cpu_has_llsc && R10000_LLSC_WAR) {
- unsigned long temp;
-
- __asm__ __volatile__(
- " .set mips3 \n"
- "1:" __LL "%1, %2 # local_sub_if_positive\n"
- " dsubu %0, %1, %3 \n"
- " bltz %0, 1f \n"
- __SC "%0, %2 \n"
- " .set noreorder \n"
- " beqzl %0, 1b \n"
- " dsubu %0, %1, %3 \n"
- " .set reorder \n"
- "1: \n"
- " .set mips0 \n"
- : "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
- : "Ir" (i), "m" (l->a.counter)
- : "memory");
- } else if (cpu_has_llsc) {
- unsigned long temp;
-
- __asm__ __volatile__(
- " .set mips3 \n"
- "1:" __LL "%1, %2 # local_sub_if_positive\n"
- " dsubu %0, %1, %3 \n"
- " bltz %0, 1f \n"
- __SC "%0, %2 \n"
- " .set noreorder \n"
- " beqz %0, 1b \n"
- " dsubu %0, %1, %3 \n"
- " .set reorder \n"
- "1: \n"
- " .set mips0 \n"
- : "=&r" (result), "=&r" (temp), "=m" (l->a.counter)
- : "Ir" (i), "m" (l->a.counter)
- : "memory");
- } else {
- unsigned long flags;
-
- local_irq_save(flags);
- result = l->a.counter;
- result -= i;
- if (result >= 0)
- l->a.counter = result;
- local_irq_restore(flags);
- }
-
- return result;
-}
-
#define local_cmpxchg(l, o, n) \
((long)cmpxchg_local(&((l)->a.counter), (o), (n)))
#define local_xchg(l, n) (xchg_local(&((l)->a.counter),(n)))
@@ -234,12 +173,6 @@ static __inline__ long local_sub_if_positive(long i, local_t * l)
#define local_dec_and_test(l) (local_sub_return(1, (l)) == 0)
/*
- * local_dec_if_positive - decrement by 1 if old value positive
- * @l: pointer of type local_t
- */
-#define local_dec_if_positive(l) local_sub_if_positive(1, l)
-
-/*
* local_add_negative - add and test if negative
* @l: pointer of type local_t
* @i: integer value to add
diff --git a/include/asm-mips/mach-generic/ide.h b/include/asm-mips/mach-generic/ide.h
index 6eba2e576aa..a77128362a7 100644
--- a/include/asm-mips/mach-generic/ide.h
+++ b/include/asm-mips/mach-generic/ide.h
@@ -33,13 +33,24 @@ static __inline__ int ide_probe_legacy(void)
{
#ifdef CONFIG_PCI
struct pci_dev *dev;
- if ((dev = pci_get_class(PCI_CLASS_BRIDGE_EISA << 8, NULL)) != NULL ||
- (dev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL)) != NULL) {
- pci_dev_put(dev);
-
- return 1;
- }
+ /*
+ * This can be called on the ide_setup() path, super-early in
+ * boot. But the down_read() will enable local interrupts,
+ * which can cause some machines to crash. So here we detect
+ * and flag that situation and bail out early.
+ */
+ if (no_pci_devices())
+ return 0;
+ dev = pci_get_class(PCI_CLASS_BRIDGE_EISA << 8, NULL);
+ if (dev)
+ goto found;
+ dev = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
+ if (dev)
+ goto found;
return 0;
+found:
+ pci_dev_put(dev);
+ return 1;
#elif defined(CONFIG_EISA) || defined(CONFIG_ISA)
return 1;
#else
@@ -49,48 +60,42 @@ static __inline__ int ide_probe_legacy(void)
static __inline__ int ide_default_irq(unsigned long base)
{
- if (ide_probe_legacy())
- switch (base) {
- case 0x1f0:
- return 14;
- case 0x170:
- return 15;
- case 0x1e8:
- return 11;
- case 0x168:
- return 10;
- case 0x1e0:
- return 8;
- case 0x160:
- return 12;
+ switch (base) {
+ case 0x1f0: return 14;
+ case 0x170: return 15;
+ case 0x1e8: return 11;
+ case 0x168: return 10;
+ case 0x1e0: return 8;
+ case 0x160: return 12;
default:
return 0;
- }
- else
- return 0;
+ }
}
static __inline__ unsigned long ide_default_io_base(int index)
{
- if (ide_probe_legacy())
+ if (!ide_probe_legacy())
+ return 0;
+ /*
+ * If PCI is present then it is not safe to poke around
+ * the other legacy IDE ports. Only 0x1f0 and 0x170 are
+ * defined compatibility mode ports for PCI. A user can
+ * override this using ide= but we must default safe.
+ */
+ if (no_pci_devices()) {
switch (index) {
- case 0:
- return 0x1f0;
- case 1:
- return 0x170;
- case 2:
- return 0x1e8;
- case 3:
- return 0x168;
- case 4:
- return 0x1e0;
- case 5:
- return 0x160;
- default:
- return 0;
+ case 2: return 0x1e8;
+ case 3: return 0x168;
+ case 4: return 0x1e0;
+ case 5: return 0x160;
}
- else
+ }
+ switch (index) {
+ case 0: return 0x1f0;
+ case 1: return 0x170;
+ default:
return 0;
+ }
}
#define IDE_ARCH_OBSOLETE_INIT
diff --git a/include/asm-mips/mach-ocelot/mach-gt64120.h b/include/asm-mips/mach-ocelot/mach-gt64120.h
deleted file mode 100644
index a62ecb53c75..00000000000
--- a/include/asm-mips/mach-ocelot/mach-gt64120.h
+++ /dev/null
@@ -1,30 +0,0 @@
-/*
- * Copyright 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-#ifndef _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
-#define _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H
-
-/*
- * PCI address allocation
- */
-#define GT_PCI_MEM_BASE (0x22000000UL)
-#define GT_PCI_MEM_SIZE GT_DEF_PCI0_MEM0_SIZE
-#define GT_PCI_IO_BASE (0x20000000UL)
-#define GT_PCI_IO_SIZE GT_DEF_PCI0_IO_SIZE
-
-extern unsigned long gt64120_base;
-
-#define GT64120_BASE (gt64120_base)
-
-/*
- * GT timer irq
- */
-#define GT_TIMER 6
-
-#endif /* _ASM_GT64120_MOMENCO_OCELOT_GT64120_DEP_H */
diff --git a/include/asm-mips/marvell.h b/include/asm-mips/marvell.h
deleted file mode 100644
index b6144bafc56..00000000000
--- a/include/asm-mips/marvell.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2004 by Ralf Baechle
- */
-#ifndef __ASM_MIPS_MARVELL_H
-#define __ASM_MIPS_MARVELL_H
-
-#include <linux/pci.h>
-
-#include <asm/byteorder.h>
-
-extern unsigned long marvell_base;
-
-/*
- * Because of an error/peculiarity in the Galileo chip, we need to swap the
- * bytes when running bigendian.
- */
-#define __MV_READ(ofs) \
- (*(volatile u32 *)(marvell_base+(ofs)))
-#define __MV_WRITE(ofs, data) \
- do { *(volatile u32 *)(marvell_base+(ofs)) = (data); } while (0)
-
-#define MV_READ(ofs) le32_to_cpu(__MV_READ(ofs))
-#define MV_WRITE(ofs, data) __MV_WRITE(ofs, cpu_to_le32(data))
-
-#define MV_READ_16(ofs) \
- le16_to_cpu(*(volatile u16 *)(marvell_base+(ofs)))
-#define MV_WRITE_16(ofs, data) \
- *(volatile u16 *)(marvell_base+(ofs)) = cpu_to_le16(data)
-
-#define MV_READ_8(ofs) \
- *(volatile u8 *)(marvell_base+(ofs))
-#define MV_WRITE_8(ofs, data) \
- *(volatile u8 *)(marvell_base+(ofs)) = data
-
-#define MV_SET_REG_BITS(ofs, bits) \
- (*((volatile u32 *)(marvell_base + (ofs)))) |= ((u32)cpu_to_le32(bits))
-#define MV_RESET_REG_BITS(ofs, bits) \
- (*((volatile u32 *)(marvell_base + (ofs)))) &= ~((u32)cpu_to_le32(bits))
-
-extern struct pci_ops mv_pci_ops;
-
-struct mv_pci_controller {
- struct pci_controller pcic;
-
- /*
- * GT-64240/MV-64340 specific, per host bus information
- */
- unsigned long config_addr;
- unsigned long config_vreg;
-};
-
-extern void ll_mv64340_irq(void);
-extern void mv64340_irq_init(unsigned int base);
-
-#endif /* __ASM_MIPS_MARVELL_H */
diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h
index b92dd8c760d..e3301e54d55 100644
--- a/include/asm-mips/page.h
+++ b/include/asm-mips/page.h
@@ -142,7 +142,7 @@ typedef struct { unsigned long pgprot; } pgprot_t;
/*
* __pa()/__va() should be used only during mem init.
*/
-#if defined(CONFIG_64BIT) && !defined(CONFIG_BUILD_ELF64)
+#ifdef CONFIG_64BIT
#define __pa(x) \
({ \
unsigned long __x = (unsigned long)(x); \
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index 2fbd47eba32..59c865deb0c 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -43,11 +43,7 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
*/
/* PGDIR_SHIFT determines what a third-level page table entry can map */
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PGDIR_SHIFT 21
-#else
-#define PGDIR_SHIFT 22
-#endif
+#define PGDIR_SHIFT (2 * PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2)
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
#define PGDIR_MASK (~(PGDIR_SIZE-1))
@@ -55,17 +51,11 @@ extern int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
* Entries per page directory level: we use two-level, so
* we don't really have any PUD/PMD directory physically.
*/
-#ifdef CONFIG_64BIT_PHYS_ADDR
-#define PGD_ORDER 1
+#define __PGD_ORDER (32 - 3 * PAGE_SHIFT + PGD_T_LOG2 + PTE_T_LOG2)
+#define PGD_ORDER (__PGD_ORDER >= 0 ? __PGD_ORDER : 0)
#define PUD_ORDER aieeee_attempt_to_allocate_pud
#define PMD_ORDER 1
#define PTE_ORDER 0
-#else
-#define PGD_ORDER 0
-#define PUD_ORDER aieeee_attempt_to_allocate_pud
-#define PMD_ORDER 1
-#define PTE_ORDER 0
-#endif
#define PTRS_PER_PGD ((PAGE_SIZE << PGD_ORDER) / sizeof(pgd_t))
#define PTRS_PER_PTE ((PAGE_SIZE << PTE_ORDER) / sizeof(pte_t))
diff --git a/include/asm-mips/pgtable.h b/include/asm-mips/pgtable.h
index 2e2d70d13ff..d2ee2815674 100644
--- a/include/asm-mips/pgtable.h
+++ b/include/asm-mips/pgtable.h
@@ -168,11 +168,15 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
#define set_pud(pudptr, pudval) do { *(pudptr) = (pudval); } while(0)
#endif
-#define PGD_T_LOG2 ffz(~sizeof(pgd_t))
-#define PMD_T_LOG2 ffz(~sizeof(pmd_t))
-#define PTE_T_LOG2 ffz(~sizeof(pte_t))
+#define PGD_T_LOG2 (__builtin_ffs(sizeof(pgd_t)) - 1)
+#define PMD_T_LOG2 (__builtin_ffs(sizeof(pmd_t)) - 1)
+#define PTE_T_LOG2 (__builtin_ffs(sizeof(pte_t)) - 1)
-extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
+/*
+ * We used to declare this array with size but gcc 3.3 and older are not able
+ * to find that this expression is a constant, so the size is dropped.
+ */
+extern pgd_t swapper_pg_dir[];
/*
* The following only work if pte_present() is true.
diff --git a/include/asm-mips/sibyte/bcm1480_regs.h b/include/asm-mips/sibyte/bcm1480_regs.h
index 2738c1366f6..c34d36b6b8c 100644
--- a/include/asm-mips/sibyte/bcm1480_regs.h
+++ b/include/asm-mips/sibyte/bcm1480_regs.h
@@ -227,10 +227,15 @@
(A_BCM1480_DUART(chan) + \
BCM1480_DUART_CHANREG_SPACING * 3 + (reg))
+#define DUART_IMRISR_SPACING 0x20
+#define DUART_INCHNG_SPACING 0x10
+
#define R_BCM1480_DUART_IMRREG(chan) \
(R_DUART_IMR_A + ((chan) & 1) * DUART_IMRISR_SPACING)
#define R_BCM1480_DUART_ISRREG(chan) \
(R_DUART_ISR_A + ((chan) & 1) * DUART_IMRISR_SPACING)
+#define R_BCM1480_DUART_INCHREG(chan) \
+ (R_DUART_IN_CHNG_A + ((chan) & 1) * DUART_INCHNG_SPACING)
#define A_BCM1480_DUART_IMRREG(chan) \
(A_BCM1480_DUART_CTRLREG((chan), R_BCM1480_DUART_IMRREG(chan)))
diff --git a/include/asm-mips/smtc.h b/include/asm-mips/smtc.h
index 44dfa4adecf..ff3e8936b49 100644
--- a/include/asm-mips/smtc.h
+++ b/include/asm-mips/smtc.h
@@ -55,4 +55,14 @@ extern void smtc_boot_secondary(int cpu, struct task_struct *t);
#define PARKED_INDEX ((unsigned int)0x80000000)
+/*
+ * Define low-level interrupt mask for IPIs, if necessary.
+ * By default, use SW interrupt 1, which requires no external
+ * hardware support, but which works only for single-core
+ * MIPS MT systems.
+ */
+#ifndef MIPS_CPU_IPI_IRQ
+#define MIPS_CPU_IPI_IRQ 1
+#endif
+
#endif /* _ASM_SMTC_MT_H */
diff --git a/include/asm-mips/stacktrace.h b/include/asm-mips/stacktrace.h
index 07f873351a8..0bf82818aa5 100644
--- a/include/asm-mips/stacktrace.h
+++ b/include/asm-mips/stacktrace.h
@@ -9,7 +9,11 @@ extern unsigned long unwind_stack(struct task_struct *task, unsigned long *sp,
unsigned long pc, unsigned long *ra);
#else
#define raw_show_trace 1
-#define unwind_stack(task, sp, pc, ra) 0
+static inline unsigned long unwind_stack(struct task_struct *task,
+ unsigned long *sp, unsigned long pc, unsigned long *ra)
+{
+ return 0;
+}
#endif
static __always_inline void prepare_frametrace(struct pt_regs *regs)
diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h
index 357251f4251..480b574e248 100644
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -17,6 +17,7 @@
#include <asm/addrspace.h>
#include <asm/barrier.h>
+#include <asm/cmpxchg.h>
#include <asm/cpu-features.h>
#include <asm/dsp.h>
#include <asm/war.h>
@@ -194,266 +195,6 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
-#define __HAVE_ARCH_CMPXCHG 1
-
-static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
- unsigned long new)
-{
- __u32 retval;
-
- if (cpu_has_llsc && R10000_LLSC_WAR) {
- __asm__ __volatile__(
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: ll %0, %2 # __cmpxchg_u32 \n"
- " bne %0, %z3, 2f \n"
- " .set mips0 \n"
- " move $1, %z4 \n"
- " .set mips3 \n"
- " sc $1, %1 \n"
- " beqzl $1, 1b \n"
- "2: \n"
- " .set pop \n"
- : "=&r" (retval), "=R" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
- } else if (cpu_has_llsc) {
- __asm__ __volatile__(
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: ll %0, %2 # __cmpxchg_u32 \n"
- " bne %0, %z3, 2f \n"
- " .set mips0 \n"
- " move $1, %z4 \n"
- " .set mips3 \n"
- " sc $1, %1 \n"
- " beqz $1, 3f \n"
- "2: \n"
- " .subsection 2 \n"
- "3: b 1b \n"
- " .previous \n"
- " .set pop \n"
- : "=&r" (retval), "=R" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
- } else {
- unsigned long flags;
-
- raw_local_irq_save(flags);
- retval = *m;
- if (retval == old)
- *m = new;
- raw_local_irq_restore(flags); /* implies memory barrier */
- }
-
- smp_llsc_mb();
-
- return retval;
-}
-
-static inline unsigned long __cmpxchg_u32_local(volatile int * m,
- unsigned long old, unsigned long new)
-{
- __u32 retval;
-
- if (cpu_has_llsc && R10000_LLSC_WAR) {
- __asm__ __volatile__(
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: ll %0, %2 # __cmpxchg_u32 \n"
- " bne %0, %z3, 2f \n"
- " .set mips0 \n"
- " move $1, %z4 \n"
- " .set mips3 \n"
- " sc $1, %1 \n"
- " beqzl $1, 1b \n"
- "2: \n"
- " .set pop \n"
- : "=&r" (retval), "=R" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
- } else if (cpu_has_llsc) {
- __asm__ __volatile__(
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: ll %0, %2 # __cmpxchg_u32 \n"
- " bne %0, %z3, 2f \n"
- " .set mips0 \n"
- " move $1, %z4 \n"
- " .set mips3 \n"
- " sc $1, %1 \n"
- " beqz $1, 1b \n"
- "2: \n"
- " .set pop \n"
- : "=&r" (retval), "=R" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
- } else {
- unsigned long flags;
-
- local_irq_save(flags);
- retval = *m;
- if (retval == old)
- *m = new;
- local_irq_restore(flags); /* implies memory barrier */
- }
-
- return retval;
-}
-
-#ifdef CONFIG_64BIT
-static inline unsigned long __cmpxchg_u64(volatile int * m, unsigned long old,
- unsigned long new)
-{
- __u64 retval;
-
- if (cpu_has_llsc && R10000_LLSC_WAR) {
- __asm__ __volatile__(
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: lld %0, %2 # __cmpxchg_u64 \n"
- " bne %0, %z3, 2f \n"
- " move $1, %z4 \n"
- " scd $1, %1 \n"
- " beqzl $1, 1b \n"
- "2: \n"
- " .set pop \n"
- : "=&r" (retval), "=R" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
- } else if (cpu_has_llsc) {
- __asm__ __volatile__(
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: lld %0, %2 # __cmpxchg_u64 \n"
- " bne %0, %z3, 2f \n"
- " move $1, %z4 \n"
- " scd $1, %1 \n"
- " beqz $1, 3f \n"
- "2: \n"
- " .subsection 2 \n"
- "3: b 1b \n"
- " .previous \n"
- " .set pop \n"
- : "=&r" (retval), "=R" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
- } else {
- unsigned long flags;
-
- raw_local_irq_save(flags);
- retval = *m;
- if (retval == old)
- *m = new;
- raw_local_irq_restore(flags); /* implies memory barrier */
- }
-
- smp_llsc_mb();
-
- return retval;
-}
-
-static inline unsigned long __cmpxchg_u64_local(volatile int * m,
- unsigned long old, unsigned long new)
-{
- __u64 retval;
-
- if (cpu_has_llsc && R10000_LLSC_WAR) {
- __asm__ __volatile__(
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: lld %0, %2 # __cmpxchg_u64 \n"
- " bne %0, %z3, 2f \n"
- " move $1, %z4 \n"
- " scd $1, %1 \n"
- " beqzl $1, 1b \n"
- "2: \n"
- " .set pop \n"
- : "=&r" (retval), "=R" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
- } else if (cpu_has_llsc) {
- __asm__ __volatile__(
- " .set push \n"
- " .set noat \n"
- " .set mips3 \n"
- "1: lld %0, %2 # __cmpxchg_u64 \n"
- " bne %0, %z3, 2f \n"
- " move $1, %z4 \n"
- " scd $1, %1 \n"
- " beqz $1, 1b \n"
- "2: \n"
- " .set pop \n"
- : "=&r" (retval), "=R" (*m)
- : "R" (*m), "Jr" (old), "Jr" (new)
- : "memory");
- } else {
- unsigned long flags;
-
- local_irq_save(flags);
- retval = *m;
- if (retval == old)
- *m = new;
- local_irq_restore(flags); /* implies memory barrier */
- }
-
- return retval;
-}
-
-#else
-extern unsigned long __cmpxchg_u64_unsupported_on_32bit_kernels(
- volatile int * m, unsigned long old, unsigned long new);
-#define __cmpxchg_u64 __cmpxchg_u64_unsupported_on_32bit_kernels
-extern unsigned long __cmpxchg_u64_local_unsupported_on_32bit_kernels(
- volatile int * m, unsigned long old, unsigned long new);
-#define __cmpxchg_u64_local __cmpxchg_u64_local_unsupported_on_32bit_kernels
-#endif
-
-/* This function doesn't exist, so you'll get a linker error
- if something tries to do an invalid cmpxchg(). */
-extern void __cmpxchg_called_with_bad_pointer(void);
-
-static inline unsigned long __cmpxchg(volatile void * ptr, unsigned long old,
- unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32(ptr, old, new);
- case 8:
- return __cmpxchg_u64(ptr, old, new);
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-static inline unsigned long __cmpxchg_local(volatile void * ptr,
- unsigned long old, unsigned long new, int size)
-{
- switch (size) {
- case 4:
- return __cmpxchg_u32_local(ptr, old, new);
- case 8:
- return __cmpxchg_u64_local(ptr, old, new);
- }
- __cmpxchg_called_with_bad_pointer();
- return old;
-}
-
-#define cmpxchg(ptr,old,new) \
- ((__typeof__(*(ptr)))__cmpxchg((ptr), \
- (unsigned long)(old), (unsigned long)(new),sizeof(*(ptr))))
-
-#define cmpxchg_local(ptr,old,new) \
- ((__typeof__(*(ptr)))__cmpxchg_local((ptr), \
- (unsigned long)(old), (unsigned long)(new),sizeof(*(ptr))))
-
extern void set_handler (unsigned long offset, void *addr, unsigned long len);
extern void set_uncached_handler (unsigned long offset, void *addr, unsigned long len);
diff --git a/include/asm-mips/termbits.h b/include/asm-mips/termbits.h
index 5bfdc3b6451..c83c68444e8 100644
--- a/include/asm-mips/termbits.h
+++ b/include/asm-mips/termbits.h
@@ -164,6 +164,7 @@ struct ktermios {
#define HUPCL 0002000 /* Hang up on last close. */
#define CLOCAL 0004000 /* Ignore modem status lines. */
#define CBAUDEX 0010000
+#define BOTHER 0010000
#define B57600 0010001
#define B115200 0010002
#define B230400 0010003
@@ -179,9 +180,11 @@ struct ktermios {
#define B3000000 0010015
#define B3500000 0010016
#define B4000000 0010017
-#define CIBAUD 002003600000 /* input baud rate (not used) */
+#define CIBAUD 002003600000 /* input baud rate */
#define CMSPAR 010000000000 /* mark or space (stick) parity */
-#define CRTSCTS 020000000000 /* flow control */
+#define CRTSCTS 020000000000 /* flow control */
+
+#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
/* c_lflag bits */
#define ISIG 0000001 /* Enable signals. */
diff --git a/include/asm-mips/termios.h b/include/asm-mips/termios.h
index 2ce07f4be36..a275661fa7e 100644
--- a/include/asm-mips/termios.h
+++ b/include/asm-mips/termios.h
@@ -122,8 +122,10 @@ struct termio {
copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
})
-#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
-#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
+#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
+#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
+#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
#endif /* defined(__KERNEL__) */
diff --git a/include/asm-mips/tx4927/toshiba_rbtx4927.h b/include/asm-mips/tx4927/toshiba_rbtx4927.h
index 5dc40a86777..a60649569c2 100644
--- a/include/asm-mips/tx4927/toshiba_rbtx4927.h
+++ b/include/asm-mips/tx4927/toshiba_rbtx4927.h
@@ -50,7 +50,7 @@
#define RBTX4927_RTL_8019_BASE (0x1c020280-TBTX4927_ISA_IO_OFFSET)
-#define RBTX4927_RTL_8019_IRQ (29)
+#define RBTX4927_RTL_8019_IRQ (TX4927_IRQ_PIC_BEG + 5)
int toshiba_rbtx4927_irq_nested(int sw_irq);
diff --git a/include/asm-mips/tx4927/tx4927.h b/include/asm-mips/tx4927/tx4927.h
index de85bd2245f..4bd4368e188 100644
--- a/include/asm-mips/tx4927/tx4927.h
+++ b/include/asm-mips/tx4927/tx4927.h
@@ -28,6 +28,7 @@
#define __ASM_TX4927_TX4927_H
#include <asm/tx4927/tx4927_mips.h>
+#include <asm/txx9irq.h>
/*
This register naming came from the integrated CPU/controller name TX4927
@@ -421,32 +422,6 @@
#define TX4927_PIO_LIMIT 0xf50f
-/* TX4927 Interrupt Controller (32-bit registers) */
-#define TX4927_IRC_BASE 0xf510
-#define TX4927_IRC_IRFLAG0 0xf510
-#define TX4927_IRC_IRFLAG1 0xf514
-#define TX4927_IRC_IRPOL 0xf518
-#define TX4927_IRC_IRRCNT 0xf51c
-#define TX4927_IRC_IRMASKINT 0xf520
-#define TX4927_IRC_IRMASKEXT 0xf524
-#define TX4927_IRC_IRDEN 0xf600
-#define TX4927_IRC_IRDM0 0xf604
-#define TX4927_IRC_IRDM1 0xf608
-#define TX4927_IRC_IRLVL0 0xf610
-#define TX4927_IRC_IRLVL1 0xf614
-#define TX4927_IRC_IRLVL2 0xf618
-#define TX4927_IRC_IRLVL3 0xf61c
-#define TX4927_IRC_IRLVL4 0xf620
-#define TX4927_IRC_IRLVL5 0xf624
-#define TX4927_IRC_IRLVL6 0xf628
-#define TX4927_IRC_IRLVL7 0xf62c
-#define TX4927_IRC_IRMSK 0xf640
-#define TX4927_IRC_IREDC 0xf660
-#define TX4927_IRC_IRPND 0xf680
-#define TX4927_IRC_IRCS 0xf6a0
-#define TX4927_IRC_LIMIT 0xf6ff
-
-
/* TX4927 AC-link controller (32-bit registers) */
#define TX4927_ACLC_BASE 0xf700
#define TX4927_ACLC_ACCTLEN 0xf700
@@ -493,25 +468,11 @@
#define TX4927_WR( reg, val ) TX4927_WR32( reg, val )
+#define TX4927_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
+#define TX4927_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
-
-
-#define MI8259_IRQ_ISA_RAW_BEG 0 /* optional backplane i8259 */
-#define MI8259_IRQ_ISA_RAW_END 15
-#define TX4927_IRQ_CP0_RAW_BEG 0 /* tx4927 cpu built-in cp0 */
-#define TX4927_IRQ_CP0_RAW_END 7
-#define TX4927_IRQ_PIC_RAW_BEG 0 /* tx4927 cpu build-in pic */
-#define TX4927_IRQ_PIC_RAW_END 31
-
-
-#define MI8259_IRQ_ISA_BEG MI8259_IRQ_ISA_RAW_BEG /* 0 */
-#define MI8259_IRQ_ISA_END MI8259_IRQ_ISA_RAW_END /* 15 */
-
-#define TX4927_IRQ_CP0_BEG ((MI8259_IRQ_ISA_END+1)+TX4927_IRQ_CP0_RAW_BEG) /* 16 */
-#define TX4927_IRQ_CP0_END ((MI8259_IRQ_ISA_END+1)+TX4927_IRQ_CP0_RAW_END) /* 23 */
-
-#define TX4927_IRQ_PIC_BEG ((TX4927_IRQ_CP0_END+1)+TX4927_IRQ_PIC_RAW_BEG) /* 24 */
-#define TX4927_IRQ_PIC_END ((TX4927_IRQ_CP0_END+1)+TX4927_IRQ_PIC_RAW_END) /* 55 */
+#define TX4927_IRQ_PIC_BEG TXX9_IRQ_BASE
+#define TX4927_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
#define TX4927_IRQ_USER0 (TX4927_IRQ_CP0_BEG+0)
diff --git a/include/asm-mips/tx4927/tx4927_pci.h b/include/asm-mips/tx4927/tx4927_pci.h
index 66c064690f4..f98b2bb719d 100644
--- a/include/asm-mips/tx4927/tx4927_pci.h
+++ b/include/asm-mips/tx4927/tx4927_pci.h
@@ -48,7 +48,7 @@
#define TX4927_PCI_CLK_ACK 0x04
#define TX4927_PCI_CLK_ACE 0x02
#define TX4927_PCI_CLK_ENDIAN 0x01
-#define TX4927_NR_IRQ_LOCAL (8+16)
+#define TX4927_NR_IRQ_LOCAL TX4927_IRQ_PIC_BEG
#define TX4927_NR_IRQ_IRC 32 /* On-Chip IRC */
#define TX4927_IR_PCIC 16
@@ -99,21 +99,6 @@ struct tx4927_ccfg_reg {
volatile unsigned long long ramp;
};
-struct tx4927_irc_reg {
- volatile unsigned long cer;
- volatile unsigned long cr[2];
- volatile unsigned long unused0;
- volatile unsigned long ilr[8];
- volatile unsigned long unused1[4];
- volatile unsigned long imr;
- volatile unsigned long unused2[7];
- volatile unsigned long scr;
- volatile unsigned long unused3[7];
- volatile unsigned long ssr;
- volatile unsigned long unused4[7];
- volatile unsigned long csr;
-};
-
struct tx4927_pcic_reg {
volatile unsigned long pciid;
volatile unsigned long pcistatus;
@@ -182,11 +167,6 @@ struct tx4927_pcic_reg {
#endif /* _LANGUAGE_ASSEMBLY */
-/* IRCSR : Int. Current Status */
-#define TX4927_IRCSR_IF 0x00010000
-#define TX4927_IRCSR_ILV_MASK 0x00000700
-#define TX4927_IRCSR_IVL_MASK 0x0000001f
-
/*
* PCIC
*/
@@ -278,7 +258,6 @@ struct tx4927_pcic_reg {
#define tx4927_pcicptr ((struct tx4927_pcic_reg *)TX4927_PCIC_REG)
#define tx4927_ccfgptr ((struct tx4927_ccfg_reg *)TX4927_CCFG_REG)
#define tx4927_ebuscptr ((struct tx4927_ebusc_reg *)TX4927_EBUSC_REG)
-#define tx4927_ircptr ((struct tx4927_irc_reg *)TX4927_IRC_REG)
#endif /* _LANGUAGE_ASSEMBLY */
diff --git a/include/asm-mips/tx4938/rbtx4938.h b/include/asm-mips/tx4938/rbtx4938.h
index 74e7d8061e5..b14acb575be 100644
--- a/include/asm-mips/tx4938/rbtx4938.h
+++ b/include/asm-mips/tx4938/rbtx4938.h
@@ -14,6 +14,7 @@
#include <asm/addrspace.h>
#include <asm/tx4938/tx4938.h>
+#include <asm/txx9irq.h>
/* CS */
#define RBTX4938_CE0 0x1c000000 /* 64M */
@@ -123,21 +124,11 @@
#define RBTX4938_NR_IRQ_IRC 32 /* On-Chip IRC */
#define RBTX4938_NR_IRQ_IOC 8
-#define MI8259_IRQ_ISA_RAW_BEG 0 /* optional backplane i8259 */
-#define MI8259_IRQ_ISA_RAW_END 15
-#define TX4938_IRQ_CP0_RAW_BEG 0 /* tx4938 cpu built-in cp0 */
-#define TX4938_IRQ_CP0_RAW_END 7
-#define TX4938_IRQ_PIC_RAW_BEG 0 /* tx4938 cpu build-in pic */
-#define TX4938_IRQ_PIC_RAW_END 31
+#define TX4938_IRQ_CP0_BEG MIPS_CPU_IRQ_BASE
+#define TX4938_IRQ_CP0_END (MIPS_CPU_IRQ_BASE + 8 - 1)
-#define MI8259_IRQ_ISA_BEG MI8259_IRQ_ISA_RAW_BEG /* 0 */
-#define MI8259_IRQ_ISA_END MI8259_IRQ_ISA_RAW_END /* 15 */
-
-#define TX4938_IRQ_CP0_BEG ((MI8259_IRQ_ISA_END+1)+TX4938_IRQ_CP0_RAW_BEG) /* 16 */
-#define TX4938_IRQ_CP0_END ((MI8259_IRQ_ISA_END+1)+TX4938_IRQ_CP0_RAW_END) /* 23 */
-
-#define TX4938_IRQ_PIC_BEG ((TX4938_IRQ_CP0_END+1)+TX4938_IRQ_PIC_RAW_BEG) /* 24 */
-#define TX4938_IRQ_PIC_END ((TX4938_IRQ_CP0_END+1)+TX4938_IRQ_PIC_RAW_END) /* 55 */
+#define TX4938_IRQ_PIC_BEG TXX9_IRQ_BASE
+#define TX4938_IRQ_PIC_END (TXX9_IRQ_BASE + TXx9_MAX_IR - 1)
#define TX4938_IRQ_NEST_EXT_ON_PIC (TX4938_IRQ_PIC_BEG+2)
#define TX4938_IRQ_NEST_PIC_ON_CP0 (TX4938_IRQ_CP0_BEG+2)
#define TX4938_IRQ_USER0 (TX4938_IRQ_CP0_BEG+0)
@@ -192,10 +183,4 @@
#define RBTX4938_RTL_8019_BASE (RBTX4938_ETHER_ADDR - mips_io_port_base)
#define RBTX4938_RTL_8019_IRQ (RBTX4938_IRQ_ETHER)
-/* IRCR : Int. Control */
-#define TX4938_IRCR_LOW 0x00000000
-#define TX4938_IRCR_HIGH 0x00000001
-#define TX4938_IRCR_DOWN 0x00000002
-#define TX4938_IRCR_UP 0x00000003
-
#endif /* __ASM_TX_BOARDS_RBTX4938_H */
diff --git a/include/asm-mips/tx4938/tx4938.h b/include/asm-mips/tx4938/tx4938.h
index e25b1a0975c..afdb19813ca 100644
--- a/include/asm-mips/tx4938/tx4938.h
+++ b/include/asm-mips/tx4938/tx4938.h
@@ -272,20 +272,6 @@ struct tx4938_pio_reg {
volatile unsigned long maskcpu;
volatile unsigned long maskext;
};
-struct tx4938_irc_reg {
- volatile unsigned long cer;
- volatile unsigned long cr[2];
- volatile unsigned long unused0;
- volatile unsigned long ilr[8];
- volatile unsigned long unused1[4];
- volatile unsigned long imr;
- volatile unsigned long unused2[7];
- volatile unsigned long scr;
- volatile unsigned long unused3[7];
- volatile unsigned long ssr;
- volatile unsigned long unused4[7];
- volatile unsigned long csr;
-};
struct tx4938_ndfmc_reg {
endian_def_l2(unused0, dtr);
@@ -646,39 +632,12 @@ struct tx4938_ccfg_reg {
#define TX4938_DMA_CSR_DESERR 0x00000002
#define TX4938_DMA_CSR_SORERR 0x00000001
-/* TX4938 Interrupt Controller (32-bit registers) */
-#define TX4938_IRC_BASE 0xf510
-#define TX4938_IRC_IRFLAG0 0xf510
-#define TX4938_IRC_IRFLAG1 0xf514
-#define TX4938_IRC_IRPOL 0xf518
-#define TX4938_IRC_IRRCNT 0xf51c
-#define TX4938_IRC_IRMASKINT 0xf520
-#define TX4938_IRC_IRMASKEXT 0xf524
-#define TX4938_IRC_IRDEN 0xf600
-#define TX4938_IRC_IRDM0 0xf604
-#define TX4938_IRC_IRDM1 0xf608
-#define TX4938_IRC_IRLVL0 0xf610
-#define TX4938_IRC_IRLVL1 0xf614
-#define TX4938_IRC_IRLVL2 0xf618
-#define TX4938_IRC_IRLVL3 0xf61c
-#define TX4938_IRC_IRLVL4 0xf620
-#define TX4938_IRC_IRLVL5 0xf624
-#define TX4938_IRC_IRLVL6 0xf628
-#define TX4938_IRC_IRLVL7 0xf62c
-#define TX4938_IRC_IRMSK 0xf640
-#define TX4938_IRC_IREDC 0xf660
-#define TX4938_IRC_IRPND 0xf680
-#define TX4938_IRC_IRCS 0xf6a0
-#define TX4938_IRC_LIMIT 0xf6ff
-
-
#ifndef __ASSEMBLY__
#define tx4938_sdramcptr ((struct tx4938_sdramc_reg *)TX4938_SDRAMC_REG)
#define tx4938_ebuscptr ((struct tx4938_ebusc_reg *)TX4938_EBUSC_REG)
#define tx4938_dmaptr(ch) ((struct tx4938_dma_reg *)TX4938_DMA_REG(ch))
#define tx4938_ndfmcptr ((struct tx4938_ndfmc_reg *)TX4938_NDFMC_REG)
-#define tx4938_ircptr ((struct tx4938_irc_reg *)TX4938_IRC_REG)
#define tx4938_pcicptr ((struct tx4938_pcic_reg *)TX4938_PCIC_REG)
#define tx4938_pcic1ptr ((struct tx4938_pcic_reg *)TX4938_PCIC1_REG)
#define tx4938_ccfgptr ((struct tx4938_ccfg_reg *)TX4938_CCFG_REG)
diff --git a/include/asm-mips/txx9irq.h b/include/asm-mips/txx9irq.h
new file mode 100644
index 00000000000..1c439e51b87
--- /dev/null
+++ b/include/asm-mips/txx9irq.h
@@ -0,0 +1,30 @@
+/*
+ * include/asm-mips/txx9irq.h
+ * TX39/TX49 interrupt controller definitions.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9IRQ_H
+#define __ASM_TXX9IRQ_H
+
+#include <irq.h>
+
+#ifdef CONFIG_IRQ_CPU
+#define TXX9_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
+#else
+#define TXX9_IRQ_BASE 0
+#endif
+
+#ifdef CONFIG_CPU_TX39XX
+#define TXx9_MAX_IR 16
+#else
+#define TXx9_MAX_IR 32
+#endif
+
+void txx9_irq_init(unsigned long baseaddr);
+int txx9_irq(void);
+int txx9_irq_set_pri(int irc_irq, int new_pri);
+
+#endif /* __ASM_TXX9IRQ_H */
diff --git a/include/asm-parisc/io.h b/include/asm-parisc/io.h
index c0fed91da3a..4cc9bcec056 100644
--- a/include/asm-parisc/io.h
+++ b/include/asm-parisc/io.h
@@ -15,6 +15,16 @@ extern unsigned long parisc_vmerge_max_size;
#define virt_to_bus virt_to_phys
#define bus_to_virt phys_to_virt
+static inline unsigned long isa_bus_to_virt(unsigned long addr) {
+ BUG();
+ return 0;
+}
+
+static inline unsigned long isa_virt_to_bus(void *addr) {
+ BUG();
+ return 0;
+}
+
/*
* Memory mapped I/O
*
diff --git a/include/asm-parisc/vga.h b/include/asm-parisc/vga.h
new file mode 100644
index 00000000000..154a84c843a
--- /dev/null
+++ b/include/asm-parisc/vga.h
@@ -0,0 +1,6 @@
+#ifndef __ASM_PARISC_VGA_H__
+#define __ASM_PARISC_VGA_H__
+
+/* nothing */
+
+#endif __ASM_PARISC_VGA_H__
diff --git a/include/asm-powerpc/spu.h b/include/asm-powerpc/spu.h
index 8836c0f1f2f..5bde3980bf4 100644
--- a/include/asm-powerpc/spu.h
+++ b/include/asm-powerpc/spu.h
@@ -130,6 +130,7 @@ struct spu {
u64 flags;
u64 dar;
u64 dsisr;
+ u64 class_0_pending;
size_t ls_size;
unsigned int slb_replace;
struct mm_struct *mm;
@@ -138,7 +139,6 @@ struct spu {
unsigned long long timestamp;
pid_t pid;
pid_t tgid;
- int class_0_pending;
spinlock_t register_lock;
void (* wbox_callback)(struct spu *spu);
diff --git a/include/asm-powerpc/time.h b/include/asm-powerpc/time.h
index d7f5ddfbaac..c104c15c662 100644
--- a/include/asm-powerpc/time.h
+++ b/include/asm-powerpc/time.h
@@ -149,6 +149,11 @@ static inline u64 get_tb(void)
}
#endif /* !CONFIG_PPC64 */
+static inline u64 get_tb_or_rtc(void)
+{
+ return __USE_RTC() ? get_rtc() : get_tb();
+}
+
static inline void set_tb(unsigned int upper, unsigned int lower)
{
mtspr(SPRN_TBWL, 0);
diff --git a/include/asm-sh/flat.h b/include/asm-sh/flat.h
index 0d5cc04ab00..dc4f5950daf 100644
--- a/include/asm-sh/flat.h
+++ b/include/asm-sh/flat.h
@@ -16,8 +16,9 @@
#define flat_argvp_envp_on_stack() 0
#define flat_old_ram_flag(flags) (flags)
#define flat_reloc_valid(reloc, size) ((reloc) <= (size))
-#define flat_get_addr_from_rp(rp, relval, flags) get_unaligned(rp)
+#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp)
#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp)
#define flat_get_relocate_addr(rel) (rel)
+#define flat_set_persistent(relval, p) 0
#endif /* __ASM_SH_FLAT_H */
diff --git a/include/asm-sparc/tlbflush.h b/include/asm-sparc/tlbflush.h
index 4a3b66618e7..a619da5cfaa 100644
--- a/include/asm-sparc/tlbflush.h
+++ b/include/asm-sparc/tlbflush.h
@@ -57,6 +57,10 @@ BTFIXUPDEF_CALL(void, flush_tlb_page, struct vm_area_struct *, unsigned long)
/*
* This is a kludge, until I know better. --zaitcev XXX
*/
-#define flush_tlb_kernel_range(start, end) flush_tlb_all()
+static inline void flush_tlb_kernel_range(unsigned long start,
+ unsigned long end)
+{
+ flush_tlb_all();
+}
#endif /* _SPARC_TLBFLUSH_H */
diff --git a/include/asm-sparc64/device.h b/include/asm-sparc64/device.h
index d5a4559b955..5111e8717be 100644
--- a/include/asm-sparc64/device.h
+++ b/include/asm-sparc64/device.h
@@ -16,8 +16,6 @@ struct dev_archdata {
struct device_node *prom_node;
struct of_device *op;
-
- unsigned int msi_num;
};
#endif /* _ASM_SPARC64_DEVICE_H */
diff --git a/include/asm-sparc64/irq.h b/include/asm-sparc64/irq.h
index e6c436ef935..c00ad152771 100644
--- a/include/asm-sparc64/irq.h
+++ b/include/asm-sparc64/irq.h
@@ -16,21 +16,21 @@
#include <asm/ptrace.h>
/* IMAP/ICLR register defines */
-#define IMAP_VALID 0x80000000 /* IRQ Enabled */
-#define IMAP_TID_UPA 0x7c000000 /* UPA TargetID */
-#define IMAP_TID_JBUS 0x7c000000 /* JBUS TargetID */
+#define IMAP_VALID 0x80000000UL /* IRQ Enabled */
+#define IMAP_TID_UPA 0x7c000000UL /* UPA TargetID */
+#define IMAP_TID_JBUS 0x7c000000UL /* JBUS TargetID */
#define IMAP_TID_SHIFT 26
-#define IMAP_AID_SAFARI 0x7c000000 /* Safari AgentID */
+#define IMAP_AID_SAFARI 0x7c000000UL /* Safari AgentID */
#define IMAP_AID_SHIFT 26
-#define IMAP_NID_SAFARI 0x03e00000 /* Safari NodeID */
+#define IMAP_NID_SAFARI 0x03e00000UL /* Safari NodeID */
#define IMAP_NID_SHIFT 21
-#define IMAP_IGN 0x000007c0 /* IRQ Group Number */
-#define IMAP_INO 0x0000003f /* IRQ Number */
-#define IMAP_INR 0x000007ff /* Full interrupt number*/
+#define IMAP_IGN 0x000007c0UL /* IRQ Group Number */
+#define IMAP_INO 0x0000003fUL /* IRQ Number */
+#define IMAP_INR 0x000007ffUL /* Full interrupt number*/
-#define ICLR_IDLE 0x00000000 /* Idle state */
-#define ICLR_TRANSMIT 0x00000001 /* Transmit state */
-#define ICLR_PENDING 0x00000003 /* Pending state */
+#define ICLR_IDLE 0x00000000UL /* Idle state */
+#define ICLR_TRANSMIT 0x00000001UL /* Transmit state */
+#define ICLR_PENDING 0x00000003UL /* Pending state */
/* The largest number of unique interrupt sources we support.
* If this needs to ever be larger than 255, you need to change
@@ -53,6 +53,9 @@ extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
extern void sun4v_destroy_msi(unsigned int virt_irq);
extern unsigned int sbus_build_irq(void *sbus, unsigned int ino);
+extern void sparc64_set_msi(unsigned int virt_irq, u32 msi);
+extern u32 sparc64_get_msi(unsigned int virt_irq);
+
extern void fixup_irqs(void);
static __inline__ void set_softint(unsigned long bits)
diff --git a/include/asm-sparc64/oplib.h b/include/asm-sparc64/oplib.h
index 86dc5c018a1..55c5bb27e4d 100644
--- a/include/asm-sparc64/oplib.h
+++ b/include/asm-sparc64/oplib.h
@@ -297,11 +297,7 @@ extern void prom_sun4v_guest_soft_state(void);
extern int prom_ihandle2path(int handle, char *buffer, int bufsize);
/* Client interface level routines. */
-extern void prom_set_trap_table(unsigned long tba);
-extern void prom_set_trap_table_sun4v(unsigned long tba, unsigned long mmfsa);
-
extern long p1275_cmd(const char *, long, ...);
-
#if 0
#define P1275_SIZE(x) ((((long)((x) / 32)) << 32) | (x))
diff --git a/include/asm-um/common.lds.S b/include/asm-um/common.lds.S
index e3f010bd12b..cb0248616d4 100644
--- a/include/asm-um/common.lds.S
+++ b/include/asm-um/common.lds.S
@@ -16,82 +16,112 @@
. = ALIGN(4096);
.note : { *(.note.*) }
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
+ __ex_table : {
+ __start___ex_table = .;
+ *(__ex_table)
+ __stop___ex_table = .;
+ }
BUG_TABLE
- __uml_setup_start = .;
- .uml.setup.init : { *(.uml.setup.init) }
- __uml_setup_end = .;
+ .uml.setup.init : {
+ __uml_setup_start = .;
+ *(.uml.setup.init)
+ __uml_setup_end = .;
+ }
- __uml_help_start = .;
- .uml.help.init : { *(.uml.help.init) }
- __uml_help_end = .;
+ .uml.help.init : {
+ __uml_help_start = .;
+ *(.uml.help.init)
+ __uml_help_end = .;
+ }
- __uml_postsetup_start = .;
- .uml.postsetup.init : { *(.uml.postsetup.init) }
- __uml_postsetup_end = .;
+ .uml.postsetup.init : {
+ __uml_postsetup_start = .;
+ *(.uml.postsetup.init)
+ __uml_postsetup_end = .;
+ }
- __setup_start = .;
- .init.setup : { *(.init.setup) }
- __setup_end = .;
+ .init.setup : {
+ __setup_start = .;
+ *(.init.setup)
+ __setup_end = .;
+ }
. = ALIGN(32);
- __per_cpu_start = . ;
- .data.percpu : { *(.data.percpu) }
- __per_cpu_end = . ;
+ .data.percpu : {
+ __per_cpu_start = . ;
+ *(.data.percpu)
+ __per_cpu_end = . ;
+ }
- __initcall_start = .;
.initcall.init : {
+ __initcall_start = .;
INITCALLS
+ __initcall_end = .;
}
- __initcall_end = .;
- __con_initcall_start = .;
- .con_initcall.init : { *(.con_initcall.init) }
- __con_initcall_end = .;
+ .con_initcall.init : {
+ __con_initcall_start = .;
+ *(.con_initcall.init)
+ __con_initcall_end = .;
+ }
- __uml_initcall_start = .;
- .uml.initcall.init : { *(.uml.initcall.init) }
- __uml_initcall_end = .;
+ .uml.initcall.init : {
+ __uml_initcall_start = .;
+ *(.uml.initcall.init)
+ __uml_initcall_end = .;
+ }
__init_end = .;
SECURITY_INIT
- __exitcall_begin = .;
- .exitcall : { *(.exitcall.exit) }
- __exitcall_end = .;
+ .exitcall : {
+ __exitcall_begin = .;
+ *(.exitcall.exit)
+ __exitcall_end = .;
+ }
- __uml_exitcall_begin = .;
- .uml.exitcall : { *(.uml.exitcall.exit) }
- __uml_exitcall_end = .;
+ .uml.exitcall : {
+ __uml_exitcall_begin = .;
+ *(.uml.exitcall.exit)
+ __uml_exitcall_end = .;
+ }
. = ALIGN(4);
- __alt_instructions = .;
- .altinstructions : { *(.altinstructions) }
- __alt_instructions_end = .;
+ .altinstructions : {
+ __alt_instructions = .;
+ *(.altinstructions)
+ __alt_instructions_end = .;
+ }
.altinstr_replacement : { *(.altinstr_replacement) }
/* .exit.text is discard at runtime, not link time, to deal with references
from .altinstructions and .eh_frame */
.exit.text : { *(.exit.text) }
.exit.data : { *(.exit.data) }
- __preinit_array_start = .;
- .preinit_array : { *(.preinit_array) }
- __preinit_array_end = .;
- __init_array_start = .;
- .init_array : { *(.init_array) }
- __init_array_end = .;
- __fini_array_start = .;
- .fini_array : { *(.fini_array) }
- __fini_array_end = .;
+ .preinit_array : {
+ __preinit_array_start = .;
+ *(.preinit_array)
+ __preinit_array_end = .;
+ }
+ .init_array : {
+ __init_array_start = .;
+ *(.init_array)
+ __init_array_end = .;
+ }
+ .fini_array : {
+ __fini_array_start = .;
+ *(.fini_array)
+ __fini_array_end = .;
+ }
. = ALIGN(4096);
- __initramfs_start = .;
- .init.ramfs : { *(.init.ramfs) }
- __initramfs_end = .;
+ .init.ramfs : {
+ __initramfs_start = .;
+ *(.init.ramfs)
+ __initramfs_end = .;
+ }
/* Sections to be discarded */
/DISCARD/ : {
diff --git a/include/asm-um/elf-x86_64.h b/include/asm-um/elf-x86_64.h
index 8a8246d0393..857471c49da 100644
--- a/include/asm-um/elf-x86_64.h
+++ b/include/asm-um/elf-x86_64.h
@@ -6,7 +6,9 @@
#ifndef __UM_ELF_X86_64_H
#define __UM_ELF_X86_64_H
+#include <linux/sched.h>
#include <asm/user.h>
+#include "skas.h"
/* x86-64 relocation types, taken from asm-x86_64/elf.h */
#define R_X86_64_NONE 0 /* No reloc */
@@ -64,6 +66,44 @@ typedef struct { } elf_fpregset_t;
PT_REGS_R15(regs) = 0; \
} while (0)
+#define ELF_CORE_COPY_REGS(pr_reg, regs) \
+ (pr_reg)[0] = (regs)->regs.skas.regs[0]; \
+ (pr_reg)[1] = (regs)->regs.skas.regs[1]; \
+ (pr_reg)[2] = (regs)->regs.skas.regs[2]; \
+ (pr_reg)[3] = (regs)->regs.skas.regs[3]; \
+ (pr_reg)[4] = (regs)->regs.skas.regs[4]; \
+ (pr_reg)[5] = (regs)->regs.skas.regs[5]; \
+ (pr_reg)[6] = (regs)->regs.skas.regs[6]; \
+ (pr_reg)[7] = (regs)->regs.skas.regs[7]; \
+ (pr_reg)[8] = (regs)->regs.skas.regs[8]; \
+ (pr_reg)[9] = (regs)->regs.skas.regs[9]; \
+ (pr_reg)[10] = (regs)->regs.skas.regs[10]; \
+ (pr_reg)[11] = (regs)->regs.skas.regs[11]; \
+ (pr_reg)[12] = (regs)->regs.skas.regs[12]; \
+ (pr_reg)[13] = (regs)->regs.skas.regs[13]; \
+ (pr_reg)[14] = (regs)->regs.skas.regs[14]; \
+ (pr_reg)[15] = (regs)->regs.skas.regs[15]; \
+ (pr_reg)[16] = (regs)->regs.skas.regs[16]; \
+ (pr_reg)[17] = (regs)->regs.skas.regs[17]; \
+ (pr_reg)[18] = (regs)->regs.skas.regs[18]; \
+ (pr_reg)[19] = (regs)->regs.skas.regs[19]; \
+ (pr_reg)[20] = (regs)->regs.skas.regs[20]; \
+ (pr_reg)[21] = current->thread.arch.fs; \
+ (pr_reg)[22] = 0; \
+ (pr_reg)[23] = 0; \
+ (pr_reg)[24] = 0; \
+ (pr_reg)[25] = 0; \
+ (pr_reg)[26] = 0;
+
+static inline int elf_core_copy_fpregs(struct task_struct *t,
+ elf_fpregset_t *fpu)
+{
+ int cpu = current_thread->cpu;
+ return save_fp_registers(userspace_pid[cpu], (unsigned long *) fpu);
+}
+
+#define ELF_CORE_COPY_FPREGS(t, fpu) elf_core_copy_fpregs(t, fpu)
+
#ifdef TIF_IA32 /* XXX */
#error XXX, indeed
clear_thread_flag(TIF_IA32);
diff --git a/include/asm-v850/flat.h b/include/asm-v850/flat.h
index 3888f59d688..17f0ea56661 100644
--- a/include/asm-v850/flat.h
+++ b/include/asm-v850/flat.h
@@ -25,6 +25,7 @@
#define flat_stack_align(sp) /* nothing needed */
#define flat_argvp_envp_on_stack() 0
#define flat_old_ram_flag(flags) (flags)
+#define flat_set_persistent(relval, p) 0
/* We store the type of relocation in the top 4 bits of the `relval.' */
@@ -46,7 +47,8 @@ flat_get_relocate_addr (unsigned long relval)
For the v850, RP should always be half-word aligned. */
static inline unsigned long flat_get_addr_from_rp (unsigned long *rp,
unsigned long relval,
- unsigned long flags)
+ unsigned long flags,
+ unsigned long *persistent)
{
short *srp = (short *)rp;
diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86_64/io_apic.h
index 969d225a935..d9f2e54324d 100644
--- a/include/asm-x86_64/io_apic.h
+++ b/include/asm-x86_64/io_apic.h
@@ -109,6 +109,12 @@ extern int mpc_default_type;
/* 1 if "noapic" boot option passed */
extern int skip_ioapic_setup;
+static inline void disable_ioapic_setup(void)
+{
+ skip_ioapic_setup = 1;
+}
+
+
/*
* If we use the IO-APIC for IRQ routing, disable automatic
* assignment of PCI IRQ's.
diff --git a/include/asm-x86_64/pgalloc.h b/include/asm-x86_64/pgalloc.h
index b467be6d367..8bb56468786 100644
--- a/include/asm-x86_64/pgalloc.h
+++ b/include/asm-x86_64/pgalloc.h
@@ -4,10 +4,6 @@
#include <asm/pda.h>
#include <linux/threads.h>
#include <linux/mm.h>
-#include <linux/quicklist.h>
-
-#define QUICK_PGD 0 /* We preserve special mappings over free */
-#define QUICK_PT 1 /* Other page table pages that are zero on free */
#define pmd_populate_kernel(mm, pmd, pte) \
set_pmd(pmd, __pmd(_PAGE_TABLE | __pa(pte)))
@@ -24,23 +20,23 @@ static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd, struct page *p
static inline void pmd_free(pmd_t *pmd)
{
BUG_ON((unsigned long)pmd & (PAGE_SIZE-1));
- quicklist_free(QUICK_PT, NULL, pmd);
+ free_page((unsigned long)pmd);
}
static inline pmd_t *pmd_alloc_one (struct mm_struct *mm, unsigned long addr)
{
- return (pmd_t *)quicklist_alloc(QUICK_PT, GFP_KERNEL|__GFP_REPEAT, NULL);
+ return (pmd_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
}
static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
{
- return (pud_t *)quicklist_alloc(QUICK_PT, GFP_KERNEL|__GFP_REPEAT, NULL);
+ return (pud_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
}
static inline void pud_free (pud_t *pud)
{
BUG_ON((unsigned long)pud & (PAGE_SIZE-1));
- quicklist_free(QUICK_PT, NULL, pud);
+ free_page((unsigned long)pud);
}
static inline void pgd_list_add(pgd_t *pgd)
@@ -61,57 +57,41 @@ static inline void pgd_list_del(pgd_t *pgd)
spin_unlock(&pgd_lock);
}
-static inline void pgd_ctor(void *x)
+static inline pgd_t *pgd_alloc(struct mm_struct *mm)
{
unsigned boundary;
- pgd_t *pgd = x;
- struct page *page = virt_to_page(pgd);
-
+ pgd_t *pgd = (pgd_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT);
+ if (!pgd)
+ return NULL;
+ pgd_list_add(pgd);
/*
* Copy kernel pointers in from init.
+ * Could keep a freelist or slab cache of those because the kernel
+ * part never changes.
*/
boundary = pgd_index(__PAGE_OFFSET);
+ memset(pgd, 0, boundary * sizeof(pgd_t));
memcpy(pgd + boundary,
- init_level4_pgt + boundary,
- (PTRS_PER_PGD - boundary) * sizeof(pgd_t));
-
- spin_lock(&pgd_lock);
- list_add(&page->lru, &pgd_list);
- spin_unlock(&pgd_lock);
-}
-
-static inline void pgd_dtor(void *x)
-{
- pgd_t *pgd = x;
- struct page *page = virt_to_page(pgd);
-
- spin_lock(&pgd_lock);
- list_del(&page->lru);
- spin_unlock(&pgd_lock);
-}
-
-static inline pgd_t *pgd_alloc(struct mm_struct *mm)
-{
- pgd_t *pgd = (pgd_t *)quicklist_alloc(QUICK_PGD,
- GFP_KERNEL|__GFP_REPEAT, pgd_ctor);
+ init_level4_pgt + boundary,
+ (PTRS_PER_PGD - boundary) * sizeof(pgd_t));
return pgd;
}
static inline void pgd_free(pgd_t *pgd)
{
BUG_ON((unsigned long)pgd & (PAGE_SIZE-1));
- quicklist_free(QUICK_PGD, pgd_dtor, pgd);
+ pgd_list_del(pgd);
+ free_page((unsigned long)pgd);
}
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
{
- return (pte_t *)quicklist_alloc(QUICK_PT, GFP_KERNEL|__GFP_REPEAT, NULL);
+ return (pte_t *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
}
static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long address)
{
- void *p = (void *)quicklist_alloc(QUICK_PT, GFP_KERNEL|__GFP_REPEAT, NULL);
-
+ void *p = (void *)get_zeroed_page(GFP_KERNEL|__GFP_REPEAT);
if (!p)
return NULL;
return virt_to_page(p);
@@ -123,22 +103,17 @@ static inline struct page *pte_alloc_one(struct mm_struct *mm, unsigned long add
static inline void pte_free_kernel(pte_t *pte)
{
BUG_ON((unsigned long)pte & (PAGE_SIZE-1));
- quicklist_free(QUICK_PT, NULL, pte);
+ free_page((unsigned long)pte);
}
static inline void pte_free(struct page *pte)
{
- quicklist_free_page(QUICK_PT, NULL, pte);
-}
+ __free_page(pte);
+}
-#define __pte_free_tlb(tlb,pte) quicklist_free_page(QUICK_PT, NULL,(pte))
+#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
-#define __pmd_free_tlb(tlb,x) quicklist_free(QUICK_PT, NULL, (x))
-#define __pud_free_tlb(tlb,x) quicklist_free(QUICK_PT, NULL, (x))
+#define __pmd_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
+#define __pud_free_tlb(tlb,x) tlb_remove_page((tlb),virt_to_page(x))
-static inline void check_pgt_cache(void)
-{
- quicklist_trim(QUICK_PGD, pgd_dtor, 25, 16);
- quicklist_trim(QUICK_PT, NULL, 25, 16);
-}
#endif /* _X86_64_PGALLOC_H */
diff --git a/include/asm-x86_64/pgtable.h b/include/asm-x86_64/pgtable.h
index c9d8764c89d..57dd6b3107e 100644
--- a/include/asm-x86_64/pgtable.h
+++ b/include/asm-x86_64/pgtable.h
@@ -411,6 +411,7 @@ pte_t *lookup_address(unsigned long addr);
#define HAVE_ARCH_UNMAPPED_AREA
#define pgtable_cache_init() do { } while (0)
+#define check_pgt_cache() do { } while (0)
#define PAGE_AGP PAGE_KERNEL_NOCACHE
#define HAVE_PAGE_AGP 1
diff --git a/include/asm-x86_64/processor.h b/include/asm-x86_64/processor.h
index 19525175b91..31f579b828f 100644
--- a/include/asm-x86_64/processor.h
+++ b/include/asm-x86_64/processor.h
@@ -371,7 +371,7 @@ static inline void sync_core(void)
#define ARCH_HAS_PREFETCH
static inline void prefetch(void *x)
{
- asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
+ asm volatile("prefetcht0 (%0)" :: "r" (x));
}
#define ARCH_HAS_PREFETCHW 1
diff --git a/include/asm-xtensa/bugs.h b/include/asm-xtensa/bugs.h
index c4228532013..69b29d19824 100644
--- a/include/asm-xtensa/bugs.h
+++ b/include/asm-xtensa/bugs.h
@@ -13,10 +13,6 @@
#ifndef _XTENSA_BUGS_H
#define _XTENSA_BUGS_H
-#include <asm/processor.h>
-
-static void __init check_bugs(void)
-{
-}
+static void check_bugs(void) { }
#endif /* _XTENSA_BUGS_H */
diff --git a/include/asm-xtensa/cache.h b/include/asm-xtensa/cache.h
index 1c4a78f29ae..3bba2a540cf 100644
--- a/include/asm-xtensa/cache.h
+++ b/include/asm-xtensa/cache.h
@@ -19,6 +19,15 @@
#define DCACHE_WAY_SIZE (XCHAL_DCACHE_SIZE/XCHAL_DCACHE_WAYS)
#define ICACHE_WAY_SIZE (XCHAL_ICACHE_SIZE/XCHAL_ICACHE_WAYS)
+#define DCACHE_WAY_SHIFT (XCHAL_DCACHE_SETWIDTH + XCHAL_DCACHE_LINEWIDTH)
+#define ICACHE_WAY_SHIFT (XCHAL_ICACHE_SETWIDTH + XCHAL_ICACHE_LINEWIDTH)
+
+/* Maximum cache size per way. */
+#if DCACHE_WAY_SIZE >= ICACHE_WAY_SIZE
+# define CACHE_WAY_SIZE DCACHE_WAY_SIZE
+#else
+# define CACHE_WAY_SIZE ICACHE_WAY_SIZE
+#endif
#endif /* _XTENSA_CACHE_H */
diff --git a/include/asm-xtensa/cacheflush.h b/include/asm-xtensa/cacheflush.h
index 22ef901b784..b773c57e75a 100644
--- a/include/asm-xtensa/cacheflush.h
+++ b/include/asm-xtensa/cacheflush.h
@@ -5,7 +5,7 @@
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * (C) 2001 - 2006 Tensilica Inc.
+ * (C) 2001 - 2007 Tensilica Inc.
*/
#ifndef _XTENSA_CACHEFLUSH_H
@@ -18,10 +18,7 @@
#include <asm/page.h>
/*
- * flush and invalidate data cache, invalidate instruction cache:
- *
- * __flush_invalidate_cache_all()
- * __flush_invalidate_cache_range(from,sze)
+ * Lo-level routines for cache flushing.
*
* invalidate data or instruction cache:
*
@@ -40,26 +37,39 @@
* __flush_invalidate_dcache_all()
* __flush_invalidate_dcache_page(adr)
* __flush_invalidate_dcache_range(from,size)
+ *
+ * specials for cache aliasing:
+ *
+ * __flush_invalidate_dcache_page_alias(vaddr,paddr)
+ * __invalidate_icache_page_alias(vaddr,paddr)
*/
-extern void __flush_invalidate_cache_all(void);
-extern void __flush_invalidate_cache_range(unsigned long, unsigned long);
-extern void __flush_invalidate_dcache_all(void);
+extern void __invalidate_dcache_all(void);
extern void __invalidate_icache_all(void);
-
extern void __invalidate_dcache_page(unsigned long);
extern void __invalidate_icache_page(unsigned long);
extern void __invalidate_icache_range(unsigned long, unsigned long);
extern void __invalidate_dcache_range(unsigned long, unsigned long);
+
#if XCHAL_DCACHE_IS_WRITEBACK
+extern void __flush_invalidate_dcache_all(void);
extern void __flush_dcache_page(unsigned long);
+extern void __flush_dcache_range(unsigned long, unsigned long);
extern void __flush_invalidate_dcache_page(unsigned long);
extern void __flush_invalidate_dcache_range(unsigned long, unsigned long);
#else
-# define __flush_dcache_page(p) do { } while(0)
-# define __flush_invalidate_dcache_page(p) do { } while(0)
-# define __flush_invalidate_dcache_range(p,s) do { } while(0)
+# define __flush_dcache_range(p,s) do { } while(0)
+# define __flush_dcache_page(p) do { } while(0)
+# define __flush_invalidate_dcache_page(p) __invalidate_dcache_page(p)
+# define __flush_invalidate_dcache_range(p,s) __invalidate_dcache_range(p,s)
+#endif
+
+#if (DCACHE_WAY_SIZE > PAGE_SIZE)
+extern void __flush_invalidate_dcache_page_alias(unsigned long, unsigned long);
+#endif
+#if (ICACHE_WAY_SIZE > PAGE_SIZE)
+extern void __invalidate_icache_page_alias(unsigned long, unsigned long);
#endif
/*
@@ -71,17 +81,21 @@ extern void __flush_invalidate_dcache_range(unsigned long, unsigned long);
* (see also Documentation/cachetlb.txt)
*/
-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
+#if (DCACHE_WAY_SIZE > PAGE_SIZE)
-#define flush_cache_all() __flush_invalidate_cache_all();
-#define flush_cache_mm(mm) __flush_invalidate_cache_all();
-#define flush_cache_dup_mm(mm) __flush_invalidate_cache_all();
+#define flush_cache_all() \
+ do { \
+ __flush_invalidate_dcache_all(); \
+ __invalidate_icache_all(); \
+ } while (0)
-#define flush_cache_vmap(start,end) __flush_invalidate_cache_all();
-#define flush_cache_vunmap(start,end) __flush_invalidate_cache_all();
+#define flush_cache_mm(mm) flush_cache_all()
+#define flush_cache_dup_mm(mm) flush_cache_mm(mm)
-extern void flush_dcache_page(struct page*);
+#define flush_cache_vmap(start,end) flush_cache_all()
+#define flush_cache_vunmap(start,end) flush_cache_all()
+extern void flush_dcache_page(struct page*);
extern void flush_cache_range(struct vm_area_struct*, ulong, ulong);
extern void flush_cache_page(struct vm_area_struct*, unsigned long, unsigned long);
@@ -101,24 +115,39 @@ extern void flush_cache_page(struct vm_area_struct*, unsigned long, unsigned lon
#endif
+/* Ensure consistency between data and instruction cache. */
#define flush_icache_range(start,end) \
- __invalidate_icache_range(start,(end)-(start))
+ do { \
+ __flush_dcache_range(start, (end) - (start)); \
+ __invalidate_icache_range(start,(end) - (start)); \
+ } while (0)
/* This is not required, see Documentation/cachetlb.txt */
-
-#define flush_icache_page(vma,page) do { } while(0)
+#define flush_icache_page(vma,page) do { } while (0)
#define flush_dcache_mmap_lock(mapping) do { } while (0)
#define flush_dcache_mmap_unlock(mapping) do { } while (0)
+#if (DCACHE_WAY_SIZE > PAGE_SIZE)
-#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
- memcpy(dst, src, len)
+extern void copy_to_user_page(struct vm_area_struct*, struct page*,
+ unsigned long, void*, const void*, unsigned long);
+extern void copy_from_user_page(struct vm_area_struct*, struct page*,
+ unsigned long, void*, const void*, unsigned long);
+
+#else
+
+#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
+ do { \
+ memcpy(dst, src, len); \
+ __flush_dcache_range((unsigned long) dst, len); \
+ __invalidate_icache_range((unsigned long) dst, len); \
+ } while (0)
#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
memcpy(dst, src, len)
-#endif /* __KERNEL__ */
+#endif
+#endif /* __KERNEL__ */
#endif /* _XTENSA_CACHEFLUSH_H */
-
diff --git a/include/asm-xtensa/elf.h b/include/asm-xtensa/elf.h
index 1569b53cec9..7083d46766a 100644
--- a/include/asm-xtensa/elf.h
+++ b/include/asm-xtensa/elf.h
@@ -20,6 +20,56 @@
#define EM_XTENSA 94
#define EM_XTENSA_OLD 0xABC7
+/* Xtensa relocations defined by the ABIs */
+
+#define R_XTENSA_NONE 0
+#define R_XTENSA_32 1
+#define R_XTENSA_RTLD 2
+#define R_XTENSA_GLOB_DAT 3
+#define R_XTENSA_JMP_SLOT 4
+#define R_XTENSA_RELATIVE 5
+#define R_XTENSA_PLT 6
+#define R_XTENSA_OP0 8
+#define R_XTENSA_OP1 9
+#define R_XTENSA_OP2 10
+#define R_XTENSA_ASM_EXPAND 11
+#define R_XTENSA_ASM_SIMPLIFY 12
+#define R_XTENSA_GNU_VTINHERIT 15
+#define R_XTENSA_GNU_VTENTRY 16
+#define R_XTENSA_DIFF8 17
+#define R_XTENSA_DIFF16 18
+#define R_XTENSA_DIFF32 19
+#define R_XTENSA_SLOT0_OP 20
+#define R_XTENSA_SLOT1_OP 21
+#define R_XTENSA_SLOT2_OP 22
+#define R_XTENSA_SLOT3_OP 23
+#define R_XTENSA_SLOT4_OP 24
+#define R_XTENSA_SLOT5_OP 25
+#define R_XTENSA_SLOT6_OP 26
+#define R_XTENSA_SLOT7_OP 27
+#define R_XTENSA_SLOT8_OP 28
+#define R_XTENSA_SLOT9_OP 29
+#define R_XTENSA_SLOT10_OP 30
+#define R_XTENSA_SLOT11_OP 31
+#define R_XTENSA_SLOT12_OP 32
+#define R_XTENSA_SLOT13_OP 33
+#define R_XTENSA_SLOT14_OP 34
+#define R_XTENSA_SLOT0_ALT 35
+#define R_XTENSA_SLOT1_ALT 36
+#define R_XTENSA_SLOT2_ALT 37
+#define R_XTENSA_SLOT3_ALT 38
+#define R_XTENSA_SLOT4_ALT 39
+#define R_XTENSA_SLOT5_ALT 40
+#define R_XTENSA_SLOT6_ALT 41
+#define R_XTENSA_SLOT7_ALT 42
+#define R_XTENSA_SLOT8_ALT 43
+#define R_XTENSA_SLOT9_ALT 44
+#define R_XTENSA_SLOT10_ALT 45
+#define R_XTENSA_SLOT11_ALT 46
+#define R_XTENSA_SLOT12_ALT 47
+#define R_XTENSA_SLOT13_ALT 48
+#define R_XTENSA_SLOT14_ALT 49
+
/* ELF register definitions. This is needed for core dump support. */
/*
diff --git a/include/asm-xtensa/io.h b/include/asm-xtensa/io.h
index 0faa614d969..47c3616ea9a 100644
--- a/include/asm-xtensa/io.h
+++ b/include/asm-xtensa/io.h
@@ -14,6 +14,7 @@
#ifdef __KERNEL__
#include <asm/byteorder.h>
#include <asm/page.h>
+#include <linux/kernel.h>
#include <linux/types.h>
diff --git a/include/asm-xtensa/ioctls.h b/include/asm-xtensa/ioctls.h
index 39e6f23921b..0ffa942954b 100644
--- a/include/asm-xtensa/ioctls.h
+++ b/include/asm-xtensa/ioctls.h
@@ -91,6 +91,10 @@
#define TIOCSBRK _IO('T', 39) /* BSD compatibility */
#define TIOCCBRK _IO('T', 40) /* BSD compatibility */
#define TIOCGSID _IOR('T', 41, pid_t) /* Return the session ID of FD*/
+#define TCGETS2 _IOR('T', 42, struct termios2)
+#define TCSETS2 _IOW('T', 43, struct termios2)
+#define TCSETSW2 _IOW('T', 44, struct termios2)
+#define TCSETSF2 _IOW('T', 45, struct termios2)
#define TIOCGPTN _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
#define TIOCSPTLCK _IOW('T',0x31, int) /* Lock/unlock Pty */
diff --git a/include/asm-xtensa/page.h b/include/asm-xtensa/page.h
index 1213cde7543..55ce2c9749a 100644
--- a/include/asm-xtensa/page.h
+++ b/include/asm-xtensa/page.h
@@ -1,11 +1,11 @@
/*
- * linux/include/asm-xtensa/page.h
+ * include/asm-xtensa/page.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version2 as
* published by the Free Software Foundation.
*
- * Copyright (C) 2001 - 2005 Tensilica Inc.
+ * Copyright (C) 2001 - 2007 Tensilica Inc.
*/
#ifndef _XTENSA_PAGE_H
@@ -14,6 +14,12 @@
#ifdef __KERNEL__
#include <asm/processor.h>
+#include <asm/types.h>
+#include <asm/cache.h>
+
+/*
+ * Fixed TLB translations in the processor.
+ */
#define XCHAL_KSEG_CACHED_VADDR 0xd0000000
#define XCHAL_KSEG_BYPASS_VADDR 0xd8000000
@@ -26,13 +32,60 @@
*/
#define PAGE_SHIFT 12
-#define PAGE_SIZE (1 << PAGE_SHIFT)
+#define PAGE_SIZE (__XTENSA_UL_CONST(1) << PAGE_SHIFT)
#define PAGE_MASK (~(PAGE_SIZE-1))
#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE - 1) & PAGE_MASK)
#define PAGE_OFFSET XCHAL_KSEG_CACHED_VADDR
-#define MAX_MEM_PFN XCHAL_KSEG_SIZE
-#define PGTABLE_START 0x80000000
+#define MAX_MEM_PFN XCHAL_KSEG_SIZE
+#define PGTABLE_START 0x80000000
+
+/*
+ * Cache aliasing:
+ *
+ * If the cache size for one way is greater than the page size, we have to
+ * deal with cache aliasing. The cache index is wider than the page size:
+ *
+ * | |cache| cache index
+ * | pfn |off| virtual address
+ * |xxxx:X|zzz|
+ * | : | |
+ * | \ / | |
+ * |trans.| |
+ * | / \ | |
+ * |yyyy:Y|zzz| physical address
+ *
+ * When the page number is translated to the physical page address, the lowest
+ * bit(s) (X) that are part of the cache index are also translated (Y).
+ * If this translation changes bit(s) (X), the cache index is also afected,
+ * thus resulting in a different cache line than before.
+ * The kernel does not provide a mechanism to ensure that the page color
+ * (represented by this bit) remains the same when allocated or when pages
+ * are remapped. When user pages are mapped into kernel space, the color of
+ * the page might also change.
+ *
+ * We use the address space VMALLOC_END ... VMALLOC_END + DCACHE_WAY_SIZE * 2
+ * to temporarily map a patch so we can match the color.
+ */
+
+#if DCACHE_WAY_SIZE > PAGE_SIZE
+# define DCACHE_ALIAS_ORDER (DCACHE_WAY_SHIFT - PAGE_SHIFT)
+# define DCACHE_ALIAS_MASK (PAGE_MASK & (DCACHE_WAY_SIZE - 1))
+# define DCACHE_ALIAS(a) (((a) & DCACHE_ALIAS_MASK) >> PAGE_SHIFT)
+# define DCACHE_ALIAS_EQ(a,b) ((((a) ^ (b)) & DCACHE_ALIAS_MASK) == 0)
+#else
+# define DCACHE_ALIAS_ORDER 0
+#endif
+
+#if ICACHE_WAY_SIZE > PAGE_SIZE
+# define ICACHE_ALIAS_ORDER (ICACHE_WAY_SHIFT - PAGE_SHIFT)
+# define ICACHE_ALIAS_MASK (PAGE_MASK & (ICACHE_WAY_SIZE - 1))
+# define ICACHE_ALIAS(a) (((a) & ICACHE_ALIAS_MASK) >> PAGE_SHIFT)
+# define ICACHE_ALIAS_EQ(a,b) ((((a) ^ (b)) & ICACHE_ALIAS_MASK) == 0)
+#else
+# define ICACHE_ALIAS_ORDER 0
+#endif
+
#ifdef __ASSEMBLY__
@@ -58,34 +111,23 @@ typedef struct { unsigned long pgprot; } pgprot_t;
/*
* Pure 2^n version of get_order
+ * Use 'nsau' instructions if supported by the processor or the generic version.
*/
-static inline int get_order(unsigned long size)
+#if XCHAL_HAVE_NSA
+
+static inline __attribute_const__ int get_order(unsigned long size)
{
- int order;
-#ifndef XCHAL_HAVE_NSU
- unsigned long x1, x2, x4, x8, x16;
-
- size = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
- x1 = size & 0xAAAAAAAA;
- x2 = size & 0xCCCCCCCC;
- x4 = size & 0xF0F0F0F0;
- x8 = size & 0xFF00FF00;
- x16 = size & 0xFFFF0000;
- order = x2 ? 2 : 0;
- order += (x16 != 0) * 16;
- order += (x8 != 0) * 8;
- order += (x4 != 0) * 4;
- order += (x1 != 0);
-
- return order;
-#else
- size = (size - 1) >> PAGE_SHIFT;
- asm ("nsau %0, %1" : "=r" (order) : "r" (size));
- return 32 - order;
-#endif
+ int lz;
+ asm ("nsau %0, %1" : "=r" (lz) : "r" ((size - 1) >> PAGE_SHIFT));
+ return 32 - lz;
}
+#else
+
+# include <asm-generic/page.h>
+
+#endif
struct page;
extern void clear_page(void *page);
@@ -96,11 +138,11 @@ extern void copy_page(void *to, void *from);
* some extra work
*/
-#if (DCACHE_WAY_SIZE > PAGE_SIZE)
-void clear_user_page(void *addr, unsigned long vaddr, struct page* page);
-void copy_user_page(void *to,void* from,unsigned long vaddr,struct page* page);
+#if DCACHE_WAY_SIZE > PAGE_SIZE
+extern void clear_user_page(void*, unsigned long, struct page*);
+extern void copy_user_page(void*, void*, unsigned long, struct page*);
#else
-# define clear_user_page(page,vaddr,pg) clear_page(page)
+# define clear_user_page(page, vaddr, pg) clear_page(page)
# define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
#endif
diff --git a/include/asm-xtensa/pgalloc.h b/include/asm-xtensa/pgalloc.h
index d56ddf2055e..3e5b5652510 100644
--- a/include/asm-xtensa/pgalloc.h
+++ b/include/asm-xtensa/pgalloc.h
@@ -1,11 +1,11 @@
/*
- * linux/include/asm-xtensa/pgalloc.h
+ * include/asm-xtensa/pgalloc.h
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
- * Copyright (C) 2001-2005 Tensilica Inc.
+ * Copyright (C) 2001-2007 Tensilica Inc.
*/
#ifndef _XTENSA_PGALLOC_H
@@ -13,103 +13,54 @@
#ifdef __KERNEL__
-#include <linux/threads.h>
#include <linux/highmem.h>
-#include <asm/processor.h>
-#include <asm/cacheflush.h>
-
-
-/* Cache aliasing:
- *
- * If the cache size for one way is greater than the page size, we have to
- * deal with cache aliasing. The cache index is wider than the page size:
- *
- * |cache |
- * |pgnum |page| virtual address
- * |xxxxxX|zzzz|
- * | | |
- * \ / | |
- * trans.| |
- * / \ | |
- * |yyyyyY|zzzz| physical address
- *
- * When the page number is translated to the physical page address, the lowest
- * bit(s) (X) that are also part of the cache index are also translated (Y).
- * If this translation changes this bit (X), the cache index is also afected,
- * thus resulting in a different cache line than before.
- * The kernel does not provide a mechanism to ensure that the page color
- * (represented by this bit) remains the same when allocated or when pages
- * are remapped. When user pages are mapped into kernel space, the color of
- * the page might also change.
- *
- * We use the address space VMALLOC_END ... VMALLOC_END + DCACHE_WAY_SIZE * 2
- * to temporarily map a patch so we can match the color.
- */
-
-#if (DCACHE_WAY_SIZE > PAGE_SIZE)
-# define PAGE_COLOR_MASK (PAGE_MASK & (DCACHE_WAY_SIZE-1))
-# define PAGE_COLOR(a) \
- (((unsigned long)(a)&PAGE_COLOR_MASK) >> PAGE_SHIFT)
-# define PAGE_COLOR_EQ(a,b) \
- ((((unsigned long)(a) ^ (unsigned long)(b)) & PAGE_COLOR_MASK) == 0)
-# define PAGE_COLOR_MAP0(v) \
- (VMALLOC_END + ((unsigned long)(v) & PAGE_COLOR_MASK))
-# define PAGE_COLOR_MAP1(v) \
- (VMALLOC_END + ((unsigned long)(v) & PAGE_COLOR_MASK) + DCACHE_WAY_SIZE)
-#endif
/*
* Allocating and freeing a pmd is trivial: the 1-entry pmd is
* inside the pgd, so has no extra memory associated with it.
*/
-#define pgd_free(pgd) free_page((unsigned long)(pgd))
-
-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
+#define pmd_populate_kernel(mm, pmdp, ptep) \
+ (pmd_val(*(pmdp)) = ((unsigned long)ptep))
+#define pmd_populate(mm, pmdp, page) \
+ (pmd_val(*(pmdp)) = ((unsigned long)page_to_virt(page)))
-static inline void
-pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmdp, pte_t *pte)
+static inline pgd_t*
+pgd_alloc(struct mm_struct *mm)
{
- pmd_val(*(pmdp)) = (unsigned long)(pte);
- __asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (pmdp));
+ return (pgd_t*) __get_free_pages(GFP_KERNEL | __GFP_ZERO, PGD_ORDER);
}
-static inline void
-pmd_populate(struct mm_struct *mm, pmd_t *pmdp, struct page *page)
+static inline void pgd_free(pgd_t *pgd)
{
- pmd_val(*(pmdp)) = (unsigned long)page_to_virt(page);
- __asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (pmdp));
+ free_page((unsigned long)pgd);
}
+/* Use a slab cache for the pte pages (see also sparc64 implementation) */
+extern struct kmem_cache *pgtable_cache;
-#else
-
-# define pmd_populate_kernel(mm, pmdp, pte) \
- (pmd_val(*(pmdp)) = (unsigned long)(pte))
-# define pmd_populate(mm, pmdp, page) \
- (pmd_val(*(pmdp)) = (unsigned long)page_to_virt(page))
-
-#endif
-
-static inline pgd_t*
-pgd_alloc(struct mm_struct *mm)
+static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
+ unsigned long address)
{
- pgd_t *pgd;
-
- pgd = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO, PGD_ORDER);
-
- if (likely(pgd != NULL))
- __flush_dcache_page((unsigned long)pgd);
+ return kmem_cache_alloc(pgtable_cache, GFP_KERNEL|__GFP_REPEAT);
+}
- return pgd;
+static inline struct page *pte_alloc_one(struct mm_struct *mm,
+ unsigned long addr)
+{
+ return virt_to_page(pte_alloc_one_kernel(mm, addr));
}
-extern pte_t* pte_alloc_one_kernel(struct mm_struct* mm, unsigned long addr);
-extern struct page* pte_alloc_one(struct mm_struct* mm, unsigned long addr);
+static inline void pte_free_kernel(pte_t *pte)
+{
+ kmem_cache_free(pgtable_cache, pte);
+}
-#define pte_free_kernel(pte) free_page((unsigned long)pte)
-#define pte_free(pte) __free_page(pte)
+static inline void pte_free(struct page *page)
+{
+ kmem_cache_free(pgtable_cache, page_address(page));
+}
#endif /* __KERNEL__ */
#endif /* _XTENSA_PGALLOC_H */
diff --git a/include/asm-xtensa/pgtable.h b/include/asm-xtensa/pgtable.h
index 06850f3b26a..c0fcc1c9660 100644
--- a/include/asm-xtensa/pgtable.h
+++ b/include/asm-xtensa/pgtable.h
@@ -1,11 +1,11 @@
/*
- * linux/include/asm-xtensa/pgtable.h
+ * include/asm-xtensa/pgtable.h
*
* This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version2 as
+ * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
- * Copyright (C) 2001 - 2005 Tensilica Inc.
+ * Copyright (C) 2001 - 2007 Tensilica Inc.
*/
#ifndef _XTENSA_PGTABLE_H
@@ -23,7 +23,7 @@
/*
* The Xtensa architecture port of Linux has a two-level page table system,
- * i.e. the logical three-level Linux page table layout are folded.
+ * i.e. the logical three-level Linux page table layout is folded.
* Each task has the following memory page tables:
*
* PGD table (page directory), ie. 3rd-level page table:
@@ -43,6 +43,7 @@
*
* The individual pages are 4 kB big with special pages for the empty_zero_page.
*/
+
#define PGDIR_SHIFT 22
#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
#define PGDIR_MASK (~(PGDIR_SIZE-1))
@@ -53,24 +54,26 @@
*/
#define PTRS_PER_PTE 1024
#define PTRS_PER_PTE_SHIFT 10
-#define PTRS_PER_PMD 1
#define PTRS_PER_PGD 1024
#define PGD_ORDER 0
-#define PMD_ORDER 0
#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
-#define FIRST_USER_ADDRESS 0
+#define FIRST_USER_ADDRESS 0
#define FIRST_USER_PGD_NR (FIRST_USER_ADDRESS >> PGDIR_SHIFT)
-/* virtual memory area. We keep a distance to other memory regions to be
+/*
+ * Virtual memory area. We keep a distance to other memory regions to be
* on the safe side. We also use this area for cache aliasing.
*/
-// FIXME: virtual memory area must be configuration-dependent
-
#define VMALLOC_START 0xC0000000
-#define VMALLOC_END 0xC7FF0000
+#define VMALLOC_END 0xC6FEFFFF
+#define TLBTEMP_BASE_1 0xC6FF0000
+#define TLBTEMP_BASE_2 0xC6FF8000
+#define MODULE_START 0xC7000000
+#define MODULE_END 0xC7FFFFFF
-/* Xtensa Linux config PTE layout (when present):
+/*
+ * Xtensa Linux config PTE layout (when present):
* 31-12: PPN
* 11-6: Software
* 5-4: RING
@@ -86,47 +89,55 @@
* See further below for PTE layout for swapped-out pages.
*/
-#define _PAGE_VALID (1<<0) /* hardware: page is accessible */
-#define _PAGE_WRENABLE (1<<1) /* hardware: page is writable */
+#define _PAGE_HW_EXEC (1<<0) /* hardware: page is executable */
+#define _PAGE_HW_WRITE (1<<1) /* hardware: page is writable */
+
+#define _PAGE_FILE (1<<1) /* non-linear mapping, if !present */
+#define _PAGE_PROTNONE (3<<0) /* special case for VM_PROT_NONE */
/* None of these cache modes include MP coherency: */
-#define _PAGE_NO_CACHE (0<<2) /* bypass, non-speculative */
-#if XCHAL_DCACHE_IS_WRITEBACK
-# define _PAGE_WRITEBACK (1<<2) /* write back */
-# define _PAGE_WRITETHRU (2<<2) /* write through */
-#else
-# define _PAGE_WRITEBACK (1<<2) /* assume write through */
-# define _PAGE_WRITETHRU (1<<2)
-#endif
-#define _PAGE_NOALLOC (3<<2) /* don't allocate cache,if not cached */
-#define _CACHE_MASK (3<<2)
+#define _PAGE_CA_BYPASS (0<<2) /* bypass, non-speculative */
+#define _PAGE_CA_WB (1<<2) /* write-back */
+#define _PAGE_CA_WT (2<<2) /* write-through */
+#define _PAGE_CA_MASK (3<<2)
+#define _PAGE_INVALID (3<<2)
#define _PAGE_USER (1<<4) /* user access (ring=1) */
-#define _PAGE_KERNEL (0<<4) /* kernel access (ring=0) */
/* Software */
-#define _PAGE_RW (1<<6) /* software: page writable */
+#define _PAGE_WRITABLE_BIT 6
+#define _PAGE_WRITABLE (1<<6) /* software: page writable */
#define _PAGE_DIRTY (1<<7) /* software: page dirty */
#define _PAGE_ACCESSED (1<<8) /* software: page accessed (read) */
-#define _PAGE_FILE (1<<9) /* nonlinear file mapping*/
-#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _CACHE_MASK | _PAGE_DIRTY)
-#define _PAGE_PRESENT ( _PAGE_VALID | _PAGE_WRITEBACK | _PAGE_ACCESSED)
+/* On older HW revisions, we always have to set bit 0 */
+#if XCHAL_HW_VERSION_MAJOR < 2000
+# define _PAGE_VALID (1<<0)
+#else
+# define _PAGE_VALID 0
+#endif
-#ifdef CONFIG_MMU
+#define _PAGE_CHG_MASK (PAGE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
+#define _PAGE_PRESENT (_PAGE_VALID | _PAGE_CA_WB | _PAGE_ACCESSED)
-# define PAGE_NONE __pgprot(_PAGE_PRESENT)
-# define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_RW)
-# define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER)
-# define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER)
-# define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_KERNEL | _PAGE_WRENABLE)
-# define PAGE_INVALID __pgprot(_PAGE_USER)
+#ifdef CONFIG_MMU
-# if (DCACHE_WAY_SIZE > PAGE_SIZE)
-# define PAGE_DIRECTORY __pgprot(_PAGE_VALID | _PAGE_ACCESSED | _PAGE_KERNEL)
-# else
-# define PAGE_DIRECTORY __pgprot(_PAGE_PRESENT | _PAGE_KERNEL)
-# endif
+#define PAGE_NONE __pgprot(_PAGE_INVALID | _PAGE_USER | _PAGE_PROTNONE)
+#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER)
+#define PAGE_COPY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_HW_EXEC)
+#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER)
+#define PAGE_READONLY_EXEC __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_HW_EXEC)
+#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITABLE)
+#define PAGE_SHARED_EXEC \
+ __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_WRITABLE | _PAGE_HW_EXEC)
+#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_HW_WRITE)
+#define PAGE_KERNEL_EXEC __pgprot(_PAGE_PRESENT|_PAGE_HW_WRITE|_PAGE_HW_EXEC)
+
+#if (DCACHE_WAY_SIZE > PAGE_SIZE)
+# define _PAGE_DIRECTORY (_PAGE_VALID | _PAGE_ACCESSED)
+#else
+# define _PAGE_DIRECTORY (_PAGE_VALID | _PAGE_ACCESSED | _PAGE_CA_WB)
+#endif
#else /* no mmu */
@@ -145,23 +156,23 @@
* What follows is the closest we can get by reasonable means..
* See linux/mm/mmap.c for protection_map[] array that uses these definitions.
*/
-#define __P000 PAGE_NONE /* private --- */
-#define __P001 PAGE_READONLY /* private --r */
-#define __P010 PAGE_COPY /* private -w- */
-#define __P011 PAGE_COPY /* private -wr */
-#define __P100 PAGE_READONLY /* private x-- */
-#define __P101 PAGE_READONLY /* private x-r */
-#define __P110 PAGE_COPY /* private xw- */
-#define __P111 PAGE_COPY /* private xwr */
-
-#define __S000 PAGE_NONE /* shared --- */
-#define __S001 PAGE_READONLY /* shared --r */
-#define __S010 PAGE_SHARED /* shared -w- */
-#define __S011 PAGE_SHARED /* shared -wr */
-#define __S100 PAGE_READONLY /* shared x-- */
-#define __S101 PAGE_READONLY /* shared x-r */
-#define __S110 PAGE_SHARED /* shared xw- */
-#define __S111 PAGE_SHARED /* shared xwr */
+#define __P000 PAGE_NONE /* private --- */
+#define __P001 PAGE_READONLY /* private --r */
+#define __P010 PAGE_COPY /* private -w- */
+#define __P011 PAGE_COPY /* private -wr */
+#define __P100 PAGE_READONLY_EXEC /* private x-- */
+#define __P101 PAGE_READONLY_EXEC /* private x-r */
+#define __P110 PAGE_COPY_EXEC /* private xw- */
+#define __P111 PAGE_COPY_EXEC /* private xwr */
+
+#define __S000 PAGE_NONE /* shared --- */
+#define __S001 PAGE_READONLY /* shared --r */
+#define __S010 PAGE_SHARED /* shared -w- */
+#define __S011 PAGE_SHARED /* shared -wr */
+#define __S100 PAGE_READONLY_EXEC /* shared x-- */
+#define __S101 PAGE_READONLY_EXEC /* shared x-r */
+#define __S110 PAGE_SHARED_EXEC /* shared xw- */
+#define __S111 PAGE_SHARED_EXEC /* shared xwr */
#ifndef __ASSEMBLY__
@@ -183,35 +194,42 @@ extern pgd_t swapper_pg_dir[PAGE_SIZE/sizeof(pgd_t)];
#define pmd_page(pmd) virt_to_page(pmd_val(pmd))
/*
- * The following only work if pte_present() is true.
+ * pte status.
*/
-#define pte_none(pte) (!(pte_val(pte) ^ _PAGE_USER))
-#define pte_present(pte) (pte_val(pte) & _PAGE_VALID)
+#define pte_none(pte) (pte_val(pte) == _PAGE_INVALID)
+#define pte_present(pte) \
+ (((pte_val(pte) & _PAGE_CA_MASK) != _PAGE_INVALID) \
+ || ((pte_val(pte) & _PAGE_PROTNONE) == _PAGE_PROTNONE))
#define pte_clear(mm,addr,ptep) \
- do { update_pte(ptep, __pte(_PAGE_USER)); } while(0)
+ do { update_pte(ptep, __pte(_PAGE_INVALID)); } while(0)
#define pmd_none(pmd) (!pmd_val(pmd))
#define pmd_present(pmd) (pmd_val(pmd) & PAGE_MASK)
-#define pmd_clear(pmdp) do { set_pmd(pmdp, __pmd(0)); } while (0)
#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
+#define pmd_clear(pmdp) do { set_pmd(pmdp, __pmd(0)); } while (0)
-/* Note: We use the _PAGE_USER bit to indicate write-protect kernel memory */
-
-static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_RW; }
+static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITABLE; }
static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_DIRTY; }
static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
static inline int pte_file(pte_t pte) { return pte_val(pte) & _PAGE_FILE; }
-static inline pte_t pte_wrprotect(pte_t pte) { pte_val(pte) &= ~(_PAGE_RW | _PAGE_WRENABLE); return pte; }
-static inline pte_t pte_mkclean(pte_t pte) { pte_val(pte) &= ~_PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkold(pte_t pte) { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkdirty(pte_t pte) { pte_val(pte) |= _PAGE_DIRTY; return pte; }
-static inline pte_t pte_mkyoung(pte_t pte) { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
-static inline pte_t pte_mkwrite(pte_t pte) { pte_val(pte) |= _PAGE_RW; return pte; }
+static inline pte_t pte_wrprotect(pte_t pte)
+ { pte_val(pte) &= ~(_PAGE_WRITABLE | _PAGE_HW_WRITE); return pte; }
+static inline pte_t pte_mkclean(pte_t pte)
+ { pte_val(pte) &= ~(_PAGE_DIRTY | _PAGE_HW_WRITE); return pte; }
+static inline pte_t pte_mkold(pte_t pte)
+ { pte_val(pte) &= ~_PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkdirty(pte_t pte)
+ { pte_val(pte) |= _PAGE_DIRTY; return pte; }
+static inline pte_t pte_mkyoung(pte_t pte)
+ { pte_val(pte) |= _PAGE_ACCESSED; return pte; }
+static inline pte_t pte_mkwrite(pte_t pte)
+ { pte_val(pte) |= _PAGE_WRITABLE; return pte; }
/*
* Conversion functions: convert a page and protection to a page entry,
* and a page entry and page directory to the page they refer to.
*/
+
#define pte_pfn(pte) (pte_val(pte) >> PAGE_SHIFT)
#define pte_same(a,b) (pte_val(a) == pte_val(b))
#define pte_page(x) pfn_to_page(pte_pfn(x))
@@ -232,8 +250,9 @@ static inline void update_pte(pte_t *ptep, pte_t pteval)
{
*ptep = pteval;
#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
- __asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (ptep));
+ __asm__ __volatile__ ("dhwb %0, 0" :: "a" (ptep));
#endif
+
}
struct mm_struct;
@@ -249,9 +268,6 @@ static inline void
set_pmd(pmd_t *pmdp, pmd_t pmdval)
{
*pmdp = pmdval;
-#if (DCACHE_WAY_SIZE > PAGE_SIZE) && XCHAL_DCACHE_IS_WRITEBACK
- __asm__ __volatile__ ("memw; dhwb %0, 0; dsync" :: "a" (pmdp));
-#endif
}
struct vm_area_struct;
@@ -306,52 +322,34 @@ ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
/*
* Encode and decode a swap entry.
- * Each PTE in a process VM's page table is either:
- * "present" -- valid and not swapped out, protection bits are meaningful;
- * "not present" -- which further subdivides in these two cases:
- * "none" -- no mapping at all; identified by pte_none(), set by pte_clear(
- * "swapped out" -- the page is swapped out, and the SWP macros below
- * are used to store swap file info in the PTE itself.
*
- * In the Xtensa processor MMU, any PTE entries in user space (or anywhere
- * in virtual memory that can map differently across address spaces)
- * must have a correct ring value that represents the RASID field that
- * is changed when switching address spaces. Eg. such PTE entries cannot
- * be set to ring zero, because that can cause a (global) kernel ASID
- * entry to be created in the TLBs (even with invalid cache attribute),
- * potentially causing a multihit exception when going back to another
- * address space that mapped the same virtual address at another ring.
- *
- * SO: we avoid using ring bits (_PAGE_RING_MASK) in "not present" PTEs.
- * We also avoid using the _PAGE_VALID bit which must be zero for non-present
- * pages.
- *
- * We end up with the following available bits: 1..3 and 7..31.
- * We don't bother with 1..3 for now (we can use them later if needed),
- * and chose to allocate 6 bits for SWP_TYPE and the remaining 19 bits
- * for SWP_OFFSET. At least 5 bits are needed for SWP_TYPE, because it
- * is currently implemented as an index into swap_info[MAX_SWAPFILES]
- * and MAX_SWAPFILES is currently defined as 32 in <linux/swap.h>.
- * However, for some reason all other architectures in the 2.4 kernel
- * reserve either 6, 7, or 8 bits so I'll not detract from that for now. :)
- * SWP_OFFSET is an offset into the swap file in page-size units, so
- * with 4 kB pages, 19 bits supports a maximum swap file size of 2 GB.
- *
- * FIXME: 2 GB isn't very big. Other bits can be used to allow
- * larger swap sizes. In the meantime, it appears relatively easy to get
- * around the 2 GB limitation by simply using multiple swap files.
+ * Format of swap pte:
+ * bit 0 MBZ
+ * bit 1 page-file (must be zero)
+ * bits 2 - 3 page hw access mode (must be 11: _PAGE_INVALID)
+ * bits 4 - 5 ring protection (must be 01: _PAGE_USER)
+ * bits 6 - 10 swap type (5 bits -> 32 types)
+ * bits 11 - 31 swap offset / PAGE_SIZE (21 bits -> 8GB)
+
+ * Format of file pte:
+ * bit 0 MBZ
+ * bit 1 page-file (must be one: _PAGE_FILE)
+ * bits 2 - 3 page hw access mode (must be 11: _PAGE_INVALID)
+ * bits 4 - 5 ring protection (must be 01: _PAGE_USER)
+ * bits 6 - 31 file offset / PAGE_SIZE
*/
-#define __swp_type(entry) (((entry).val >> 7) & 0x3f)
-#define __swp_offset(entry) ((entry).val >> 13)
-#define __swp_entry(type,offs) ((swp_entry_t) {((type) << 7) | ((offs) << 13)})
+#define __swp_type(entry) (((entry).val >> 6) & 0x1f)
+#define __swp_offset(entry) ((entry).val >> 11)
+#define __swp_entry(type,offs) \
+ ((swp_entry_t) {((type) << 6) | ((offs) << 11) | _PAGE_INVALID})
#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
-#define PTE_FILE_MAX_BITS 29
-#define pte_to_pgoff(pte) (pte_val(pte) >> 3)
-#define pgoff_to_pte(off) ((pte_t) { ((off) << 3) | _PAGE_FILE })
-
+#define PTE_FILE_MAX_BITS 28
+#define pte_to_pgoff(pte) (pte_val(pte) >> 4)
+#define pgoff_to_pte(off) \
+ ((pte_t) { ((off) << 4) | _PAGE_INVALID | _PAGE_FILE })
#endif /* !defined (__ASSEMBLY__) */
@@ -394,13 +392,12 @@ extern void update_mmu_cache(struct vm_area_struct * vma,
* remap a physical page `pfn' of size `size' with page protection `prot'
* into virtual address `from'
*/
+
#define io_remap_pfn_range(vma,from,pfn,size,prot) \
remap_pfn_range(vma, from, pfn, size, prot)
-/* No page table caches to init */
-
-#define pgtable_cache_init() do { } while (0)
+extern void pgtable_cache_init(void);
typedef pte_t *pte_addr_t;
diff --git a/include/asm-xtensa/processor.h b/include/asm-xtensa/processor.h
index 4feb9f7f35a..35145bcd96e 100644
--- a/include/asm-xtensa/processor.h
+++ b/include/asm-xtensa/processor.h
@@ -33,7 +33,7 @@
* the 1 GB requirement applies to the stack as well.
*/
-#define TASK_SIZE 0x40000000
+#define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
/*
* General exception cause assigned to debug exceptions. Debug exceptions go
diff --git a/include/asm-xtensa/syscall.h b/include/asm-xtensa/syscall.h
index 6cb0d42f11c..05cebf8f62b 100644
--- a/include/asm-xtensa/syscall.h
+++ b/include/asm-xtensa/syscall.h
@@ -1,3 +1,13 @@
+/*
+ * include/asm-xtensa/syscall.h
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2001 - 2007 Tensilica Inc.
+ */
+
struct pt_regs;
struct sigaction;
asmlinkage long xtensa_execve(char*, char**, char**, struct pt_regs*);
@@ -17,4 +27,16 @@ asmlinkage long sys_rt_sigaction(int,
const struct sigaction __user *,
struct sigaction __user *,
size_t);
-asmlinkage long xtensa_shmat(int shmid, char __user *shmaddr, int shmflg);
+asmlinkage long xtensa_shmat(int, char __user *, int);
+asmlinkage long xtensa_fadvise64_64(int, int,
+ unsigned long long, unsigned long long);
+
+/* Should probably move to linux/syscalls.h */
+struct pollfd;
+asmlinkage long sys_pselect6(int n, fd_set __user *inp, fd_set __user *outp,
+ fd_set __user *exp, struct timespec __user *tsp, void __user *sig);
+asmlinkage long sys_ppoll(struct pollfd __user *ufds, unsigned int nfds,
+ struct timespec __user *tsp, const sigset_t __user *sigmask,
+ size_t sigsetsize);
+
+
diff --git a/include/asm-xtensa/termbits.h b/include/asm-xtensa/termbits.h
index 9972c25ec86..85aa6a3c0b6 100644
--- a/include/asm-xtensa/termbits.h
+++ b/include/asm-xtensa/termbits.h
@@ -157,6 +157,7 @@ struct ktermios {
#define HUPCL 0002000
#define CLOCAL 0004000
#define CBAUDEX 0010000
+#define BOTHER 0010000
#define B57600 0010001
#define B115200 0010002
#define B230400 0010003
@@ -172,10 +173,12 @@ struct ktermios {
#define B3000000 0010015
#define B3500000 0010016
#define B4000000 0010017
-#define CIBAUD 002003600000 /* input baud rate (not used) */
+#define CIBAUD 002003600000 /* input baud rate */
#define CMSPAR 010000000000 /* mark or space (stick) parity */
#define CRTSCTS 020000000000 /* flow control */
+#define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */
+
/* c_lflag bits */
#define ISIG 0000001
diff --git a/include/asm-xtensa/termios.h b/include/asm-xtensa/termios.h
index f14b42c8dac..4673f42f88a 100644
--- a/include/asm-xtensa/termios.h
+++ b/include/asm-xtensa/termios.h
@@ -95,8 +95,10 @@ struct termio {
copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
})
-#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
-#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
+#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios2))
+#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios2))
+#define user_termios_to_kernel_termios_1(k, u) copy_from_user(k, u, sizeof(struct termios))
+#define kernel_termios_to_user_termios_1(u, k) copy_to_user(u, k, sizeof(struct termios))
#endif /* __KERNEL__ */
diff --git a/include/asm-xtensa/timex.h b/include/asm-xtensa/timex.h
index 28c7985a400..a5fca59fba9 100644
--- a/include/asm-xtensa/timex.h
+++ b/include/asm-xtensa/timex.h
@@ -41,10 +41,10 @@
extern unsigned long ccount_per_jiffy;
extern unsigned long ccount_nsec;
#define CCOUNT_PER_JIFFY ccount_per_jiffy
-#define CCOUNT_NSEC ccount_nsec
+#define NSEC_PER_CCOUNT ccount_nsec
#else
#define CCOUNT_PER_JIFFY (CONFIG_XTENSA_CPU_CLOCK*(1000000UL/HZ))
-#define CCOUNT_NSEC (1000000000UL / CONFIG_XTENSA_CPU_CLOCK)
+#define NSEC_PER_CCOUNT (1000UL / CONFIG_XTENSA_CPU_CLOCK)
#endif
diff --git a/include/asm-xtensa/tlb.h b/include/asm-xtensa/tlb.h
index 4562b2dcfbc..4830232017a 100644
--- a/include/asm-xtensa/tlb.h
+++ b/include/asm-xtensa/tlb.h
@@ -11,14 +11,36 @@
#ifndef _XTENSA_TLB_H
#define _XTENSA_TLB_H
-#define tlb_start_vma(tlb,vma) do { } while (0)
-#define tlb_end_vma(tlb,vma) do { } while (0)
-#define __tlb_remove_tlb_entry(tlb,pte,addr) do { } while (0)
+#include <asm/cache.h>
+#include <asm/page.h>
+
+#if (DCACHE_WAY_SIZE <= PAGE_SIZE)
+
+/* Note, read http://lkml.org/lkml/2004/1/15/6 */
+
+# define tlb_start_vma(tlb,vma) do { } while (0)
+# define tlb_end_vma(tlb,vma) do { } while (0)
+
+#else
+# define tlb_start_vma(tlb, vma) \
+ do { \
+ if (!tlb->fullmm) \
+ flush_cache_range(vma, vma->vm_start, vma->vm_end); \
+ } while(0)
+
+# define tlb_end_vma(tlb, vma) \
+ do { \
+ if (!tlb->fullmm) \
+ flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
+ } while(0)
+
+#endif
+
+#define __tlb_remove_tlb_entry(tlb,pte,addr) do { } while (0)
#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
#include <asm-generic/tlb.h>
-#include <asm/page.h>
#define __pte_free_tlb(tlb,pte) pte_free(pte)
diff --git a/include/asm-xtensa/types.h b/include/asm-xtensa/types.h
index 9d99a8e9e33..f1e84526f99 100644
--- a/include/asm-xtensa/types.h
+++ b/include/asm-xtensa/types.h
@@ -11,6 +11,15 @@
#ifndef _XTENSA_TYPES_H
#define _XTENSA_TYPES_H
+
+#ifdef __ASSEMBLY__
+# define __XTENSA_UL(x) (x)
+# define __XTENSA_UL_CONST(x) x
+#else
+# define __XTENSA_UL(x) ((unsigned long)(x))
+# define __XTENSA_UL_CONST(x) x##UL
+#endif
+
#ifndef __ASSEMBLY__
typedef unsigned short umode_t;
diff --git a/include/asm-xtensa/unistd.h b/include/asm-xtensa/unistd.h
index 9bd34024431..92968aabe34 100644
--- a/include/asm-xtensa/unistd.h
+++ b/include/asm-xtensa/unistd.h
@@ -151,7 +151,7 @@ __SYSCALL( 61, sys_fcntl64, 3)
#define __NR_available62 62
__SYSCALL( 62, sys_ni_syscall, 0)
#define __NR_fadvise64_64 63
-__SYSCALL( 63, sys_fadvise64_64, 6)
+__SYSCALL( 63, xtensa_fadvise64_64, 6)
#define __NR_utime 64 /* glibc 2.3.3 ?? */
__SYSCALL( 64, sys_utime, 2)
#define __NR_utimes 65
@@ -339,8 +339,8 @@ __SYSCALL(148, sys_setpgid, 2)
__SYSCALL(149, sys_getpgid, 1)
#define __NR_getppid 150
__SYSCALL(150, sys_getppid, 0)
-#define __NR_available151 151
-__SYSCALL(151, sys_ni_syscall, 0)
+#define __NR_getpgrp 151
+__SYSCALL(151, sys_getpgrp, 0)
#define __NR_reserved152 152 /* set_thread_area */
__SYSCALL(152, sys_ni_syscall, 0)
@@ -577,7 +577,112 @@ __SYSCALL(258, sys_keyctl, 5)
#define __NR_available259 259
__SYSCALL(259, sys_ni_syscall, 0)
-#define __NR_syscall_count 261
+
+#define __NR_readahead 260
+__SYSCALL(260, sys_readahead, 5)
+#define __NR_remap_file_pages 261
+__SYSCALL(261, sys_remap_file_pages, 5)
+#define __NR_migrate_pages 262
+__SYSCALL(262, sys_migrate_pages, 0)
+#define __NR_mbind 263
+__SYSCALL(263, sys_mbind, 6)
+#define __NR_get_mempolicy 264
+__SYSCALL(264, sys_get_mempolicy, 5)
+#define __NR_set_mempolicy 265
+__SYSCALL(265, sys_set_mempolicy, 3)
+#define __NR_unshare 266
+__SYSCALL(266, sys_unshare, 1)
+#define __NR_move_pages 267
+__SYSCALL(267, sys_move_pages, 0)
+#define __NR_splice 268
+__SYSCALL(268, sys_splice, 0)
+#define __NR_tee 269
+__SYSCALL(269, sys_tee, 0)
+#define __NR_vmsplice 270
+__SYSCALL(270, sys_vmsplice, 0)
+#define __NR_available271 271
+__SYSCALL(271, sys_ni_syscall, 0)
+
+#define __NR_pselect6 272
+__SYSCALL(272, sys_pselect6, 0)
+#define __NR_ppoll 273
+__SYSCALL(273, sys_ppoll, 0)
+#define __NR_epoll_pwait 274
+__SYSCALL(274, sys_epoll_pwait, 0)
+#define __NR_available275 275
+__SYSCALL(275, sys_ni_syscall, 0)
+
+#define __NR_inotify_init 276
+__SYSCALL(276, sys_inotify_init, 0)
+#define __NR_inotify_add_watch 277
+__SYSCALL(277, sys_inotify_add_watch, 3)
+#define __NR_inotify_rm_watch 278
+__SYSCALL(278, sys_inotify_rm_watch, 2)
+#define __NR_available279 279
+__SYSCALL(279, sys_ni_syscall, 0)
+
+#define __NR_getcpu 280
+__SYSCALL(280, sys_getcpu, 0)
+#define __NR_kexec_load 281
+__SYSCALL(281, sys_ni_syscall, 0)
+
+#define __NR_ioprio_set 282
+__SYSCALL(282, sys_ioprio_set, 2)
+#define __NR_ioprio_get 283
+__SYSCALL(283, sys_ioprio_get, 3)
+
+#define __NR_set_robust_list 284
+__SYSCALL(284, sys_set_robust_list, 3)
+#define __NR_get_robust_list 285
+__SYSCALL(285, sys_get_robust_list, 3)
+#define __NR_reserved286 286 /* sync_file_rangeX */
+__SYSCALL(286, sys_ni_syscall, 3)
+#define __NR_available287 287
+__SYSCALL(287, sys_faccessat, 0)
+
+/* Relative File Operations */
+
+#define __NR_openat 288
+__SYSCALL(288, sys_openat, 4)
+#define __NR_mkdirat 289
+__SYSCALL(289, sys_mkdirat, 3)
+#define __NR_mknodat 290
+__SYSCALL(290, sys_mknodat, 4)
+#define __NR_unlinkat 291
+__SYSCALL(291, sys_unlinkat, 3)
+#define __NR_renameat 292
+__SYSCALL(292, sys_renameat, 4)
+#define __NR_linkat 293
+__SYSCALL(293, sys_linkat, 5)
+#define __NR_symlinkat 294
+__SYSCALL(294, sys_symlinkat, 3)
+#define __NR_readlinkat 295
+__SYSCALL(295, sys_readlinkat, 4)
+#define __NR_utimensat 296
+__SYSCALL(296, sys_utimensat, 0)
+#define __NR_fchownat 297
+__SYSCALL(297, sys_fchownat, 5)
+#define __NR_futimesat 298
+__SYSCALL(298, sys_futimesat, 4)
+#define __NR_fstatat64 299
+__SYSCALL(299, sys_fstatat64, 0)
+#define __NR_fchmodat 300
+__SYSCALL(300, sys_fchmodat, 4)
+#define __NR_faccessat 301
+__SYSCALL(301, sys_faccessat, 4)
+#define __NR_available302 302
+__SYSCALL(302, sys_ni_syscall, 0)
+#define __NR_available303 303
+__SYSCALL(303, sys_ni_syscall, 0)
+
+#define __NR_signalfd 304
+__SYSCALL(304, sys_signalfd, 3)
+#define __NR_timerfd 305
+__SYSCALL(305, sys_timerfd, 4)
+#define __NR_eventfd 306
+__SYSCALL(306, sys_eventfd, 1)
+
+#define __NR_syscall_count 307
/*
* sysxtensa syscall handler
@@ -612,8 +717,19 @@ __SYSCALL(259, sys_ni_syscall, 0)
#define __ARCH_WANT_SYS_LLSEEK
#define __ARCH_WANT_SYS_RT_SIGACTION
#define __ARCH_WANT_SYS_RT_SIGSUSPEND
+#define __ARCH_WANT_SYS_GETPGRP
-#endif /* __KERNEL__ */
+/*
+ * Ignore legacy system calls in the checksyscalls.sh script
+ */
-#endif /* _XTENSA_UNISTD_H */
+#define __IGNORE_fork /* use clone */
+#define __IGNORE_time
+#define __IGNORE_alarm /* use setitimer */
+#define __IGNORE_pause
+#define __IGNORE_mmap /* use mmap2 */
+#define __IGNORE_vfork /* use clone */
+#define __IGNORE_fadvise64 /* use fadvise64_64 */
+#endif /* __KERNEL__ */
+#endif /* _XTENSA_UNISTD_H */
diff --git a/include/linux/Kbuild b/include/linux/Kbuild
index ad7f71a81b0..818cc3a50e6 100644
--- a/include/linux/Kbuild
+++ b/include/linux/Kbuild
@@ -7,6 +7,7 @@ header-y += raid/
header-y += spi/
header-y += sunrpc/
header-y += tc_act/
+header-y += tc_ematch/
header-y += netfilter/
header-y += netfilter_arp/
header-y += netfilter_bridge/
diff --git a/include/linux/aer.h b/include/linux/aer.h
index 509656286e5..bcf236d825e 100644
--- a/include/linux/aer.h
+++ b/include/linux/aer.h
@@ -15,11 +15,26 @@ extern int pci_disable_pcie_error_reporting(struct pci_dev *dev);
extern int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev);
extern int pci_cleanup_aer_correct_error_status(struct pci_dev *dev);
#else
-#define pci_enable_pcie_error_reporting(dev) (-EINVAL)
-#define pci_find_aer_capability(dev) (0)
-#define pci_disable_pcie_error_reporting(dev) (-EINVAL)
-#define pci_cleanup_aer_uncorrect_error_status(dev) (-EINVAL)
-#define pci_cleanup_aer_correct_error_status(dev) (-EINVAL)
+static inline int pci_enable_pcie_error_reporting(struct pci_dev *dev)
+{
+ return -EINVAL;
+}
+static inline int pci_find_aer_capability(struct pci_dev *dev)
+{
+ return 0;
+}
+static inline int pci_disable_pcie_error_reporting(struct pci_dev *dev)
+{
+ return -EINVAL;
+}
+static inline int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
+{
+ return -EINVAL;
+}
+static inline int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
+{
+ return -EINVAL;
+}
#endif
#endif //_AER_H_
diff --git a/include/linux/ata.h b/include/linux/ata.h
index 23a22df039d..c043c1ccf1c 100644
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -73,6 +73,19 @@ enum {
ATA_PIO5 = ATA_PIO4 | (1 << 5),
ATA_PIO6 = ATA_PIO5 | (1 << 6),
+ ATA_SWDMA0 = (1 << 0),
+ ATA_SWDMA1 = ATA_SWDMA0 | (1 << 1),
+ ATA_SWDMA2 = ATA_SWDMA1 | (1 << 2),
+
+ ATA_SWDMA2_ONLY = (1 << 2),
+
+ ATA_MWDMA0 = (1 << 0),
+ ATA_MWDMA1 = ATA_MWDMA0 | (1 << 1),
+ ATA_MWDMA2 = ATA_MWDMA1 | (1 << 2),
+
+ ATA_MWDMA12_ONLY = (1 << 1) | (1 << 2),
+ ATA_MWDMA2_ONLY = (1 << 2),
+
ATA_UDMA0 = (1 << 0),
ATA_UDMA1 = ATA_UDMA0 | (1 << 1),
ATA_UDMA2 = ATA_UDMA1 | (1 << 2),
diff --git a/include/linux/audit.h b/include/linux/audit.h
index 4bbd8601b8f..d6579df8dad 100644
--- a/include/linux/audit.h
+++ b/include/linux/audit.h
@@ -63,8 +63,8 @@
#define AUDIT_ADD_RULE 1011 /* Add syscall filtering rule */
#define AUDIT_DEL_RULE 1012 /* Delete syscall filtering rule */
#define AUDIT_LIST_RULES 1013 /* List syscall filtering rules */
-#define AUDIT_TTY_GET 1014 /* Get TTY auditing status */
-#define AUDIT_TTY_SET 1015 /* Set TTY auditing status */
+#define AUDIT_TTY_GET 1016 /* Get TTY auditing status */
+#define AUDIT_TTY_SET 1017 /* Set TTY auditing status */
#define AUDIT_FIRST_USER_MSG 1100 /* Userspace messages mostly uninteresting to kernel */
#define AUDIT_USER_AVC 1107 /* We filter this differently */
diff --git a/include/linux/cpu.h b/include/linux/cpu.h
index 1d5ded0836e..0ad72c4cf31 100644
--- a/include/linux/cpu.h
+++ b/include/linux/cpu.h
@@ -126,16 +126,16 @@ static inline void cpuhotplug_mutex_unlock(struct mutex *cpu_hp_mutex)
static inline int cpu_is_offline(int cpu) { return 0; }
#endif /* CONFIG_HOTPLUG_CPU */
-#ifdef CONFIG_SUSPEND_SMP
+#ifdef CONFIG_PM_SLEEP_SMP
extern int suspend_cpu_hotplug;
extern int disable_nonboot_cpus(void);
extern void enable_nonboot_cpus(void);
-#else
+#else /* !CONFIG_PM_SLEEP_SMP */
#define suspend_cpu_hotplug 0
static inline int disable_nonboot_cpus(void) { return 0; }
static inline void enable_nonboot_cpus(void) {}
-#endif
+#endif /* !CONFIG_PM_SLEEP_SMP */
#endif /* _LINUX_CPU_H_ */
diff --git a/include/linux/cpufreq.h b/include/linux/cpufreq.h
index 963051a967d..3ec6e7ff5fb 100644
--- a/include/linux/cpufreq.h
+++ b/include/linux/cpufreq.h
@@ -32,15 +32,7 @@
* CPUFREQ NOTIFIER INTERFACE *
*********************************************************************/
-#ifdef CONFIG_CPU_FREQ
int cpufreq_register_notifier(struct notifier_block *nb, unsigned int list);
-#else
-static inline int cpufreq_register_notifier(struct notifier_block *nb,
- unsigned int list)
-{
- return 0;
-}
-#endif
int cpufreq_unregister_notifier(struct notifier_block *nb, unsigned int list);
#define CPUFREQ_TRANSITION_NOTIFIER (0)
@@ -268,22 +260,17 @@ struct freq_attr {
int cpufreq_get_policy(struct cpufreq_policy *policy, unsigned int cpu);
int cpufreq_update_policy(unsigned int cpu);
+/* query the current CPU frequency (in kHz). If zero, cpufreq couldn't detect it */
+unsigned int cpufreq_get(unsigned int cpu);
-/*
- * query the last known CPU freq (in kHz). If zero, cpufreq couldn't detect it
- */
+/* query the last known CPU freq (in kHz). If zero, cpufreq couldn't detect it */
#ifdef CONFIG_CPU_FREQ
unsigned int cpufreq_quick_get(unsigned int cpu);
-unsigned int cpufreq_get(unsigned int cpu);
#else
static inline unsigned int cpufreq_quick_get(unsigned int cpu)
{
return 0;
}
-static inline unsigned int cpufreq_get(unsigned int cpu)
-{
- return 0;
-}
#endif
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index e6a71c82d20..3a19b032c0e 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -66,11 +66,8 @@ void hugetlb_free_pgd_range(struct mmu_gather **tlb, unsigned long addr,
* If the arch doesn't supply something else, assume that hugepage
* size aligned regions are ok without further preparation.
*/
-static inline int prepare_hugepage_range(unsigned long addr, unsigned long len,
- pgoff_t pgoff)
+static inline int prepare_hugepage_range(unsigned long addr, unsigned long len)
{
- if (pgoff & (~HPAGE_MASK >> PAGE_SHIFT))
- return -EINVAL;
if (len & ~HPAGE_MASK)
return -EINVAL;
if (addr & ~HPAGE_MASK)
@@ -78,8 +75,7 @@ static inline int prepare_hugepage_range(unsigned long addr, unsigned long len,
return 0;
}
#else
-int prepare_hugepage_range(unsigned long addr, unsigned long len,
- pgoff_t pgoff);
+int prepare_hugepage_range(unsigned long addr, unsigned long len);
#endif
#ifndef ARCH_HAS_SETCLEAR_HUGE_PTE
@@ -117,7 +113,7 @@ static inline unsigned long hugetlb_total_pages(void)
#define hugetlb_report_meminfo(buf) 0
#define hugetlb_report_node_meminfo(n, buf) 0
#define follow_huge_pmd(mm, addr, pmd, write) NULL
-#define prepare_hugepage_range(addr,len,pgoff) (-EINVAL)
+#define prepare_hugepage_range(addr,len) (-EINVAL)
#define pmd_huge(x) 0
#define is_hugepage_only_range(mm, addr, len) 0
#define hugetlb_free_pgd_range(tlb, addr, end, floor, ceiling) ({BUG(); 0; })
diff --git a/include/linux/ide.h b/include/linux/ide.h
index c792b4fd158..b9f66c10caa 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1378,6 +1378,19 @@ static inline int ide_dev_has_iordy(struct hd_driveid *id)
return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
}
+static inline int ide_dev_is_sata(struct hd_driveid *id)
+{
+ /*
+ * See if word 93 is 0 AND drive is at least ATA-5 compatible
+ * verifying that word 80 by casting it to a signed type --
+ * this trick allows us to filter out the reserved values of
+ * 0x0000 and 0xffff along with the earlier ATA revisions...
+ */
+ if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
+ return 1;
+ return 0;
+}
+
u8 ide_dump_status(ide_drive_t *, const char *, u8);
typedef struct ide_pio_timings_s {
diff --git a/include/linux/if_pppol2tp.h b/include/linux/if_pppol2tp.h
index 516203b6fde..a7d6a2234b3 100644
--- a/include/linux/if_pppol2tp.h
+++ b/include/linux/if_pppol2tp.h
@@ -32,8 +32,8 @@ struct pppol2tp_addr
struct sockaddr_in addr; /* IP address and port to send to */
- __be16 s_tunnel, s_session; /* For matching incoming packets */
- __be16 d_tunnel, d_session; /* For sending outgoing packets */
+ __u16 s_tunnel, s_session; /* For matching incoming packets */
+ __u16 d_tunnel, d_session; /* For sending outgoing packets */
};
/* Socket options:
diff --git a/include/linux/init_task.h b/include/linux/init_task.h
index cab741c2d60..f8abfa349ef 100644
--- a/include/linux/init_task.h
+++ b/include/linux/init_task.h
@@ -86,7 +86,7 @@ extern struct nsproxy init_nsproxy;
.count = ATOMIC_INIT(1), \
.action = { { { .sa_handler = NULL, } }, }, \
.siglock = __SPIN_LOCK_UNLOCKED(sighand.siglock), \
- .signalfd_list = LIST_HEAD_INIT(sighand.signalfd_list), \
+ .signalfd_wqh = __WAIT_QUEUE_HEAD_INITIALIZER(sighand.signalfd_wqh), \
}
extern struct group_info init_groups;
diff --git a/include/linux/input.h b/include/linux/input.h
index e02c6a66b2b..36e00aa6f03 100644
--- a/include/linux/input.h
+++ b/include/linux/input.h
@@ -363,6 +363,12 @@ struct input_absinfo {
#define KEY_UNKNOWN 240
+#define KEY_VIDEO_NEXT 241 /* drive next video source */
+#define KEY_VIDEO_PREV 242 /* drive previous video source */
+#define KEY_BRIGHTNESS_CYCLE 243 /* brightness up, after max is min */
+#define KEY_BRIGHTNESS_ZERO 244 /* brightness off, use ambient */
+#define KEY_DISPLAY_OFF 245 /* display device to off state */
+
#define BTN_MISC 0x100
#define BTN_0 0x100
#define BTN_1 0x101
@@ -552,6 +558,8 @@ struct input_absinfo {
#define KEY_BRL_DOT6 0x1f6
#define KEY_BRL_DOT7 0x1f7
#define KEY_BRL_DOT8 0x1f8
+#define KEY_BRL_DOT9 0x1f9
+#define KEY_BRL_DOT10 0x1fa
/* We avoid low common keys in module aliases so they don't get huge. */
#define KEY_MIN_INTERESTING KEY_MUTE
diff --git a/include/linux/isa.h b/include/linux/isa.h
index 1b855335cb1..b0270e3814c 100644
--- a/include/linux/isa.h
+++ b/include/linux/isa.h
@@ -22,7 +22,18 @@ struct isa_driver {
#define to_isa_driver(x) container_of((x), struct isa_driver, driver)
+#ifdef CONFIG_ISA
int isa_register_driver(struct isa_driver *, unsigned int);
void isa_unregister_driver(struct isa_driver *);
+#else
+static inline int isa_register_driver(struct isa_driver *d, unsigned int i)
+{
+ return 0;
+}
+
+static inline void isa_unregister_driver(struct isa_driver *d)
+{
+}
+#endif
#endif /* __LINUX_ISA_H */
diff --git a/include/linux/kernel.h b/include/linux/kernel.h
index f592df74b3c..47160fe378c 100644
--- a/include/linux/kernel.h
+++ b/include/linux/kernel.h
@@ -34,6 +34,7 @@ extern const char linux_proc_banner[];
#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1)
#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask))
+#define PTR_ALIGN(p, a) ((typeof(p))ALIGN((unsigned long)(p), (a)))
#define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr))
diff --git a/include/linux/keyboard.h b/include/linux/keyboard.h
index de76843bbe8..7ddbc30aa8e 100644
--- a/include/linux/keyboard.h
+++ b/include/linux/keyboard.h
@@ -437,8 +437,10 @@ extern unsigned short plain_map[NR_KEYS];
#define K_BRL_DOT6 K(KT_BRL, 6)
#define K_BRL_DOT7 K(KT_BRL, 7)
#define K_BRL_DOT8 K(KT_BRL, 8)
+#define K_BRL_DOT9 K(KT_BRL, 9)
+#define K_BRL_DOT10 K(KT_BRL, 10)
-#define NR_BRL 9
+#define NR_BRL 11
#define MAX_DIACR 256
#endif
diff --git a/include/linux/leds.h b/include/linux/leds.h
index 421175092ee..dc1178f6184 100644
--- a/include/linux/leds.h
+++ b/include/linux/leds.h
@@ -13,6 +13,7 @@
#define __LINUX_LEDS_H_INCLUDED
#include <linux/list.h>
+#include <linux/spinlock.h>
struct device;
/*
diff --git a/include/linux/libata.h b/include/linux/libata.h
index 41978a55731..a67bb9075e9 100644
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -303,6 +303,7 @@ enum {
ATA_HORKAGE_NODMA = (1 << 1), /* DMA problems */
ATA_HORKAGE_NONCQ = (1 << 2), /* Don't use NCQ */
ATA_HORKAGE_MAX_SEC_128 = (1 << 3), /* Limit max sects to 128 */
+ ATA_HORKAGE_BROKEN_HPA = (1 << 4), /* Broken HPA */
};
enum hsm_task_states {
diff --git a/include/linux/mempolicy.h b/include/linux/mempolicy.h
index 5bdd656e88c..a020eb2d4e2 100644
--- a/include/linux/mempolicy.h
+++ b/include/linux/mempolicy.h
@@ -159,7 +159,7 @@ extern void mpol_fix_fork_child_flag(struct task_struct *p);
extern struct mempolicy default_policy;
extern struct zonelist *huge_zonelist(struct vm_area_struct *vma,
- unsigned long addr, gfp_t gfp_flags);
+ unsigned long addr, gfp_t gfp_flags, struct mempolicy **mpol);
extern unsigned slab_node(struct mempolicy *policy);
extern enum zone_type policy_zone;
@@ -256,7 +256,7 @@ static inline void mpol_fix_fork_child_flag(struct task_struct *p)
#define set_cpuset_being_rebound(x) do {} while (0)
static inline struct zonelist *huge_zonelist(struct vm_area_struct *vma,
- unsigned long addr, gfp_t gfp_flags)
+ unsigned long addr, gfp_t gfp_flags, struct mempolicy **mpol)
{
return NODE_DATA(0)->node_zonelists + gfp_zone(gfp_flags);
}
diff --git a/include/linux/netfilter.h b/include/linux/netfilter.h
index 0eed0b7ab2d..1dd075eda59 100644
--- a/include/linux/netfilter.h
+++ b/include/linux/netfilter.h
@@ -88,9 +88,8 @@ struct nf_sockopt_ops
int (*compat_get)(struct sock *sk, int optval,
void __user *user, int *len);
- /* Number of users inside set() or get(). */
- unsigned int use;
- struct task_struct *cleanup_task;
+ /* Use the module struct to lock set/get code in place */
+ struct module *owner;
};
/* Each queued (to userspace) skbuff has one of these. */
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 157dcb055b5..7250eeadd7b 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -431,6 +431,7 @@ extern int nfs_sync_mapping_range(struct address_space *, loff_t, loff_t, int);
extern int nfs_wb_all(struct inode *inode);
extern int nfs_wb_page(struct inode *inode, struct page* page);
extern int nfs_wb_page_priority(struct inode *inode, struct page* page, int how);
+extern int nfs_wb_page_cancel(struct inode *inode, struct page* page);
#if defined(CONFIG_NFS_V3) || defined(CONFIG_NFS_V4)
extern int nfs_commit_inode(struct inode *, int);
extern struct nfs_write_data *nfs_commit_alloc(void);
diff --git a/include/linux/pci.h b/include/linux/pci.h
index e7d8d4e19a5..038a0dc7273 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -557,6 +557,7 @@ int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask);
int pcix_get_max_mmrbc(struct pci_dev *dev);
int pcix_get_mmrbc(struct pci_dev *dev);
int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc);
+int pcie_get_readrq(struct pci_dev *dev);
int pcie_set_readrq(struct pci_dev *dev, int rq);
void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno);
int __must_check pci_assign_resource(struct pci_dev *dev, int i);
@@ -578,6 +579,9 @@ int pci_set_power_state(struct pci_dev *dev, pci_power_t state);
pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state);
int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
+/* Functions for PCI Hotplug drivers to use */
+int pci_bus_find_capability (struct pci_bus *bus, unsigned int devfn, int cap);
+
/* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */
void pci_bus_assign_resources(struct pci_bus *bus);
void pci_bus_size_bridges(struct pci_bus *bus);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 8938d59013c..55f307ffbf9 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -360,6 +360,9 @@
#define PCI_DEVICE_ID_ATI_RS400_166 0x5a32
#define PCI_DEVICE_ID_ATI_RS400_200 0x5a33
#define PCI_DEVICE_ID_ATI_RS480 0x5950
+#define PCI_DEVICE_ID_ATI_RD580 0x5952
+#define PCI_DEVICE_ID_ATI_RX790 0x5957
+#define PCI_DEVICE_ID_ATI_RS690 0x7910
/* ATI IXP Chipset */
#define PCI_DEVICE_ID_ATI_IXP200_IDE 0x4349
#define PCI_DEVICE_ID_ATI_IXP200_SMBUS 0x4353
@@ -371,10 +374,9 @@
#define PCI_DEVICE_ID_ATI_IXP400_SATA 0x4379
#define PCI_DEVICE_ID_ATI_IXP400_SATA2 0x437a
#define PCI_DEVICE_ID_ATI_IXP600_SATA 0x4380
-#define PCI_DEVICE_ID_ATI_IXP600_SMBUS 0x4385
+#define PCI_DEVICE_ID_ATI_SBX00_SMBUS 0x4385
#define PCI_DEVICE_ID_ATI_IXP600_IDE 0x438c
#define PCI_DEVICE_ID_ATI_IXP700_SATA 0x4390
-#define PCI_DEVICE_ID_ATI_IXP700_SMBUS 0x4395
#define PCI_DEVICE_ID_ATI_IXP700_IDE 0x439c
#define PCI_VENDOR_ID_VLSI 0x1004
@@ -1287,6 +1289,7 @@
#define PCI_DEVICE_ID_VIA_VT3324 0x0324
#define PCI_DEVICE_ID_VIA_VT3336 0x0336
#define PCI_DEVICE_ID_VIA_VT3351 0x0351
+#define PCI_DEVICE_ID_VIA_VT3364 0x0364
#define PCI_DEVICE_ID_VIA_8371_0 0x0391
#define PCI_DEVICE_ID_VIA_8501_0 0x0501
#define PCI_DEVICE_ID_VIA_82C561 0x0561
@@ -1340,6 +1343,7 @@
#define PCI_DEVICE_ID_VIA_8231_4 0x8235
#define PCI_DEVICE_ID_VIA_8365_1 0x8305
#define PCI_DEVICE_ID_VIA_CX700 0x8324
+#define PCI_DEVICE_ID_VIA_VX800 0x8353
#define PCI_DEVICE_ID_VIA_8371_1 0x8391
#define PCI_DEVICE_ID_VIA_82C598_1 0x8598
#define PCI_DEVICE_ID_VIA_838X_1 0xB188
@@ -2289,6 +2293,8 @@
#define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599
#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a
#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e
+#define PCI_DEVICE_ID_INTEL_TOLAPAI_0 0x5031
+#define PCI_DEVICE_ID_INTEL_TOLAPAI_1 0x5032
#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
diff --git a/include/linux/pmu.h b/include/linux/pmu.h
index 5ad913ff02b..b7824c21535 100644
--- a/include/linux/pmu.h
+++ b/include/linux/pmu.h
@@ -226,7 +226,7 @@ extern unsigned int pmu_power_flags;
extern void pmu_backlight_init(void);
/* some code needs to know if the PMU was suspended for hibernation */
-#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
+#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_PPC32)
extern int pmu_sys_suspended;
#else
/* if power management is not configured it can't be suspended */
diff --git a/include/linux/poll.h b/include/linux/poll.h
index 27690798623..16d813b364e 100644
--- a/include/linux/poll.h
+++ b/include/linux/poll.h
@@ -21,6 +21,8 @@
#define WQUEUES_STACK_ALLOC (MAX_STACK_ALLOC - FRONTEND_STACK_ALLOC)
#define N_INLINE_POLL_ENTRIES (WQUEUES_STACK_ALLOC / sizeof(struct poll_table_entry))
+#define DEFAULT_POLLMASK (POLLIN | POLLOUT | POLLRDNORM | POLLWRNORM)
+
struct poll_table_struct;
/*
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index c91476ce314..dff3192374f 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -351,6 +351,8 @@ enum
#define RTAX_INITCWND RTAX_INITCWND
RTAX_FEATURES,
#define RTAX_FEATURES RTAX_FEATURES
+ RTAX_RTO_MIN,
+#define RTAX_RTO_MIN RTAX_RTO_MIN
__RTAX_MAX
};
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 682ef87da6e..313c6b6e774 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -113,7 +113,7 @@ extern unsigned long avenrun[]; /* Load averages */
#define FSHIFT 11 /* nr of bits of precision */
#define FIXED_1 (1<<FSHIFT) /* 1.0 as fixed-point */
-#define LOAD_FREQ (5*HZ) /* 5 sec intervals */
+#define LOAD_FREQ (5*HZ+1) /* 5 sec intervals */
#define EXP_1 1884 /* 1/exp(5sec/1min) as fixed-point */
#define EXP_5 2014 /* 1/exp(5sec/5min) */
#define EXP_15 2037 /* 1/exp(5sec/15min) */
@@ -438,7 +438,7 @@ struct sighand_struct {
atomic_t count;
struct k_sigaction action[_NSIG];
spinlock_t siglock;
- struct list_head signalfd_list;
+ wait_queue_head_t signalfd_wqh;
};
struct pacct_struct {
@@ -593,7 +593,7 @@ struct user_struct {
#endif
/* Hash table maintenance information */
- struct list_head uidhash_list;
+ struct hlist_node uidhash_node;
uid_t uid;
};
@@ -681,7 +681,7 @@ enum cpu_idle_type {
#define SCHED_LOAD_SHIFT 10
#define SCHED_LOAD_SCALE (1L << SCHED_LOAD_SHIFT)
-#define SCHED_LOAD_SCALE_FUZZ (SCHED_LOAD_SCALE >> 1)
+#define SCHED_LOAD_SCALE_FUZZ SCHED_LOAD_SCALE
#ifdef CONFIG_SMP
#define SD_LOAD_BALANCE 1 /* Do load balancing on this domain. */
@@ -904,6 +904,7 @@ struct sched_entity {
u64 exec_start;
u64 sum_exec_runtime;
+ u64 prev_sum_exec_runtime;
u64 wait_start_fair;
u64 sleep_start_fair;
@@ -1388,7 +1389,8 @@ extern void sched_exec(void);
#define sched_exec() {}
#endif
-extern void sched_clock_unstable_event(void);
+extern void sched_clock_idle_sleep_event(void);
+extern void sched_clock_idle_wakeup_event(u64 delta_ns);
#ifdef CONFIG_HOTPLUG_CPU
extern void idle_task_exit(void);
@@ -1398,11 +1400,13 @@ static inline void idle_task_exit(void) {}
extern void sched_idle_next(void);
-extern unsigned int sysctl_sched_granularity;
+extern unsigned int sysctl_sched_latency;
+extern unsigned int sysctl_sched_min_granularity;
extern unsigned int sysctl_sched_wakeup_granularity;
extern unsigned int sysctl_sched_batch_wakeup_granularity;
extern unsigned int sysctl_sched_stat_granularity;
extern unsigned int sysctl_sched_runtime_limit;
+extern unsigned int sysctl_sched_compat_yield;
extern unsigned int sysctl_sched_child_runs_first;
extern unsigned int sysctl_sched_features;
@@ -1469,6 +1473,7 @@ static inline struct user_struct *get_uid(struct user_struct *u)
}
extern void free_uid(struct user_struct *);
extern void switch_uid(struct user_struct *);
+extern void release_uids(struct user_namespace *ns);
#include <asm/current.h>
diff --git a/include/linux/signalfd.h b/include/linux/signalfd.h
index 51042949569..4c9ff0910ae 100644
--- a/include/linux/signalfd.h
+++ b/include/linux/signalfd.h
@@ -45,49 +45,17 @@ struct signalfd_siginfo {
#ifdef CONFIG_SIGNALFD
/*
- * Deliver the signal to listening signalfd. This must be called
- * with the sighand lock held. Same are the following that end up
- * calling signalfd_deliver().
- */
-void signalfd_deliver(struct task_struct *tsk, int sig);
-
-/*
- * No need to fall inside signalfd_deliver() if no signal listeners
- * are available.
+ * Deliver the signal to listening signalfd.
*/
static inline void signalfd_notify(struct task_struct *tsk, int sig)
{
- if (unlikely(!list_empty(&tsk->sighand->signalfd_list)))
- signalfd_deliver(tsk, sig);
-}
-
-/*
- * The signal -1 is used to notify the signalfd that the sighand
- * is on its way to be detached.
- */
-static inline void signalfd_detach_locked(struct task_struct *tsk)
-{
- if (unlikely(!list_empty(&tsk->sighand->signalfd_list)))
- signalfd_deliver(tsk, -1);
-}
-
-static inline void signalfd_detach(struct task_struct *tsk)
-{
- struct sighand_struct *sighand = tsk->sighand;
-
- if (unlikely(!list_empty(&sighand->signalfd_list))) {
- spin_lock_irq(&sighand->siglock);
- signalfd_deliver(tsk, -1);
- spin_unlock_irq(&sighand->siglock);
- }
+ if (unlikely(waitqueue_active(&tsk->sighand->signalfd_wqh)))
+ wake_up(&tsk->sighand->signalfd_wqh);
}
#else /* CONFIG_SIGNALFD */
-#define signalfd_deliver(t, s) do { } while (0)
-#define signalfd_notify(t, s) do { } while (0)
-#define signalfd_detach_locked(t) do { } while (0)
-#define signalfd_detach(t) do { } while (0)
+static inline void signalfd_notify(struct task_struct *tsk, int sig) { }
#endif /* CONFIG_SIGNALFD */
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 93c27f71122..a656cecd373 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -1352,6 +1352,22 @@ static inline int skb_clone_writable(struct sk_buff *skb, int len)
skb_headroom(skb) + len <= skb->hdr_len;
}
+static inline int __skb_cow(struct sk_buff *skb, unsigned int headroom,
+ int cloned)
+{
+ int delta = 0;
+
+ if (headroom < NET_SKB_PAD)
+ headroom = NET_SKB_PAD;
+ if (headroom > skb_headroom(skb))
+ delta = headroom - skb_headroom(skb);
+
+ if (delta || cloned)
+ return pskb_expand_head(skb, ALIGN(delta, NET_SKB_PAD), 0,
+ GFP_ATOMIC);
+ return 0;
+}
+
/**
* skb_cow - copy header of skb when it is required
* @skb: buffer to cow
@@ -1366,16 +1382,22 @@ static inline int skb_clone_writable(struct sk_buff *skb, int len)
*/
static inline int skb_cow(struct sk_buff *skb, unsigned int headroom)
{
- int delta = (headroom > NET_SKB_PAD ? headroom : NET_SKB_PAD) -
- skb_headroom(skb);
-
- if (delta < 0)
- delta = 0;
+ return __skb_cow(skb, headroom, skb_cloned(skb));
+}
- if (delta || skb_cloned(skb))
- return pskb_expand_head(skb, (delta + (NET_SKB_PAD-1)) &
- ~(NET_SKB_PAD-1), 0, GFP_ATOMIC);
- return 0;
+/**
+ * skb_cow_head - skb_cow but only making the head writable
+ * @skb: buffer to cow
+ * @headroom: needed headroom
+ *
+ * This function is identical to skb_cow except that we replace the
+ * skb_cloned check by skb_header_cloned. It should be used when
+ * you only need to push on some header and do not need to modify
+ * the data.
+ */
+static inline int skb_cow_head(struct sk_buff *skb, unsigned int headroom)
+{
+ return __skb_cow(skb, headroom, skb_header_cloned(skb));
}
/**
diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
index 124270df873..74962077f63 100644
--- a/include/linux/slub_def.h
+++ b/include/linux/slub_def.h
@@ -78,7 +78,7 @@ extern struct kmem_cache kmalloc_caches[KMALLOC_SHIFT_HIGH + 1];
* Sorry that the following has to be that ugly but some versions of GCC
* have trouble with constant propagation and loops.
*/
-static inline int kmalloc_index(size_t size)
+static __always_inline int kmalloc_index(size_t size)
{
if (!size)
return 0;
@@ -133,7 +133,7 @@ static inline int kmalloc_index(size_t size)
* This ought to end up with a global pointer to the right cache
* in kmalloc_caches.
*/
-static inline struct kmem_cache *kmalloc_slab(size_t size)
+static __always_inline struct kmem_cache *kmalloc_slab(size_t size)
{
int index = kmalloc_index(size);
@@ -166,7 +166,7 @@ static inline struct kmem_cache *kmalloc_slab(size_t size)
void *kmem_cache_alloc(struct kmem_cache *, gfp_t);
void *__kmalloc(size_t size, gfp_t flags);
-static inline void *kmalloc(size_t size, gfp_t flags)
+static __always_inline void *kmalloc(size_t size, gfp_t flags)
{
if (__builtin_constant_p(size) && !(flags & SLUB_DMA)) {
struct kmem_cache *s = kmalloc_slab(size);
@@ -183,7 +183,7 @@ static inline void *kmalloc(size_t size, gfp_t flags)
void *__kmalloc_node(size_t size, gfp_t flags, int node);
void *kmem_cache_alloc_node(struct kmem_cache *, gfp_t flags, int node);
-static inline void *kmalloc_node(size_t size, gfp_t flags, int node)
+static __always_inline void *kmalloc_node(size_t size, gfp_t flags, int node)
{
if (__builtin_constant_p(size) && !(flags & SLUB_DMA)) {
struct kmem_cache *s = kmalloc_slab(size);
diff --git a/include/linux/user_namespace.h b/include/linux/user_namespace.h
index 1101b0ce878..b5f41d4c2ee 100644
--- a/include/linux/user_namespace.h
+++ b/include/linux/user_namespace.h
@@ -11,7 +11,7 @@
struct user_namespace {
struct kref kref;
- struct list_head uidhash_table[UIDHASH_SZ];
+ struct hlist_head uidhash_table[UIDHASH_SZ];
struct user_struct *root_user;
};
diff --git a/include/linux/writeback.h b/include/linux/writeback.h
index 4ef4d22e5e4..b4af6bcb7b7 100644
--- a/include/linux/writeback.h
+++ b/include/linux/writeback.h
@@ -127,7 +127,7 @@ int sync_page_range(struct inode *inode, struct address_space *mapping,
loff_t pos, loff_t count);
int sync_page_range_nolock(struct inode *inode, struct address_space *mapping,
loff_t pos, loff_t count);
-void set_page_dirty_balance(struct page *page);
+void set_page_dirty_balance(struct page *page, int page_mkwrite);
void writeback_set_ratelimit(void);
/* pdflush.c */
diff --git a/include/media/v4l2-dev.h b/include/media/v4l2-dev.h
index d62847f846c..17f8f3a2f0a 100644
--- a/include/media/v4l2-dev.h
+++ b/include/media/v4l2-dev.h
@@ -337,6 +337,9 @@ void *priv;
struct class_device class_dev; /* sysfs */
};
+/* Class-dev to video-device */
+#define to_video_device(cd) container_of(cd, struct video_device, class_dev)
+
/* Version 2 functions */
extern int video_register_device(struct video_device *vfd, int type, int nr);
void video_unregister_device(struct video_device *);
@@ -354,11 +357,9 @@ extern int video_usercopy(struct inode *inode, struct file *file,
int (*func)(struct inode *inode, struct file *file,
unsigned int cmd, void *arg));
-
#ifdef CONFIG_VIDEO_V4L1_COMPAT
#include <linux/mm.h>
-#define to_video_device(cd) container_of(cd, struct video_device, class_dev)
static inline int __must_check
video_device_create_file(struct video_device *vfd,
struct class_device_attribute *attr)
diff --git a/include/net/rose.h b/include/net/rose.h
index a4047d3cf5d..e5bb084d875 100644
--- a/include/net/rose.h
+++ b/include/net/rose.h
@@ -188,7 +188,7 @@ extern void rose_kick(struct sock *);
extern void rose_enquiry_response(struct sock *);
/* rose_route.c */
-extern struct rose_neigh rose_loopback_neigh;
+extern struct rose_neigh *rose_loopback_neigh;
extern const struct file_operations rose_neigh_fops;
extern const struct file_operations rose_nodes_fops;
extern const struct file_operations rose_routes_fops;
diff --git a/include/net/sctp/sctp.h b/include/net/sctp/sctp.h
index d529045c167..c9cc00c8578 100644
--- a/include/net/sctp/sctp.h
+++ b/include/net/sctp/sctp.h
@@ -123,6 +123,7 @@
* sctp/protocol.c
*/
extern struct sock *sctp_get_ctl_sock(void);
+extern void sctp_local_addr_free(struct rcu_head *head);
extern int sctp_copy_local_addr_list(struct sctp_bind_addr *,
sctp_scope_t, gfp_t gfp,
int flags);
diff --git a/include/net/sctp/sm.h b/include/net/sctp/sm.h
index 73cb9943c8a..e8e3a64eb32 100644
--- a/include/net/sctp/sm.h
+++ b/include/net/sctp/sm.h
@@ -114,7 +114,6 @@ sctp_state_fn_t sctp_sf_do_4_C;
sctp_state_fn_t sctp_sf_eat_data_6_2;
sctp_state_fn_t sctp_sf_eat_data_fast_4_4;
sctp_state_fn_t sctp_sf_eat_sack_6_2;
-sctp_state_fn_t sctp_sf_tabort_8_4_8;
sctp_state_fn_t sctp_sf_operr_notify;
sctp_state_fn_t sctp_sf_t1_init_timer_expire;
sctp_state_fn_t sctp_sf_t1_cookie_timer_expire;
@@ -214,7 +213,7 @@ struct sctp_chunk *sctp_make_shutdown_ack(const struct sctp_association *asoc,
const struct sctp_chunk *);
struct sctp_chunk *sctp_make_shutdown_complete(const struct sctp_association *,
const struct sctp_chunk *);
-void sctp_init_cause(struct sctp_chunk *, __be16 cause, const void *, size_t);
+void sctp_init_cause(struct sctp_chunk *, __be16 cause, size_t);
struct sctp_chunk *sctp_make_abort(const struct sctp_association *,
const struct sctp_chunk *,
const size_t hint);
@@ -247,6 +246,9 @@ struct sctp_chunk *sctp_make_asconf_update_ip(struct sctp_association *,
int, __be16);
struct sctp_chunk *sctp_make_asconf_set_prim(struct sctp_association *asoc,
union sctp_addr *addr);
+int sctp_verify_asconf(const struct sctp_association *asoc,
+ struct sctp_paramhdr *param_hdr, void *chunk_end,
+ struct sctp_paramhdr **errp);
struct sctp_chunk *sctp_process_asconf(struct sctp_association *asoc,
struct sctp_chunk *asconf);
int sctp_process_asconf_ack(struct sctp_association *asoc,
diff --git a/include/net/sctp/structs.h b/include/net/sctp/structs.h
index ee4559b1130..baff49dfcdb 100644
--- a/include/net/sctp/structs.h
+++ b/include/net/sctp/structs.h
@@ -207,6 +207,9 @@ extern struct sctp_globals {
* It is a list of sctp_sockaddr_entry.
*/
struct list_head local_addr_list;
+
+ /* Lock that protects the local_addr_list writers */
+ spinlock_t addr_list_lock;
/* Flag to indicate if addip is enabled. */
int addip_enable;
@@ -242,6 +245,7 @@ extern struct sctp_globals {
#define sctp_port_alloc_lock (sctp_globals.port_alloc_lock)
#define sctp_port_hashtable (sctp_globals.port_hashtable)
#define sctp_local_addr_list (sctp_globals.local_addr_list)
+#define sctp_local_addr_lock (sctp_globals.addr_list_lock)
#define sctp_addip_enable (sctp_globals.addip_enable)
#define sctp_prsctp_enable (sctp_globals.prsctp_enable)
@@ -417,6 +421,7 @@ struct sctp_signed_cookie {
* internally.
*/
union sctp_addr_param {
+ struct sctp_paramhdr p;
struct sctp_ipv4addr_param v4;
struct sctp_ipv6addr_param v6;
};
@@ -726,6 +731,7 @@ int sctp_user_addto_chunk(struct sctp_chunk *chunk, int off, int len,
struct iovec *data);
void sctp_chunk_free(struct sctp_chunk *);
void *sctp_addto_chunk(struct sctp_chunk *, int len, const void *data);
+void *sctp_addto_param(struct sctp_chunk *, int len, const void *data);
struct sctp_chunk *sctp_chunkify(struct sk_buff *,
const struct sctp_association *,
struct sock *);
@@ -736,8 +742,10 @@ const union sctp_addr *sctp_source(const struct sctp_chunk *chunk);
/* This is a structure for holding either an IPv6 or an IPv4 address. */
struct sctp_sockaddr_entry {
struct list_head list;
+ struct rcu_head rcu;
union sctp_addr a;
__u8 use_as_src;
+ __u8 valid;
};
typedef struct sctp_chunk *(sctp_packet_phandler_t)(struct sctp_association *);
@@ -1148,7 +1156,9 @@ int sctp_bind_addr_copy(struct sctp_bind_addr *dest,
int flags);
int sctp_add_bind_addr(struct sctp_bind_addr *, union sctp_addr *,
__u8 use_as_src, gfp_t gfp);
-int sctp_del_bind_addr(struct sctp_bind_addr *, union sctp_addr *);
+int sctp_del_bind_addr(struct sctp_bind_addr *, union sctp_addr *,
+ void fastcall (*rcu_call)(struct rcu_head *,
+ void (*func)(struct rcu_head *)));
int sctp_bind_addr_match(struct sctp_bind_addr *, const union sctp_addr *,
struct sctp_sock *);
union sctp_addr *sctp_find_unmatch_addr(struct sctp_bind_addr *bp,
@@ -1219,9 +1229,6 @@ struct sctp_ep_common {
* bind_addr.address_list is our set of local IP addresses.
*/
struct sctp_bind_addr bind_addr;
-
- /* Protection during address list comparisons. */
- rwlock_t addr_lock;
};
diff --git a/include/net/sctp/ulpqueue.h b/include/net/sctp/ulpqueue.h
index 39ea3f442b4..cd33270e86d 100644
--- a/include/net/sctp/ulpqueue.h
+++ b/include/net/sctp/ulpqueue.h
@@ -83,6 +83,7 @@ int sctp_clear_pd(struct sock *sk, struct sctp_association *asoc);
/* Skip over an SSN. */
void sctp_ulpq_skip(struct sctp_ulpq *ulpq, __u16 sid, __u16 ssn);
+void sctp_ulpq_reasm_flushtsn(struct sctp_ulpq *, __u32);
#endif /* __sctp_ulpqueue_h__ */
diff --git a/include/net/tcp.h b/include/net/tcp.h
index 185c7ecce4c..54053de0bdd 100644
--- a/include/net/tcp.h
+++ b/include/net/tcp.h
@@ -1059,14 +1059,12 @@ struct tcp_md5sig_key {
};
struct tcp4_md5sig_key {
- u8 *key;
- u16 keylen;
+ struct tcp_md5sig_key base;
__be32 addr;
};
struct tcp6_md5sig_key {
- u8 *key;
- u16 keylen;
+ struct tcp_md5sig_key base;
#if 0
u32 scope_id; /* XXX */
#endif
diff --git a/include/scsi/libiscsi.h b/include/scsi/libiscsi.h
index 007d442412e..b4b31132618 100644
--- a/include/scsi/libiscsi.h
+++ b/include/scsi/libiscsi.h
@@ -205,6 +205,13 @@ struct iscsi_queue {
};
struct iscsi_session {
+ /*
+ * Syncs up the scsi eh thread with the iscsi eh thread when sending
+ * task management functions. This must be taken before the session
+ * and recv lock.
+ */
+ struct mutex eh_mutex;
+
/* iSCSI session-wide sequencing */
uint32_t cmdsn;
uint32_t exp_cmdsn;