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-rw-r--r--include/asm-mips/asmmacro.h4
-rw-r--r--include/asm-mips/cpu-features.h20
-rw-r--r--include/asm-mips/fixmap.h4
-rw-r--r--include/asm-mips/hazards.h4
-rw-r--r--include/asm-mips/irq.h4
-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_psc.h2
-rw-r--r--include/asm-mips/mipsregs.h3
-rw-r--r--include/asm-mips/sn/ioc3.h2
-rw-r--r--include/asm-mips/sn/klconfig.h10
-rw-r--r--include/asm-mips/stackframe.h16
-rw-r--r--include/asm-mips/unistd.h15
-rw-r--r--include/linux/elf-em.h5
12 files changed, 52 insertions, 37 deletions
diff --git a/include/asm-mips/asmmacro.h b/include/asm-mips/asmmacro.h
index 2c42f6b00a4..92e62ef711e 100644
--- a/include/asm-mips/asmmacro.h
+++ b/include/asm-mips/asmmacro.h
@@ -26,14 +26,14 @@
ori \reg, \reg, TCSTATUS_IXMT
xori \reg, \reg, TCSTATUS_IXMT
mtc0 \reg, CP0_TCSTATUS
- ehb
+ _ehb
.endm
.macro local_irq_disable reg=t0
mfc0 \reg, CP0_TCSTATUS
ori \reg, \reg, TCSTATUS_IXMT
mtc0 \reg, CP0_TCSTATUS
- ehb
+ _ehb
.endm
#else
.macro local_irq_enable reg=t0
diff --git a/include/asm-mips/cpu-features.h b/include/asm-mips/cpu-features.h
index 881ce1f9803..44285a9d552 100644
--- a/include/asm-mips/cpu-features.h
+++ b/include/asm-mips/cpu-features.h
@@ -187,19 +187,15 @@
# endif
#endif
-#ifdef CONFIG_CPU_MIPSR2
-# if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
-# define cpu_has_vint (cpu_data[0].options & MIPS_CPU_VINT)
-# else
-# define cpu_has_vint 0
-# endif
-# if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic)
-# define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC)
-# else
-# define cpu_has_veic 0
-# endif
-#else
+#if defined(CONFIG_CPU_MIPSR2_IRQ_VI) && !defined(cpu_has_vint)
+# define cpu_has_vint (cpu_data[0].options & MIPS_CPU_VINT)
+#elif !defined(cpu_has_vint)
# define cpu_has_vint 0
+#endif
+
+#if defined(CONFIG_CPU_MIPSR2_IRQ_EI) && !defined(cpu_has_veic)
+# define cpu_has_veic (cpu_data[0].options & MIPS_CPU_VEIC)
+#elif !defined(cpu_has_veic)
# define cpu_has_veic 0
#endif
diff --git a/include/asm-mips/fixmap.h b/include/asm-mips/fixmap.h
index 1cadefbbc03..6959bdb5931 100644
--- a/include/asm-mips/fixmap.h
+++ b/include/asm-mips/fixmap.h
@@ -69,7 +69,11 @@ extern void __set_fixmap (enum fixed_addresses idx,
* the start of the fixmap, and leave one page empty
* at the top of mem..
*/
+#if defined(CONFIG_CPU_TX39XX) || defined(CONFIG_CPU_TX49XX)
+#define FIXADDR_TOP (0xff000000UL - 0x2000)
+#else
#define FIXADDR_TOP (0xffffe000UL)
+#endif
#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h
index 66943c451c1..25f5e8a4177 100644
--- a/include/asm-mips/hazards.h
+++ b/include/asm-mips/hazards.h
@@ -69,10 +69,10 @@
* Use a macro for ehb unless explicit support for MIPSR2 is enabled
*/
-#define irq_enable_hazard
+#define irq_enable_hazard \
_ehb
-#define irq_disable_hazard
+#define irq_disable_hazard \
_ehb
#elif defined(CONFIG_CPU_R10000) || defined(CONFIG_CPU_RM9000)
diff --git a/include/asm-mips/irq.h b/include/asm-mips/irq.h
index d35c61776a0..896550bad32 100644
--- a/include/asm-mips/irq.h
+++ b/include/asm-mips/irq.h
@@ -76,4 +76,8 @@ extern int setup_irq_smtc(unsigned int irq, struct irqaction * new,
unsigned long hwmask);
#endif /* CONFIG_MIPS_MT_SMTC */
+#ifdef CONFIG_SMP
+#define ARCH_HAS_IRQ_PER_CPU
+#endif
+
#endif /* _ASM_IRQ_H */
diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h
index d7cbacdd21f..1bd4e27caf6 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_psc.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h
@@ -512,7 +512,7 @@ typedef struct psc_smb {
/* Transmit register control.
*/
-#define PSC_SMBTXRX_RSR (1 << 30)
+#define PSC_SMBTXRX_RSR (1 << 28)
#define PSC_SMBTXRX_STP (1 << 29)
#define PSC_SMBTXRX_DATAMASK (0xff)
diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h
index 673977901ed..9192d76c133 100644
--- a/include/asm-mips/mipsregs.h
+++ b/include/asm-mips/mipsregs.h
@@ -1459,7 +1459,8 @@ static inline void __emt(unsigned int previous)
static inline void __ehb(void)
{
__asm__ __volatile__(
- " ehb \n");
+ " .set mips32r2 \n"
+ " ehb \n" " .set mips0 \n");
}
/*
diff --git a/include/asm-mips/sn/ioc3.h b/include/asm-mips/sn/ioc3.h
index f7d530f306f..099677774d7 100644
--- a/include/asm-mips/sn/ioc3.h
+++ b/include/asm-mips/sn/ioc3.h
@@ -5,6 +5,8 @@
#ifndef _IOC3_H
#define _IOC3_H
+#include <linux/types.h>
+
/* SUPERIO uart register map */
typedef volatile struct ioc3_uartregs {
union {
diff --git a/include/asm-mips/sn/klconfig.h b/include/asm-mips/sn/klconfig.h
index 52238e65af8..b63cd0655b3 100644
--- a/include/asm-mips/sn/klconfig.h
+++ b/include/asm-mips/sn/klconfig.h
@@ -602,7 +602,7 @@ typedef struct klcpu_s { /* CPU */
typedef struct klhub_s { /* HUB */
klinfo_t hub_info;
- uint hub_flags; /* PCFG_HUB_xxx flags */
+ unsigned int hub_flags; /* PCFG_HUB_xxx flags */
klport_t hub_port; /* hub is connected to this */
nic_t hub_box_nic; /* nic of containing box */
klconf_off_t hub_mfg_nic; /* MFG NIC string */
@@ -611,7 +611,7 @@ typedef struct klhub_s { /* HUB */
typedef struct klhub_uart_s { /* HUB */
klinfo_t hubuart_info;
- uint hubuart_flags; /* PCFG_HUB_xxx flags */
+ unsigned int hubuart_flags; /* PCFG_HUB_xxx flags */
nic_t hubuart_box_nic; /* nic of containing box */
} klhub_uart_t ;
@@ -710,7 +710,7 @@ typedef struct klvmed_s { /* VME DEVICE - VME BOARD */
/* XXX - Don't we need the number of ports here?!? */
typedef struct klrou_s { /* ROUTER */
klinfo_t rou_info ;
- uint rou_flags ; /* PCFG_ROUTER_xxx flags */
+ unsigned int rou_flags ; /* PCFG_ROUTER_xxx flags */
nic_t rou_box_nic ; /* nic of the containing module */
klport_t rou_port[MAX_ROUTER_PORTS + 1] ; /* array index 1 to 6 */
klconf_off_t rou_mfg_nic ; /* MFG NIC string */
@@ -733,8 +733,8 @@ typedef struct klgfx_s { /* GRAPHICS Device */
klinfo_t gfx_info;
klconf_off_t old_gndevs; /* for compatibility with older proms */
klconf_off_t old_gdoff0; /* for compatibility with older proms */
- uint cookie; /* for compatibility with older proms */
- uint moduleslot;
+ unsigned int cookie; /* for compatibility with older proms */
+ unsigned int moduleslot;
struct klgfx_s *gfx_next_pipe;
graphics_t gfx_specific;
klconf_off_t pad0; /* for compatibility with older proms */
diff --git a/include/asm-mips/stackframe.h b/include/asm-mips/stackframe.h
index 513aa513383..158a4cd12e4 100644
--- a/include/asm-mips/stackframe.h
+++ b/include/asm-mips/stackframe.h
@@ -304,7 +304,7 @@
mfc0 v0, CP0_TCSTATUS
ori v0, TCSTATUS_IXMT
mtc0 v0, CP0_TCSTATUS
- ehb
+ _ehb
DMT 5 # dmt a1
jal mips_ihb
#endif /* CONFIG_MIPS_MT_SMTC */
@@ -325,14 +325,14 @@
* restore TCStatus.IXMT.
*/
LONG_L v1, PT_TCSTATUS(sp)
- ehb
+ _ehb
mfc0 v0, CP0_TCSTATUS
andi v1, TCSTATUS_IXMT
/* We know that TCStatua.IXMT should be set from above */
xori v0, v0, TCSTATUS_IXMT
or v0, v0, v1
mtc0 v0, CP0_TCSTATUS
- ehb
+ _ehb
andi a1, a1, VPECONTROL_TE
beqz a1, 1f
emt
@@ -411,7 +411,7 @@
/* Clear TKSU, leave IXMT */
xori t0, 0x00001800
mtc0 t0, CP0_TCSTATUS
- ehb
+ _ehb
/* We need to leave the global IE bit set, but clear EXL...*/
mfc0 t0, CP0_STATUS
ori t0, ST0_EXL | ST0_ERL
@@ -438,7 +438,7 @@
* and enable interrupts only for the
* current TC, using the TCStatus register.
*/
- ehb
+ _ehb
mfc0 t0,CP0_TCSTATUS
/* Fortunately CU 0 is in the same place in both registers */
/* Set TCU0, TKSU (for later inversion) and IXMT */
@@ -447,7 +447,7 @@
/* Clear TKSU *and* IXMT */
xori t0, 0x00001c00
mtc0 t0, CP0_TCSTATUS
- ehb
+ _ehb
/* We need to leave the global IE bit set, but clear EXL...*/
mfc0 t0, CP0_STATUS
ori t0, ST0_EXL
@@ -479,7 +479,7 @@
andi v1, v0, TCSTATUS_IXMT
ori v0, TCSTATUS_IXMT
mtc0 v0, CP0_TCSTATUS
- ehb
+ _ehb
DMT 2 # dmt v0
/*
* We don't know a priori if ra is "live"
@@ -495,7 +495,7 @@
xori t0, 0x1e
mtc0 t0, CP0_STATUS
#ifdef CONFIG_MIPS_MT_SMTC
- ehb
+ _ehb
andi v0, v0, VPECONTROL_TE
beqz v0, 2f
nop /* delay slot */
diff --git a/include/asm-mips/unistd.h b/include/asm-mips/unistd.h
index 8bb0bb9b2e6..809f9f55bac 100644
--- a/include/asm-mips/unistd.h
+++ b/include/asm-mips/unistd.h
@@ -326,16 +326,17 @@
#define __NR_unshare (__NR_Linux + 303)
#define __NR_splice (__NR_Linux + 304)
#define __NR_sync_file_range (__NR_Linux + 305)
+#define __NR_tee (__NR_Linux + 306)
/*
* Offset of the last Linux o32 flavoured syscall
*/
-#define __NR_Linux_syscalls 305
+#define __NR_Linux_syscalls 306
#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
#define __NR_O32_Linux 4000
-#define __NR_O32_Linux_syscalls 305
+#define __NR_O32_Linux_syscalls 306
#if _MIPS_SIM == _MIPS_SIM_ABI64
@@ -608,16 +609,17 @@
#define __NR_unshare (__NR_Linux + 262)
#define __NR_splice (__NR_Linux + 263)
#define __NR_sync_file_range (__NR_Linux + 264)
+#define __NR_tee (__NR_Linux + 265)
/*
* Offset of the last Linux 64-bit flavoured syscall
*/
-#define __NR_Linux_syscalls 264
+#define __NR_Linux_syscalls 265
#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
#define __NR_64_Linux 5000
-#define __NR_64_Linux_syscalls 264
+#define __NR_64_Linux_syscalls 265
#if _MIPS_SIM == _MIPS_SIM_NABI32
@@ -894,16 +896,17 @@
#define __NR_unshare (__NR_Linux + 266)
#define __NR_splice (__NR_Linux + 267)
#define __NR_sync_file_range (__NR_Linux + 268)
+#define __NR_tee (__NR_Linux + 269)
/*
* Offset of the last N32 flavoured syscall
*/
-#define __NR_Linux_syscalls 268
+#define __NR_Linux_syscalls 269
#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
#define __NR_N32_Linux 6000
-#define __NR_N32_Linux_syscalls 268
+#define __NR_N32_Linux_syscalls 269
#ifdef __KERNEL__
diff --git a/include/linux/elf-em.h b/include/linux/elf-em.h
index 114a96d2565..6a5796c81c9 100644
--- a/include/linux/elf-em.h
+++ b/include/linux/elf-em.h
@@ -11,7 +11,12 @@
#define EM_486 6 /* Perhaps disused */
#define EM_860 7
#define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
+ /* Next two are historical and binaries and
+ modules of these types will be rejected by
+ Linux. */
+#define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */
#define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */
+
#define EM_PARISC 15 /* HPPA */
#define EM_SPARC32PLUS 18 /* Sun's "v8plus" */
#define EM_PPC 20 /* PowerPC */
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-12-20 21:53:41 +0000