diff options
Diffstat (limited to 'include')
| -rw-r--r-- | include/linux/i2c/twl4030.h | 19 | ||||
| -rw-r--r-- | include/linux/mfd/twl4030-codec.h | 272 | ||||
| -rw-r--r-- | include/sound/Kbuild | 1 | ||||
| -rw-r--r-- | include/sound/aci.h | 90 | ||||
| -rw-r--r-- | include/sound/ak4113.h | 321 | ||||
| -rw-r--r-- | include/sound/ak4114.h | 12 | ||||
| -rw-r--r-- | include/sound/ak4xxx-adda.h | 5 | ||||
| -rw-r--r-- | include/sound/control.h | 5 | ||||
| -rw-r--r-- | include/sound/cs4231-regs.h | 1 | ||||
| -rw-r--r-- | include/sound/pcm.h | 3 | ||||
| -rw-r--r-- | include/sound/rawmidi.h | 2 | ||||
| -rw-r--r-- | include/sound/sh_dac_audio.h | 21 | ||||
| -rw-r--r-- | include/sound/soc-dai.h | 14 | ||||
| -rw-r--r-- | include/sound/soc-dapm.h | 17 | ||||
| -rw-r--r-- | include/sound/soc.h | 15 | ||||
| -rw-r--r-- | include/sound/sscape_ioctl.h | 21 | ||||
| -rw-r--r-- | include/sound/tlv320dac33-plat.h | 20 | ||||
| -rw-r--r-- | include/sound/tpa6130a2-plat.h | 30 | ||||
| -rw-r--r-- | include/sound/wss.h | 1 |
19 files changed, 828 insertions, 42 deletions
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h index 508824ee35e..5306a759cbd 100644 --- a/include/linux/i2c/twl4030.h +++ b/include/linux/i2c/twl4030.h @@ -401,6 +401,24 @@ struct twl4030_power_data { extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts); +struct twl4030_codec_audio_data { + unsigned int audio_mclk; + unsigned int ramp_delay_value; + unsigned int hs_extmute:1; + void (*set_hs_extmute)(int mute); +}; + +struct twl4030_codec_vibra_data { + unsigned int audio_mclk; + unsigned int coexist; +}; + +struct twl4030_codec_data { + unsigned int audio_mclk; + struct twl4030_codec_audio_data *audio; + struct twl4030_codec_vibra_data *vibra; +}; + struct twl4030_platform_data { unsigned irq_base, irq_end; struct twl4030_bci_platform_data *bci; @@ -409,6 +427,7 @@ struct twl4030_platform_data { struct twl4030_keypad_data *keypad; struct twl4030_usb_data *usb; struct twl4030_power_data *power; + struct twl4030_codec_data *codec; /* LDO regulators */ struct regulator_init_data *vdac; diff --git a/include/linux/mfd/twl4030-codec.h b/include/linux/mfd/twl4030-codec.h new file mode 100644 index 00000000000..2ec317c68e5 --- /dev/null +++ b/include/linux/mfd/twl4030-codec.h @@ -0,0 +1,272 @@ +/* + * MFD driver for twl4030 codec submodule + * + * Author: Peter Ujfalusi <peter.ujfalusi@nokia.com> + * + * Copyright: (C) 2009 Nokia Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + * + */ + +#ifndef __TWL4030_CODEC_H__ +#define __TWL4030_CODEC_H__ + +/* Codec registers */ +#define TWL4030_REG_CODEC_MODE 0x01 +#define TWL4030_REG_OPTION 0x02 +#define TWL4030_REG_UNKNOWN 0x03 +#define TWL4030_REG_MICBIAS_CTL 0x04 +#define TWL4030_REG_ANAMICL 0x05 +#define TWL4030_REG_ANAMICR 0x06 +#define TWL4030_REG_AVADC_CTL 0x07 +#define TWL4030_REG_ADCMICSEL 0x08 +#define TWL4030_REG_DIGMIXING 0x09 +#define TWL4030_REG_ATXL1PGA 0x0A +#define TWL4030_REG_ATXR1PGA 0x0B +#define TWL4030_REG_AVTXL2PGA 0x0C +#define TWL4030_REG_AVTXR2PGA 0x0D +#define TWL4030_REG_AUDIO_IF 0x0E +#define TWL4030_REG_VOICE_IF 0x0F +#define TWL4030_REG_ARXR1PGA 0x10 +#define TWL4030_REG_ARXL1PGA 0x11 +#define TWL4030_REG_ARXR2PGA 0x12 +#define TWL4030_REG_ARXL2PGA 0x13 +#define TWL4030_REG_VRXPGA 0x14 +#define TWL4030_REG_VSTPGA 0x15 +#define TWL4030_REG_VRX2ARXPGA 0x16 +#define TWL4030_REG_AVDAC_CTL 0x17 +#define TWL4030_REG_ARX2VTXPGA 0x18 +#define TWL4030_REG_ARXL1_APGA_CTL 0x19 +#define TWL4030_REG_ARXR1_APGA_CTL 0x1A +#define TWL4030_REG_ARXL2_APGA_CTL 0x1B +#define TWL4030_REG_ARXR2_APGA_CTL 0x1C +#define TWL4030_REG_ATX2ARXPGA 0x1D +#define TWL4030_REG_BT_IF 0x1E +#define TWL4030_REG_BTPGA 0x1F +#define TWL4030_REG_BTSTPGA 0x20 +#define TWL4030_REG_EAR_CTL 0x21 +#define TWL4030_REG_HS_SEL 0x22 +#define TWL4030_REG_HS_GAIN_SET 0x23 +#define TWL4030_REG_HS_POPN_SET 0x24 +#define TWL4030_REG_PREDL_CTL 0x25 +#define TWL4030_REG_PREDR_CTL 0x26 +#define TWL4030_REG_PRECKL_CTL 0x27 +#define TWL4030_REG_PRECKR_CTL 0x28 +#define TWL4030_REG_HFL_CTL 0x29 +#define TWL4030_REG_HFR_CTL 0x2A +#define TWL4030_REG_ALC_CTL 0x2B +#define TWL4030_REG_ALC_SET1 0x2C +#define TWL4030_REG_ALC_SET2 0x2D +#define TWL4030_REG_BOOST_CTL 0x2E +#define TWL4030_REG_SOFTVOL_CTL 0x2F +#define TWL4030_REG_DTMF_FREQSEL 0x30 +#define TWL4030_REG_DTMF_TONEXT1H 0x31 +#define TWL4030_REG_DTMF_TONEXT1L 0x32 +#define TWL4030_REG_DTMF_TONEXT2H 0x33 +#define TWL4030_REG_DTMF_TONEXT2L 0x34 +#define TWL4030_REG_DTMF_TONOFF 0x35 +#define TWL4030_REG_DTMF_WANONOFF 0x36 +#define TWL4030_REG_I2S_RX_SCRAMBLE_H 0x37 +#define TWL4030_REG_I2S_RX_SCRAMBLE_M 0x38 +#define TWL4030_REG_I2S_RX_SCRAMBLE_L 0x39 +#define TWL4030_REG_APLL_CTL 0x3A +#define TWL4030_REG_DTMF_CTL 0x3B +#define TWL4030_REG_DTMF_PGA_CTL2 0x3C +#define TWL4030_REG_DTMF_PGA_CTL1 0x3D +#define TWL4030_REG_MISC_SET_1 0x3E +#define TWL4030_REG_PCMBTMUX 0x3F +#define TWL4030_REG_RX_PATH_SEL 0x43 +#define TWL4030_REG_VDL_APGA_CTL 0x44 +#define TWL4030_REG_VIBRA_CTL 0x45 +#define TWL4030_REG_VIBRA_SET 0x46 +#define TWL4030_REG_VIBRA_PWM_SET 0x47 +#define TWL4030_REG_ANAMIC_GAIN 0x48 +#define TWL4030_REG_MISC_SET_2 0x49 + +/* Bitfield Definitions */ + +/* TWL4030_CODEC_MODE (0x01) Fields */ +#define TWL4030_APLL_RATE 0xF0 +#define TWL4030_APLL_RATE_8000 0x00 +#define TWL4030_APLL_RATE_11025 0x10 +#define TWL4030_APLL_RATE_12000 0x20 +#define TWL4030_APLL_RATE_16000 0x40 +#define TWL4030_APLL_RATE_22050 0x50 +#define TWL4030_APLL_RATE_24000 0x60 +#define TWL4030_APLL_RATE_32000 0x80 +#define TWL4030_APLL_RATE_44100 0x90 +#define TWL4030_APLL_RATE_48000 0xA0 +#define TWL4030_APLL_RATE_96000 0xE0 +#define TWL4030_SEL_16K 0x08 +#define TWL4030_CODECPDZ 0x02 +#define TWL4030_OPT_MODE 0x01 +#define TWL4030_OPTION_1 (1 << 0) +#define TWL4030_OPTION_2 (0 << 0) + +/* TWL4030_OPTION (0x02) Fields */ +#define TWL4030_ATXL1_EN (1 << 0) +#define TWL4030_ATXR1_EN (1 << 1) +#define TWL4030_ATXL2_VTXL_EN (1 << 2) +#define TWL4030_ATXR2_VTXR_EN (1 << 3) +#define TWL4030_ARXL1_VRX_EN (1 << 4) +#define TWL4030_ARXR1_EN (1 << 5) +#define TWL4030_ARXL2_EN (1 << 6) +#define TWL4030_ARXR2_EN (1 << 7) + +/* TWL4030_REG_MICBIAS_CTL (0x04) Fields */ +#define TWL4030_MICBIAS2_CTL 0x40 +#define TWL4030_MICBIAS1_CTL 0x20 +#define TWL4030_HSMICBIAS_EN 0x04 +#define TWL4030_MICBIAS2_EN 0x02 +#define TWL4030_MICBIAS1_EN 0x01 + +/* ANAMICL (0x05) Fields */ +#define TWL4030_CNCL_OFFSET_START 0x80 +#define TWL4030_OFFSET_CNCL_SEL 0x60 +#define TWL4030_OFFSET_CNCL_SEL_ARX1 0x00 +#define TWL4030_OFFSET_CNCL_SEL_ARX2 0x20 +#define TWL4030_OFFSET_CNCL_SEL_VRX 0x40 +#define TWL4030_OFFSET_CNCL_SEL_ALL 0x60 +#define TWL4030_MICAMPL_EN 0x10 +#define TWL4030_CKMIC_EN 0x08 +#define TWL4030_AUXL_EN 0x04 +#define TWL4030_HSMIC_EN 0x02 +#define TWL4030_MAINMIC_EN 0x01 + +/* ANAMICR (0x06) Fields */ +#define TWL4030_MICAMPR_EN 0x10 +#define TWL4030_AUXR_EN 0x04 +#define TWL4030_SUBMIC_EN 0x01 + +/* AVADC_CTL (0x07) Fields */ +#define TWL4030_ADCL_EN 0x08 +#define TWL4030_AVADC_CLK_PRIORITY 0x04 +#define TWL4030_ADCR_EN 0x02 + +/* TWL4030_REG_ADCMICSEL (0x08) Fields */ +#define TWL4030_DIGMIC1_EN 0x08 +#define TWL4030_TX2IN_SEL 0x04 +#define TWL4030_DIGMIC0_EN 0x02 +#define TWL4030_TX1IN_SEL 0x01 + +/* AUDIO_IF (0x0E) Fields */ +#define TWL4030_AIF_SLAVE_EN 0x80 +#define TWL4030_DATA_WIDTH 0x60 +#define TWL4030_DATA_WIDTH_16S_16W 0x00 +#define TWL4030_DATA_WIDTH_32S_16W 0x40 +#define TWL4030_DATA_WIDTH_32S_24W 0x60 +#define TWL4030_AIF_FORMAT 0x18 +#define TWL4030_AIF_FORMAT_CODEC 0x00 +#define TWL4030_AIF_FORMAT_LEFT 0x08 +#define TWL4030_AIF_FORMAT_RIGHT 0x10 +#define TWL4030_AIF_FORMAT_TDM 0x18 +#define TWL4030_AIF_TRI_EN 0x04 +#define TWL4030_CLK256FS_EN 0x02 +#define TWL4030_AIF_EN 0x01 + +/* VOICE_IF (0x0F) Fields */ +#define TWL4030_VIF_SLAVE_EN 0x80 +#define TWL4030_VIF_DIN_EN 0x40 +#define TWL4030_VIF_DOUT_EN 0x20 +#define TWL4030_VIF_SWAP 0x10 +#define TWL4030_VIF_FORMAT 0x08 +#define TWL4030_VIF_TRI_EN 0x04 +#define TWL4030_VIF_SUB_EN 0x02 +#define TWL4030_VIF_EN 0x01 + +/* EAR_CTL (0x21) */ +#define TWL4030_EAR_GAIN 0x30 + +/* HS_GAIN_SET (0x23) Fields */ +#define TWL4030_HSR_GAIN 0x0C +#define TWL4030_HSR_GAIN_PWR_DOWN 0x00 +#define TWL4030_HSR_GAIN_PLUS_6DB 0x04 +#define TWL4030_HSR_GAIN_0DB 0x08 +#define TWL4030_HSR_GAIN_MINUS_6DB 0x0C +#define TWL4030_HSL_GAIN 0x03 +#define TWL4030_HSL_GAIN_PWR_DOWN 0x00 +#define TWL4030_HSL_GAIN_PLUS_6DB 0x01 +#define TWL4030_HSL_GAIN_0DB 0x02 +#define TWL4030_HSL_GAIN_MINUS_6DB 0x03 + +/* HS_POPN_SET (0x24) Fields */ +#define TWL4030_VMID_EN 0x40 +#define TWL4030_EXTMUTE 0x20 +#define TWL4030_RAMP_DELAY 0x1C +#define TWL4030_RAMP_DELAY_20MS 0x00 +#define TWL4030_RAMP_DELAY_40MS 0x04 +#define TWL4030_RAMP_DELAY_81MS 0x08 +#define TWL4030_RAMP_DELAY_161MS 0x0C +#define TWL4030_RAMP_DELAY_323MS 0x10 +#define TWL4030_RAMP_DELAY_645MS 0x14 +#define TWL4030_RAMP_DELAY_1291MS 0x18 +#define TWL4030_RAMP_DELAY_2581MS 0x1C +#define TWL4030_RAMP_EN 0x02 + +/* PREDL_CTL (0x25) */ +#define TWL4030_PREDL_GAIN 0x30 + +/* PREDR_CTL (0x26) */ +#define TWL4030_PREDR_GAIN 0x30 + +/* PRECKL_CTL (0x27) */ +#define TWL4030_PRECKL_GAIN 0x30 + +/* PRECKR_CTL (0x28) */ +#define TWL4030_PRECKR_GAIN 0x30 + +/* HFL_CTL (0x29, 0x2A) Fields */ +#define TWL4030_HF_CTL_HB_EN 0x04 +#define TWL4030_HF_CTL_LOOP_EN 0x08 +#define TWL4030_HF_CTL_RAMP_EN 0x10 +#define TWL4030_HF_CTL_REF_EN 0x20 + +/* APLL_CTL (0x3A) Fields */ +#define TWL4030_APLL_EN 0x10 +#define TWL4030_APLL_INFREQ 0x0F +#define TWL4030_APLL_INFREQ_19200KHZ 0x05 +#define TWL4030_APLL_INFREQ_26000KHZ 0x06 +#define TWL4030_APLL_INFREQ_38400KHZ 0x0F + +/* REG_MISC_SET_1 (0x3E) Fields */ +#define TWL4030_CLK64_EN 0x80 +#define TWL4030_SCRAMBLE_EN 0x40 +#define TWL4030_FMLOOP_EN 0x20 +#define TWL4030_SMOOTH_ANAVOL_EN 0x02 +#define TWL4030_DIGMIC_LR_SWAP_EN 0x01 + +/* VIBRA_CTL (0x45) */ +#define TWL4030_VIBRA_EN 0x01 +#define TWL4030_VIBRA_DIR 0x02 +#define TWL4030_VIBRA_AUDIO_SEL_L1 (0x00 << 2) +#define TWL4030_VIBRA_AUDIO_SEL_R1 (0x01 << 2) +#define TWL4030_VIBRA_AUDIO_SEL_L2 (0x02 << 2) +#define TWL4030_VIBRA_AUDIO_SEL_R2 (0x03 << 2) +#define TWL4030_VIBRA_SEL 0x10 +#define TWL4030_VIBRA_DIR_SEL 0x20 + +/* TWL4030 codec resource IDs */ +enum twl4030_codec_res { + TWL4030_CODEC_RES_POWER = 0, + TWL4030_CODEC_RES_APLL, + TWL4030_CODEC_RES_MAX, +}; + +int twl4030_codec_disable_resource(enum twl4030_codec_res id); +int twl4030_codec_enable_resource(enum twl4030_codec_res id); +unsigned int twl4030_codec_get_mclk(void); + +#endif /* End of __TWL4030_CODEC_H__ */ diff --git a/include/sound/Kbuild b/include/sound/Kbuild index fd054a34432..e9dd9369ecb 100644 --- a/include/sound/Kbuild +++ b/include/sound/Kbuild @@ -2,7 +2,6 @@ header-y += asound_fm.h header-y += hdsp.h header-y += hdspm.h header-y += sfnt_info.h -header-y += sscape_ioctl.h unifdef-y += asequencer.h unifdef-y += asound.h diff --git a/include/sound/aci.h b/include/sound/aci.h new file mode 100644 index 00000000000..ee639d355ef --- /dev/null +++ b/include/sound/aci.h @@ -0,0 +1,90 @@ +#ifndef _ACI_H_ +#define _ACI_H_ + +#define ACI_REG_COMMAND 0 /* write register offset */ +#define ACI_REG_STATUS 1 /* read register offset */ +#define ACI_REG_BUSY 2 /* busy register offset */ +#define ACI_REG_RDS 2 /* PCM20: RDS register offset */ +#define ACI_MINTIME 500 /* ACI time out limit */ + +#define ACI_SET_MUTE 0x0d +#define ACI_SET_POWERAMP 0x0f +#define ACI_SET_TUNERMUTE 0xa3 +#define ACI_SET_TUNERMONO 0xa4 +#define ACI_SET_IDE 0xd0 +#define ACI_SET_WSS 0xd1 +#define ACI_SET_SOLOMODE 0xd2 +#define ACI_SET_PREAMP 0x03 +#define ACI_GET_PREAMP 0x21 +#define ACI_WRITE_TUNE 0xa7 +#define ACI_READ_TUNERSTEREO 0xa8 +#define ACI_READ_TUNERSTATION 0xa9 +#define ACI_READ_VERSION 0xf1 +#define ACI_READ_IDCODE 0xf2 +#define ACI_INIT 0xff +#define ACI_STATUS 0xf0 +#define ACI_S_GENERAL 0x00 +#define ACI_ERROR_OP 0xdf + +/* ACI Mixer */ + +/* These are the values for the right channel GET registers. + Add an offset of 0x01 for the left channel register. + (left=right+0x01) */ + +#define ACI_GET_MASTER 0x03 +#define ACI_GET_MIC 0x05 +#define ACI_GET_LINE 0x07 +#define ACI_GET_CD 0x09 +#define ACI_GET_SYNTH 0x0b +#define ACI_GET_PCM 0x0d +#define ACI_GET_LINE1 0x10 /* Radio on PCM20 */ +#define ACI_GET_LINE2 0x12 + +#define ACI_GET_EQ1 0x22 /* from Bass ... */ +#define ACI_GET_EQ2 0x24 +#define ACI_GET_EQ3 0x26 +#define ACI_GET_EQ4 0x28 +#define ACI_GET_EQ5 0x2a +#define ACI_GET_EQ6 0x2c +#define ACI_GET_EQ7 0x2e /* ... to Treble */ + +/* And these are the values for the right channel SET registers. + For left channel access you have to add an offset of 0x08. + MASTER is an exception, which needs an offset of 0x01 */ + +#define ACI_SET_MASTER 0x00 +#define ACI_SET_MIC 0x30 +#define ACI_SET_LINE 0x31 +#define ACI_SET_CD 0x34 +#define ACI_SET_SYNTH 0x33 +#define ACI_SET_PCM 0x32 +#define ACI_SET_LINE1 0x35 /* Radio on PCM20 */ +#define ACI_SET_LINE2 0x36 + +#define ACI_SET_EQ1 0x40 /* from Bass ... */ +#define ACI_SET_EQ2 0x41 +#define ACI_SET_EQ3 0x42 +#define ACI_SET_EQ4 0x43 +#define ACI_SET_EQ5 0x44 +#define ACI_SET_EQ6 0x45 +#define ACI_SET_EQ7 0x46 /* ... to Treble */ + +struct snd_miro_aci { + unsigned long aci_port; + int aci_vendor; + int aci_product; + int aci_version; + int aci_amp; + int aci_preamp; + int aci_solomode; + + struct mutex aci_mutex; +}; + +int snd_aci_cmd(struct snd_miro_aci *aci, int write1, int write2, int write3); + +struct snd_miro_aci *snd_aci_get_aci(void); + +#endif /* _ACI_H_ */ + diff --git a/include/sound/ak4113.h b/include/sound/ak4113.h new file mode 100644 index 00000000000..8988edae160 --- /dev/null +++ b/include/sound/ak4113.h @@ -0,0 +1,321 @@ +#ifndef __SOUND_AK4113_H +#define __SOUND_AK4113_H + +/* + * Routines for Asahi Kasei AK4113 + * Copyright (c) by Jaroslav Kysela <perex@perex.cz>, + * Copyright (c) by Pavel Hofman <pavel.hofman@ivitera.com>, + * + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * + */ + +/* AK4113 registers */ +/* power down */ +#define AK4113_REG_PWRDN 0x00 +/* format control */ +#define AK4113_REG_FORMAT 0x01 +/* input/output control */ +#define AK4113_REG_IO0 0x02 +/* input/output control */ +#define AK4113_REG_IO1 0x03 +/* interrupt0 mask */ +#define AK4113_REG_INT0_MASK 0x04 +/* interrupt1 mask */ +#define AK4113_REG_INT1_MASK 0x05 +/* DAT mask & DTS select */ +#define AK4113_REG_DATDTS 0x06 +/* receiver status 0 */ +#define AK4113_REG_RCS0 0x07 +/* receiver status 1 */ +#define AK4113_REG_RCS1 0x08 +/* receiver status 2 */ +#define AK4113_REG_RCS2 0x09 +/* RX channel status byte 0 */ +#define AK4113_REG_RXCSB0 0x0a +/* RX channel status byte 1 */ +#define AK4113_REG_RXCSB1 0x0b +/* RX channel status byte 2 */ +#define AK4113_REG_RXCSB2 0x0c +/* RX channel status byte 3 */ +#define AK4113_REG_RXCSB3 0x0d +/* RX channel status byte 4 */ +#define AK4113_REG_RXCSB4 0x0e +/* burst preamble Pc byte 0 */ +#define AK4113_REG_Pc0 0x0f +/* burst preamble Pc byte 1 */ +#define AK4113_REG_Pc1 0x10 +/* burst preamble Pd byte 0 */ +#define AK4113_REG_Pd0 0x11 +/* burst preamble Pd byte 1 */ +#define AK4113_REG_Pd1 0x12 +/* Q-subcode address + control */ +#define AK4113_REG_QSUB_ADDR 0x13 +/* Q-subcode track */ +#define AK4113_REG_QSUB_TRACK 0x14 +/* Q-subcode index */ +#define AK4113_REG_QSUB_INDEX 0x15 +/* Q-subcode minute */ +#define AK4113_REG_QSUB_MINUTE 0x16 +/* Q-subcode second */ +#define AK4113_REG_QSUB_SECOND 0x17 +/* Q-subcode frame */ +#define AK4113_REG_QSUB_FRAME 0x18 +/* Q-subcode zero */ +#define AK4113_REG_QSUB_ZERO 0x19 +/* Q-subcode absolute minute */ +#define AK4113_REG_QSUB_ABSMIN 0x1a +/* Q-subcode absolute second */ +#define AK4113_REG_QSUB_ABSSEC 0x1b +/* Q-subcode absolute frame */ +#define AK4113_REG_QSUB_ABSFRM 0x1c + +/* sizes */ +#define AK4113_REG_RXCSB_SIZE ((AK4113_REG_RXCSB4-AK4113_REG_RXCSB0)+1) +#define AK4113_REG_QSUB_SIZE ((AK4113_REG_QSUB_ABSFRM-AK4113_REG_QSUB_ADDR)\ + +1) + +#define AK4113_WRITABLE_REGS (AK4113_REG_DATDTS + 1) + +/* AK4113_REG_PWRDN bits */ +/* Channel Status Select */ +#define AK4113_CS12 (1<<7) +/* Block Start & C/U Output Mode */ +#define AK4113_BCU (1<<6) +/* Master Clock Operation Select */ +#define AK4113_CM1 (1<<5) +/* Master Clock Operation Select */ +#define AK4113_CM0 (1<<4) +/* Master Clock Frequency Select */ +#define AK4113_OCKS1 (1<<3) +/* Master Clock Frequency Select */ +#define AK4113_OCKS0 (1<<2) +/* 0 = power down, 1 = normal operation */ +#define AK4113_PWN (1<<1) +/* 0 = reset & initialize (except thisregister), 1 = normal operation */ +#define AK4113_RST (1<<0) + +/* AK4113_REQ_FORMAT bits */ +/* V/TX Output select: 0 = Validity Flag Output, 1 = TX */ +#define AK4113_VTX (1<<7) +/* Audio Data Control */ +#define AK4113_DIF2 (1<<6) +/* Audio Data Control */ +#define AK4113_DIF1 (1<<5) +/* Audio Data Control */ +#define AK4113_DIF0 (1<<4) +/* Deemphasis Autodetect Enable (1 = enable) */ +#define AK4113_DEAU (1<<3) +/* 32kHz-48kHz Deemphasis Control */ +#define AK4113_DEM1 (1<<2) +/* 32kHz-48kHz Deemphasis Control */ +#define AK4113_DEM0 (1<<1) +#define AK4113_DEM_OFF (AK4113_DEM0) +#define AK4113_DEM_44KHZ (0) +#define AK4113_DEM_48KHZ (AK4113_DEM1) +#define AK4113_DEM_32KHZ (AK4113_DEM0|AK4113_DEM1) +/* STDO: 16-bit, right justified */ +#define AK4113_DIF_16R (0) +/* STDO: 18-bit, right justified */ +#define AK4113_DIF_18R (AK4113_DIF0) +/* STDO: 20-bit, right justified */ +#define AK4113_DIF_20R (AK4113_DIF1) +/* STDO: 24-bit, right justified */ +#define AK4113_DIF_24R (AK4113_DIF1|AK4113_DIF0) +/* STDO: 24-bit, left justified */ +#define AK4113_DIF_24L (AK4113_DIF2) +/* STDO: I2S */ +#define AK4113_DIF_24I2S (AK4113_DIF2|AK4113_DIF0) +/* STDO: 24-bit, left justified; LRCLK, BICK = Input */ +#define AK4113_DIF_I24L (AK4113_DIF2|AK4113_DIF1) +/* STDO: I2S; LRCLK, BICK = Input */ +#define AK4113_DIF_I24I2S (AK4113_DIF2|AK4113_DIF1|AK4113_DIF0) + +/* AK4113_REG_IO0 */ +/* XTL1=0,XTL0=0 -> 11.2896Mhz; XTL1=0,XTL0=1 -> 12.288Mhz */ +#define AK4113_XTL1 (1<<6) +/* XTL1=1,XTL0=0 -> 24.576Mhz; XTL1=1,XTL0=1 -> use channel status */ +#define AK4113_XTL0 (1<<5) +/* Block Start Signal Output: 0 = U-bit, 1 = C-bit (req. BCU = 1) */ +#define AK4113_UCE (1<<4) +/* TX Output Enable (1 = enable) */ +#define AK4113_TXE (1<<3) +/* Output Through Data Selector for TX pin */ +#define AK4113_OPS2 (1<<2) +/* Output Through Data Selector for TX pin */ +#define AK4113_OPS1 (1<<1) +/* Output Through Data Selector for TX pin */ +#define AK4113_OPS0 (1<<0) +/* 11.2896 MHz ref. Xtal freq. */ +#define AK4113_XTL_11_2896M (0) +/* 12.288 MHz ref. Xtal freq. */ +#define AK4113_XTL_12_288M (AK4113_XTL0) +/* 24.576 MHz ref. Xtal freq. */ +#define AK4113_XTL_24_576M (AK4113_XTL1) + +/* AK4113_REG_IO1 */ +/* Interrupt 0 pin Hold */ +#define AK4113_EFH1 (1<<7) +/* Interrupt 0 pin Hold */ +#define AK4113_EFH0 (1<<6) +#define AK4113_EFH_512LRCLK (0) +#define AK4113_EFH_1024LRCLK (AK4113_EFH0) +#define AK4113_EFH_2048LRCLK (AK4113_EFH1) +#define AK4113_EFH_4096LRCLK (AK4113_EFH1|AK4113_EFH0) +/* PLL Lock Time: 0 = 384/fs, 1 = 1/fs */ +#define AK4113_FAST (1<<5) +/* MCKO2 Output Select: 0 = CMx/OCKSx, 1 = Xtal */ +#define AK4113_XMCK (1<<4) +/* MCKO2 Output Freq. Select: 0 = x1, 1 = x0.5 (req. XMCK = 1) */ +#define AK4113_DIV (1<<3) +/* Input Recovery Data Select */ +#define AK4113_IPS2 (1<<2) +/* Input Recovery Data Select */ +#define AK4113_IPS1 (1<<1) +/* Input Recovery Data Select */ +#define AK4113_IPS0 (1<<0) +#define AK4113_IPS(x) ((x)&7) + +/* AK4113_REG_INT0_MASK && AK4113_REG_INT1_MASK*/ +/* mask enable for QINT bit */ +#define AK4113_MQI (1<<7) +/* mask enable for AUTO bit */ +#define AK4113_MAUT (1<<6) +/* mask enable for CINT bit */ +#define AK4113_MCIT (1<<5) +/* mask enable for UNLOCK bit */ +#define AK4113_MULK (1<<4) +/* mask enable for V bit */ +#define AK4113_V (1<<3) +/* mask enable for STC bit */ +#define AK4113_STC (1<<2) +/* mask enable for AUDN bit */ +#define AK4113_MAN (1<<1) +/* mask enable for PAR bit */ +#define AK4113_MPR (1<<0) + +/* AK4113_REG_DATDTS */ +/* DAT Start ID Counter */ +#define AK4113_DCNT (1<<4) +/* DTS-CD 16-bit Sync Word Detect */ +#define AK4113_DTS16 (1<<3) +/* DTS-CD 14-bit Sync Word Detect */ +#define AK4113_DTS14 (1<<2) +/* mask enable for DAT bit (if 1, no INT1 effect */ +#define AK4113_MDAT1 (1<<1) +/* mask enable for DAT bit (if 1, no INT0 effect */ +#define AK4113_MDAT0 (1<<0) + +/* AK4113_REG_RCS0 */ +/* Q-subcode buffer interrupt, 0 = no change, 1 = changed */ +#define AK4113_QINT (1<<7) +/* Non-PCM or DTS stream auto detection, 0 = no detect, 1 = detect */ +#define AK4113_AUTO (1<<6) +/* channel status buffer interrupt, 0 = no change, 1 = change */ +#define AK4113_CINT (1<<5) +/* PLL lock status, 0 = lock, 1 = unlock */ +#define AK4113_UNLCK (1<<4) +/* Validity bit, 0 = valid, 1 = invalid */ +#define AK4113_V (1<<3) +/* sampling frequency or Pre-emphasis change, 0 = no detect, 1 = detect */ +#define AK4113_STC (1<<2) +/* audio bit output, 0 = audio, 1 = non-audio */ +#define AK4113_AUDION (1<<1) +/* parity error or biphase error status, 0 = no error, 1 = error */ +#define AK4113_PAR (1<<0) + +/* AK4113_REG_RCS1 */ +/* sampling frequency detection */ +#define AK4113_FS3 (1<<7) +#define AK4113_FS2 (1<<6) +#define AK4113_FS1 (1<<5) +#define AK4113_FS0 (1<<4) +/* Pre-emphasis detect, 0 = OFF, 1 = ON */ +#define AK4113_PEM (1<<3) +/* DAT Start ID Detect, 0 = no detect, 1 = detect */ +#define AK4113_DAT (1<<2) +/* DTS-CD bit audio stream detect, 0 = no detect, 1 = detect */ +#define AK4113_DTSCD (1<<1) +/* Non-PCM bit stream detection, 0 = no detect, 1 = detect */ +#define AK4113_NPCM (1<<0) +#define AK4113_FS_8000HZ (AK4113_FS3|AK4113_FS0) +#define AK4113_FS_11025HZ (AK4113_FS2|AK4113_FS0) +#define AK4113_FS_16000HZ (AK4113_FS2|AK4113_FS1|AK4113_FS0) +#define AK4113_FS_22050HZ (AK4113_FS2) +#define AK4113_FS_24000HZ (AK4113_FS2|AK4113_FS1) +#define AK4113_FS_32000HZ (AK4113_FS1|AK4113_FS0) +#define AK4113_FS_44100HZ (0) +#define AK4113_FS_48000HZ (AK4113_FS1) +#define AK4113_FS_64000HZ (AK4113_FS3|AK4113_FS1|AK4113_FS0) +#define AK4113_FS_88200HZ (AK4113_FS3) +#define AK4113_FS_96000HZ (AK4113_FS3|AK4113_FS1) +#define AK4113_FS_176400HZ (AK4113_FS3|AK4113_FS2) +#define AK4113_FS_192000HZ (AK4113_FS3|AK4113_FS2|AK4113_FS1) + +/* AK4113_REG_RCS2 */ +/* CRC for Q-subcode, 0 = no error, 1 = error */ +#define AK4113_QCRC (1<<1) +/* CRC for channel status, 0 = no error, 1 = error */ +#define AK4113_CCRC (1<<0) + +/* flags for snd_ak4113_check_rate_and_errors() */ +#define AK4113_CHECK_NO_STAT (1<<0) /* no statistics */ +#define AK4113_CHECK_NO_RATE (1<<1) /* no rate check */ + +#define AK4113_CONTROLS 13 + +typedef void (ak4113_write_t)(void *private_data, unsigned char addr, + unsigned char data); +typedef unsigned char (ak4113_read_t)(void *private_data, unsigned char addr); + +struct ak4113 { + struct snd_card *card; + ak4113_write_t *write; + ak4113_read_t *read; + void *private_data; + unsigned int init:1; + spinlock_t lock; + unsigned char regmap[AK4113_WRITABLE_REGS]; + struct snd_kcontrol *kctls[AK4113_CONTROLS]; + struct snd_pcm_substream *substream; + unsigned long parity_errors; + unsigned long v_bit_errors; + unsigned long qcrc_errors; + unsigned long ccrc_errors; + unsigned char rcs0; + unsigned char rcs1; + unsigned char rcs2; + struct delayed_work work; + unsigned int check_flags; + void *change_callback_private; + void (*change_callback)(struct ak4113 *ak4113, unsigned char c0, + unsigned char c1); +}; + +int snd_ak4113_create(struct snd_card *card, ak4113_read_t *read, + ak4113_write_t *write, + const unsigned char pgm[AK4113_WRITABLE_REGS], + void *private_data, struct ak4113 **r_ak4113); +void snd_ak4113_reg_write(struct ak4113 *ak4113, unsigned char reg, + unsigned char mask, unsigned char val); +void snd_ak4113_reinit(struct ak4113 *ak4113); +int snd_ak4113_build(struct ak4113 *ak4113, + struct snd_pcm_substream *capture_substream); +int snd_ak4113_external_rate(struct ak4113 *ak4113); +int snd_ak4113_check_rate_and_errors(struct ak4113 *ak4113, unsigned int flags); + +#endif /* __SOUND_AK4113_H */ + diff --git a/include/sound/ak4114.h b/include/sound/ak4114.h index d293d36a66b..3ce69fd9252 100644 --- a/include/sound/ak4114.h +++ b/include/sound/ak4114.h @@ -95,13 +95,13 @@ /* AK4114_REG_IO0 */ #define AK4114_TX1E (1<<7) /* TX1 Output Enable (1 = enable) */ -#define AK4114_OPS12 (1<<2) /* Output Though Data Selector for TX1 pin */ -#define AK4114_OPS11 (1<<1) /* Output Though Data Selector for TX1 pin */ -#define AK4114_OPS10 (1<<0) /* Output Though Data Selector for TX1 pin */ +#define AK4114_OPS12 (1<<6) /* Output Data Selector for TX1 pin */ +#define AK4114_OPS11 (1<<5) /* Output Data Selector for TX1 pin */ +#define AK4114_OPS10 (1<<4) /* Output Data Selector for TX1 pin */ #define AK4114_TX0E (1<<3) /* TX0 Output Enable (1 = enable) */ -#define AK4114_OPS02 (1<<2) /* Output Though Data Selector for TX0 pin */ -#define AK4114_OPS01 (1<<1) /* Output Though Data Selector for TX0 pin */ -#define AK4114_OPS00 (1<<0) /* Output Though Data Selector for TX0 pin */ +#define AK4114_OPS02 (1<<2) /* Output Data Selector for TX0 pin */ +#define AK4114_OPS01 (1<<1) /* Output Data Selector for TX0 pin */ +#define AK4114_OPS00 (1<<0) /* Output Data Selector for TX0 pin */ /* AK4114_REG_IO1 */ #define AK4114_EFH1 (1<<7) /* Interrupt 0 pin Hold */ diff --git a/include/sound/ak4xxx-adda.h b/include/sound/ak4xxx-adda.h index 891cf1aea8b..030b87c2f6d 100644 --- a/include/sound/ak4xxx-adda.h +++ b/include/sound/ak4xxx-adda.h @@ -68,7 +68,7 @@ struct snd_akm4xxx { enum { SND_AK4524, SND_AK4528, SND_AK4529, SND_AK4355, SND_AK4358, SND_AK4381, - SND_AK5365 + SND_AK5365, SND_AK4620, } type; /* (array) information of combined codecs */ @@ -76,6 +76,9 @@ struct snd_akm4xxx { const struct snd_akm4xxx_adc_channel *adc_info; struct snd_ak4xxx_ops ops; + unsigned int num_chips; + unsigned int total_regs; + const char *name; }; void snd_akm4xxx_write(struct snd_akm4xxx *ak, int chip, unsigned char reg, diff --git a/include/sound/control.h b/include/sound/control.h index ef96f07aa03..112374dc0c5 100644 --- a/include/sound/control.h +++ b/include/sound/control.h @@ -56,7 +56,6 @@ struct snd_kcontrol_new { struct snd_kcontrol_volatile { struct snd_ctl_file *owner; /* locked */ - pid_t owner_pid; unsigned int access; /* access rights */ }; @@ -87,10 +86,12 @@ struct snd_kctl_event { #define snd_kctl_event(n) list_entry(n, struct snd_kctl_event, list) +struct pid; + struct snd_ctl_file { struct list_head list; /* list of all control files */ struct snd_card *card; - pid_t pid; + struct pid *pid; int prefer_pcm_subdevice; int prefer_rawmidi_subdevice; wait_queue_head_t change_sleep; diff --git a/include/sound/cs4231-regs.h b/include/sound/cs4231-regs.h index 92647532c45..66d28c2cb53 100644 --- a/include/sound/cs4231-regs.h +++ b/include/sound/cs4231-regs.h @@ -70,7 +70,6 @@ #define AD1845_PWR_DOWN 0x1b /* power down control */ #define CS4235_LEFT_MASTER 0x1b /* left master output control */ #define CS4231_REC_FORMAT 0x1c /* clock and data format - record - bits 7-0 MCE */ -#define CS4231_PLY_VAR_FREQ 0x1d /* playback variable frequency */ #define AD1845_CLOCK 0x1d /* crystal clock select and total power down */ #define CS4235_RIGHT_MASTER 0x1d /* right master output control */ #define CS4231_REC_UPR_CNT 0x1e /* record upper count */ diff --git a/include/sound/pcm.h b/include/sound/pcm.h index de6d981de5d..c83a4a79f16 100644 --- a/include/sound/pcm.h +++ b/include/sound/pcm.h @@ -348,6 +348,8 @@ struct snd_pcm_group { /* keep linked substreams */ int count; }; +struct pid; + struct snd_pcm_substream { struct snd_pcm *pcm; struct snd_pcm_str *pstr; @@ -379,6 +381,7 @@ struct snd_pcm_substream { atomic_t mmap_count; unsigned int f_flags; void (*pcm_release)(struct snd_pcm_substream *); + struct pid *pid; #if defined(CONFIG_SND_PCM_OSS) || defined(CONFIG_SND_PCM_OSS_MODULE) /* -- OSS things -- */ struct snd_pcm_oss_substream oss; diff --git a/include/sound/rawmidi.h b/include/sound/rawmidi.h index c23c2658570..2480e7d10dc 100644 --- a/include/sound/rawmidi.h +++ b/include/sound/rawmidi.h @@ -46,6 +46,7 @@ struct snd_rawmidi; struct snd_rawmidi_substream; struct snd_seq_port_info; +struct pid; struct snd_rawmidi_ops { int (*open) (struct snd_rawmidi_substream * substream); @@ -97,6 +98,7 @@ struct snd_rawmidi_substream { struct snd_rawmidi_str *pstr; char name[32]; struct snd_rawmidi_runtime *runtime; + struct pid *pid; /* hardware layer */ struct snd_rawmidi_ops *ops; }; diff --git a/include/sound/sh_dac_audio.h b/include/sound/sh_dac_audio.h new file mode 100644 index 00000000000..f5deaf1ddb9 --- /dev/null +++ b/include/sound/sh_dac_audio.h @@ -0,0 +1,21 @@ +/* + * SH_DAC specific configuration, for the dac_audio platform_device + * + * Copyright (C) 2009 Rafael Ignacio Zurita <rizurita@yahoo.com> + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef __INCLUDE_SH_DAC_AUDIO_H +#define __INCLUDE_SH_DAC_AUDIO_H + +struct dac_audio_pdata { + int buffer_size; + int channel; + void (*start)(struct dac_audio_pdata *pd); + void (*stop)(struct dac_audio_pdata *pd); +}; + +#endif /* __INCLUDE_SH_DAC_AUDIO_H */ diff --git a/include/sound/soc-dai.h b/include/sound/soc-dai.h index 97ca9af414d..ca24e7f7a3f 100644 --- a/include/sound/soc-dai.h +++ b/include/sound/soc-dai.h @@ -30,6 +30,7 @@ struct snd_pcm_substream; #define SND_SOC_DAIFMT_DSP_A 3 /* L data MSB after FRM LRC */ #define SND_SOC_DAIFMT_DSP_B 4 /* L data MSB during FRM LRC */ #define SND_SOC_DAIFMT_AC97 5 /* AC97 */ +#define SND_SOC_DAIFMT_PDM 6 /* Pulse density modulation */ /* left and right justified also known as MSB and LSB respectively */ #define SND_SOC_DAIFMT_MSB SND_SOC_DAIFMT_LEFT_J @@ -106,7 +107,7 @@ int snd_soc_dai_set_clkdiv(struct snd_soc_dai *dai, int div_id, int div); int snd_soc_dai_set_pll(struct snd_soc_dai *dai, - int pll_id, unsigned int freq_in, unsigned int freq_out); + int pll_id, int source, unsigned int freq_in, unsigned int freq_out); /* Digital Audio interface formatting */ int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt); @@ -114,6 +115,10 @@ int snd_soc_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt); int snd_soc_dai_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width); +int snd_soc_dai_set_channel_map(struct snd_soc_dai *dai, + unsigned int tx_num, unsigned int *tx_slot, + unsigned int rx_num, unsigned int *rx_slot); + int snd_soc_dai_set_tristate(struct snd_soc_dai *dai, int tristate); /* Digital Audio Interface mute */ @@ -136,8 +141,8 @@ struct snd_soc_dai_ops { */ int (*set_sysclk)(struct snd_soc_dai *dai, int clk_id, unsigned int freq, int dir); - int (*set_pll)(struct snd_soc_dai *dai, - int pll_id, unsigned int freq_in, unsigned int freq_out); + int (*set_pll)(struct snd_soc_dai *dai, int pll_id, int source, + unsigned int freq_in, unsigned int freq_out); int (*set_clkdiv)(struct snd_soc_dai *dai, int div_id, int div); /* @@ -148,6 +153,9 @@ struct snd_soc_dai_ops { int (*set_tdm_slot)(struct snd_soc_dai *dai, unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width); + int (*set_channel_map)(struct snd_soc_dai *dai, + unsigned int tx_num, unsigned int *tx_slot, + unsigned int rx_num, unsigned int *rx_slot); int (*set_tristate)(struct snd_soc_dai *dai, int tristate); /* diff --git a/include/sound/soc-dapm.h b/include/sound/soc-dapm.h index c1410e3191e..c5c95e1da65 100644 --- a/include/sound/soc-dapm.h +++ b/include/sound/soc-dapm.h @@ -206,6 +206,12 @@ .get = snd_soc_dapm_get_enum_double, \ .put = snd_soc_dapm_put_enum_double, \ .private_value = (unsigned long)&xenum } +#define SOC_DAPM_ENUM_VIRT(xname, xenum) \ +{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ + .info = snd_soc_info_enum_double, \ + .get = snd_soc_dapm_get_enum_virt, \ + .put = snd_soc_dapm_put_enum_virt, \ + .private_value = (unsigned long)&xenum } #define SOC_DAPM_VALUE_ENUM(xname, xenum) \ { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ .info = snd_soc_info_enum_double, \ @@ -260,6 +266,10 @@ int snd_soc_dapm_get_enum_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_dapm_put_enum_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); +int snd_soc_dapm_get_enum_virt(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); +int snd_soc_dapm_put_enum_virt(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol); int snd_soc_dapm_get_value_enum_double(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol); int snd_soc_dapm_put_value_enum_double(struct snd_kcontrol *kcontrol, @@ -333,6 +343,10 @@ struct snd_soc_dapm_route { const char *sink; const char *control; const char *source; + + /* Note: currently only supported for links where source is a supply */ + int (*connected)(struct snd_soc_dapm_widget *source, + struct snd_soc_dapm_widget *sink); }; /* dapm audio path between two widgets */ @@ -349,6 +363,9 @@ struct snd_soc_dapm_path { u32 connect:1; /* source and sink widgets are connected */ u32 walked:1; /* path has been walked */ + int (*connected)(struct snd_soc_dapm_widget *source, + struct snd_soc_dapm_widget *sink); + struct list_head list_source; struct list_head list_sink; struct list_head list; diff --git a/include/sound/soc.h b/include/sound/soc.h index 475cb7ed6be..0d7718f9280 100644 --- a/include/sound/soc.h +++ b/include/sound/soc.h @@ -223,15 +223,15 @@ int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec, int addr_bits, int data_bits, enum snd_soc_control_type control); -#ifdef CONFIG_PM -int snd_soc_suspend_device(struct device *dev); -int snd_soc_resume_device(struct device *dev); -#endif - /* pcm <-> DAI connect */ void snd_soc_free_pcms(struct snd_soc_device *socdev); int snd_soc_new_pcms(struct snd_soc_device *socdev, int idx, const char *xid); -int snd_soc_init_card(struct snd_soc_device *socdev); + +/* Utility functions to get clock rates from various things */ +int snd_soc_calc_frame_size(int sample_size, int channels, int tdm_slots); +int snd_soc_params_to_frame_size(struct snd_pcm_hw_params *params); +int snd_soc_calc_bclk(int fs, int sample_size, int channels, int tdm_slots); +int snd_soc_params_to_bclk(struct snd_pcm_hw_params *parms); /* set runtime hw params */ int snd_soc_set_runtime_hwparams(struct snd_pcm_substream *substream, @@ -333,6 +333,8 @@ struct snd_soc_jack_gpio { int debounce_time; struct snd_soc_jack *jack; struct work_struct work; + + int (*jack_status_check)(void); }; #endif @@ -413,6 +415,7 @@ struct snd_soc_codec { unsigned int num_dai; #ifdef CONFIG_DEBUG_FS + struct dentry *debugfs_codec_root; struct dentry *debugfs_reg; struct dentry *debugfs_pop_time; struct dentry *debugfs_dapm; diff --git a/include/sound/sscape_ioctl.h b/include/sound/sscape_ioctl.h deleted file mode 100644 index 0d8885969c6..00000000000 --- a/include/sound/sscape_ioctl.h +++ /dev/null @@ -1,21 +0,0 @@ -#ifndef SSCAPE_IOCTL_H -#define SSCAPE_IOCTL_H - - -struct sscape_bootblock -{ - unsigned char code[256]; - unsigned version; -}; - -#define SSCAPE_MICROCODE_SIZE 65536 - -struct sscape_microcode -{ - unsigned char __user *code; -}; - -#define SND_SSCAPE_LOAD_BOOTB _IOWR('P', 100, struct sscape_bootblock) -#define SND_SSCAPE_LOAD_MCODE _IOW ('P', 101, struct sscape_microcode) - -#endif diff --git a/include/sound/tlv320dac33-plat.h b/include/sound/tlv320dac33-plat.h new file mode 100644 index 00000000000..5858d06a7ff --- /dev/null +++ b/include/sound/tlv320dac33-plat.h @@ -0,0 +1,20 @@ +/* + * Platform header for Texas Instruments TLV320DAC33 codec driver + * + * Author: Peter Ujfalusi <peter.ujfalusi@nokia.com> + * + * Copyright: (C) 2009 Nokia Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __TLV320DAC33_PLAT_H +#define __TLV320DAC33_PLAT_H + +struct tlv320dac33_platform_data { + int power_gpio; +}; + +#endif /* __TLV320DAC33_PLAT_H */ diff --git a/include/sound/tpa6130a2-plat.h b/include/sound/tpa6130a2-plat.h new file mode 100644 index 00000000000..e8c901e749d --- /dev/null +++ b/include/sound/tpa6130a2-plat.h @@ -0,0 +1,30 @@ +/* + * TPA6130A2 driver platform header + * + * Copyright (C) Nokia Corporation + * + * Written by Peter Ujfalusi <peter.ujfalusi@nokia.com> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * version 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA + * 02110-1301 USA + */ + +#ifndef TPA6130A2_PLAT_H +#define TPA6130A2_PLAT_H + +struct tpa6130a2_platform_data { + int power_gpio; +}; + +#endif diff --git a/include/sound/wss.h b/include/sound/wss.h index 6d65f322f1d..fd01f22825c 100644 --- a/include/sound/wss.h +++ b/include/sound/wss.h @@ -154,7 +154,6 @@ int snd_wss_create(struct snd_card *card, unsigned short hardware, unsigned short hwshare, struct snd_wss **rchip); -int snd_wss_free(struct snd_wss *chip); int snd_wss_pcm(struct snd_wss *chip, int device, struct snd_pcm **rpcm); int snd_wss_timer(struct snd_wss *chip, int device, struct snd_timer **rtimer); int snd_wss_mixer(struct snd_wss *chip); |