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-rw-r--r--include/asm-i386/mach-summit/mach_mpparse.h3
-rw-r--r--include/asm-ia64/machvec.h2
-rw-r--r--include/asm-ia64/machvec_hpzx1.h21
-rw-r--r--include/asm-ia64/machvec_hpzx1_swiotlb.h3
-rw-r--r--include/asm-ia64/meminit.h6
-rw-r--r--include/asm-ia64/mmzone.h10
-rw-r--r--include/asm-ia64/nodedata.h4
-rw-r--r--include/asm-ia64/page.h6
-rw-r--r--include/asm-ia64/sn/arch.h36
-rw-r--r--include/asm-ia64/sn/io.h11
-rw-r--r--include/asm-ia64/sn/klconfig.h34
-rw-r--r--include/asm-ia64/sn/l1.h12
-rw-r--r--include/asm-ia64/sn/nodepda.h1
-rw-r--r--include/asm-ia64/sn/sn_cpuid.h3
-rw-r--r--include/asm-ia64/sn/sn_sal.h59
-rw-r--r--include/asm-ia64/sn/tioca_provider.h14
-rw-r--r--include/asm-ia64/sn/tiocx.h3
-rw-r--r--include/asm-ia64/sn/xp.h16
-rw-r--r--include/asm-ia64/sparsemem.h20
-rw-r--r--include/linux/etherdevice.h16
-rw-r--r--include/linux/pci.h7
-rw-r--r--include/linux/pci_ids.h566
-rw-r--r--include/linux/pm.h14
-rw-r--r--include/linux/usb.h163
-rw-r--r--include/linux/usb_otg.h13
-rw-r--r--include/linux/usbdevice_fs.h7
-rw-r--r--include/net/sctp/user.h8
-rw-r--r--include/rdma/ib_cm.h10
-rw-r--r--include/rdma/ib_mad.h66
-rw-r--r--include/rdma/ib_user_cm.h10
-rw-r--r--include/rdma/ib_user_verbs.h222
-rw-r--r--include/rdma/ib_verbs.h6
32 files changed, 563 insertions, 809 deletions
diff --git a/include/asm-i386/mach-summit/mach_mpparse.h b/include/asm-i386/mach-summit/mach_mpparse.h
index 2b9e6d55bef..1cce2b924a8 100644
--- a/include/asm-i386/mach-summit/mach_mpparse.h
+++ b/include/asm-i386/mach-summit/mach_mpparse.h
@@ -22,7 +22,6 @@ static inline void mpc_oem_pci_bus(struct mpc_config_bus *m,
{
}
-extern int usb_early_handoff;
static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
char *productid)
{
@@ -32,7 +31,6 @@ static inline int mps_oem_check(struct mp_config_table *mpc, char *oem,
|| !strncmp(productid, "RUTHLESS SMP", 12))){
use_cyclone = 1; /*enable cyclone-timer*/
setup_summit();
- usb_early_handoff = 1;
return 1;
}
return 0;
@@ -46,7 +44,6 @@ static inline int acpi_madt_oem_check(char *oem_id, char *oem_table_id)
|| !strncmp(oem_table_id, "EXA", 3))){
use_cyclone = 1; /*enable cyclone-timer*/
setup_summit();
- usb_early_handoff = 1;
return 1;
}
return 0;
diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h
index a2f6ac5aef7..ca5ea994d68 100644
--- a/include/asm-ia64/machvec.h
+++ b/include/asm-ia64/machvec.h
@@ -26,7 +26,7 @@ typedef void ia64_mv_cpu_init_t (void);
typedef void ia64_mv_irq_init_t (void);
typedef void ia64_mv_send_ipi_t (int, int, int, int);
typedef void ia64_mv_timer_interrupt_t (int, void *, struct pt_regs *);
-typedef void ia64_mv_global_tlb_purge_t (unsigned long, unsigned long, unsigned long);
+typedef void ia64_mv_global_tlb_purge_t (struct mm_struct *, unsigned long, unsigned long, unsigned long);
typedef void ia64_mv_tlb_migrate_finish_t (struct mm_struct *);
typedef unsigned int ia64_mv_local_vector_to_irq (u8);
typedef char *ia64_mv_pci_get_legacy_mem_t (struct pci_bus *);
diff --git a/include/asm-ia64/machvec_hpzx1.h b/include/asm-ia64/machvec_hpzx1.h
index daafe504c5f..e90daf9ce34 100644
--- a/include/asm-ia64/machvec_hpzx1.h
+++ b/include/asm-ia64/machvec_hpzx1.h
@@ -1,8 +1,7 @@
#ifndef _ASM_IA64_MACHVEC_HPZX1_h
#define _ASM_IA64_MACHVEC_HPZX1_h
-extern ia64_mv_setup_t dig_setup;
-extern ia64_mv_setup_t sba_setup;
+extern ia64_mv_setup_t dig_setup;
extern ia64_mv_dma_alloc_coherent sba_alloc_coherent;
extern ia64_mv_dma_free_coherent sba_free_coherent;
extern ia64_mv_dma_map_single sba_map_single;
@@ -19,15 +18,15 @@ extern ia64_mv_dma_mapping_error sba_dma_mapping_error;
* platform's machvec structure. When compiling a non-generic kernel,
* the macros are used directly.
*/
-#define platform_name "hpzx1"
-#define platform_setup sba_setup
-#define platform_dma_init machvec_noop
-#define platform_dma_alloc_coherent sba_alloc_coherent
-#define platform_dma_free_coherent sba_free_coherent
-#define platform_dma_map_single sba_map_single
-#define platform_dma_unmap_single sba_unmap_single
-#define platform_dma_map_sg sba_map_sg
-#define platform_dma_unmap_sg sba_unmap_sg
+#define platform_name "hpzx1"
+#define platform_setup dig_setup
+#define platform_dma_init machvec_noop
+#define platform_dma_alloc_coherent sba_alloc_coherent
+#define platform_dma_free_coherent sba_free_coherent
+#define platform_dma_map_single sba_map_single
+#define platform_dma_unmap_single sba_unmap_single
+#define platform_dma_map_sg sba_map_sg
+#define platform_dma_unmap_sg sba_unmap_sg
#define platform_dma_sync_single_for_cpu machvec_dma_sync_single
#define platform_dma_sync_sg_for_cpu machvec_dma_sync_sg
#define platform_dma_sync_single_for_device machvec_dma_sync_single
diff --git a/include/asm-ia64/machvec_hpzx1_swiotlb.h b/include/asm-ia64/machvec_hpzx1_swiotlb.h
index 9924b1b00a6..f00a34a148f 100644
--- a/include/asm-ia64/machvec_hpzx1_swiotlb.h
+++ b/include/asm-ia64/machvec_hpzx1_swiotlb.h
@@ -2,7 +2,6 @@
#define _ASM_IA64_MACHVEC_HPZX1_SWIOTLB_h
extern ia64_mv_setup_t dig_setup;
-extern ia64_mv_dma_init hwsw_init;
extern ia64_mv_dma_alloc_coherent hwsw_alloc_coherent;
extern ia64_mv_dma_free_coherent hwsw_free_coherent;
extern ia64_mv_dma_map_single hwsw_map_single;
@@ -26,7 +25,7 @@ extern ia64_mv_dma_sync_sg_for_device hwsw_sync_sg_for_device;
#define platform_name "hpzx1_swiotlb"
#define platform_setup dig_setup
-#define platform_dma_init hwsw_init
+#define platform_dma_init machvec_noop
#define platform_dma_alloc_coherent hwsw_alloc_coherent
#define platform_dma_free_coherent hwsw_free_coherent
#define platform_dma_map_single hwsw_map_single
diff --git a/include/asm-ia64/meminit.h b/include/asm-ia64/meminit.h
index 1590dc65b30..46501b01a5c 100644
--- a/include/asm-ia64/meminit.h
+++ b/include/asm-ia64/meminit.h
@@ -16,10 +16,11 @@
* - initrd (optional)
* - command line string
* - kernel code & data
+ * - Kernel memory map built from EFI memory map
*
* More could be added if necessary
*/
-#define IA64_MAX_RSVD_REGIONS 5
+#define IA64_MAX_RSVD_REGIONS 6
struct rsvd_region {
unsigned long start; /* virtual address of beginning of element */
@@ -33,6 +34,7 @@ extern void find_memory (void);
extern void reserve_memory (void);
extern void find_initrd (void);
extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg);
+extern void efi_memmap_init(unsigned long *, unsigned long *);
/*
* For rounding an address to the next IA64_GRANULE_SIZE or order
@@ -41,7 +43,7 @@ extern int filter_rsvd_memory (unsigned long start, unsigned long end, void *arg
#define GRANULEROUNDUP(n) (((n)+IA64_GRANULE_SIZE-1) & ~(IA64_GRANULE_SIZE-1))
#define ORDERROUNDDOWN(n) ((n) & ~((PAGE_SIZE<<MAX_ORDER)-1))
-#ifdef CONFIG_DISCONTIGMEM
+#ifdef CONFIG_NUMA
extern void call_pernode_memory (unsigned long start, unsigned long len, void *func);
#else
# define call_pernode_memory(start, len, func) (*func)(start, len, 0)
diff --git a/include/asm-ia64/mmzone.h b/include/asm-ia64/mmzone.h
index d32f51e3d6c..34efe88eb84 100644
--- a/include/asm-ia64/mmzone.h
+++ b/include/asm-ia64/mmzone.h
@@ -15,7 +15,7 @@
#include <asm/page.h>
#include <asm/meminit.h>
-#ifdef CONFIG_DISCONTIGMEM
+#ifdef CONFIG_NUMA
static inline int pfn_to_nid(unsigned long pfn)
{
@@ -31,6 +31,10 @@ static inline int pfn_to_nid(unsigned long pfn)
#endif
}
+#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID
+extern int early_pfn_to_nid(unsigned long pfn);
+#endif
+
#ifdef CONFIG_IA64_DIG /* DIG systems are small */
# define MAX_PHYSNODE_ID 8
# define NR_NODE_MEMBLKS (MAX_NUMNODES * 8)
@@ -39,8 +43,8 @@ static inline int pfn_to_nid(unsigned long pfn)
# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4)
#endif
-#else /* CONFIG_DISCONTIGMEM */
+#else /* CONFIG_NUMA */
# define NR_NODE_MEMBLKS (MAX_NUMNODES * 4)
-#endif /* CONFIG_DISCONTIGMEM */
+#endif /* CONFIG_NUMA */
#endif /* _ASM_IA64_MMZONE_H */
diff --git a/include/asm-ia64/nodedata.h b/include/asm-ia64/nodedata.h
index 6b0f3ed89b7..9978c7ce754 100644
--- a/include/asm-ia64/nodedata.h
+++ b/include/asm-ia64/nodedata.h
@@ -17,7 +17,7 @@
#include <asm/percpu.h>
#include <asm/mmzone.h>
-#ifdef CONFIG_DISCONTIGMEM
+#ifdef CONFIG_NUMA
/*
* Node Data. One of these structures is located on each node of a NUMA system.
@@ -47,6 +47,6 @@ struct ia64_node_data {
*/
#define NODE_DATA(nid) (local_node_data->pg_data_ptrs[nid])
-#endif /* CONFIG_DISCONTIGMEM */
+#endif /* CONFIG_NUMA */
#endif /* _ASM_IA64_NODEDATA_H */
diff --git a/include/asm-ia64/page.h b/include/asm-ia64/page.h
index 9edffad8c28..ef436b9d06a 100644
--- a/include/asm-ia64/page.h
+++ b/include/asm-ia64/page.h
@@ -102,15 +102,15 @@ do { \
#ifdef CONFIG_VIRTUAL_MEM_MAP
extern int ia64_pfn_valid (unsigned long pfn);
-#else
+#elif defined(CONFIG_FLATMEM)
# define ia64_pfn_valid(pfn) 1
#endif
-#ifndef CONFIG_DISCONTIGMEM
+#ifdef CONFIG_FLATMEM
# define pfn_valid(pfn) (((pfn) < max_mapnr) && ia64_pfn_valid(pfn))
# define page_to_pfn(page) ((unsigned long) (page - mem_map))
# define pfn_to_page(pfn) (mem_map + (pfn))
-#else
+#elif defined(CONFIG_DISCONTIGMEM)
extern struct page *vmem_map;
extern unsigned long max_low_pfn;
# define pfn_valid(pfn) (((pfn) < max_low_pfn) && ia64_pfn_valid(pfn))
diff --git a/include/asm-ia64/sn/arch.h b/include/asm-ia64/sn/arch.h
index ab827d29856..1a3831c04af 100644
--- a/include/asm-ia64/sn/arch.h
+++ b/include/asm-ia64/sn/arch.h
@@ -18,6 +18,32 @@
#include <asm/sn/sn_cpuid.h>
/*
+ * This is the maximum number of NUMALINK nodes that can be part of a single
+ * SSI kernel. This number includes C-brick, M-bricks, and TIOs. Nodes in
+ * remote partitions are NOT included in this number.
+ * The number of compact nodes cannot exceed size of a coherency domain.
+ * The purpose of this define is to specify a node count that includes
+ * all C/M/TIO nodes in an SSI system.
+ *
+ * SGI system can currently support up to 256 C/M nodes plus additional TIO nodes.
+ *
+ * Note: ACPI20 has an architectural limit of 256 nodes. When we upgrade
+ * to ACPI3.0, this limit will be removed. The notion of "compact nodes"
+ * should be deleted and TIOs should be included in MAX_NUMNODES.
+ */
+#define MAX_COMPACT_NODES 512
+
+/*
+ * Maximum number of nodes in all partitions and in all coherency domains.
+ * This is the total number of nodes accessible in the numalink fabric. It
+ * includes all C & M bricks, plus all TIOs.
+ *
+ * This value is also the value of the maximum number of NASIDs in the numalink
+ * fabric.
+ */
+#define MAX_NUMALINK_NODES 16384
+
+/*
* The following defines attributes of the HUB chip. These attributes are
* frequently referenced. They are kept in the per-cpu data areas of each cpu.
* They are kept together in a struct to minimize cache misses.
@@ -41,15 +67,6 @@ DECLARE_PER_CPU(struct sn_hub_info_s, __sn_hub_info);
/*
- * This is the maximum number of nodes that can be part of a kernel.
- * Effectively, it's the maximum number of compact node ids (cnodeid_t).
- * This is not necessarily the same as MAX_NASIDS.
- */
-#define MAX_COMPACT_NODES 2048
-#define CPUS_PER_NODE 4
-
-
-/*
* Compact node ID to nasid mappings kept in the per-cpu data areas of each
* cpu.
*/
@@ -57,7 +74,6 @@ DECLARE_PER_CPU(short, __sn_cnodeid_to_nasid[MAX_NUMNODES]);
#define sn_cnodeid_to_nasid (&__get_cpu_var(__sn_cnodeid_to_nasid[0]))
-
extern u8 sn_partition_id;
extern u8 sn_system_size;
extern u8 sn_sharing_domain_size;
diff --git a/include/asm-ia64/sn/io.h b/include/asm-ia64/sn/io.h
index 42209733f6b..41c73a73562 100644
--- a/include/asm-ia64/sn/io.h
+++ b/include/asm-ia64/sn/io.h
@@ -14,7 +14,7 @@
extern void * sn_io_addr(unsigned long port) __attribute_const__; /* Forward definition */
extern void __sn_mmiowb(void); /* Forward definition */
-extern int numionodes;
+extern int num_cnodes;
#define __sn_mf_a() ia64_mfa()
@@ -36,6 +36,15 @@ extern void sn_dma_flush(unsigned long);
#define __sn_readq_relaxed ___sn_readq_relaxed
/*
+ * Convenience macros for setting/clearing bits using the above accessors
+ */
+
+#define __sn_setq_relaxed(addr, val) \
+ writeq((__sn_readq_relaxed(addr) | (val)), (addr))
+#define __sn_clrq_relaxed(addr, val) \
+ writeq((__sn_readq_relaxed(addr) & ~(val)), (addr))
+
+/*
* The following routines are SN Platform specific, called when
* a reference is made to inX/outX set macros. SN Platform
* inX set of macros ensures that Posted DMA writes on the
diff --git a/include/asm-ia64/sn/klconfig.h b/include/asm-ia64/sn/klconfig.h
index 9f920c70a62..bcbf209d63b 100644
--- a/include/asm-ia64/sn/klconfig.h
+++ b/include/asm-ia64/sn/klconfig.h
@@ -208,19 +208,6 @@ typedef struct lboard_s {
klconf_off_t brd_next_same; /* Next BOARD with same nasid */
} lboard_t;
-#define KLCF_NUM_COMPS(_brd) ((_brd)->brd_numcompts)
-#define NODE_OFFSET_TO_KLINFO(n,off) ((klinfo_t*) TO_NODE_CAC(n,off))
-#define KLCF_NEXT(_brd) \
- ((_brd)->brd_next_same ? \
- (NODE_OFFSET_TO_LBOARD((_brd)->brd_next_same_host, (_brd)->brd_next_same)): NULL)
-#define KLCF_NEXT_ANY(_brd) \
- ((_brd)->brd_next_any ? \
- (NODE_OFFSET_TO_LBOARD(NASID_GET(_brd), (_brd)->brd_next_any)): NULL)
-#define KLCF_COMP(_brd, _ndx) \
- ((((_brd)->brd_compts[(_ndx)]) == 0) ? 0 : \
- (NODE_OFFSET_TO_KLINFO(NASID_GET(_brd), (_brd)->brd_compts[(_ndx)])))
-
-
/*
* Generic info structure. This stores common info about a
* component.
@@ -249,24 +236,11 @@ typedef struct klinfo_s { /* Generic info */
} klinfo_t ;
-static inline lboard_t *find_lboard_any(lboard_t * start, unsigned char brd_type)
+static inline lboard_t *find_lboard_next(lboard_t * brd)
{
- /* Search all boards stored on this node. */
-
- while (start) {
- if (start->brd_type == brd_type)
- return start;
- start = KLCF_NEXT_ANY(start);
- }
- /* Didn't find it. */
- return (lboard_t *) NULL;
+ if (brd && brd->brd_next_any)
+ return NODE_OFFSET_TO_LBOARD(NASID_GET(brd), brd->brd_next_any);
+ return NULL;
}
-
-/* external declarations of Linux kernel functions. */
-
-extern lboard_t *root_lboard[];
-extern klinfo_t *find_component(lboard_t *brd, klinfo_t *kli, unsigned char type);
-extern klinfo_t *find_first_component(lboard_t *brd, unsigned char type);
-
#endif /* _ASM_IA64_SN_KLCONFIG_H */
diff --git a/include/asm-ia64/sn/l1.h b/include/asm-ia64/sn/l1.h
index 2e5f0aa3888..e3b819110d4 100644
--- a/include/asm-ia64/sn/l1.h
+++ b/include/asm-ia64/sn/l1.h
@@ -35,4 +35,16 @@
#define L1_BRICKTYPE_ATHENA 0x2b /* + */
#define L1_BRICKTYPE_DAYTONA 0x7a /* z */
+/* board type response codes */
+#define L1_BOARDTYPE_IP69 0x0100 /* CA */
+#define L1_BOARDTYPE_IP63 0x0200 /* CB */
+#define L1_BOARDTYPE_BASEIO 0x0300 /* IB */
+#define L1_BOARDTYPE_PCIE2SLOT 0x0400 /* IC */
+#define L1_BOARDTYPE_PCIX3SLOT 0x0500 /* ID */
+#define L1_BOARDTYPE_PCIXPCIE4SLOT 0x0600 /* IE */
+#define L1_BOARDTYPE_ABACUS 0x0700 /* AB */
+#define L1_BOARDTYPE_DAYTONA 0x0800 /* AD */
+#define L1_BOARDTYPE_INVAL (-1) /* invalid brick type */
+
+
#endif /* _ASM_IA64_SN_L1_H */
diff --git a/include/asm-ia64/sn/nodepda.h b/include/asm-ia64/sn/nodepda.h
index 47bb8100fd0..6f6d69e39ff 100644
--- a/include/asm-ia64/sn/nodepda.h
+++ b/include/asm-ia64/sn/nodepda.h
@@ -55,7 +55,6 @@ struct nodepda_s {
*/
struct phys_cpuid phys_cpuid[NR_CPUS];
spinlock_t ptc_lock ____cacheline_aligned_in_smp;
- spinlock_t bist_lock;
};
typedef struct nodepda_s nodepda_t;
diff --git a/include/asm-ia64/sn/sn_cpuid.h b/include/asm-ia64/sn/sn_cpuid.h
index d2c1d34dcce..749deb2ca6c 100644
--- a/include/asm-ia64/sn/sn_cpuid.h
+++ b/include/asm-ia64/sn/sn_cpuid.h
@@ -105,7 +105,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */
#define cpuid_to_nasid(cpuid) (sn_nodepda->phys_cpuid[cpuid].nasid)
#define cpuid_to_subnode(cpuid) (sn_nodepda->phys_cpuid[cpuid].subnode)
#define cpuid_to_slice(cpuid) (sn_nodepda->phys_cpuid[cpuid].slice)
-#define cpuid_to_cnodeid(cpuid) (physical_node_map[cpuid_to_nasid(cpuid)])
/*
@@ -113,8 +112,6 @@ extern short physical_node_map[]; /* indexed by nasid to get cnode */
* of potentially large tables.
*/
extern int nasid_slice_to_cpuid(int, int);
-#define nasid_slice_to_cpu_physical_id(nasid, slice) \
- cpu_physical_id(nasid_slice_to_cpuid(nasid, slice))
/*
* cnodeid_to_nasid - convert a cnodeid to a NASID
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index fea35b33d4e..3f7564dc0aa 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -47,6 +47,7 @@
#define SN_SAL_CONSOLE_PUTB 0x02000028
#define SN_SAL_CONSOLE_XMIT_CHARS 0x0200002a
#define SN_SAL_CONSOLE_READC 0x0200002b
+#define SN_SAL_SYSCTL_OP 0x02000030
#define SN_SAL_SYSCTL_MODID_GET 0x02000031
#define SN_SAL_SYSCTL_GET 0x02000032
#define SN_SAL_SYSCTL_IOBRICK_MODULE_GET 0x02000033
@@ -67,7 +68,7 @@
#define SN_SAL_IOIF_INTERRUPT 0x0200004a
#define SN_SAL_HWPERF_OP 0x02000050 // lock
#define SN_SAL_IOIF_ERROR_INTERRUPT 0x02000051
-
+#define SN_SAL_IOIF_PCI_SAFE 0x02000052
#define SN_SAL_IOIF_SLOT_ENABLE 0x02000053
#define SN_SAL_IOIF_SLOT_DISABLE 0x02000054
#define SN_SAL_IOIF_GET_HUBDEV_INFO 0x02000055
@@ -101,6 +102,13 @@
#define SAL_INTR_FREE 2
/*
+ * operations available on the generic SN_SAL_SYSCTL_OP
+ * runtime service
+ */
+#define SAL_SYSCTL_OP_IOBOARD 0x0001 /* retrieve board type */
+#define SAL_SYSCTL_OP_TIO_JLCK_RST 0x0002 /* issue TIO clock reset */
+
+/*
* IRouter (i.e. generalized system controller) operations
*/
#define SAL_IROUTER_OPEN 0 /* open a subchannel */
@@ -198,26 +206,16 @@ ia64_sn_get_master_baseio_nasid(void)
return ret_stuff.v0;
}
-static inline char *
+static inline void *
ia64_sn_get_klconfig_addr(nasid_t nasid)
{
struct ia64_sal_retval ret_stuff;
- int cnodeid;
- cnodeid = nasid_to_cnodeid(nasid);
ret_stuff.status = 0;
ret_stuff.v0 = 0;
ret_stuff.v1 = 0;
ret_stuff.v2 = 0;
SAL_CALL(ret_stuff, SN_SAL_GET_KLCONFIG_ADDR, (u64)nasid, 0, 0, 0, 0, 0, 0);
-
- /*
- * We should panic if a valid cnode nasid does not produce
- * a klconfig address.
- */
- if (ret_stuff.status != 0) {
- panic("ia64_sn_get_klconfig_addr: Returned error %lx\n", ret_stuff.status);
- }
return ret_stuff.v0 ? __va(ret_stuff.v0) : NULL;
}
@@ -694,12 +692,10 @@ sn_change_memprotect(u64 paddr, u64 len, u64 perms, u64 *nasid_array)
unsigned long irq_flags;
cnodeid = nasid_to_cnodeid(get_node_number(paddr));
- // spin_lock(&NODEPDA(cnodeid)->bist_lock);
local_irq_save(irq_flags);
ia64_sal_oemcall_nolock(&ret_stuff, SN_SAL_MEMPROTECT, paddr, len,
(u64)nasid_array, perms, 0, 0, 0);
local_irq_restore(irq_flags);
- // spin_unlock(&NODEPDA(cnodeid)->bist_lock);
return ret_stuff.status;
}
#define SN_MEMPROT_ACCESS_CLASS_0 0x14a080
@@ -873,6 +869,41 @@ ia64_sn_sysctl_event_init(nasid_t nasid)
return (int) rv.v0;
}
+/*
+ * Ask the system controller on the specified nasid to reset
+ * the CX corelet clock. Only valid on TIO nodes.
+ */
+static inline int
+ia64_sn_sysctl_tio_clock_reset(nasid_t nasid)
+{
+ struct ia64_sal_retval rv;
+ SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_TIO_JLCK_RST,
+ nasid, 0, 0, 0, 0, 0);
+ if (rv.status != 0)
+ return (int)rv.status;
+ if (rv.v0 != 0)
+ return (int)rv.v0;
+
+ return 0;
+}
+
+/*
+ * Get the associated ioboard type for a given nasid.
+ */
+static inline int
+ia64_sn_sysctl_ioboard_get(nasid_t nasid)
+{
+ struct ia64_sal_retval rv;
+ SAL_CALL_REENTRANT(rv, SN_SAL_SYSCTL_OP, SAL_SYSCTL_OP_IOBOARD,
+ nasid, 0, 0, 0, 0, 0);
+ if (rv.v0 != 0)
+ return (int)rv.v0;
+ if (rv.v1 != 0)
+ return (int)rv.v1;
+
+ return 0;
+}
+
/**
* ia64_sn_get_fit_compt - read a FIT entry from the PROM header
* @nasid: NASID of node to read
diff --git a/include/asm-ia64/sn/tioca_provider.h b/include/asm-ia64/sn/tioca_provider.h
index 5ccec608d32..b532ef6148e 100644
--- a/include/asm-ia64/sn/tioca_provider.h
+++ b/include/asm-ia64/sn/tioca_provider.h
@@ -182,11 +182,11 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
* touch every CL aligned GART entry.
*/
- ca_base->ca_control2 &= ~(CA_GART_MEM_PARAM);
- ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
- ca_base->ca_control2 |=
- (0x2ull << CA_GART_MEM_PARAM_SHFT);
- tmp = ca_base->ca_control2;
+ __sn_clrq_relaxed(&ca_base->ca_control2, CA_GART_MEM_PARAM);
+ __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
+ __sn_setq_relaxed(&ca_base->ca_control2,
+ (0x2ull << CA_GART_MEM_PARAM_SHFT));
+ tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
return;
@@ -196,8 +196,8 @@ tioca_tlbflush(struct tioca_kernel *tioca_kernel)
* Gart in uncached mode ... need an explicit flush.
*/
- ca_base->ca_control2 |= CA_GART_FLUSH_TLB;
- tmp = ca_base->ca_control2;
+ __sn_setq_relaxed(&ca_base->ca_control2, CA_GART_FLUSH_TLB);
+ tmp = __sn_readq_relaxed(&ca_base->ca_control2);
}
extern uint32_t tioca_gart_found;
diff --git a/include/asm-ia64/sn/tiocx.h b/include/asm-ia64/sn/tiocx.h
index c5447a50450..5699e75e502 100644
--- a/include/asm-ia64/sn/tiocx.h
+++ b/include/asm-ia64/sn/tiocx.h
@@ -19,6 +19,7 @@ struct cx_id_s {
struct cx_dev {
struct cx_id_s cx_id;
+ int bt; /* board/blade type */
void *soft; /* driver specific */
struct hubdev_info *hubdev;
struct device dev;
@@ -59,7 +60,7 @@ struct cx_drv {
extern struct sn_irq_info *tiocx_irq_alloc(nasid_t, int, int, nasid_t, int);
extern void tiocx_irq_free(struct sn_irq_info *);
extern int cx_device_unregister(struct cx_dev *);
-extern int cx_device_register(nasid_t, int, int, struct hubdev_info *);
+extern int cx_device_register(nasid_t, int, int, struct hubdev_info *, int);
extern int cx_driver_unregister(struct cx_drv *);
extern int cx_driver_register(struct cx_drv *);
extern uint64_t tiocx_dma_addr(uint64_t addr);
diff --git a/include/asm-ia64/sn/xp.h b/include/asm-ia64/sn/xp.h
index 1df1c9f61a6..49faf8f2643 100644
--- a/include/asm-ia64/sn/xp.h
+++ b/include/asm-ia64/sn/xp.h
@@ -49,7 +49,7 @@
* C-brick nasids, thus the need for bitmaps which don't account for
* odd-numbered (non C-brick) nasids.
*/
-#define XP_MAX_PHYSNODE_ID (MAX_PHYSNODE_ID / 2)
+#define XP_MAX_PHYSNODE_ID (MAX_NUMALINK_NODES / 2)
#define XP_NASID_MASK_BYTES ((XP_MAX_PHYSNODE_ID + 7) / 8)
#define XP_NASID_MASK_WORDS ((XP_MAX_PHYSNODE_ID + 63) / 64)
@@ -217,7 +217,17 @@ enum xpc_retval {
xpcInvalidPartid, /* 42: invalid partition ID */
xpcLocalPartid, /* 43: local partition ID */
- xpcUnknownReason /* 44: unknown reason -- must be last in list */
+ xpcOtherGoingDown, /* 44: other side going down, reason unknown */
+ xpcSystemGoingDown, /* 45: system is going down, reason unknown */
+ xpcSystemHalt, /* 46: system is being halted */
+ xpcSystemReboot, /* 47: system is being rebooted */
+ xpcSystemPoweroff, /* 48: system is being powered off */
+
+ xpcDisconnecting, /* 49: channel disconnecting (closing) */
+
+ xpcOpenCloseError, /* 50: channel open/close protocol error */
+
+ xpcUnknownReason /* 51: unknown reason -- must be last in list */
};
@@ -342,7 +352,7 @@ typedef void (*xpc_notify_func)(enum xpc_retval reason, partid_t partid,
*
* The 'func' field points to the function to call when aynchronous
* notification is required for such events as: a connection established/lost,
- * or an incomming message received, or an error condition encountered. A
+ * or an incoming message received, or an error condition encountered. A
* non-NULL 'func' field indicates that there is an active registration for
* the channel.
*/
diff --git a/include/asm-ia64/sparsemem.h b/include/asm-ia64/sparsemem.h
new file mode 100644
index 00000000000..67a7c40ec27
--- /dev/null
+++ b/include/asm-ia64/sparsemem.h
@@ -0,0 +1,20 @@
+#ifndef _ASM_IA64_SPARSEMEM_H
+#define _ASM_IA64_SPARSEMEM_H
+
+#ifdef CONFIG_SPARSEMEM
+/*
+ * SECTION_SIZE_BITS 2^N: how big each section will be
+ * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space
+ */
+
+#define SECTION_SIZE_BITS (30)
+#define MAX_PHYSMEM_BITS (50)
+#ifdef CONFIG_FORCE_MAX_ZONEORDER
+#if ((CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT) > SECTION_SIZE_BITS)
+#undef SECTION_SIZE_BITS
+#define SECTION_SIZE_BITS (CONFIG_FORCE_MAX_ZONEORDER - 1 + PAGE_SHIFT)
+#endif
+#endif
+
+#endif /* CONFIG_SPARSEMEM */
+#endif /* _ASM_IA64_SPARSEMEM_H */
diff --git a/include/linux/etherdevice.h b/include/linux/etherdevice.h
index 4522c7186bf..cc84934f905 100644
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -104,6 +104,22 @@ static inline void random_ether_addr(u8 *addr)
addr [0] &= 0xfe; /* clear multicast bit */
addr [0] |= 0x02; /* set local assignment bit (IEEE802) */
}
+
+/**
+ * compare_ether_addr - Compare two Ethernet addresses
+ * @addr1: Pointer to a six-byte array containing the Ethernet address
+ * @addr2 Pointer other six-byte array containing the Ethernet address
+ *
+ * Compare two ethernet addresses, returns 0 if equal
+ */
+static inline unsigned compare_ether_addr(const u8 *_a, const u8 *_b)
+{
+ const u16 *a = (const u16 *) _a;
+ const u16 *b = (const u16 *) _b;
+
+ BUILD_BUG_ON(ETH_ALEN != 6);
+ return ((a[0] ^ b[0]) | (a[1] ^ b[1]) | (a[2] ^ b[2])) != 0;
+}
#endif /* __KERNEL__ */
#endif /* _LINUX_ETHERDEVICE_H */
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 7349058ed77..3596ac94ecf 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -132,6 +132,7 @@ struct pci_dev {
unsigned int is_enabled:1; /* pci_enable_device has been called */
unsigned int is_busmaster:1; /* device is busmaster */
unsigned int no_msi:1; /* device may not use msi */
+ unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
u32 saved_config_space[16]; /* config space saved at suspend time */
struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */
@@ -490,6 +491,9 @@ extern void pci_disable_msix(struct pci_dev *dev);
extern void msi_remove_pci_irq_vectors(struct pci_dev *dev);
#endif
+extern void pci_block_user_cfg_access(struct pci_dev *dev);
+extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
+
/*
* PCI domain support. Sometimes called PCI segment (eg by ACPI),
* a PCI domain is defined to be a set of PCI busses which share
@@ -560,6 +564,9 @@ static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int en
#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
+static inline void pci_block_user_cfg_access(struct pci_dev *dev) { }
+static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) { }
+
#endif /* CONFIG_PCI */
/* Include architecture-dependent settings and functions */
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d6865bbd9ea..56192005fa4 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -96,6 +96,9 @@
#define PCI_CLASS_SERIAL_ACCESS 0x0c01
#define PCI_CLASS_SERIAL_SSA 0x0c02
#define PCI_CLASS_SERIAL_USB 0x0c03
+#define PCI_CLASS_SERIAL_USB_UHCI 0x0c0300
+#define PCI_CLASS_SERIAL_USB_OHCI 0x0c0310
+#define PCI_CLASS_SERIAL_USB_EHCI 0x0c0320
#define PCI_CLASS_SERIAL_FIBER 0x0c04
#define PCI_CLASS_SERIAL_SMBUS 0x0c05
@@ -132,9 +135,6 @@
#define PCI_VENDOR_ID_COMPAQ 0x0e11
#define PCI_DEVICE_ID_COMPAQ_TOKENRING 0x0508
-#define PCI_DEVICE_ID_COMPAQ_1280 0x3033
-#define PCI_DEVICE_ID_COMPAQ_TRIFLEX 0x4000
-#define PCI_DEVICE_ID_COMPAQ_6010 0x6010
#define PCI_DEVICE_ID_COMPAQ_TACHYON 0xa0fc
#define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10
#define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32
@@ -274,7 +274,6 @@
#define PCI_DEVICE_ID_ATI_RAGE128_PP 0x5050
#define PCI_DEVICE_ID_ATI_RAGE128_PQ 0x5051
#define PCI_DEVICE_ID_ATI_RAGE128_PR 0x5052
-#define PCI_DEVICE_ID_ATI_RAGE128_TR 0x5452
#define PCI_DEVICE_ID_ATI_RAGE128_PS 0x5053
#define PCI_DEVICE_ID_ATI_RAGE128_PT 0x5054
#define PCI_DEVICE_ID_ATI_RAGE128_PU 0x5055
@@ -282,8 +281,6 @@
#define PCI_DEVICE_ID_ATI_RAGE128_PW 0x5057
#define PCI_DEVICE_ID_ATI_RAGE128_PX 0x5058
/* Rage128 M4 */
-#define PCI_DEVICE_ID_ATI_RADEON_LE 0x4d45
-#define PCI_DEVICE_ID_ATI_RADEON_LF 0x4d46
/* Radeon R100 */
#define PCI_DEVICE_ID_ATI_RADEON_QD 0x5144
#define PCI_DEVICE_ID_ATI_RADEON_QE 0x5145
@@ -304,32 +301,22 @@
#define PCI_DEVICE_ID_ATI_RADEON_QW 0x5157
#define PCI_DEVICE_ID_ATI_RADEON_QX 0x5158
/* Radeon NV-100 */
-#define PCI_DEVICE_ID_ATI_RADEON_N1 0x5159
-#define PCI_DEVICE_ID_ATI_RADEON_N2 0x515a
/* Radeon RV250 (9000) */
#define PCI_DEVICE_ID_ATI_RADEON_Id 0x4964
#define PCI_DEVICE_ID_ATI_RADEON_Ie 0x4965
#define PCI_DEVICE_ID_ATI_RADEON_If 0x4966
#define PCI_DEVICE_ID_ATI_RADEON_Ig 0x4967
/* Radeon RV280 (9200) */
-#define PCI_DEVICE_ID_ATI_RADEON_Y_ 0x5960
#define PCI_DEVICE_ID_ATI_RADEON_Ya 0x5961
#define PCI_DEVICE_ID_ATI_RADEON_Yd 0x5964
/* Radeon R300 (9500) */
-#define PCI_DEVICE_ID_ATI_RADEON_AD 0x4144
/* Radeon R300 (9700) */
#define PCI_DEVICE_ID_ATI_RADEON_ND 0x4e44
#define PCI_DEVICE_ID_ATI_RADEON_NE 0x4e45
#define PCI_DEVICE_ID_ATI_RADEON_NF 0x4e46
#define PCI_DEVICE_ID_ATI_RADEON_NG 0x4e47
-#define PCI_DEVICE_ID_ATI_RADEON_AE 0x4145
-#define PCI_DEVICE_ID_ATI_RADEON_AF 0x4146
/* Radeon R350 (9800) */
-#define PCI_DEVICE_ID_ATI_RADEON_NH 0x4e48
-#define PCI_DEVICE_ID_ATI_RADEON_NI 0x4e49
/* Radeon RV350 (9600) */
-#define PCI_DEVICE_ID_ATI_RADEON_AP 0x4150
-#define PCI_DEVICE_ID_ATI_RADEON_AR 0x4152
/* Radeon M6 */
#define PCI_DEVICE_ID_ATI_RADEON_LY 0x4c59
#define PCI_DEVICE_ID_ATI_RADEON_LZ 0x4c5a
@@ -342,10 +329,6 @@
#define PCI_DEVICE_ID_ATI_RADEON_Lf 0x4c66
#define PCI_DEVICE_ID_ATI_RADEON_Lg 0x4c67
/* Radeon */
-#define PCI_DEVICE_ID_ATI_RADEON_RA 0x5144
-#define PCI_DEVICE_ID_ATI_RADEON_RB 0x5145
-#define PCI_DEVICE_ID_ATI_RADEON_RC 0x5146
-#define PCI_DEVICE_ID_ATI_RADEON_RD 0x5147
/* RadeonIGP */
#define PCI_DEVICE_ID_ATI_RS100 0xcab0
#define PCI_DEVICE_ID_ATI_RS200 0xcab2
@@ -446,45 +429,28 @@
#define PCI_DEVICE_ID_CIRRUS_5465 0x00d6
#define PCI_DEVICE_ID_CIRRUS_6729 0x1100
#define PCI_DEVICE_ID_CIRRUS_6832 0x1110
-#define PCI_DEVICE_ID_CIRRUS_7542 0x1200
#define PCI_DEVICE_ID_CIRRUS_7543 0x1202
-#define PCI_DEVICE_ID_CIRRUS_7541 0x1204
#define PCI_DEVICE_ID_CIRRUS_4610 0x6001
#define PCI_DEVICE_ID_CIRRUS_4612 0x6003
#define PCI_DEVICE_ID_CIRRUS_4615 0x6004
-#define PCI_DEVICE_ID_CIRRUS_4281 0x6005
#define PCI_VENDOR_ID_IBM 0x1014
-#define PCI_DEVICE_ID_IBM_FIRE_CORAL 0x000a
#define PCI_DEVICE_ID_IBM_TR 0x0018
-#define PCI_DEVICE_ID_IBM_82G2675 0x001d
-#define PCI_DEVICE_ID_IBM_MCA 0x0020
-#define PCI_DEVICE_ID_IBM_82351 0x0022
-#define PCI_DEVICE_ID_IBM_PYTHON 0x002d
-#define PCI_DEVICE_ID_IBM_SERVERAID 0x002e
#define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e
-#define PCI_DEVICE_ID_IBM_MPIC 0x0046
-#define PCI_DEVICE_ID_IBM_3780IDSP 0x007d
-#define PCI_DEVICE_ID_IBM_CHUKAR 0x0096
#define PCI_DEVICE_ID_IBM_CPC710_PCI64 0x00fc
-#define PCI_DEVICE_ID_IBM_CPC710_PCI32 0x0105
-#define PCI_DEVICE_ID_IBM_405GP 0x0156
#define PCI_DEVICE_ID_IBM_SNIPE 0x0180
-#define PCI_DEVICE_ID_IBM_SERVERAIDI960 0x01bd
#define PCI_DEVICE_ID_IBM_CITRINE 0x028C
#define PCI_DEVICE_ID_IBM_GEMSTONE 0xB166
-#define PCI_DEVICE_ID_IBM_MPIC_2 0xffff
#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_1 0x0031
#define PCI_DEVICE_ID_IBM_ICOM_DEV_ID_2 0x0219
#define PCI_DEVICE_ID_IBM_ICOM_V2_TWO_PORTS_RVX 0x021A
#define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251
#define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252
-#define PCI_VENDOR_ID_COMPEX2 0x101a // pci.ids says "AT&T GIS (NCR)"
+#define PCI_VENDOR_ID_COMPEX2 0x101a /* pci.ids says "AT&T GIS (NCR)" */
#define PCI_DEVICE_ID_COMPEX2_100VG 0x0005
#define PCI_VENDOR_ID_WD 0x101c
-#define PCI_DEVICE_ID_WD_7197 0x3296
#define PCI_DEVICE_ID_WD_90C 0xc24a
#define PCI_VENDOR_ID_AMI 0x101e
@@ -501,33 +467,18 @@
#define PCI_DEVICE_ID_AMD_FE_GATE_7006 0x7006
#define PCI_DEVICE_ID_AMD_FE_GATE_7007 0x7007
#define PCI_DEVICE_ID_AMD_FE_GATE_700C 0x700C
-#define PCI_DEVICE_ID_AMD_FE_GATE_700D 0x700D
#define PCI_DEVICE_ID_AMD_FE_GATE_700E 0x700E
-#define PCI_DEVICE_ID_AMD_FE_GATE_700F 0x700F
-#define PCI_DEVICE_ID_AMD_COBRA_7400 0x7400
#define PCI_DEVICE_ID_AMD_COBRA_7401 0x7401
-#define PCI_DEVICE_ID_AMD_COBRA_7403 0x7403
-#define PCI_DEVICE_ID_AMD_COBRA_7404 0x7404
-#define PCI_DEVICE_ID_AMD_VIPER_7408 0x7408
#define PCI_DEVICE_ID_AMD_VIPER_7409 0x7409
#define PCI_DEVICE_ID_AMD_VIPER_740B 0x740B
-#define PCI_DEVICE_ID_AMD_VIPER_740C 0x740C
#define PCI_DEVICE_ID_AMD_VIPER_7410 0x7410
#define PCI_DEVICE_ID_AMD_VIPER_7411 0x7411
#define PCI_DEVICE_ID_AMD_VIPER_7413 0x7413
-#define PCI_DEVICE_ID_AMD_VIPER_7414 0x7414
-#define PCI_DEVICE_ID_AMD_OPUS_7440 0x7440
-# define PCI_DEVICE_ID_AMD_VIPER_7440 PCI_DEVICE_ID_AMD_OPUS_7440
+#define PCI_DEVICE_ID_AMD_VIPER_7440 0x7440
#define PCI_DEVICE_ID_AMD_OPUS_7441 0x7441
-# define PCI_DEVICE_ID_AMD_VIPER_7441 PCI_DEVICE_ID_AMD_OPUS_7441
#define PCI_DEVICE_ID_AMD_OPUS_7443 0x7443
-# define PCI_DEVICE_ID_AMD_VIPER_7443 PCI_DEVICE_ID_AMD_OPUS_7443
+#define PCI_DEVICE_ID_AMD_VIPER_7443 0x7443
#define PCI_DEVICE_ID_AMD_OPUS_7445 0x7445
-#define PCI_DEVICE_ID_AMD_OPUS_7448 0x7448
-# define PCI_DEVICE_ID_AMD_VIPER_7448 PCI_DEVICE_ID_AMD_OPUS_7448
-#define PCI_DEVICE_ID_AMD_OPUS_7449 0x7449
-# define PCI_DEVICE_ID_AMD_VIPER_7449 PCI_DEVICE_ID_AMD_OPUS_7449
-#define PCI_DEVICE_ID_AMD_8111_LAN 0x7462
#define PCI_DEVICE_ID_AMD_8111_LPC 0x7468
#define PCI_DEVICE_ID_AMD_8111_IDE 0x7469
#define PCI_DEVICE_ID_AMD_8111_SMBUS2 0x746a
@@ -585,7 +536,6 @@
#define PCI_DEVICE_ID_CT_65550 0x00e0
#define PCI_DEVICE_ID_CT_65554 0x00e4
#define PCI_DEVICE_ID_CT_65555 0x00e5
-#define PCI_DEVICE_ID_CT_69000 0x00c0
#define PCI_VENDOR_ID_MIRO 0x1031
#define PCI_DEVICE_ID_MIRO_36050 0x5601
@@ -639,7 +589,6 @@
#define PCI_DEVICE_ID_SI_550 0x0550
#define PCI_DEVICE_ID_SI_540_VGA 0x5300
#define PCI_DEVICE_ID_SI_550_VGA 0x5315
-#define PCI_DEVICE_ID_SI_601 0x0601
#define PCI_DEVICE_ID_SI_620 0x0620
#define PCI_DEVICE_ID_SI_630 0x0630
#define PCI_DEVICE_ID_SI_633 0x0633
@@ -650,30 +599,22 @@
#define PCI_DEVICE_ID_SI_648 0x0648
#define PCI_DEVICE_ID_SI_650 0x0650
#define PCI_DEVICE_ID_SI_651 0x0651
-#define PCI_DEVICE_ID_SI_652 0x0652
#define PCI_DEVICE_ID_SI_655 0x0655
#define PCI_DEVICE_ID_SI_661 0x0661
#define PCI_DEVICE_ID_SI_730 0x0730
#define PCI_DEVICE_ID_SI_733 0x0733
#define PCI_DEVICE_ID_SI_630_VGA 0x6300
-#define PCI_DEVICE_ID_SI_730_VGA 0x7300
#define PCI_DEVICE_ID_SI_735 0x0735
#define PCI_DEVICE_ID_SI_740 0x0740
#define PCI_DEVICE_ID_SI_741 0x0741
#define PCI_DEVICE_ID_SI_745 0x0745
#define PCI_DEVICE_ID_SI_746 0x0746
-#define PCI_DEVICE_ID_SI_748 0x0748
-#define PCI_DEVICE_ID_SI_750 0x0750
-#define PCI_DEVICE_ID_SI_751 0x0751
-#define PCI_DEVICE_ID_SI_752 0x0752
#define PCI_DEVICE_ID_SI_755 0x0755
#define PCI_DEVICE_ID_SI_760 0x0760
#define PCI_DEVICE_ID_SI_900 0x0900
#define PCI_DEVICE_ID_SI_961 0x0961
#define PCI_DEVICE_ID_SI_962 0x0962
#define PCI_DEVICE_ID_SI_963 0x0963
-#define PCI_DEVICE_ID_SI_5107 0x5107
-#define PCI_DEVICE_ID_SI_5300 0x5300
#define PCI_DEVICE_ID_SI_5511 0x5511
#define PCI_DEVICE_ID_SI_5513 0x5513
#define PCI_DEVICE_ID_SI_5518 0x5518
@@ -685,10 +626,6 @@
#define PCI_DEVICE_ID_SI_5597 0x5597
#define PCI_DEVICE_ID_SI_5598 0x5598
#define PCI_DEVICE_ID_SI_5600 0x5600
-#define PCI_DEVICE_ID_SI_6300 0x6300
-#define PCI_DEVICE_ID_SI_6306 0x6306
-#define PCI_DEVICE_ID_SI_6326 0x6326
-#define PCI_DEVICE_ID_SI_7001 0x7001
#define PCI_DEVICE_ID_SI_7012 0x7012
#define PCI_DEVICE_ID_SI_7013 0x7013
#define PCI_DEVICE_ID_SI_7016 0x7016
@@ -709,14 +646,11 @@
#define PCI_DEVICE_ID_HP_DIVA_TOSCA1 0x1049
#define PCI_DEVICE_ID_HP_DIVA_TOSCA2 0x104A
#define PCI_DEVICE_ID_HP_DIVA_MAESTRO 0x104B
-#define PCI_DEVICE_ID_HP_PCI_LBA 0x1054
-#define PCI_DEVICE_ID_HP_REO_SBA 0x10f0
#define PCI_DEVICE_ID_HP_REO_IOC 0x10f1
#define PCI_DEVICE_ID_HP_VISUALIZE_FXE 0x108b
#define PCI_DEVICE_ID_HP_DIVA_HALFDOME 0x1223
#define PCI_DEVICE_ID_HP_DIVA_KEYSTONE 0x1226
#define PCI_DEVICE_ID_HP_DIVA_POWERBAR 0x1227
-#define PCI_DEVICE_ID_HP_ZX1_SBA 0x1229
#define PCI_DEVICE_ID_HP_ZX1_IOC 0x122a
#define PCI_DEVICE_ID_HP_PCIX_LBA 0x122e
#define PCI_DEVICE_ID_HP_SX1000_IOC 0x127c
@@ -724,9 +658,7 @@
#define PCI_DEVICE_ID_HP_DIVA_AUX 0x1290
#define PCI_DEVICE_ID_HP_DIVA_RMP3 0x1301
#define PCI_DEVICE_ID_HP_DIVA_HURRICANE 0x132a
-#define PCI_DEVICE_ID_HP_CISS 0x3210
#define PCI_DEVICE_ID_HP_CISSA 0x3220
-#define PCI_DEVICE_ID_HP_CISSB 0x3222
#define PCI_DEVICE_ID_HP_CISSC 0x3230
#define PCI_DEVICE_ID_HP_CISSD 0x3238
#define PCI_DEVICE_ID_HP_ZX2_IOC 0x4031
@@ -734,8 +666,6 @@
#define PCI_VENDOR_ID_PCTECH 0x1042
#define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000
#define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001
-#define PCI_DEVICE_ID_PCTECH_SAMURAI_0 0x3000
-#define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010
#define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
#define PCI_VENDOR_ID_ASUSTEK 0x1043
@@ -745,24 +675,15 @@
#define PCI_DEVICE_ID_DPT 0xa400
#define PCI_VENDOR_ID_OPTI 0x1045
-#define PCI_DEVICE_ID_OPTI_92C178 0xc178
-#define PCI_DEVICE_ID_OPTI_82C557 0xc557
#define PCI_DEVICE_ID_OPTI_82C558 0xc558
#define PCI_DEVICE_ID_OPTI_82C621 0xc621
#define PCI_DEVICE_ID_OPTI_82C700 0xc700
-#define PCI_DEVICE_ID_OPTI_82C701 0xc701
-#define PCI_DEVICE_ID_OPTI_82C814 0xc814
-#define PCI_DEVICE_ID_OPTI_82C822 0xc822
-#define PCI_DEVICE_ID_OPTI_82C861 0xc861
#define PCI_DEVICE_ID_OPTI_82C825 0xd568
#define PCI_VENDOR_ID_ELSA 0x1048
#define PCI_DEVICE_ID_ELSA_MICROLINK 0x1000
#define PCI_DEVICE_ID_ELSA_QS3000 0x3000
-#define PCI_VENDOR_ID_SGS 0x104a
-#define PCI_DEVICE_ID_SGS_2000 0x0008
-#define PCI_DEVICE_ID_SGS_1764 0x0009
#define PCI_VENDOR_ID_BUSLOGIC 0x104B
#define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
@@ -770,7 +691,6 @@
#define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130
#define PCI_VENDOR_ID_TI 0x104c
-#define PCI_DEVICE_ID_TI_TVP4010 0x3d04
#define PCI_DEVICE_ID_TI_TVP4020 0x3d07
#define PCI_DEVICE_ID_TI_4450 0x8011
#define PCI_DEVICE_ID_TI_XX21_XX11 0x8031
@@ -804,14 +724,10 @@
#define PCI_DEVICE_ID_TI_X420 0xac8e
#define PCI_VENDOR_ID_SONY 0x104d
-#define PCI_DEVICE_ID_SONY_CXD3222 0x8039
-#define PCI_VENDOR_ID_OAK 0x104e
-#define PCI_DEVICE_ID_OAK_OTI107 0x0107
/* Winbond have two vendor IDs! See 0x10ad as well */
#define PCI_VENDOR_ID_WINBOND2 0x1050
-#define PCI_DEVICE_ID_WINBOND2_89C940 0x0940
#define PCI_DEVICE_ID_WINBOND2_89C940F 0x5a5a
#define PCI_DEVICE_ID_WINBOND2_6692 0x6692
@@ -820,19 +736,15 @@
#define PCI_VENDOR_ID_EFAR 0x1055
#define PCI_DEVICE_ID_EFAR_SLC90E66_1 0x9130
-#define PCI_DEVICE_ID_EFAR_SLC90E66_0 0x9460
-#define PCI_DEVICE_ID_EFAR_SLC90E66_2 0x9462
#define PCI_DEVICE_ID_EFAR_SLC90E66_3 0x9463
#define PCI_VENDOR_ID_MOTOROLA 0x1057
-#define PCI_VENDOR_ID_MOTOROLA_OOPS 0x1507
#define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001
#define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002
#define PCI_DEVICE_ID_MOTOROLA_MPC107 0x0004
#define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801
#define PCI_DEVICE_ID_MOTOROLA_FALCON 0x4802
#define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803
-#define PCI_DEVICE_ID_MOTOROLA_CPX8216 0x4806
#define PCI_DEVICE_ID_MOTOROLA_HARRIER 0x480b
#define PCI_DEVICE_ID_MOTOROLA_MPC5200 0x5803
@@ -843,33 +755,19 @@
#define PCI_DEVICE_ID_PROMISE_20262 0x4d38
#define PCI_DEVICE_ID_PROMISE_20263 0x0D38
#define PCI_DEVICE_ID_PROMISE_20268 0x4d68
-#define PCI_DEVICE_ID_PROMISE_20268R 0x6268
#define PCI_DEVICE_ID_PROMISE_20269 0x4d69
#define PCI_DEVICE_ID_PROMISE_20270 0x6268
#define PCI_DEVICE_ID_PROMISE_20271 0x6269
#define PCI_DEVICE_ID_PROMISE_20275 0x1275
#define PCI_DEVICE_ID_PROMISE_20276 0x5275
#define PCI_DEVICE_ID_PROMISE_20277 0x7275
-#define PCI_DEVICE_ID_PROMISE_5300 0x5300
-#define PCI_VENDOR_ID_N9 0x105d
-#define PCI_DEVICE_ID_N9_I128 0x2309
-#define PCI_DEVICE_ID_N9_I128_2 0x2339
-#define PCI_DEVICE_ID_N9_I128_T2R 0x493d
#define PCI_VENDOR_ID_UMC 0x1060
#define PCI_DEVICE_ID_UMC_UM8673F 0x0101
-#define PCI_DEVICE_ID_UMC_UM8891A 0x0891
#define PCI_DEVICE_ID_UMC_UM8886BF 0x673a
#define PCI_DEVICE_ID_UMC_UM8886A 0x886a
-#define PCI_DEVICE_ID_UMC_UM8881F 0x8881
-#define PCI_DEVICE_ID_UMC_UM8886F 0x8886
-#define PCI_DEVICE_ID_UMC_UM9017F 0x9017
-#define PCI_DEVICE_ID_UMC_UM8886N 0xe886
-#define PCI_DEVICE_ID_UMC_UM8891N 0xe891
-#define PCI_VENDOR_ID_X 0x1061
-#define PCI_DEVICE_ID_X_AGX016 0x0001
#define PCI_VENDOR_ID_MYLEX 0x1069
#define PCI_DEVICE_ID_MYLEX_DAC960_P 0x0001
@@ -880,37 +778,26 @@
#define PCI_DEVICE_ID_MYLEX_DAC960_BA 0xBA56
#define PCI_DEVICE_ID_MYLEX_DAC960_GEM 0xB166
-#define PCI_VENDOR_ID_PICOP 0x1066
-#define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001
-#define PCI_DEVICE_ID_PICOP_PT80C524 0x8002
#define PCI_VENDOR_ID_APPLE 0x106b
#define PCI_DEVICE_ID_APPLE_BANDIT 0x0001
-#define PCI_DEVICE_ID_APPLE_GC 0x0002
#define PCI_DEVICE_ID_APPLE_HYDRA 0x000e
#define PCI_DEVICE_ID_APPLE_UNI_N_FW 0x0018
-#define PCI_DEVICE_ID_APPLE_KL_USB 0x0019
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP 0x0020
#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC 0x0021
-#define PCI_DEVICE_ID_APPLE_KEYLARGO 0x0022
#define PCI_DEVICE_ID_APPLE_UNI_N_GMACP 0x0024
-#define PCI_DEVICE_ID_APPLE_KEYLARGO_P 0x0025
-#define PCI_DEVICE_ID_APPLE_KL_USB_P 0x0026
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP_P 0x0027
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP15 0x002d
#define PCI_DEVICE_ID_APPLE_UNI_N_PCI15 0x002e
-#define PCI_DEVICE_ID_APPLE_UNI_N_FW2 0x0030
#define PCI_DEVICE_ID_APPLE_UNI_N_GMAC2 0x0032
#define PCI_DEVICE_ID_APPLE_UNI_N_ATA 0x0033
#define PCI_DEVICE_ID_APPLE_UNI_N_AGP2 0x0034
#define PCI_DEVICE_ID_APPLE_IPID_ATA100 0x003b
-#define PCI_DEVICE_ID_APPLE_KEYLARGO_I 0x003e
#define PCI_DEVICE_ID_APPLE_K2_ATA100 0x0043
#define PCI_DEVICE_ID_APPLE_U3_AGP 0x004b
#define PCI_DEVICE_ID_APPLE_K2_GMAC 0x004c
#define PCI_DEVICE_ID_APPLE_SH_ATA 0x0050
#define PCI_DEVICE_ID_APPLE_SH_SUNGEM 0x0051
-#define PCI_DEVICE_ID_APPLE_SH_FW 0x0052
#define PCI_DEVICE_ID_APPLE_U3L_AGP 0x0058
#define PCI_DEVICE_ID_APPLE_U3H_AGP 0x0059
#define PCI_DEVICE_ID_APPLE_TIGON3 0x1645
@@ -923,12 +810,9 @@
#define PCI_DEVICE_ID_YAMAHA_744 0x0010
#define PCI_DEVICE_ID_YAMAHA_754 0x0012
-#define PCI_VENDOR_ID_NEXGEN 0x1074
-#define PCI_DEVICE_ID_NEXGEN_82C501 0x4e78
#define PCI_VENDOR_ID_QLOGIC 0x1077
#define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020
-#define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022
#define PCI_DEVICE_ID_QLOGIC_ISP2100 0x2100
#define PCI_DEVICE_ID_QLOGIC_ISP2200 0x2200
#define PCI_DEVICE_ID_QLOGIC_ISP2300 0x2300
@@ -946,32 +830,20 @@
#define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001
#define PCI_DEVICE_ID_CYRIX_5520 0x0002
#define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100
-#define PCI_DEVICE_ID_CYRIX_5530_SMI 0x0101
#define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102
#define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103
#define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104
-#define PCI_VENDOR_ID_LEADTEK 0x107d
-#define PCI_DEVICE_ID_LEADTEK_805 0x0000
-#define PCI_VENDOR_ID_INTERPHASE 0x107e
-#define PCI_DEVICE_ID_INTERPHASE_5526 0x0004
-#define PCI_DEVICE_ID_INTERPHASE_55x6 0x0005
-#define PCI_DEVICE_ID_INTERPHASE_5575 0x0008
#define PCI_VENDOR_ID_CONTAQ 0x1080
-#define PCI_DEVICE_ID_CONTAQ_82C599 0x0600
#define PCI_DEVICE_ID_CONTAQ_82C693 0xc693
-#define PCI_VENDOR_ID_FOREX 0x1083
#define PCI_VENDOR_ID_OLICOM 0x108d
-#define PCI_DEVICE_ID_OLICOM_OC3136 0x0001
-#define PCI_DEVICE_ID_OLICOM_OC2315 0x0011
#define PCI_DEVICE_ID_OLICOM_OC2325 0x0012
#define PCI_DEVICE_ID_OLICOM_OC2183 0x0013
#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014
-#define PCI_DEVICE_ID_OLICOM_OC6151 0x0021
#define PCI_VENDOR_ID_SUN 0x108e
#define PCI_DEVICE_ID_SUN_EBUS 0x1000
@@ -990,49 +862,31 @@
#define PCI_DEVICE_ID_SUN_CASSINI 0xabba
#define PCI_VENDOR_ID_CMD 0x1095
-#define PCI_DEVICE_ID_CMD_640 0x0640
#define PCI_DEVICE_ID_CMD_643 0x0643
#define PCI_DEVICE_ID_CMD_646 0x0646
-#define PCI_DEVICE_ID_CMD_647 0x0647
#define PCI_DEVICE_ID_CMD_648 0x0648
#define PCI_DEVICE_ID_CMD_649 0x0649
-#define PCI_DEVICE_ID_CMD_670 0x0670
-#define PCI_DEVICE_ID_CMD_680 0x0680
#define PCI_DEVICE_ID_SII_680 0x0680
#define PCI_DEVICE_ID_SII_3112 0x3112
#define PCI_DEVICE_ID_SII_1210SA 0x0240
-#define PCI_VENDOR_ID_VISION 0x1098
-#define PCI_DEVICE_ID_VISION_QD8500 0x0001
-#define PCI_DEVICE_ID_VISION_QD8580 0x0002
#define PCI_VENDOR_ID_BROOKTREE 0x109e
-#define PCI_DEVICE_ID_BROOKTREE_848 0x0350
-#define PCI_DEVICE_ID_BROOKTREE_849A 0x0351
-#define PCI_DEVICE_ID_BROOKTREE_878_1 0x036e
#define PCI_DEVICE_ID_BROOKTREE_878 0x0878
#define PCI_DEVICE_ID_BROOKTREE_879 0x0879
-#define PCI_DEVICE_ID_BROOKTREE_8474 0x8474
-#define PCI_VENDOR_ID_SIERRA 0x10a8
-#define PCI_DEVICE_ID_SIERRA_STB 0x0000
#define PCI_VENDOR_ID_SGI 0x10a9
#define PCI_DEVICE_ID_SGI_IOC3 0x0003
#define PCI_DEVICE_ID_SGI_IOC4 0x100a
#define PCI_VENDOR_ID_SGI_LITHIUM 0x1002
-#define PCI_VENDOR_ID_ACC 0x10aa
-#define PCI_DEVICE_ID_ACC_2056 0x0000
#define PCI_VENDOR_ID_WINBOND 0x10ad
-#define PCI_DEVICE_ID_WINBOND_83769 0x0001
#define PCI_DEVICE_ID_WINBOND_82C105 0x0105
#define PCI_DEVICE_ID_WINBOND_83C553 0x0565
-#define PCI_VENDOR_ID_DATABOOK 0x10b3
-#define PCI_DEVICE_ID_DATABOOK_87144 0xb106
#define PCI_VENDOR_ID_PLX 0x10b5
#define PCI_DEVICE_ID_PLX_R685 0x1030
@@ -1043,33 +897,19 @@
#define PCI_DEVICE_ID_PLX_DJINN_ITOO 0x1151
#define PCI_DEVICE_ID_PLX_R753 0x1152
#define PCI_DEVICE_ID_PLX_OLITEC 0x1187
-#define PCI_DEVICE_ID_PLX_9030 0x9030
#define PCI_DEVICE_ID_PLX_9050 0x9050
-#define PCI_DEVICE_ID_PLX_9060 0x9060
-#define PCI_DEVICE_ID_PLX_9060ES 0x906E
-#define PCI_DEVICE_ID_PLX_9060SD 0x906D
#define PCI_DEVICE_ID_PLX_9080 0x9080
#define PCI_DEVICE_ID_PLX_GTEK_SERIAL2 0xa001
#define PCI_VENDOR_ID_MADGE 0x10b6
#define PCI_DEVICE_ID_MADGE_MK2 0x0002
-#define PCI_DEVICE_ID_MADGE_C155S 0x1001
#define PCI_VENDOR_ID_3COM 0x10b7
#define PCI_DEVICE_ID_3COM_3C985 0x0001
#define PCI_DEVICE_ID_3COM_3C940 0x1700
#define PCI_DEVICE_ID_3COM_3C339 0x3390
#define PCI_DEVICE_ID_3COM_3C359 0x3590
-#define PCI_DEVICE_ID_3COM_3C590 0x5900
-#define PCI_DEVICE_ID_3COM_3C595TX 0x5950
-#define PCI_DEVICE_ID_3COM_3C595T4 0x5951
-#define PCI_DEVICE_ID_3COM_3C595MII 0x5952
#define PCI_DEVICE_ID_3COM_3C940B 0x80eb
-#define PCI_DEVICE_ID_3COM_3C900TPO 0x9000
-#define PCI_DEVICE_ID_3COM_3C900COMBO 0x9001
-#define PCI_DEVICE_ID_3COM_3C905TX 0x9050
-#define PCI_DEVICE_ID_3COM_3C905T4 0x9051
-#define PCI_DEVICE_ID_3COM_3C905B_TX 0x9055
#define PCI_DEVICE_ID_3COM_3CR990 0x9900
#define PCI_DEVICE_ID_3COM_3CR990_TX_95 0x9902
#define PCI_DEVICE_ID_3COM_3CR990_TX_97 0x9903
@@ -1079,24 +919,11 @@
#define PCI_DEVICE_ID_3COM_3CR990SVR97 0x9909
#define PCI_DEVICE_ID_3COM_3CR990SVR 0x990a
-#define PCI_VENDOR_ID_SMC 0x10b8
-#define PCI_DEVICE_ID_SMC_EPIC100 0x0005
#define PCI_VENDOR_ID_AL 0x10b9
-#define PCI_DEVICE_ID_AL_M1445 0x1445
-#define PCI_DEVICE_ID_AL_M1449 0x1449
-#define PCI_DEVICE_ID_AL_M1451 0x1451
-#define PCI_DEVICE_ID_AL_M1461 0x1461
-#define PCI_DEVICE_ID_AL_M1489 0x1489
-#define PCI_DEVICE_ID_AL_M1511 0x1511
-#define PCI_DEVICE_ID_AL_M1513 0x1513
-#define PCI_DEVICE_ID_AL_M1521 0x1521
-#define PCI_DEVICE_ID_AL_M1523 0x1523
-#define PCI_DEVICE_ID_AL_M1531 0x1531
#define PCI_DEVICE_ID_AL_M1533 0x1533
#define PCI_DEVICE_ID_AL_M1535 0x1535
#define PCI_DEVICE_ID_AL_M1541 0x1541
-#define PCI_DEVICE_ID_AL_M1543 0x1543
#define PCI_DEVICE_ID_AL_M1563 0x1563
#define PCI_DEVICE_ID_AL_M1621 0x1621
#define PCI_DEVICE_ID_AL_M1631 0x1631
@@ -1109,49 +936,23 @@
#define PCI_DEVICE_ID_AL_M1681 0x1681
#define PCI_DEVICE_ID_AL_M1683 0x1683
#define PCI_DEVICE_ID_AL_M1689 0x1689
-#define PCI_DEVICE_ID_AL_M3307 0x3307
-#define PCI_DEVICE_ID_AL_M4803 0x5215
#define PCI_DEVICE_ID_AL_M5219 0x5219
#define PCI_DEVICE_ID_AL_M5228 0x5228
#define PCI_DEVICE_ID_AL_M5229 0x5229
-#define PCI_DEVICE_ID_AL_M5237 0x5237
-#define PCI_DEVICE_ID_AL_M5243 0x5243
#define PCI_DEVICE_ID_AL_M5451 0x5451
#define PCI_DEVICE_ID_AL_M7101 0x7101
-#define PCI_VENDOR_ID_MITSUBISHI 0x10ba
-#define PCI_VENDOR_ID_SURECOM 0x10bd
-#define PCI_DEVICE_ID_SURECOM_NE34 0x0e34
#define PCI_VENDOR_ID_NEOMAGIC 0x10c8
-#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001
-#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002
-#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003
-#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004
-#define PCI_DEVICE_ID_NEOMAGIC_MAGICMEDIA_256AV 0x0005
-#define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZVPLUS 0x0083
#define PCI_DEVICE_ID_NEOMAGIC_NM256AV_AUDIO 0x8005
#define PCI_DEVICE_ID_NEOMAGIC_NM256ZX_AUDIO 0x8006
#define PCI_DEVICE_ID_NEOMAGIC_NM256XL_PLUS_AUDIO 0x8016
-#define PCI_VENDOR_ID_ASP 0x10cd
-#define PCI_DEVICE_ID_ASP_ABP940 0x1200
-#define PCI_DEVICE_ID_ASP_ABP940U 0x1300
-#define PCI_DEVICE_ID_ASP_ABP940UW 0x2300
-
-#define PCI_VENDOR_ID_MACRONIX 0x10d9
-#define PCI_DEVICE_ID_MACRONIX_MX98713 0x0512
-#define PCI_DEVICE_ID_MACRONIX_MX987x5 0x0531
#define PCI_VENDOR_ID_TCONRAD 0x10da
#define PCI_DEVICE_ID_TCONRAD_TOKENRING 0x0508
-#define PCI_VENDOR_ID_CERN 0x10dc
-#define PCI_DEVICE_ID_CERN_SPSB_PMC 0x0001
-#define PCI_DEVICE_ID_CERN_SPSB_PCI 0x0002
-#define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021
-#define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022
#define PCI_VENDOR_ID_NVIDIA 0x10de
#define PCI_DEVICE_ID_NVIDIA_TNT 0x0020
@@ -1197,7 +998,6 @@
#define PCI_DEVICE_ID_QUADRO_FX_GO1400 0x00cc
#define PCI_DEVICE_ID_QUADRO_FX_1400 0x00ce
#define PCI_DEVICE_ID_NVIDIA_NFORCE3 0x00d1
-#define PCI_DEVICE_ID_NVIDIA_MCP3_AUDIO 0x00da
#define PCI_DEVICE_ID_NVIDIA_NFORCE3_SMBUS 0x00d4
#define PCI_DEVICE_ID_NVIDIA_NFORCE3_IDE 0x00d5
#define PCI_DEVICE_ID_NVIDIA_NVENET_3 0x00d6
@@ -1284,7 +1084,6 @@
#define PCI_DEVICE_ID_NVIDIA_NFORCE_MCP55_SATA2 0x037F
#define PCI_DEVICE_ID_NVIDIA_NVENET_12 0x0268
#define PCI_DEVICE_ID_NVIDIA_NVENET_13 0x0269
-#define PCI_DEVICE_ID_NVIDIA_MCP51_AUDIO 0x026B
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800 0x0280
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800_8X 0x0281
#define PCI_DEVICE_ID_NVIDIA_GEFORCE4_TI_4800SE 0x0282
@@ -1335,24 +1134,13 @@
#define PCI_DEVICE_ID_NVIDIA_NVENET_15 0x0373
#define PCI_VENDOR_ID_IMS 0x10e0
-#define PCI_DEVICE_ID_IMS_8849 0x8849
#define PCI_DEVICE_ID_IMS_TT128 0x9128
#define PCI_DEVICE_ID_IMS_TT3D 0x9135
-#define PCI_VENDOR_ID_TEKRAM2 0x10e1
-#define PCI_DEVICE_ID_TEKRAM2_690c 0x690c
-#define PCI_VENDOR_ID_TUNDRA 0x10e3
-#define PCI_DEVICE_ID_TUNDRA_CA91C042 0x0000
-#define PCI_VENDOR_ID_AMCC 0x10e8
-#define PCI_DEVICE_ID_AMCC_MYRINET 0x8043
-#define PCI_DEVICE_ID_AMCC_PARASTATION 0x8062
-#define PCI_DEVICE_ID_AMCC_S5933 0x807d
-#define PCI_DEVICE_ID_AMCC_S5933_HEPC3 0x809c
#define PCI_VENDOR_ID_INTERG 0x10ea
-#define PCI_DEVICE_ID_INTERG_1680 0x1680
#define PCI_DEVICE_ID_INTERG_1682 0x1682
#define PCI_DEVICE_ID_INTERG_2000 0x2000
#define PCI_DEVICE_ID_INTERG_2010 0x2010
@@ -1360,32 +1148,23 @@
#define PCI_DEVICE_ID_INTERG_5050 0x5050
#define PCI_VENDOR_ID_REALTEK 0x10ec
-#define PCI_DEVICE_ID_REALTEK_8029 0x8029
-#define PCI_DEVICE_ID_REALTEK_8129 0x8129
#define PCI_DEVICE_ID_REALTEK_8139 0x8139
-#define PCI_DEVICE_ID_REALTEK_8169 0x8169
#define PCI_VENDOR_ID_XILINX 0x10ee
#define PCI_DEVICE_ID_RME_DIGI96 0x3fc0
#define PCI_DEVICE_ID_RME_DIGI96_8 0x3fc1
#define PCI_DEVICE_ID_RME_DIGI96_8_PRO 0x3fc2
#define PCI_DEVICE_ID_RME_DIGI96_8_PAD_OR_PST 0x3fc3
-#define PCI_DEVICE_ID_XILINX_HAMMERFALL 0x3fc4
#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP 0x3fc5
#define PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP_MADI 0x3fc6
-#define PCI_DEVICE_ID_TURBOPAM 0x4020
-#define PCI_VENDOR_ID_TRUEVISION 0x10fa
-#define PCI_DEVICE_ID_TRUEVISION_T1000 0x000c
#define PCI_VENDOR_ID_INIT 0x1101
-#define PCI_DEVICE_ID_INIT_320P 0x9100
-#define PCI_DEVICE_ID_INIT_360P 0x9500
-#define PCI_VENDOR_ID_CREATIVE 0x1102 // duplicate: ECTIVA
+#define PCI_VENDOR_ID_CREATIVE 0x1102 /* duplicate: ECTIVA */
#define PCI_DEVICE_ID_CREATIVE_EMU10K1 0x0002
-#define PCI_VENDOR_ID_ECTIVA 0x1102 // duplicate: CREATIVE
+#define PCI_VENDOR_ID_ECTIVA 0x1102 /* duplicate: CREATIVE */
#define PCI_DEVICE_ID_ECTIVA_EV1938 0x8938
#define PCI_VENDOR_ID_TTI 0x1103
@@ -1395,7 +1174,7 @@
#define PCI_DEVICE_ID_TTI_HPT302 0x0006
#define PCI_DEVICE_ID_TTI_HPT371 0x0007
#define PCI_DEVICE_ID_TTI_HPT374 0x0008
-#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 // apparently a 372N variant?
+#define PCI_DEVICE_ID_TTI_HPT372N 0x0009 /* apparently a 372N variant? */
#define PCI_VENDOR_ID_VIA 0x1106
#define PCI_DEVICE_ID_VIA_8763_0 0x0198
@@ -1408,36 +1187,25 @@
#define PCI_DEVICE_ID_VIA_8363_0 0x0305
#define PCI_DEVICE_ID_VIA_8371_0 0x0391
#define PCI_DEVICE_ID_VIA_8501_0 0x0501
-#define PCI_DEVICE_ID_VIA_82C505 0x0505
#define PCI_DEVICE_ID_VIA_82C561 0x0561
#define PCI_DEVICE_ID_VIA_82C586_1 0x0571
#define PCI_DEVICE_ID_VIA_82C576 0x0576
-#define PCI_DEVICE_ID_VIA_82C585 0x0585
#define PCI_DEVICE_ID_VIA_82C586_0 0x0586
-#define PCI_DEVICE_ID_VIA_82C595 0x0595
#define PCI_DEVICE_ID_VIA_82C596 0x0596
#define PCI_DEVICE_ID_VIA_82C597_0 0x0597
#define PCI_DEVICE_ID_VIA_82C598_0 0x0598
#define PCI_DEVICE_ID_VIA_8601_0 0x0601
#define PCI_DEVICE_ID_VIA_8605_0 0x0605
-#define PCI_DEVICE_ID_VIA_82C680 0x0680
#define PCI_DEVICE_ID_VIA_82C686 0x0686
#define PCI_DEVICE_ID_VIA_82C691_0 0x0691
-#define PCI_DEVICE_ID_VIA_82C693 0x0693
-#define PCI_DEVICE_ID_VIA_82C693_1 0x0698
-#define PCI_DEVICE_ID_VIA_82C926 0x0926
#define PCI_DEVICE_ID_VIA_82C576_1 0x1571
-#define PCI_DEVICE_ID_VIA_82C595_97 0x1595
#define PCI_DEVICE_ID_VIA_82C586_2 0x3038
#define PCI_DEVICE_ID_VIA_82C586_3 0x3040
-#define PCI_DEVICE_ID_VIA_6305 0x3044
#define PCI_DEVICE_ID_VIA_82C596_3 0x3050
#define PCI_DEVICE_ID_VIA_82C596B_3 0x3051
#define PCI_DEVICE_ID_VIA_82C686_4 0x3057
#define PCI_DEVICE_ID_VIA_82C686_5 0x3058
#define PCI_DEVICE_ID_VIA_8233_5 0x3059
-#define PCI_DEVICE_ID_VIA_8233_7 0x3065
-#define PCI_DEVICE_ID_VIA_82C686_6 0x3068
#define PCI_DEVICE_ID_VIA_8233_0 0x3074
#define PCI_DEVICE_ID_VIA_8633_0 0x3091
#define PCI_DEVICE_ID_VIA_8367_0 0x3099
@@ -1455,38 +1223,23 @@
#define PCI_DEVICE_ID_VIA_XN266 0x3156
#define PCI_DEVICE_ID_VIA_8754C_0 0x3168
#define PCI_DEVICE_ID_VIA_8235 0x3177
-#define PCI_DEVICE_ID_VIA_P4N333 0x3178
#define PCI_DEVICE_ID_VIA_8385_0 0x3188
#define PCI_DEVICE_ID_VIA_8377_0 0x3189
#define PCI_DEVICE_ID_VIA_8378_0 0x3205
#define PCI_DEVICE_ID_VIA_8783_0 0x3208
-#define PCI_DEVICE_ID_VIA_P4M400 0x3209
#define PCI_DEVICE_ID_VIA_8237 0x3227
#define PCI_DEVICE_ID_VIA_3296_0 0x0296
-#define PCI_DEVICE_ID_VIA_86C100A 0x6100
#define PCI_DEVICE_ID_VIA_8231 0x8231
#define PCI_DEVICE_ID_VIA_8231_4 0x8235
#define PCI_DEVICE_ID_VIA_8365_1 0x8305
#define PCI_DEVICE_ID_VIA_8371_1 0x8391
-#define PCI_DEVICE_ID_VIA_8501_1 0x8501
-#define PCI_DEVICE_ID_VIA_82C597_1 0x8597
#define PCI_DEVICE_ID_VIA_82C598_1 0x8598
-#define PCI_DEVICE_ID_VIA_8601_1 0x8601
-#define PCI_DEVICE_ID_VIA_8505_1 0x8605
-#define PCI_DEVICE_ID_VIA_8633_1 0xB091
-#define PCI_DEVICE_ID_VIA_8367_1 0xB099
-#define PCI_DEVICE_ID_VIA_P4X266_1 0xB101
-#define PCI_DEVICE_ID_VIA_8615_1 0xB103
-#define PCI_DEVICE_ID_VIA_8361_1 0xB112
-#define PCI_DEVICE_ID_VIA_8235_1 0xB168
#define PCI_DEVICE_ID_VIA_838X_1 0xB188
#define PCI_DEVICE_ID_VIA_83_87XX_1 0xB198
#define PCI_VENDOR_ID_SIEMENS 0x110A
#define PCI_DEVICE_ID_SIEMENS_DSCC4 0x2102
-#define PCI_VENDOR_ID_SMC2 0x1113
-#define PCI_DEVICE_ID_SMC2_1211TX 0x1211
#define PCI_VENDOR_ID_VORTEX 0x1119
#define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000
@@ -1509,18 +1262,6 @@
#define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103
#define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104
#define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105
-#define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110
-#define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111
-#define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112
-#define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113
-#define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114
-#define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115
-#define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120
-#define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121
-#define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122
-#define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123
-#define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124
-#define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125
#define PCI_VENDOR_ID_EF 0x111a
#define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000
@@ -1532,21 +1273,15 @@
#define PCI_DEVICE_ID_IDT_IDT77201 0x0001
#define PCI_VENDOR_ID_FORE 0x1127
-#define PCI_DEVICE_ID_FORE_PCA200PC 0x0210
#define PCI_DEVICE_ID_FORE_PCA200E 0x0300
-#define PCI_VENDOR_ID_IMAGINGTECH 0x112f
-#define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000
#define PCI_VENDOR_ID_PHILIPS 0x1131
-#define PCI_DEVICE_ID_PHILIPS_SAA7145 0x7145
#define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146
#define PCI_DEVICE_ID_PHILIPS_SAA9730 0x9730
#define PCI_VENDOR_ID_EICON 0x1133
-#define PCI_DEVICE_ID_EICON_DIVA20PRO 0xe001
#define PCI_DEVICE_ID_EICON_DIVA20 0xe002
-#define PCI_DEVICE_ID_EICON_DIVA20PRO_U 0xe003
#define PCI_DEVICE_ID_EICON_DIVA20_U 0xe004
#define PCI_DEVICE_ID_EICON_DIVA201 0xe005
#define PCI_DEVICE_ID_EICON_DIVA202 0xe00b
@@ -1558,35 +1293,17 @@
#define PCI_VENDOR_ID_ZIATECH 0x1138
#define PCI_DEVICE_ID_ZIATECH_5550_HC 0x5550
-#define PCI_VENDOR_ID_CYCLONE 0x113c
-#define PCI_DEVICE_ID_CYCLONE_SDK 0x0001
-#define PCI_VENDOR_ID_ALLIANCE 0x1142
-#define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210
-#define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422
-#define PCI_DEVICE_ID_ALLIANCE_AT24 0x6424
-#define PCI_DEVICE_ID_ALLIANCE_AT3D 0x643d
#define PCI_VENDOR_ID_SYSKONNECT 0x1148
-#define PCI_DEVICE_ID_SYSKONNECT_FP 0x4000
#define PCI_DEVICE_ID_SYSKONNECT_TR 0x4200
#define PCI_DEVICE_ID_SYSKONNECT_GE 0x4300
#define PCI_DEVICE_ID_SYSKONNECT_YU 0x4320
#define PCI_DEVICE_ID_SYSKONNECT_9DXX 0x4400
#define PCI_DEVICE_ID_SYSKONNECT_9MXX 0x4500
-#define PCI_VENDOR_ID_VMIC 0x114a
-#define PCI_DEVICE_ID_VMIC_VME 0x7587
#define PCI_VENDOR_ID_DIGI 0x114f
-#define PCI_DEVICE_ID_DIGI_EPC 0x0002
-#define PCI_DEVICE_ID_DIGI_RIGHTSWITCH 0x0003
-#define PCI_DEVICE_ID_DIGI_XEM 0x0004
-#define PCI_DEVICE_ID_DIGI_XR 0x0005
-#define PCI_DEVICE_ID_DIGI_CX 0x0006
-#define PCI_DEVICE_ID_DIGI_XRJ 0x0009
-#define PCI_DEVICE_ID_DIGI_EPCJ 0x000a
-#define PCI_DEVICE_ID_DIGI_XR_920 0x0027
#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_E 0x0070
#define PCI_DEVICE_ID_DIGI_DF_M_E 0x0071
#define PCI_DEVICE_ID_DIGI_DF_M_IOM2_A 0x0072
@@ -1596,23 +1313,15 @@
#define PCI_DEVICE_ID_NEO_2RJ45 0x00CA
#define PCI_DEVICE_ID_NEO_2RJ45PRI 0x00CB
-#define PCI_VENDOR_ID_MUTECH 0x1159
-#define PCI_DEVICE_ID_MUTECH_MV1000 0x0001
#define PCI_VENDOR_ID_XIRCOM 0x115d
-#define PCI_DEVICE_ID_XIRCOM_X3201_ETH 0x0003
#define PCI_DEVICE_ID_XIRCOM_RBM56G 0x0101
#define PCI_DEVICE_ID_XIRCOM_X3201_MDM 0x0103
-#define PCI_VENDOR_ID_RENDITION 0x1163
-#define PCI_DEVICE_ID_RENDITION_VERITE 0x0001
-#define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000
#define PCI_VENDOR_ID_SERVERWORKS 0x1166
#define PCI_DEVICE_ID_SERVERWORKS_HE 0x0008
#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009
-#define PCI_DEVICE_ID_SERVERWORKS_CIOB30 0x0010
-#define PCI_DEVICE_ID_SERVERWORKS_CMIC_HE 0x0011
#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017
#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200
#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201
@@ -1622,13 +1331,7 @@
#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE 0x0213
#define PCI_DEVICE_ID_SERVERWORKS_HT1000IDE 0x0214
#define PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2 0x0217
-#define PCI_DEVICE_ID_SERVERWORKS_OSB4USB 0x0220
-#define PCI_DEVICE_ID_SERVERWORKS_CSB5USB PCI_DEVICE_ID_SERVERWORKS_OSB4USB
-#define PCI_DEVICE_ID_SERVERWORKS_CSB6USB 0x0221
#define PCI_DEVICE_ID_SERVERWORKS_CSB6LPC 0x0227
-#define PCI_DEVICE_ID_SERVERWORKS_GCLE 0x0225
-#define PCI_DEVICE_ID_SERVERWORKS_GCLE2 0x0227
-#define PCI_DEVICE_ID_SERVERWORKS_CSB5ISA 0x0230
#define PCI_VENDOR_ID_SBE 0x1176
#define PCI_DEVICE_ID_SBE_WANXL100 0x0301
@@ -1639,17 +1342,12 @@
#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102
#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103
#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105
-#define PCI_DEVICE_ID_TOSHIBA_601 0x0601
#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a
-#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_A 0x0603
-#define PCI_DEVICE_ID_TOSHIBA_TOPIC95_B 0x060a
#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f
#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617
#define PCI_VENDOR_ID_TOSHIBA_2 0x102f
-#define PCI_DEVICE_ID_TOSHIBA_TX3927 0x000a
#define PCI_DEVICE_ID_TOSHIBA_TC35815CF 0x0030
-#define PCI_DEVICE_ID_TOSHIBA_TX4927 0x0180
#define PCI_DEVICE_ID_TOSHIBA_TC86C001_MISC 0x0108
#define PCI_DEVICE_ID_TOSHIBA_SPIDER_NET 0x01b3
@@ -1664,7 +1362,6 @@
#define PCI_DEVICE_ID_DLINK_DGE510T 0x4c00
#define PCI_VENDOR_ID_ARTOP 0x1191
-#define PCI_DEVICE_ID_ARTOP_ATP8400 0x0004
#define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005
#define PCI_DEVICE_ID_ARTOP_ATP860 0x0006
#define PCI_DEVICE_ID_ARTOP_ATP860R 0x0007
@@ -1677,16 +1374,11 @@
#define PCI_DEVICE_ID_ARTOP_AEC7612D 0x8040
#define PCI_DEVICE_ID_ARTOP_AEC7612SUW 0x8050
#define PCI_DEVICE_ID_ARTOP_8060 0x8060
-#define PCI_DEVICE_ID_ARTOP_AEC67160 0x8080
-#define PCI_DEVICE_ID_ARTOP_AEC67160_2 0x8081
-#define PCI_DEVICE_ID_ARTOP_AEC67162 0x808a
#define PCI_VENDOR_ID_ZEITNET 0x1193
#define PCI_DEVICE_ID_ZEITNET_1221 0x0001
#define PCI_DEVICE_ID_ZEITNET_1225 0x0002
-#define PCI_VENDOR_ID_OMEGA 0x119b
-#define PCI_DEVICE_ID_OMEGA_82C092G 0x1221
#define PCI_VENDOR_ID_FUJITSU_ME 0x119e
#define PCI_DEVICE_ID_FUJITSU_FS155 0x0001
@@ -1696,61 +1388,41 @@
#define PCI_SUBDEVICE_ID_KEYSPAN_SX2 0x5334
#define PCI_VENDOR_ID_MARVELL 0x11ab
-#define PCI_DEVICE_ID_MARVELL_GT64011 0x4146
-#define PCI_DEVICE_ID_MARVELL_GT64111 0x4146
#define PCI_DEVICE_ID_MARVELL_GT64260 0x6430
#define PCI_DEVICE_ID_MARVELL_MV64360 0x6460
#define PCI_DEVICE_ID_MARVELL_MV64460 0x6480
#define PCI_DEVICE_ID_MARVELL_GT96100 0x9652
#define PCI_DEVICE_ID_MARVELL_GT96100A 0x9653
-#define PCI_VENDOR_ID_LITEON 0x11ad
-#define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002
#define PCI_VENDOR_ID_V3 0x11b0
#define PCI_DEVICE_ID_V3_V960 0x0001
-#define PCI_DEVICE_ID_V3_V350 0x0001
-#define PCI_DEVICE_ID_V3_V961 0x0002
#define PCI_DEVICE_ID_V3_V351 0x0002
-#define PCI_VENDOR_ID_NP 0x11bc
-#define PCI_DEVICE_ID_NP_PCI_FDDI 0x0001
#define PCI_VENDOR_ID_ATT 0x11c1
-#define PCI_DEVICE_ID_ATT_L56XMF 0x0440
#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480
-#define PCI_VENDOR_ID_NEC2 0x11c3 /* NEC (2nd) */
#define PCI_VENDOR_ID_SPECIALIX 0x11cb
#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000
-#define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000
#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000
#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004
-#define PCI_VENDOR_ID_AURAVISION 0x11d1
-#define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7
#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4
#define PCI_DEVICE_ID_AD1889JS 0x1889
-#define PCI_VENDOR_ID_IKON 0x11d5
-#define PCI_DEVICE_ID_IKON_10115 0x0115
-#define PCI_DEVICE_ID_IKON_10117 0x0117
-#define PCI_VENDOR_ID_SEGA 0x11db
#define PCI_DEVICE_ID_SEGA_BBA 0x1234
#define PCI_VENDOR_ID_ZORAN 0x11de
#define PCI_DEVICE_ID_ZORAN_36057 0x6057
#define PCI_DEVICE_ID_ZORAN_36120 0x6120
-#define PCI_VENDOR_ID_KINETIC 0x11f4
-#define PCI_DEVICE_ID_KINETIC_2915 0x2915
#define PCI_VENDOR_ID_COMPEX 0x11f6
#define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
-#define PCI_DEVICE_ID_COMPEX_RL2000 0x1401
#define PCI_VENDOR_ID_RP 0x11fe
#define PCI_DEVICE_ID_RP32INTF 0x0001
@@ -1764,7 +1436,6 @@
#define PCI_DEVICE_ID_RP16SNI 0x0009
#define PCI_DEVICE_ID_RPP4 0x000A
#define PCI_DEVICE_ID_RPP8 0x000B
-#define PCI_DEVICE_ID_RP8M 0x000C
#define PCI_DEVICE_ID_RP4M 0x000D
#define PCI_DEVICE_ID_RP2_232 0x000E
#define PCI_DEVICE_ID_RP2_422 0x000F
@@ -1792,10 +1463,6 @@
#define PCI_DEVICE_ID_PC300_TE_M_2 0x0320
#define PCI_DEVICE_ID_PC300_TE_M_1 0x0321
-/* Allied Telesyn */
-#define PCI_VENDOR_ID_AT 0x1259
-#define PCI_SUBDEVICE_ID_AT_2701FX 0x2703
-
#define PCI_VENDOR_ID_ESSENTIAL 0x120f
#define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001
@@ -1812,10 +1479,7 @@
#define PCI_DEVICE_ID_3DFX_VOODOO3 0x0005
#define PCI_DEVICE_ID_3DFX_VOODOO5 0x0009
-#define PCI_VENDOR_ID_SIGMADES 0x1236
-#define PCI_DEVICE_ID_SIGMADES_6425 0x6401
-#define PCI_VENDOR_ID_CCUBE 0x123f
#define PCI_VENDOR_ID_AVM 0x1244
#define PCI_DEVICE_ID_AVM_B1 0x0700
@@ -1825,19 +1489,8 @@
#define PCI_DEVICE_ID_AVM_C2 0x1100
#define PCI_DEVICE_ID_AVM_T1 0x1200
-#define PCI_VENDOR_ID_DIPIX 0x1246
#define PCI_VENDOR_ID_STALLION 0x124d
-#define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000
-#define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002
-#define PCI_DEVICE_ID_STALLION_EIOPCI 0x0003
-
-#define PCI_VENDOR_ID_OPTIBASE 0x1255
-#define PCI_DEVICE_ID_OPTIBASE_FORGE 0x1110
-#define PCI_DEVICE_ID_OPTIBASE_FUSION 0x1210
-#define PCI_DEVICE_ID_OPTIBASE_VPLEX 0x2110
-#define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120
-#define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130
/* Allied Telesyn */
#define PCI_VENDOR_ID_AT 0x1259
@@ -1846,7 +1499,6 @@
#define PCI_VENDOR_ID_ESS 0x125d
#define PCI_DEVICE_ID_ESS_ESS1968 0x1968
-#define PCI_DEVICE_ID_ESS_AUDIOPCI 0x1969
#define PCI_DEVICE_ID_ESS_ESS1978 0x1978
#define PCI_DEVICE_ID_ESS_ALLEGRO_1 0x1988
#define PCI_DEVICE_ID_ESS_ALLEGRO 0x1989
@@ -1859,11 +1511,7 @@
#define PCI_VENDOR_ID_SATSAGEM 0x1267
#define PCI_DEVICE_ID_SATSAGEM_NICCY 0x1016
-#define PCI_DEVICE_ID_SATSAGEM_PCR2101 0x5352
-#define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
-#define PCI_VENDOR_ID_HUGHES 0x1273
-#define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002
#define PCI_VENDOR_ID_ENSONIQ 0x1274
#define PCI_DEVICE_ID_ENSONIQ_CT5880 0x5880
@@ -1884,13 +1532,10 @@
#define PCI_DEVICE_ID_ITE_IT8330G_0 0xe886
/* formerly Platform Tech */
-#define PCI_VENDOR_ID_ESS_OLD 0x1285
#define PCI_DEVICE_ID_ESS_ESS0100 0x0100
#define PCI_VENDOR_ID_ALTEON 0x12ae
-#define PCI_DEVICE_ID_ALTEON_ACENIC 0x0001
-#define PCI_VENDOR_ID_USR 0x12B9
#define PCI_SUBVENDOR_ID_CONNECT_TECH 0x12c4
#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH8_232 0x0001
@@ -1905,8 +1550,6 @@
#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH081101V1 0x000A
#define PCI_SUBDEVICE_ID_CONNECT_TECH_BH041101V1 0x000B
-#define PCI_VENDOR_ID_PICTUREL 0x12c5
-#define PCI_DEVICE_ID_PICTUREL_PCIVST 0x0081
#define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2
#define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
@@ -1928,8 +1571,6 @@
#define PCI_VENDOR_ID_ELECTRONICDESIGNGMBH 0x12f8
#define PCI_DEVICE_ID_LML_33R10 0x8a02
-#define PCI_VENDOR_ID_CBOARDS 0x1307
-#define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
#define PCI_VENDOR_ID_SIIG 0x131f
#define PCI_SUBVENDOR_ID_SIIG 0x131f
@@ -1973,7 +1614,6 @@
#define PCI_SUBDEVICE_ID_SIIG_QUARTET_SERIAL 0x2050
#define PCI_VENDOR_ID_RADISYS 0x1331
-#define PCI_DEVICE_ID_RADISYS_ENP2611 0x0030
#define PCI_VENDOR_ID_DOMEX 0x134a
#define PCI_DEVICE_ID_DOMEX_DMX3191D 0x0001
@@ -1981,8 +1621,6 @@
#define PCI_VENDOR_ID_QUATECH 0x135C
#define PCI_DEVICE_ID_QUATECH_QSC100 0x0010
#define PCI_DEVICE_ID_QUATECH_DSC100 0x0020
-#define PCI_DEVICE_ID_QUATECH_DSC200 0x0030
-#define PCI_DEVICE_ID_QUATECH_QSC200 0x0040
#define PCI_DEVICE_ID_QUATECH_ESC100D 0x0050
#define PCI_DEVICE_ID_QUATECH_ESC100M 0x0060
@@ -2001,7 +1639,6 @@
#define PCI_SUBDEVICE_ID_HYPERCOPE_ERGO 0x0106
#define PCI_SUBDEVICE_ID_HYPERCOPE_METRO 0x0107
#define PCI_SUBDEVICE_ID_HYPERCOPE_CHAMP2 0x0108
-#define PCI_SUBDEVICE_ID_HYPERCOPE_PLEXUS 0x0109
#define PCI_VENDOR_ID_KAWASAKI 0x136b
#define PCI_DEVICE_ID_MCHIP_KL5A72002 0xff01
@@ -2015,12 +1652,9 @@
#define PCI_DEVICE_ID_LMC_SSI 0x0005
#define PCI_DEVICE_ID_LMC_T1 0x0006
-#define PCI_VENDOR_ID_MARIAN 0x1382
-#define PCI_DEVICE_ID_MARIAN_PRODIF_PLUS 0x2048
#define PCI_VENDOR_ID_NETGEAR 0x1385
#define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
-#define PCI_DEVICE_ID_NETGEAR_GA622 0x622a
#define PCI_VENDOR_ID_APPLICOM 0x1389
#define PCI_DEVICE_ID_APPLICOM_PCIGENERIC 0x0001
@@ -2043,9 +1677,6 @@
#define PCI_DEVICE_ID_MOXA_CP134U 0x1340
#define PCI_DEVICE_ID_MOXA_C168 0x1680
#define PCI_DEVICE_ID_MOXA_CP168U 0x1681
-#define PCI_DEVICE_ID_MOXA_CP204J 0x2040
-#define PCI_DEVICE_ID_MOXA_C218 0x2180
-#define PCI_DEVICE_ID_MOXA_C320 0x3200
#define PCI_VENDOR_ID_CCD 0x1397
#define PCI_DEVICE_ID_CCD_2BD0 0x2bd0
@@ -2066,9 +1697,7 @@
#define PCI_VENDOR_ID_MICROGATE 0x13c0
#define PCI_DEVICE_ID_MICROGATE_USC 0x0010
-#define PCI_DEVICE_ID_MICROGATE_SCC 0x0020
#define PCI_DEVICE_ID_MICROGATE_SCA 0x0030
-#define PCI_DEVICE_ID_MICROGATE_USC2 0x0210
#define PCI_VENDOR_ID_3WARE 0x13C1
#define PCI_DEVICE_ID_3WARE_1000 0x1000
@@ -2119,10 +1748,6 @@
#define PCI_VENDOR_ID_SAMSUNG 0x144d
-#define PCI_VENDOR_ID_AIRONET 0x14b9
-#define PCI_DEVICE_ID_AIRONET_4800_1 0x0001
-#define PCI_DEVICE_ID_AIRONET_4800 0x4500 // values switched? see
-#define PCI_DEVICE_ID_AIRONET_4500 0x4800 // drivers/net/aironet4500_card.c
#define PCI_VENDOR_ID_TITAN 0x14D2
#define PCI_DEVICE_ID_TITAN_010L 0x8001
@@ -2141,8 +1766,6 @@
#define PCI_DEVICE_ID_PANACOM_QUADMODEM 0x0400
#define PCI_DEVICE_ID_PANACOM_DUALMODEM 0x0402
-#define PCI_VENDOR_ID_SIPACKETS 0x14d9
-#define PCI_DEVICE_ID_SP_HT 0x0010
#define PCI_VENDOR_ID_AFAVLAB 0x14db
#define PCI_DEVICE_ID_AFAVLAB_P028 0x2180
@@ -2209,8 +1832,6 @@
#define PCI_VENDOR_ID_CHELSIO 0x1425
-#define PCI_VENDOR_ID_MIPS 0x153f
-#define PCI_DEVICE_ID_SOC_IT 0x0001
#define PCI_VENDOR_ID_SYBA 0x1592
#define PCI_DEVICE_ID_SYBA_2P_EPP 0x0782
@@ -2230,15 +1851,7 @@
#define PCI_DEVICE_ID_MELLANOX_SINAI 0x6274
#define PCI_VENDOR_ID_PDC 0x15e9
-#define PCI_DEVICE_ID_PDC_1841 0x1841
-#define PCI_VENDOR_ID_MACROLINK 0x15ed
-#define PCI_DEVICE_ID_MACROLINK_MCCS8 0x1000
-#define PCI_DEVICE_ID_MACROLINK_MCCS 0x1001
-#define PCI_DEVICE_ID_MACROLINK_MCCS8H 0x1002
-#define PCI_DEVICE_ID_MACROLINK_MCCSH 0x1003
-#define PCI_DEVICE_ID_MACROLINK_MCCR8 0x2000
-#define PCI_DEVICE_ID_MACROLINK_MCCR 0x2001
#define PCI_VENDOR_ID_FARSITE 0x1619
#define PCI_DEVICE_ID_FARSITE_T2P 0x0400
@@ -2256,7 +1869,6 @@
#define PCI_DEVICE_ID_REVOLUTION 0x0044
#define PCI_VENDOR_ID_LINKSYS 0x1737
-#define PCI_DEVICE_ID_LINKSYS_EG1032 0x1032
#define PCI_DEVICE_ID_LINKSYS_EG1064 0x1064
#define PCI_VENDOR_ID_ALTIMA 0x173b
@@ -2271,7 +1883,6 @@
#define PCI_DEVICE_ID_HERC_WIN 0x5732
#define PCI_DEVICE_ID_HERC_UNI 0x5832
-#define PCI_VENDOR_ID_INFINICON 0x1820
#define PCI_VENDOR_ID_SITECOM 0x182d
#define PCI_DEVICE_ID_SITECOM_DC105V2 0x3069
@@ -2281,8 +1892,6 @@
#define PCI_VENDOR_ID_TDI 0x192E
#define PCI_DEVICE_ID_TDI_EHCI 0x0101
-#define PCI_VENDOR_ID_SYMPHONY 0x1c1c
-#define PCI_DEVICE_ID_SYMPHONY_101 0x0001
#define PCI_VENDOR_ID_TEKRAM 0x1de1
#define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29
@@ -2291,70 +1900,33 @@
#define PCI_DEVICE_ID_HINT_VXPROII_IDE 0x8013
#define PCI_VENDOR_ID_3DLABS 0x3d3d
-#define PCI_DEVICE_ID_3DLABS_300SX 0x0001
-#define PCI_DEVICE_ID_3DLABS_500TX 0x0002
-#define PCI_DEVICE_ID_3DLABS_DELTA 0x0003
-#define PCI_DEVICE_ID_3DLABS_PERMEDIA 0x0004
-#define PCI_DEVICE_ID_3DLABS_MX 0x0006
#define PCI_DEVICE_ID_3DLABS_PERMEDIA2 0x0007
-#define PCI_DEVICE_ID_3DLABS_GAMMA 0x0008
#define PCI_DEVICE_ID_3DLABS_PERMEDIA2V 0x0009
-#define PCI_VENDOR_ID_AVANCE 0x4005
-#define PCI_DEVICE_ID_AVANCE_ALG2064 0x2064
-#define PCI_DEVICE_ID_AVANCE_2302 0x2302
#define PCI_VENDOR_ID_AKS 0x416c
#define PCI_DEVICE_ID_AKS_ALADDINCARD 0x0100
-#define PCI_DEVICE_ID_AKS_CPC 0x0200
-#define PCI_VENDOR_ID_REDCREEK 0x4916
-#define PCI_DEVICE_ID_RC45 0x1960
-#define PCI_VENDOR_ID_NETVIN 0x4a14
-#define PCI_DEVICE_ID_NETVIN_NV5000SC 0x5000
#define PCI_VENDOR_ID_S3 0x5333
-#define PCI_DEVICE_ID_S3_PLATO_PXS 0x0551
-#define PCI_DEVICE_ID_S3_ViRGE 0x5631
#define PCI_DEVICE_ID_S3_TRIO 0x8811
-#define PCI_DEVICE_ID_S3_AURORA64VP 0x8812
-#define PCI_DEVICE_ID_S3_TRIO64UVP 0x8814
-#define PCI_DEVICE_ID_S3_ViRGE_VX 0x883d
#define PCI_DEVICE_ID_S3_868 0x8880
-#define PCI_DEVICE_ID_S3_928 0x88b0
-#define PCI_DEVICE_ID_S3_864_1 0x88c0
-#define PCI_DEVICE_ID_S3_864_2 0x88c1
-#define PCI_DEVICE_ID_S3_964_1 0x88d0
-#define PCI_DEVICE_ID_S3_964_2 0x88d1
#define PCI_DEVICE_ID_S3_968 0x88f0
-#define PCI_DEVICE_ID_S3_TRIO64V2 0x8901
-#define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902
-#define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01
-#define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10
#define PCI_DEVICE_ID_S3_SAVAGE4 0x8a25
-#define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01
-#define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02
-#define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03
#define PCI_DEVICE_ID_S3_PROSAVAGE8 0x8d04
#define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
#define PCI_VENDOR_ID_DUNORD 0x5544
#define PCI_DEVICE_ID_DUNORD_I3000 0x0001
+
#define PCI_VENDOR_ID_DCI 0x6666
#define PCI_DEVICE_ID_DCI_PCCOM4 0x0001
#define PCI_DEVICE_ID_DCI_PCCOM8 0x0002
-#define PCI_VENDOR_ID_DUNORD 0x5544
-#define PCI_DEVICE_ID_DUNORD_I3000 0x0001
-
-#define PCI_VENDOR_ID_GENROCO 0x5555
-#define PCI_DEVICE_ID_GENROCO_HFP832 0x0003
-
#define PCI_VENDOR_ID_INTEL 0x8086
#define PCI_DEVICE_ID_INTEL_EESSC 0x0008
-#define PCI_DEVICE_ID_INTEL_21145 0x0039
#define PCI_DEVICE_ID_INTEL_PXHD_0 0x0320
#define PCI_DEVICE_ID_INTEL_PXHD_1 0x0321
#define PCI_DEVICE_ID_INTEL_PXH_0 0x0329
@@ -2363,30 +1935,17 @@
#define PCI_DEVICE_ID_INTEL_82375 0x0482
#define PCI_DEVICE_ID_INTEL_82424 0x0483
#define PCI_DEVICE_ID_INTEL_82378 0x0484
-#define PCI_DEVICE_ID_INTEL_82430 0x0486
-#define PCI_DEVICE_ID_INTEL_82434 0x04a3
#define PCI_DEVICE_ID_INTEL_I960 0x0960
#define PCI_DEVICE_ID_INTEL_I960RM 0x0962
-#define PCI_DEVICE_ID_INTEL_82562ET 0x1031
-#define PCI_DEVICE_ID_INTEL_82801CAM 0x1038
#define PCI_DEVICE_ID_INTEL_82815_MC 0x1130
-#define PCI_DEVICE_ID_INTEL_82815_AB 0x1131
#define PCI_DEVICE_ID_INTEL_82815_CGC 0x1132
-#define PCI_DEVICE_ID_INTEL_82559ER 0x1209
#define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
-#define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222
-#define PCI_DEVICE_ID_INTEL_7116 0x1223
#define PCI_DEVICE_ID_INTEL_7505_0 0x2550
-#define PCI_DEVICE_ID_INTEL_7505_1 0x2552
#define PCI_DEVICE_ID_INTEL_7205_0 0x255d
-#define PCI_DEVICE_ID_INTEL_82596 0x1226
-#define PCI_DEVICE_ID_INTEL_82865 0x1227
-#define PCI_DEVICE_ID_INTEL_82557 0x1229
#define PCI_DEVICE_ID_INTEL_82437 0x122d
#define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e
#define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230
#define PCI_DEVICE_ID_INTEL_82371MX 0x1234
-#define PCI_DEVICE_ID_INTEL_82437MX 0x1235
#define PCI_DEVICE_ID_INTEL_82441 0x1237
#define PCI_DEVICE_ID_INTEL_82380FB 0x124b
#define PCI_DEVICE_ID_INTEL_82439 0x1250
@@ -2395,83 +1954,53 @@
#define PCI_DEVICE_ID_INTEL_82845_HB 0x1a30
#define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
#define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411
-#define PCI_DEVICE_ID_INTEL_82801AA_2 0x2412
#define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413
#define PCI_DEVICE_ID_INTEL_82801AA_5 0x2415
#define PCI_DEVICE_ID_INTEL_82801AA_6 0x2416
#define PCI_DEVICE_ID_INTEL_82801AA_8 0x2418
#define PCI_DEVICE_ID_INTEL_82801AB_0 0x2420
#define PCI_DEVICE_ID_INTEL_82801AB_1 0x2421
-#define PCI_DEVICE_ID_INTEL_82801AB_2 0x2422
#define PCI_DEVICE_ID_INTEL_82801AB_3 0x2423
#define PCI_DEVICE_ID_INTEL_82801AB_5 0x2425
#define PCI_DEVICE_ID_INTEL_82801AB_6 0x2426
#define PCI_DEVICE_ID_INTEL_82801AB_8 0x2428
#define PCI_DEVICE_ID_INTEL_82801BA_0 0x2440
-#define PCI_DEVICE_ID_INTEL_82801BA_1 0x2442
#define PCI_DEVICE_ID_INTEL_82801BA_2 0x2443
-#define PCI_DEVICE_ID_INTEL_82801BA_3 0x2444
#define PCI_DEVICE_ID_INTEL_82801BA_4 0x2445
-#define PCI_DEVICE_ID_INTEL_82801BA_5 0x2446
#define PCI_DEVICE_ID_INTEL_82801BA_6 0x2448
-#define PCI_DEVICE_ID_INTEL_82801BA_7 0x2449
#define PCI_DEVICE_ID_INTEL_82801BA_8 0x244a
#define PCI_DEVICE_ID_INTEL_82801BA_9 0x244b
#define PCI_DEVICE_ID_INTEL_82801BA_10 0x244c
#define PCI_DEVICE_ID_INTEL_82801BA_11 0x244e
#define PCI_DEVICE_ID_INTEL_82801E_0 0x2450
-#define PCI_DEVICE_ID_INTEL_82801E_2 0x2452
-#define PCI_DEVICE_ID_INTEL_82801E_3 0x2453
-#define PCI_DEVICE_ID_INTEL_82801E_9 0x2459
#define PCI_DEVICE_ID_INTEL_82801E_11 0x245b
-#define PCI_DEVICE_ID_INTEL_82801E_13 0x245d
-#define PCI_DEVICE_ID_INTEL_82801E_14 0x245e
#define PCI_DEVICE_ID_INTEL_82801CA_0 0x2480
-#define PCI_DEVICE_ID_INTEL_82801CA_2 0x2482
#define PCI_DEVICE_ID_INTEL_82801CA_3 0x2483
-#define PCI_DEVICE_ID_INTEL_82801CA_4 0x2484
#define PCI_DEVICE_ID_INTEL_82801CA_5 0x2485
#define PCI_DEVICE_ID_INTEL_82801CA_6 0x2486
-#define PCI_DEVICE_ID_INTEL_82801CA_7 0x2487
#define PCI_DEVICE_ID_INTEL_82801CA_10 0x248a
#define PCI_DEVICE_ID_INTEL_82801CA_11 0x248b
#define PCI_DEVICE_ID_INTEL_82801CA_12 0x248c
#define PCI_DEVICE_ID_INTEL_82801DB_0 0x24c0
#define PCI_DEVICE_ID_INTEL_82801DB_1 0x24c1
-#define PCI_DEVICE_ID_INTEL_82801DB_2 0x24c2
#define PCI_DEVICE_ID_INTEL_82801DB_3 0x24c3
-#define PCI_DEVICE_ID_INTEL_82801DB_4 0x24c4
#define PCI_DEVICE_ID_INTEL_82801DB_5 0x24c5
#define PCI_DEVICE_ID_INTEL_82801DB_6 0x24c6
-#define PCI_DEVICE_ID_INTEL_82801DB_7 0x24c7
#define PCI_DEVICE_ID_INTEL_82801DB_9 0x24c9
#define PCI_DEVICE_ID_INTEL_82801DB_10 0x24ca
#define PCI_DEVICE_ID_INTEL_82801DB_11 0x24cb
#define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc
-#define PCI_DEVICE_ID_INTEL_82801DB_13 0x24cd
#define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0
#define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1
-#define PCI_DEVICE_ID_INTEL_82801EB_2 0x24d2
#define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3
-#define PCI_DEVICE_ID_INTEL_82801EB_4 0x24d4
#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5
#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6
-#define PCI_DEVICE_ID_INTEL_82801EB_7 0x24d7
#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db
-#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd
#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1
#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2
-#define PCI_DEVICE_ID_INTEL_ESB_3 0x25a3
-#define PCI_DEVICE_ID_INTEL_ESB_31 0x25b0
#define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4
#define PCI_DEVICE_ID_INTEL_ESB_5 0x25a6
-#define PCI_DEVICE_ID_INTEL_ESB_6 0x25a7
-#define PCI_DEVICE_ID_INTEL_ESB_7 0x25a9
-#define PCI_DEVICE_ID_INTEL_ESB_8 0x25aa
#define PCI_DEVICE_ID_INTEL_ESB_9 0x25ab
-#define PCI_DEVICE_ID_INTEL_ESB_11 0x25ac
-#define PCI_DEVICE_ID_INTEL_ESB_12 0x25ad
-#define PCI_DEVICE_ID_INTEL_ESB_13 0x25ae
#define PCI_DEVICE_ID_INTEL_82820_HB 0x2500
#define PCI_DEVICE_ID_INTEL_82820_UP_HB 0x2501
#define PCI_DEVICE_ID_INTEL_82850_HB 0x2530
@@ -2481,7 +2010,6 @@
#define PCI_DEVICE_ID_INTEL_82865_HB 0x2570
#define PCI_DEVICE_ID_INTEL_82865_IG 0x2572
#define PCI_DEVICE_ID_INTEL_82875_HB 0x2578
-#define PCI_DEVICE_ID_INTEL_82875_IG 0x257b
#define PCI_DEVICE_ID_INTEL_82915G_HB 0x2580
#define PCI_DEVICE_ID_INTEL_82915G_IG 0x2582
#define PCI_DEVICE_ID_INTEL_82915GM_HB 0x2590
@@ -2491,80 +2019,23 @@
#define PCI_DEVICE_ID_INTEL_ICH6_0 0x2640
#define PCI_DEVICE_ID_INTEL_ICH6_1 0x2641
#define PCI_DEVICE_ID_INTEL_ICH6_2 0x2642
-#define PCI_DEVICE_ID_INTEL_ICH6_3 0x2651
-#define PCI_DEVICE_ID_INTEL_ICH6_4 0x2652
-#define PCI_DEVICE_ID_INTEL_ICH6_5 0x2653
-#define PCI_DEVICE_ID_INTEL_ICH6_6 0x2658
-#define PCI_DEVICE_ID_INTEL_ICH6_7 0x2659
-#define PCI_DEVICE_ID_INTEL_ICH6_8 0x265a
-#define PCI_DEVICE_ID_INTEL_ICH6_9 0x265b
-#define PCI_DEVICE_ID_INTEL_ICH6_10 0x265c
-#define PCI_DEVICE_ID_INTEL_ICH6_11 0x2660
-#define PCI_DEVICE_ID_INTEL_ICH6_12 0x2662
-#define PCI_DEVICE_ID_INTEL_ICH6_13 0x2664
-#define PCI_DEVICE_ID_INTEL_ICH6_14 0x2666
-#define PCI_DEVICE_ID_INTEL_ICH6_15 0x2668
#define PCI_DEVICE_ID_INTEL_ICH6_16 0x266a
#define PCI_DEVICE_ID_INTEL_ICH6_17 0x266d
#define PCI_DEVICE_ID_INTEL_ICH6_18 0x266e
#define PCI_DEVICE_ID_INTEL_ICH6_19 0x266f
#define PCI_DEVICE_ID_INTEL_ESB2_0 0x2670
-#define PCI_DEVICE_ID_INTEL_ESB2_1 0x2680
-#define PCI_DEVICE_ID_INTEL_ESB2_2 0x2681
-#define PCI_DEVICE_ID_INTEL_ESB2_3 0x2682
-#define PCI_DEVICE_ID_INTEL_ESB2_4 0x2683
-#define PCI_DEVICE_ID_INTEL_ESB2_5 0x2688
-#define PCI_DEVICE_ID_INTEL_ESB2_6 0x2689
-#define PCI_DEVICE_ID_INTEL_ESB2_7 0x268a
-#define PCI_DEVICE_ID_INTEL_ESB2_8 0x268b
-#define PCI_DEVICE_ID_INTEL_ESB2_9 0x268c
-#define PCI_DEVICE_ID_INTEL_ESB2_10 0x2690
-#define PCI_DEVICE_ID_INTEL_ESB2_11 0x2692
-#define PCI_DEVICE_ID_INTEL_ESB2_12 0x2694
-#define PCI_DEVICE_ID_INTEL_ESB2_13 0x2696
#define PCI_DEVICE_ID_INTEL_ESB2_14 0x2698
-#define PCI_DEVICE_ID_INTEL_ESB2_15 0x2699
-#define PCI_DEVICE_ID_INTEL_ESB2_16 0x269a
#define PCI_DEVICE_ID_INTEL_ESB2_17 0x269b
#define PCI_DEVICE_ID_INTEL_ESB2_18 0x269e
#define PCI_DEVICE_ID_INTEL_ICH7_0 0x27b8
#define PCI_DEVICE_ID_INTEL_ICH7_1 0x27b9
-#define PCI_DEVICE_ID_INTEL_ICH7_2 0x27c0
-#define PCI_DEVICE_ID_INTEL_ICH7_3 0x27c1
#define PCI_DEVICE_ID_INTEL_ICH7_30 0x27b0
#define PCI_DEVICE_ID_INTEL_ICH7_31 0x27bd
-#define PCI_DEVICE_ID_INTEL_ICH7_5 0x27c4
-#define PCI_DEVICE_ID_INTEL_ICH7_6 0x27c5
-#define PCI_DEVICE_ID_INTEL_ICH7_7 0x27c8
-#define PCI_DEVICE_ID_INTEL_ICH7_8 0x27c9
-#define PCI_DEVICE_ID_INTEL_ICH7_9 0x27ca
-#define PCI_DEVICE_ID_INTEL_ICH7_10 0x27cb
-#define PCI_DEVICE_ID_INTEL_ICH7_11 0x27cc
-#define PCI_DEVICE_ID_INTEL_ICH7_12 0x27d0
-#define PCI_DEVICE_ID_INTEL_ICH7_13 0x27d2
-#define PCI_DEVICE_ID_INTEL_ICH7_14 0x27d4
-#define PCI_DEVICE_ID_INTEL_ICH7_15 0x27d6
-#define PCI_DEVICE_ID_INTEL_ICH7_16 0x27d8
#define PCI_DEVICE_ID_INTEL_ICH7_17 0x27da
-#define PCI_DEVICE_ID_INTEL_ICH7_18 0x27dc
#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd
#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de
#define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df
-#define PCI_DEVICE_ID_INTEL_ICH7_22 0x27e0
-#define PCI_DEVICE_ID_INTEL_ICH7_23 0x27e2
#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
-#define PCI_DEVICE_ID_INTEL_ESB2_19 0x3500
-#define PCI_DEVICE_ID_INTEL_ESB2_20 0x3501
-#define PCI_DEVICE_ID_INTEL_ESB2_21 0x3504
-#define PCI_DEVICE_ID_INTEL_ESB2_22 0x3505
-#define PCI_DEVICE_ID_INTEL_ESB2_23 0x350c
-#define PCI_DEVICE_ID_INTEL_ESB2_24 0x350d
-#define PCI_DEVICE_ID_INTEL_ESB2_25 0x3510
-#define PCI_DEVICE_ID_INTEL_ESB2_26 0x3511
-#define PCI_DEVICE_ID_INTEL_ESB2_27 0x3514
-#define PCI_DEVICE_ID_INTEL_ESB2_28 0x3515
-#define PCI_DEVICE_ID_INTEL_ESB2_29 0x3518
-#define PCI_DEVICE_ID_INTEL_ESB2_30 0x3519
#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
#define PCI_DEVICE_ID_INTEL_82855GM_HB 0x3580
@@ -2578,7 +2049,6 @@
#define PCI_DEVICE_ID_INTEL_MCH_PC 0x3599
#define PCI_DEVICE_ID_INTEL_MCH_PC1 0x359a
#define PCI_DEVICE_ID_INTEL_E7525_MCH 0x359e
-#define PCI_DEVICE_ID_INTEL_80310 0x530d
#define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
#define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
#define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
@@ -2603,22 +2073,15 @@
#define PCI_DEVICE_ID_INTEL_440MX_6 0x7196
#define PCI_DEVICE_ID_INTEL_82443MX_0 0x7198
#define PCI_DEVICE_ID_INTEL_82443MX_1 0x7199
-#define PCI_DEVICE_ID_INTEL_82443MX_2 0x719a
#define PCI_DEVICE_ID_INTEL_82443MX_3 0x719b
#define PCI_DEVICE_ID_INTEL_82443GX_0 0x71a0
-#define PCI_DEVICE_ID_INTEL_82443GX_1 0x71a1
#define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2
-#define PCI_DEVICE_ID_INTEL_82372FB_0 0x7600
#define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601
-#define PCI_DEVICE_ID_INTEL_82372FB_2 0x7602
-#define PCI_DEVICE_ID_INTEL_82372FB_3 0x7603
#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4
-#define PCI_DEVICE_ID_INTEL_82450GX 0x84c5
#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca
#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb
#define PCI_DEVICE_ID_INTEL_84460GX 0x84ea
#define PCI_DEVICE_ID_INTEL_IXP4XX 0x8500
-#define PCI_DEVICE_ID_INTEL_IXP2400 0x9001
#define PCI_DEVICE_ID_INTEL_IXP2800 0x9004
#define PCI_DEVICE_ID_INTEL_S21152BB 0xb152
@@ -2631,7 +2094,6 @@
#define PCI_SUBDEVICE_ID_COMPUTONE_PG6 0x0003
#define PCI_VENDOR_ID_KTI 0x8e2e
-#define PCI_DEVICE_ID_KTI_ET32P2 0x3000
#define PCI_VENDOR_ID_ADAPTEC 0x9004
#define PCI_DEVICE_ID_ADAPTEC_7810 0x1078
@@ -2639,7 +2101,6 @@
#define PCI_DEVICE_ID_ADAPTEC_38602 0x3860
#define PCI_DEVICE_ID_ADAPTEC_7850 0x5078
#define PCI_DEVICE_ID_ADAPTEC_7855 0x5578
-#define PCI_DEVICE_ID_ADAPTEC_5800 0x5800
#define PCI_DEVICE_ID_ADAPTEC_3860 0x6038
#define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075
#define PCI_DEVICE_ID_ADAPTEC_7860 0x6078
@@ -2659,7 +2120,6 @@
#define PCI_DEVICE_ID_ADAPTEC_7886 0x8678
#define PCI_DEVICE_ID_ADAPTEC_7887 0x8778
#define PCI_DEVICE_ID_ADAPTEC_7888 0x8878
-#define PCI_DEVICE_ID_ADAPTEC_1030 0x8b78
#define PCI_VENDOR_ID_ADAPTEC2 0x9005
#define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010
@@ -2679,8 +2139,6 @@
#define PCI_DEVICE_ID_ADAPTEC2_7899P 0x00cf
#define PCI_DEVICE_ID_ADAPTEC2_SCAMP 0x0503
-#define PCI_VENDOR_ID_ATRONICS 0x907f
-#define PCI_DEVICE_ID_ATRONICS_2015 0x2015
#define PCI_VENDOR_ID_HOLTEK 0x9412
#define PCI_DEVICE_ID_HOLTEK_6565 0x6565
@@ -2713,7 +2171,3 @@
#define PCI_DEVICE_ID_RME_DIGI32_PRO 0x9897
#define PCI_DEVICE_ID_RME_DIGI32_8 0x9898
-#define PCI_VENDOR_ID_ARK 0xedd8
-#define PCI_DEVICE_ID_ARK_STING 0xa091
-#define PCI_DEVICE_ID_ARK_STINGARK 0xa099
-#define PCI_DEVICE_ID_ARK_2000MT 0xa0a1
diff --git a/include/linux/pm.h b/include/linux/pm.h
index 7897cf500c5..c61d5de837e 100644
--- a/include/linux/pm.h
+++ b/include/linux/pm.h
@@ -224,7 +224,6 @@ struct dev_pm_info {
unsigned should_wakeup:1;
pm_message_t prev_state;
void * saved_state;
- atomic_t pm_users;
struct device * pm_parent;
struct list_head entry;
#endif
@@ -244,6 +243,9 @@ extern int device_suspend(pm_message_t state);
#define device_may_wakeup(dev) \
(device_can_wakeup(dev) && (dev)->power.should_wakeup)
+extern int dpm_runtime_suspend(struct device *, pm_message_t);
+extern void dpm_runtime_resume(struct device *);
+
#else /* !CONFIG_PM */
static inline int device_suspend(pm_message_t state)
@@ -254,6 +256,16 @@ static inline int device_suspend(pm_message_t state)
#define device_set_wakeup_enable(dev,val) do{}while(0)
#define device_may_wakeup(dev) (0)
+static inline int dpm_runtime_suspend(struct device * dev, pm_message_t state)
+{
+ return 0;
+}
+
+static inline void dpm_runtime_resume(struct device * dev)
+{
+
+}
+
#endif
/* changes to device_may_wakeup take effect on the next pm state change.
diff --git a/include/linux/usb.h b/include/linux/usb.h
index 8f731e8f282..748d0438525 100644
--- a/include/linux/usb.h
+++ b/include/linux/usb.h
@@ -57,6 +57,7 @@ struct usb_host_endpoint {
struct usb_endpoint_descriptor desc;
struct list_head urb_list;
void *hcpriv;
+ struct kobject *kobj; /* For sysfs info */
unsigned char *extra; /* Extra descriptors */
int extralen;
@@ -136,7 +137,8 @@ struct usb_interface {
* active alternate setting */
unsigned num_altsetting; /* number of alternate settings */
- int minor; /* minor number this interface is bound to */
+ int minor; /* minor number this interface is
+ * bound to */
enum usb_interface_condition condition; /* state of binding */
struct device dev; /* interface specific device info */
struct class_device *class_dev;
@@ -229,7 +231,7 @@ struct usb_interface_cache {
struct usb_host_config {
struct usb_config_descriptor desc;
- char *string;
+ char *string; /* iConfiguration string, if present */
/* the interfaces associated with this configuration,
* stored in no particular order */
struct usb_interface *interface[USB_MAXINTERFACES];
@@ -248,7 +250,7 @@ int __usb_get_extra_descriptor(char *buffer, unsigned size,
__usb_get_extra_descriptor((ifpoint)->extra,(ifpoint)->extralen,\
type,(void**)ptr)
-/* -------------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------- */
struct usb_operations;
@@ -268,7 +270,8 @@ struct usb_bus {
unsigned is_b_host:1; /* true during some HNP roleswitches */
unsigned b_hnp_enable:1; /* OTG: did A-Host enable HNP? */
- int devnum_next; /* Next open device number in round-robin allocation */
+ int devnum_next; /* Next open device number in
+ * round-robin allocation */
struct usb_devmap devmap; /* device address allocation map */
struct usb_operations *op; /* Operations (specific to the HC) */
@@ -289,15 +292,16 @@ struct usb_bus {
struct dentry *usbfs_dentry; /* usbfs dentry entry for the bus */
struct class_device *class_dev; /* class device for this bus */
- struct kref kref; /* handles reference counting this bus */
- void (*release)(struct usb_bus *bus); /* function to destroy this bus's memory */
+ struct kref kref; /* reference counting for this bus */
+ void (*release)(struct usb_bus *bus);
+
#if defined(CONFIG_USB_MON)
struct mon_bus *mon_bus; /* non-null when associated */
int monitored; /* non-zero when monitored */
#endif
};
-/* -------------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------- */
/* This is arbitrary.
* From USB 2.0 spec Table 11-13, offset 7, a hub can
@@ -326,7 +330,8 @@ struct usb_device {
struct semaphore serialize;
- unsigned int toggle[2]; /* one bit for each endpoint ([0] = IN, [1] = OUT) */
+ unsigned int toggle[2]; /* one bit for each endpoint
+ * ([0] = IN, [1] = OUT) */
struct usb_device *parent; /* our hub, unless we're the root */
struct usb_bus *bus; /* Bus we're part of */
@@ -343,12 +348,14 @@ struct usb_device {
char **rawdescriptors; /* Raw descriptors for each config */
- int have_langid; /* whether string_langid is valid yet */
+ int have_langid; /* whether string_langid is valid */
int string_langid; /* language ID for strings */
- char *product;
- char *manufacturer;
- char *serial; /* static strings from the device */
+ /* static strings from the device */
+ char *product; /* iProduct string, if present */
+ char *manufacturer; /* iManufacturer string, if present */
+ char *serial; /* iSerialNumber string, if present */
+
struct list_head filelist;
struct class_device *class_dev;
struct dentry *usbfs_dentry; /* usbfs dentry entry for the device */
@@ -440,22 +447,31 @@ extern struct usb_host_interface *usb_altnum_to_altsetting(
* USB 2.0 root hubs (EHCI host controllers) will get one path ID if they are
* high speed, and a different one if they are full or low speed.
*/
-static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
+static inline int usb_make_path (struct usb_device *dev, char *buf,
+ size_t size)
{
int actual;
- actual = snprintf (buf, size, "usb-%s-%s", dev->bus->bus_name, dev->devpath);
+ actual = snprintf (buf, size, "usb-%s-%s", dev->bus->bus_name,
+ dev->devpath);
return (actual >= (int)size) ? -1 : actual;
}
/*-------------------------------------------------------------------------*/
-#define USB_DEVICE_ID_MATCH_DEVICE (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT)
-#define USB_DEVICE_ID_MATCH_DEV_RANGE (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI)
-#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE)
+#define USB_DEVICE_ID_MATCH_DEVICE \
+ (USB_DEVICE_ID_MATCH_VENDOR | USB_DEVICE_ID_MATCH_PRODUCT)
+#define USB_DEVICE_ID_MATCH_DEV_RANGE \
+ (USB_DEVICE_ID_MATCH_DEV_LO | USB_DEVICE_ID_MATCH_DEV_HI)
+#define USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION \
+ (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_RANGE)
#define USB_DEVICE_ID_MATCH_DEV_INFO \
- (USB_DEVICE_ID_MATCH_DEV_CLASS | USB_DEVICE_ID_MATCH_DEV_SUBCLASS | USB_DEVICE_ID_MATCH_DEV_PROTOCOL)
+ (USB_DEVICE_ID_MATCH_DEV_CLASS | \
+ USB_DEVICE_ID_MATCH_DEV_SUBCLASS | \
+ USB_DEVICE_ID_MATCH_DEV_PROTOCOL)
#define USB_DEVICE_ID_MATCH_INT_INFO \
- (USB_DEVICE_ID_MATCH_INT_CLASS | USB_DEVICE_ID_MATCH_INT_SUBCLASS | USB_DEVICE_ID_MATCH_INT_PROTOCOL)
+ (USB_DEVICE_ID_MATCH_INT_CLASS | \
+ USB_DEVICE_ID_MATCH_INT_SUBCLASS | \
+ USB_DEVICE_ID_MATCH_INT_PROTOCOL)
/**
* USB_DEVICE - macro used to describe a specific usb device
@@ -466,9 +482,11 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
* specific device.
*/
#define USB_DEVICE(vend,prod) \
- .match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = (vend), .idProduct = (prod)
+ .match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = (vend), \
+ .idProduct = (prod)
/**
- * USB_DEVICE_VER - macro used to describe a specific usb device with a version range
+ * USB_DEVICE_VER - macro used to describe a specific usb device with a
+ * version range
* @vend: the 16 bit USB Vendor ID
* @prod: the 16 bit USB Product ID
* @lo: the bcdDevice_lo value
@@ -478,7 +496,9 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
* specific device, with a version range.
*/
#define USB_DEVICE_VER(vend,prod,lo,hi) \
- .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, .idVendor = (vend), .idProduct = (prod), .bcdDevice_lo = (lo), .bcdDevice_hi = (hi)
+ .match_flags = USB_DEVICE_ID_MATCH_DEVICE_AND_VERSION, \
+ .idVendor = (vend), .idProduct = (prod), \
+ .bcdDevice_lo = (lo), .bcdDevice_hi = (hi)
/**
* USB_DEVICE_INFO - macro used to describe a class of usb devices
@@ -490,7 +510,8 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
* specific class of devices.
*/
#define USB_DEVICE_INFO(cl,sc,pr) \
- .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, .bDeviceClass = (cl), .bDeviceSubClass = (sc), .bDeviceProtocol = (pr)
+ .match_flags = USB_DEVICE_ID_MATCH_DEV_INFO, .bDeviceClass = (cl), \
+ .bDeviceSubClass = (sc), .bDeviceProtocol = (pr)
/**
* USB_INTERFACE_INFO - macro used to describe a class of usb interfaces
@@ -502,9 +523,10 @@ static inline int usb_make_path (struct usb_device *dev, char *buf, size_t size)
* specific class of interfaces.
*/
#define USB_INTERFACE_INFO(cl,sc,pr) \
- .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, .bInterfaceClass = (cl), .bInterfaceSubClass = (sc), .bInterfaceProtocol = (pr)
+ .match_flags = USB_DEVICE_ID_MATCH_INT_INFO, .bInterfaceClass = (cl), \
+ .bInterfaceSubClass = (sc), .bInterfaceProtocol = (pr)
-/* -------------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------- */
/**
* struct usb_driver - identifies USB driver to usbcore
@@ -557,7 +579,8 @@ struct usb_driver {
void (*disconnect) (struct usb_interface *intf);
- int (*ioctl) (struct usb_interface *intf, unsigned int code, void *buf);
+ int (*ioctl) (struct usb_interface *intf, unsigned int code,
+ void *buf);
int (*suspend) (struct usb_interface *intf, pm_message_t message);
int (*resume) (struct usb_interface *intf);
@@ -572,10 +595,8 @@ extern struct bus_type usb_bus_type;
/**
* struct usb_class_driver - identifies a USB driver that wants to use the USB major number
- * @name: devfs name for this driver. Will also be used by the driver
- * class code to create a usb class device.
+ * @name: the usb class device name for this driver. Will show up in sysfs.
* @fops: pointer to the struct file_operations of this driver.
- * @mode: the mode for the devfs file to be created for this driver.
* @minor_base: the start of the minor range for this driver.
*
* This structure is used for the usb_register_dev() and
@@ -585,8 +606,7 @@ extern struct bus_type usb_bus_type;
struct usb_class_driver {
char *name;
struct file_operations *fops;
- mode_t mode;
- int minor_base;
+ int minor_base;
};
/*
@@ -603,7 +623,7 @@ extern void usb_deregister_dev(struct usb_interface *intf,
extern int usb_disabled(void);
-/* -------------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------- */
/*
* URB support, for asynchronous request completions
@@ -613,12 +633,14 @@ extern int usb_disabled(void);
* urb->transfer_flags:
*/
#define URB_SHORT_NOT_OK 0x0001 /* report short reads as errors */
-#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame ignored */
+#define URB_ISO_ASAP 0x0002 /* iso-only, urb->start_frame
+ * ignored */
#define URB_NO_TRANSFER_DMA_MAP 0x0004 /* urb->transfer_dma valid on submit */
#define URB_NO_SETUP_DMA_MAP 0x0008 /* urb->setup_dma valid on submit */
#define URB_NO_FSBR 0x0020 /* UHCI-specific */
-#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUTs with short packet */
-#define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt needed */
+#define URB_ZERO_PACKET 0x0040 /* Finish bulk OUT with short packet */
+#define URB_NO_INTERRUPT 0x0080 /* HINT: no non-error interrupt
+ * needed */
struct usb_iso_packet_descriptor {
unsigned int offset;
@@ -806,7 +828,8 @@ struct urb
u8 reject; /* submissions will fail */
/* public, documented fields in the urb that can be used by drivers */
- struct list_head urb_list; /* list head for use by the urb owner */
+ struct list_head urb_list; /* list head for use by the urb's
+ * current owner */
struct usb_device *dev; /* (in) pointer to associated device */
unsigned int pipe; /* (in) pipe information */
int status; /* (return) non-ISO status */
@@ -819,14 +842,16 @@ struct urb
dma_addr_t setup_dma; /* (in) dma addr for setup_packet */
int start_frame; /* (modify) start frame (ISO) */
int number_of_packets; /* (in) number of ISO packets */
- int interval; /* (modify) transfer interval (INT/ISO) */
+ int interval; /* (modify) transfer interval
+ * (INT/ISO) */
int error_count; /* (return) number of ISO errors */
void *context; /* (in) context for completion */
usb_complete_t complete; /* (in) completion routine */
- struct usb_iso_packet_descriptor iso_frame_desc[0]; /* (in) ISO ONLY */
+ struct usb_iso_packet_descriptor iso_frame_desc[0];
+ /* (in) ISO ONLY */
};
-/* -------------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------- */
/**
* usb_fill_control_urb - initializes a control urb
@@ -974,11 +999,6 @@ extern int usb_bulk_msg(struct usb_device *usb_dev, unsigned int pipe,
void *data, int len, int *actual_length,
int timeout);
-/* selective suspend/resume */
-extern int usb_suspend_device(struct usb_device *dev, pm_message_t message);
-extern int usb_resume_device(struct usb_device *dev);
-
-
/* wrappers around usb_control_msg() for the most common standard requests */
extern int usb_get_descriptor(struct usb_device *dev, unsigned char desctype,
unsigned char descindex, void *buf, int size);
@@ -1056,7 +1076,7 @@ void usb_sg_cancel (struct usb_sg_request *io);
void usb_sg_wait (struct usb_sg_request *io);
-/* -------------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------- */
/*
* For various legacy reasons, Linux has a small cookie that's paired with
@@ -1097,23 +1117,34 @@ void usb_sg_wait (struct usb_sg_request *io);
/* The D0/D1 toggle bits ... USE WITH CAUTION (they're almost hcd-internal) */
#define usb_gettoggle(dev, ep, out) (((dev)->toggle[out] >> (ep)) & 1)
#define usb_dotoggle(dev, ep, out) ((dev)->toggle[out] ^= (1 << (ep)))
-#define usb_settoggle(dev, ep, out, bit) ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | ((bit) << (ep)))
+#define usb_settoggle(dev, ep, out, bit) \
+ ((dev)->toggle[out] = ((dev)->toggle[out] & ~(1 << (ep))) | \
+ ((bit) << (ep)))
-static inline unsigned int __create_pipe(struct usb_device *dev, unsigned int endpoint)
+static inline unsigned int __create_pipe(struct usb_device *dev,
+ unsigned int endpoint)
{
return (dev->devnum << 8) | (endpoint << 15);
}
/* Create various pipes... */
-#define usb_sndctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint))
-#define usb_rcvctrlpipe(dev,endpoint) ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
-#define usb_sndisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint))
-#define usb_rcvisocpipe(dev,endpoint) ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
-#define usb_sndbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | __create_pipe(dev,endpoint))
-#define usb_rcvbulkpipe(dev,endpoint) ((PIPE_BULK << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
-#define usb_sndintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint))
-#define usb_rcvintpipe(dev,endpoint) ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
+#define usb_sndctrlpipe(dev,endpoint) \
+ ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint))
+#define usb_rcvctrlpipe(dev,endpoint) \
+ ((PIPE_CONTROL << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
+#define usb_sndisocpipe(dev,endpoint) \
+ ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint))
+#define usb_rcvisocpipe(dev,endpoint) \
+ ((PIPE_ISOCHRONOUS << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
+#define usb_sndbulkpipe(dev,endpoint) \
+ ((PIPE_BULK << 30) | __create_pipe(dev,endpoint))
+#define usb_rcvbulkpipe(dev,endpoint) \
+ ((PIPE_BULK << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
+#define usb_sndintpipe(dev,endpoint) \
+ ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint))
+#define usb_rcvintpipe(dev,endpoint) \
+ ((PIPE_INTERRUPT << 30) | __create_pipe(dev,endpoint) | USB_DIR_IN)
/*-------------------------------------------------------------------------*/
@@ -1137,17 +1168,29 @@ usb_maxpacket(struct usb_device *udev, int pipe, int is_out)
return le16_to_cpu(ep->desc.wMaxPacketSize);
}
-/* -------------------------------------------------------------------------- */
+/* ----------------------------------------------------------------------- */
+
+/* Events from the usb core */
+#define USB_DEVICE_ADD 0x0001
+#define USB_DEVICE_REMOVE 0x0002
+#define USB_BUS_ADD 0x0003
+#define USB_BUS_REMOVE 0x0004
+extern void usb_register_notify(struct notifier_block *nb);
+extern void usb_unregister_notify(struct notifier_block *nb);
#ifdef DEBUG
-#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , __FILE__ , ## arg)
+#define dbg(format, arg...) printk(KERN_DEBUG "%s: " format "\n" , \
+ __FILE__ , ## arg)
#else
#define dbg(format, arg...) do {} while (0)
#endif
-#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , __FILE__ , ## arg)
-#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , __FILE__ , ## arg)
-#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , __FILE__ , ## arg)
+#define err(format, arg...) printk(KERN_ERR "%s: " format "\n" , \
+ __FILE__ , ## arg)
+#define info(format, arg...) printk(KERN_INFO "%s: " format "\n" , \
+ __FILE__ , ## arg)
+#define warn(format, arg...) printk(KERN_WARNING "%s: " format "\n" , \
+ __FILE__ , ## arg)
#endif /* __KERNEL__ */
diff --git a/include/linux/usb_otg.h b/include/linux/usb_otg.h
index c6683146e9b..f827f6e203c 100644
--- a/include/linux/usb_otg.h
+++ b/include/linux/usb_otg.h
@@ -63,6 +63,10 @@ struct otg_transceiver {
int (*set_power)(struct otg_transceiver *otg,
unsigned mA);
+ /* for non-OTG B devices: set transceiver into suspend mode */
+ int (*set_suspend)(struct otg_transceiver *otg,
+ int suspend);
+
/* for B devices only: start session with A-Host */
int (*start_srp)(struct otg_transceiver *otg);
@@ -108,6 +112,15 @@ otg_set_power(struct otg_transceiver *otg, unsigned mA)
}
static inline int
+otg_set_suspend(struct otg_transceiver *otg, int suspend)
+{
+ if (otg->set_suspend != NULL)
+ return otg->set_suspend(otg, suspend);
+ else
+ return 0;
+}
+
+static inline int
otg_start_srp(struct otg_transceiver *otg)
{
return otg->start_srp(otg);
diff --git a/include/linux/usbdevice_fs.h b/include/linux/usbdevice_fs.h
index 9facf733800..8859f0b4154 100644
--- a/include/linux/usbdevice_fs.h
+++ b/include/linux/usbdevice_fs.h
@@ -140,6 +140,12 @@ struct usbdevfs_urb32 {
compat_caddr_t usercontext; /* unused */
struct usbdevfs_iso_packet_desc iso_frame_desc[0];
};
+
+struct usbdevfs_ioctl32 {
+ s32 ifno;
+ s32 ioctl_code;
+ compat_caddr_t data;
+};
#endif
#define USBDEVFS_CONTROL _IOWR('U', 0, struct usbdevfs_ctrltransfer)
@@ -160,6 +166,7 @@ struct usbdevfs_urb32 {
#define USBDEVFS_RELEASEINTERFACE _IOR('U', 16, unsigned int)
#define USBDEVFS_CONNECTINFO _IOW('U', 17, struct usbdevfs_connectinfo)
#define USBDEVFS_IOCTL _IOWR('U', 18, struct usbdevfs_ioctl)
+#define USBDEVFS_IOCTL32 _IOWR('U', 18, struct usbdevfs_ioctl32)
#define USBDEVFS_HUB_PORTINFO _IOR('U', 19, struct usbdevfs_hub_portinfo)
#define USBDEVFS_RESET _IO('U', 20)
#define USBDEVFS_CLEAR_HALT _IOR('U', 21, unsigned int)
diff --git a/include/net/sctp/user.h b/include/net/sctp/user.h
index 1c5f19f995a..f1c3bc54526 100644
--- a/include/net/sctp/user.h
+++ b/include/net/sctp/user.h
@@ -171,10 +171,10 @@ struct sctp_sndrcvinfo {
*/
enum sctp_sinfo_flags {
- MSG_UNORDERED = 1, /* Send/receive message unordered. */
- MSG_ADDR_OVER = 2, /* Override the primary destination. */
- MSG_ABORT=4, /* Send an ABORT message to the peer. */
- /* MSG_EOF is already defined per socket.h */
+ SCTP_UNORDERED = 1, /* Send/receive message unordered. */
+ SCTP_ADDR_OVER = 2, /* Override the primary destination. */
+ SCTP_ABORT=4, /* Send an ABORT message to the peer. */
+ SCTP_EOF=MSG_FIN, /* Initiate graceful shutdown process. */
};
diff --git a/include/rdma/ib_cm.h b/include/rdma/ib_cm.h
index 5308683c8c4..0a9fcd59eb4 100644
--- a/include/rdma/ib_cm.h
+++ b/include/rdma/ib_cm.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2004 Intel Corporation. All rights reserved.
+ * Copyright (c) 2004, 2005 Intel Corporation. All rights reserved.
* Copyright (c) 2004 Topspin Corporation. All rights reserved.
* Copyright (c) 2004 Voltaire Corporation. All rights reserved.
* Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
@@ -109,7 +109,6 @@ struct ib_cm_id;
struct ib_cm_req_event_param {
struct ib_cm_id *listen_id;
- struct ib_device *device;
u8 port;
struct ib_sa_path_rec *primary_path;
@@ -220,7 +219,6 @@ struct ib_cm_apr_event_param {
struct ib_cm_sidr_req_event_param {
struct ib_cm_id *listen_id;
- struct ib_device *device;
u8 port;
u16 pkey;
};
@@ -284,6 +282,7 @@ typedef int (*ib_cm_handler)(struct ib_cm_id *cm_id,
struct ib_cm_id {
ib_cm_handler cm_handler;
void *context;
+ struct ib_device *device;
__be64 service_id;
__be64 service_mask;
enum ib_cm_state state; /* internal CM/debug use */
@@ -295,6 +294,8 @@ struct ib_cm_id {
/**
* ib_create_cm_id - Allocate a communication identifier.
+ * @device: Device associated with the cm_id. All related communication will
+ * be associated with the specified device.
* @cm_handler: Callback invoked to notify the user of CM events.
* @context: User specified context associated with the communication
* identifier.
@@ -302,7 +303,8 @@ struct ib_cm_id {
* Communication identifiers are used to track connection states, service
* ID resolution requests, and listen requests.
*/
-struct ib_cm_id *ib_create_cm_id(ib_cm_handler cm_handler,
+struct ib_cm_id *ib_create_cm_id(struct ib_device *device,
+ ib_cm_handler cm_handler,
void *context);
/**
diff --git a/include/rdma/ib_mad.h b/include/rdma/ib_mad.h
index 4172e6841e3..2c133506742 100644
--- a/include/rdma/ib_mad.h
+++ b/include/rdma/ib_mad.h
@@ -109,10 +109,14 @@
#define IB_QP_SET_QKEY 0x80000000
enum {
+ IB_MGMT_MAD_HDR = 24,
IB_MGMT_MAD_DATA = 232,
+ IB_MGMT_RMPP_HDR = 36,
IB_MGMT_RMPP_DATA = 220,
+ IB_MGMT_VENDOR_HDR = 40,
IB_MGMT_VENDOR_DATA = 216,
- IB_MGMT_SA_DATA = 200
+ IB_MGMT_SA_HDR = 56,
+ IB_MGMT_SA_DATA = 200,
};
struct ib_mad_hdr {
@@ -203,26 +207,25 @@ struct ib_class_port_info
/**
* ib_mad_send_buf - MAD data buffer and work request for sends.
- * @mad: References an allocated MAD data buffer. The size of the data
- * buffer is specified in the @send_wr.length field.
- * @mapping: DMA mapping information.
+ * @next: A pointer used to chain together MADs for posting.
+ * @mad: References an allocated MAD data buffer.
* @mad_agent: MAD agent that allocated the buffer.
+ * @ah: The address handle to use when sending the MAD.
* @context: User-controlled context fields.
- * @send_wr: An initialized work request structure used when sending the MAD.
- * The wr_id field of the work request is initialized to reference this
- * data structure.
- * @sge: A scatter-gather list referenced by the work request.
+ * @timeout_ms: Time to wait for a response.
+ * @retries: Number of times to retry a request for a response.
*
* Users are responsible for initializing the MAD buffer itself, with the
* exception of specifying the payload length field in any RMPP MAD.
*/
struct ib_mad_send_buf {
- struct ib_mad *mad;
- DECLARE_PCI_UNMAP_ADDR(mapping)
+ struct ib_mad_send_buf *next;
+ void *mad;
struct ib_mad_agent *mad_agent;
+ struct ib_ah *ah;
void *context[2];
- struct ib_send_wr send_wr;
- struct ib_sge sge;
+ int timeout_ms;
+ int retries;
};
/**
@@ -287,7 +290,7 @@ typedef void (*ib_mad_send_handler)(struct ib_mad_agent *mad_agent,
* or @mad_send_wc.
*/
typedef void (*ib_mad_snoop_handler)(struct ib_mad_agent *mad_agent,
- struct ib_send_wr *send_wr,
+ struct ib_mad_send_buf *send_buf,
struct ib_mad_send_wc *mad_send_wc);
/**
@@ -334,13 +337,13 @@ struct ib_mad_agent {
/**
* ib_mad_send_wc - MAD send completion information.
- * @wr_id: Work request identifier associated with the send MAD request.
+ * @send_buf: Send MAD data buffer associated with the send MAD request.
* @status: Completion status.
* @vendor_err: Optional vendor error information returned with a failed
* request.
*/
struct ib_mad_send_wc {
- u64 wr_id;
+ struct ib_mad_send_buf *send_buf;
enum ib_wc_status status;
u32 vendor_err;
};
@@ -366,7 +369,7 @@ struct ib_mad_recv_buf {
* @rmpp_list: Specifies a list of RMPP reassembled received MAD buffers.
* @mad_len: The length of the received MAD, without duplicated headers.
*
- * For received response, the wr_id field of the wc is set to the wr_id
+ * For received response, the wr_id contains a pointer to the ib_mad_send_buf
* for the corresponding send request.
*/
struct ib_mad_recv_wc {
@@ -463,9 +466,9 @@ int ib_unregister_mad_agent(struct ib_mad_agent *mad_agent);
/**
* ib_post_send_mad - Posts MAD(s) to the send queue of the QP associated
* with the registered client.
- * @mad_agent: Specifies the associated registration to post the send to.
- * @send_wr: Specifies the information needed to send the MAD(s).
- * @bad_send_wr: Specifies the MAD on which an error was encountered.
+ * @send_buf: Specifies the information needed to send the MAD(s).
+ * @bad_send_buf: Specifies the MAD on which an error was encountered. This
+ * parameter is optional if only a single MAD is posted.
*
* Sent MADs are not guaranteed to complete in the order that they were posted.
*
@@ -479,9 +482,8 @@ int ib_unregister_mad_agent(struct ib_mad_agent *mad_agent);
* defined data being transferred. The paylen_newwin field should be
* specified in network-byte order.
*/
-int ib_post_send_mad(struct ib_mad_agent *mad_agent,
- struct ib_send_wr *send_wr,
- struct ib_send_wr **bad_send_wr);
+int ib_post_send_mad(struct ib_mad_send_buf *send_buf,
+ struct ib_mad_send_buf **bad_send_buf);
/**
* ib_coalesce_recv_mad - Coalesces received MAD data into a single buffer.
@@ -507,23 +509,25 @@ void ib_free_recv_mad(struct ib_mad_recv_wc *mad_recv_wc);
/**
* ib_cancel_mad - Cancels an outstanding send MAD operation.
* @mad_agent: Specifies the registration associated with sent MAD.
- * @wr_id: Indicates the work request identifier of the MAD to cancel.
+ * @send_buf: Indicates the MAD to cancel.
*
* MADs will be returned to the user through the corresponding
* ib_mad_send_handler.
*/
-void ib_cancel_mad(struct ib_mad_agent *mad_agent, u64 wr_id);
+void ib_cancel_mad(struct ib_mad_agent *mad_agent,
+ struct ib_mad_send_buf *send_buf);
/**
* ib_modify_mad - Modifies an outstanding send MAD operation.
* @mad_agent: Specifies the registration associated with sent MAD.
- * @wr_id: Indicates the work request identifier of the MAD to modify.
+ * @send_buf: Indicates the MAD to modify.
* @timeout_ms: New timeout value for sent MAD.
*
* This call will reset the timeout value for a sent MAD to the specified
* value.
*/
-int ib_modify_mad(struct ib_mad_agent *mad_agent, u64 wr_id, u32 timeout_ms);
+int ib_modify_mad(struct ib_mad_agent *mad_agent,
+ struct ib_mad_send_buf *send_buf, u32 timeout_ms);
/**
* ib_redirect_mad_qp - Registers a QP for MAD services.
@@ -572,7 +576,6 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent,
* @remote_qpn: Specifies the QPN of the receiving node.
* @pkey_index: Specifies which PKey the MAD will be sent using. This field
* is valid only if the remote_qpn is QP 1.
- * @ah: References the address handle used to transfer to the remote node.
* @rmpp_active: Indicates if the send will enable RMPP.
* @hdr_len: Indicates the size of the data header of the MAD. This length
* should include the common MAD header, RMPP header, plus any class
@@ -582,11 +585,10 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent,
* additional padding that may be necessary.
* @gfp_mask: GFP mask used for the memory allocation.
*
- * This is a helper routine that may be used to allocate a MAD. Users are
- * not required to allocate outbound MADs using this call. The returned
- * MAD send buffer will reference a data buffer usable for sending a MAD, along
+ * This routine allocates a MAD for sending. The returned MAD send buffer
+ * will reference a data buffer usable for sending a MAD, along
* with an initialized work request structure. Users may modify the returned
- * MAD data buffer or work request before posting the send.
+ * MAD data buffer before posting the send.
*
* The returned data buffer will be cleared. Users are responsible for
* initializing the common MAD and any class specific headers. If @rmpp_active
@@ -594,7 +596,7 @@ int ib_process_mad_wc(struct ib_mad_agent *mad_agent,
*/
struct ib_mad_send_buf * ib_create_send_mad(struct ib_mad_agent *mad_agent,
u32 remote_qpn, u16 pkey_index,
- struct ib_ah *ah, int rmpp_active,
+ int rmpp_active,
int hdr_len, int data_len,
gfp_t gfp_mask);
diff --git a/include/rdma/ib_user_cm.h b/include/rdma/ib_user_cm.h
index e4d1654276a..3037588b846 100644
--- a/include/rdma/ib_user_cm.h
+++ b/include/rdma/ib_user_cm.h
@@ -38,7 +38,7 @@
#include <linux/types.h>
-#define IB_USER_CM_ABI_VERSION 2
+#define IB_USER_CM_ABI_VERSION 3
enum {
IB_USER_CM_CMD_CREATE_ID,
@@ -299,8 +299,6 @@ struct ib_ucm_event_get {
};
struct ib_ucm_req_event_resp {
- /* device */
- /* port */
struct ib_ucm_path_rec primary_path;
struct ib_ucm_path_rec alternate_path;
__be64 remote_ca_guid;
@@ -316,6 +314,7 @@ struct ib_ucm_req_event_resp {
__u8 retry_count;
__u8 rnr_retry_count;
__u8 srq;
+ __u8 port;
};
struct ib_ucm_rep_event_resp {
@@ -353,10 +352,9 @@ struct ib_ucm_apr_event_resp {
};
struct ib_ucm_sidr_req_event_resp {
- /* device */
- /* port */
__u16 pkey;
- __u8 reserved[2];
+ __u8 port;
+ __u8 reserved;
};
struct ib_ucm_sidr_rep_event_resp {
diff --git a/include/rdma/ib_user_verbs.h b/include/rdma/ib_user_verbs.h
index fd85725391a..072f3a2edac 100644
--- a/include/rdma/ib_user_verbs.h
+++ b/include/rdma/ib_user_verbs.h
@@ -1,6 +1,7 @@
/*
* Copyright (c) 2005 Topspin Communications. All rights reserved.
* Copyright (c) 2005 Cisco Systems. All rights reserved.
+ * Copyright (c) 2005 PathScale, Inc. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
@@ -42,15 +43,12 @@
* Increment this value if any changes that break userspace ABI
* compatibility are made.
*/
-#define IB_USER_VERBS_ABI_VERSION 2
+#define IB_USER_VERBS_ABI_VERSION 3
enum {
- IB_USER_VERBS_CMD_QUERY_PARAMS,
IB_USER_VERBS_CMD_GET_CONTEXT,
IB_USER_VERBS_CMD_QUERY_DEVICE,
IB_USER_VERBS_CMD_QUERY_PORT,
- IB_USER_VERBS_CMD_QUERY_GID,
- IB_USER_VERBS_CMD_QUERY_PKEY,
IB_USER_VERBS_CMD_ALLOC_PD,
IB_USER_VERBS_CMD_DEALLOC_PD,
IB_USER_VERBS_CMD_CREATE_AH,
@@ -65,6 +63,7 @@ enum {
IB_USER_VERBS_CMD_ALLOC_MW,
IB_USER_VERBS_CMD_BIND_MW,
IB_USER_VERBS_CMD_DEALLOC_MW,
+ IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL,
IB_USER_VERBS_CMD_CREATE_CQ,
IB_USER_VERBS_CMD_RESIZE_CQ,
IB_USER_VERBS_CMD_DESTROY_CQ,
@@ -90,8 +89,11 @@ enum {
* Make sure that all structs defined in this file remain laid out so
* that they pack the same way on 32-bit and 64-bit architectures (to
* avoid incompatibility between 32-bit userspace and 64-bit kernels).
- * In particular do not use pointer types -- pass pointers in __u64
- * instead.
+ * Specifically:
+ * - Do not use pointer types -- pass pointers in __u64 instead.
+ * - Make sure that any structure larger than 4 bytes is padded to a
+ * multiple of 8 bytes. Otherwise the structure size will be
+ * different between 32-bit and 64-bit architectures.
*/
struct ib_uverbs_async_event_desc {
@@ -118,27 +120,14 @@ struct ib_uverbs_cmd_hdr {
__u16 out_words;
};
-/*
- * No driver_data for "query params" command, since this is intended
- * to be a core function with no possible device dependence.
- */
-struct ib_uverbs_query_params {
- __u64 response;
-};
-
-struct ib_uverbs_query_params_resp {
- __u32 num_cq_events;
-};
-
struct ib_uverbs_get_context {
__u64 response;
- __u64 cq_fd_tab;
__u64 driver_data[0];
};
struct ib_uverbs_get_context_resp {
__u32 async_fd;
- __u32 reserved;
+ __u32 num_comp_vectors;
};
struct ib_uverbs_query_device {
@@ -220,31 +209,6 @@ struct ib_uverbs_query_port_resp {
__u8 reserved[3];
};
-struct ib_uverbs_query_gid {
- __u64 response;
- __u8 port_num;
- __u8 index;
- __u8 reserved[6];
- __u64 driver_data[0];
-};
-
-struct ib_uverbs_query_gid_resp {
- __u8 gid[16];
-};
-
-struct ib_uverbs_query_pkey {
- __u64 response;
- __u8 port_num;
- __u8 index;
- __u8 reserved[6];
- __u64 driver_data[0];
-};
-
-struct ib_uverbs_query_pkey_resp {
- __u16 pkey;
- __u16 reserved;
-};
-
struct ib_uverbs_alloc_pd {
__u64 response;
__u64 driver_data[0];
@@ -278,11 +242,21 @@ struct ib_uverbs_dereg_mr {
__u32 mr_handle;
};
+struct ib_uverbs_create_comp_channel {
+ __u64 response;
+};
+
+struct ib_uverbs_create_comp_channel_resp {
+ __u32 fd;
+};
+
struct ib_uverbs_create_cq {
__u64 response;
__u64 user_handle;
__u32 cqe;
- __u32 event_handler;
+ __u32 comp_vector;
+ __s32 comp_channel;
+ __u32 reserved;
__u64 driver_data[0];
};
@@ -291,6 +265,41 @@ struct ib_uverbs_create_cq_resp {
__u32 cqe;
};
+struct ib_uverbs_poll_cq {
+ __u64 response;
+ __u32 cq_handle;
+ __u32 ne;
+};
+
+struct ib_uverbs_wc {
+ __u64 wr_id;
+ __u32 status;
+ __u32 opcode;
+ __u32 vendor_err;
+ __u32 byte_len;
+ __u32 imm_data;
+ __u32 qp_num;
+ __u32 src_qp;
+ __u32 wc_flags;
+ __u16 pkey_index;
+ __u16 slid;
+ __u8 sl;
+ __u8 dlid_path_bits;
+ __u8 port_num;
+ __u8 reserved;
+};
+
+struct ib_uverbs_poll_cq_resp {
+ __u32 count;
+ __u32 reserved;
+ struct ib_uverbs_wc wc[0];
+};
+
+struct ib_uverbs_req_notify_cq {
+ __u32 cq_handle;
+ __u32 solicited_only;
+};
+
struct ib_uverbs_destroy_cq {
__u64 response;
__u32 cq_handle;
@@ -388,6 +397,127 @@ struct ib_uverbs_destroy_qp_resp {
__u32 events_reported;
};
+/*
+ * The ib_uverbs_sge structure isn't used anywhere, since we assume
+ * the ib_sge structure is packed the same way on 32-bit and 64-bit
+ * architectures in both kernel and user space. It's just here to
+ * document the ABI.
+ */
+struct ib_uverbs_sge {
+ __u64 addr;
+ __u32 length;
+ __u32 lkey;
+};
+
+struct ib_uverbs_send_wr {
+ __u64 wr_id;
+ __u32 num_sge;
+ __u32 opcode;
+ __u32 send_flags;
+ __u32 imm_data;
+ union {
+ struct {
+ __u64 remote_addr;
+ __u32 rkey;
+ __u32 reserved;
+ } rdma;
+ struct {
+ __u64 remote_addr;
+ __u64 compare_add;
+ __u64 swap;
+ __u32 rkey;
+ __u32 reserved;
+ } atomic;
+ struct {
+ __u32 ah;
+ __u32 remote_qpn;
+ __u32 remote_qkey;
+ __u32 reserved;
+ } ud;
+ } wr;
+};
+
+struct ib_uverbs_post_send {
+ __u64 response;
+ __u32 qp_handle;
+ __u32 wr_count;
+ __u32 sge_count;
+ __u32 wqe_size;
+ struct ib_uverbs_send_wr send_wr[0];
+};
+
+struct ib_uverbs_post_send_resp {
+ __u32 bad_wr;
+};
+
+struct ib_uverbs_recv_wr {
+ __u64 wr_id;
+ __u32 num_sge;
+ __u32 reserved;
+};
+
+struct ib_uverbs_post_recv {
+ __u64 response;
+ __u32 qp_handle;
+ __u32 wr_count;
+ __u32 sge_count;
+ __u32 wqe_size;
+ struct ib_uverbs_recv_wr recv_wr[0];
+};
+
+struct ib_uverbs_post_recv_resp {
+ __u32 bad_wr;
+};
+
+struct ib_uverbs_post_srq_recv {
+ __u64 response;
+ __u32 srq_handle;
+ __u32 wr_count;
+ __u32 sge_count;
+ __u32 wqe_size;
+ struct ib_uverbs_recv_wr recv[0];
+};
+
+struct ib_uverbs_post_srq_recv_resp {
+ __u32 bad_wr;
+};
+
+struct ib_uverbs_global_route {
+ __u8 dgid[16];
+ __u32 flow_label;
+ __u8 sgid_index;
+ __u8 hop_limit;
+ __u8 traffic_class;
+ __u8 reserved;
+};
+
+struct ib_uverbs_ah_attr {
+ struct ib_uverbs_global_route grh;
+ __u16 dlid;
+ __u8 sl;
+ __u8 src_path_bits;
+ __u8 static_rate;
+ __u8 is_global;
+ __u8 port_num;
+ __u8 reserved;
+};
+
+struct ib_uverbs_create_ah {
+ __u64 response;
+ __u64 user_handle;
+ __u32 pd_handle;
+ __u32 reserved;
+ struct ib_uverbs_ah_attr attr;
+};
+
+struct ib_uverbs_create_ah_resp {
+ __u32 ah_handle;
+};
+
+struct ib_uverbs_destroy_ah {
+ __u32 ah_handle;
+};
+
struct ib_uverbs_attach_mcast {
__u8 gid[16];
__u32 qp_handle;
diff --git a/include/rdma/ib_verbs.h b/include/rdma/ib_verbs.h
index e6f4c9e55df..f72d46d54e0 100644
--- a/include/rdma/ib_verbs.h
+++ b/include/rdma/ib_verbs.h
@@ -595,11 +595,8 @@ struct ib_send_wr {
} atomic;
struct {
struct ib_ah *ah;
- struct ib_mad_hdr *mad_hdr;
u32 remote_qpn;
u32 remote_qkey;
- int timeout_ms; /* valid for MADs only */
- int retries; /* valid for MADs only */
u16 pkey_index; /* valid for GSI only */
u8 port_num; /* valid for DR SMPs on switch only */
} ud;
@@ -951,6 +948,9 @@ struct ib_device {
IB_DEV_UNREGISTERED
} reg_state;
+ u64 uverbs_cmd_mask;
+ int uverbs_abi_ver;
+
u8 node_type;
u8 phys_port_cnt;
};