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-rw-r--r--include/asm-arm/arch-aaec2000/aaec2000.h56
-rw-r--r--include/asm-arm/arch-aaec2000/aaed2000.h40
-rw-r--r--include/asm-arm/arch-aaec2000/hardware.h3
-rw-r--r--include/asm-arm/arch-aaec2000/io.h2
-rw-r--r--include/asm-arm/arch-cl7500/io.h2
-rw-r--r--include/asm-arm/arch-clps711x/hardware.h117
-rw-r--r--include/asm-arm/arch-clps711x/io.h2
-rw-r--r--include/asm-arm/arch-clps711x/mp1000-seprom.h77
-rw-r--r--include/asm-arm/arch-ebsa285/io.h2
-rw-r--r--include/asm-arm/arch-epxa10db/io.h2
-rw-r--r--include/asm-arm/arch-h720x/io.h2
-rw-r--r--include/asm-arm/arch-imx/io.h2
-rw-r--r--include/asm-arm/arch-integrator/hardware.h9
-rw-r--r--include/asm-arm/arch-integrator/io.h8
-rw-r--r--include/asm-arm/arch-iop3xx/io.h2
-rw-r--r--include/asm-arm/arch-ixp2000/io.h2
-rw-r--r--include/asm-arm/arch-ixp2000/ixp2000-regs.h43
-rw-r--r--include/asm-arm/arch-l7200/io.h2
-rw-r--r--include/asm-arm/arch-lh7a40x/io.h2
-rw-r--r--include/asm-arm/arch-omap/io.h2
-rw-r--r--include/asm-arm/arch-pxa/hardware.h4
-rw-r--r--include/asm-arm/arch-pxa/io.h2
-rw-r--r--include/asm-arm/arch-pxa/irda.h17
-rw-r--r--include/asm-arm/arch-pxa/pxa-regs.h42
-rw-r--r--include/asm-arm/arch-pxa/uncompress.h1
-rw-r--r--include/asm-arm/arch-rpc/io.h2
-rw-r--r--include/asm-arm/arch-s3c2410/fb.h3
-rw-r--r--include/asm-arm/arch-s3c2410/io.h2
-rw-r--r--include/asm-arm/arch-s3c2410/regs-gpio.h6
-rw-r--r--include/asm-arm/arch-sa1100/hardware.h7
-rw-r--r--include/asm-arm/arch-sa1100/io.h8
-rw-r--r--include/asm-arm/arch-sa1100/system.h1
-rw-r--r--include/asm-arm/arch-shark/io.h2
-rw-r--r--include/asm-arm/io.h1
-rw-r--r--include/asm-arm/mach/arch.h6
-rw-r--r--include/asm-arm/mach/map.h5
36 files changed, 456 insertions, 30 deletions
diff --git a/include/asm-arm/arch-aaec2000/aaec2000.h b/include/asm-arm/arch-aaec2000/aaec2000.h
index 0e9b7e18af0..002227924b9 100644
--- a/include/asm-arm/arch-aaec2000/aaec2000.h
+++ b/include/asm-arm/arch-aaec2000/aaec2000.h
@@ -17,6 +17,16 @@
#error You must include hardware.h not this file
#endif /* __ASM_ARCH_HARDWARE_H */
+/* Chip selects */
+#define AAEC_CS0 0x00000000
+#define AAEC_CS1 0x10000000
+#define AAEC_CS2 0x20000000
+#define AAEC_CS3 0x30000000
+
+/* Flash */
+#define AAEC_FLASH_BASE AAEC_CS0
+#define AAEC_FLASH_SIZE SZ_64M
+
/* Interrupt controller */
#define IRQ_BASE __REG(0x80000500)
#define IRQ_INTSR __REG(0x80000500) /* Int Status Register */
@@ -148,4 +158,50 @@
#define POWER_STFCLR __REG(0x8000041c) /* NbFlg, RSTFlg, PFFlg, CLDFlg Clear */
#define POWER_CLKSET __REG(0x80000420) /* Clock Speed Control */
+/* GPIO Registers */
+#define AAEC_GPIO_PHYS 0x80000e00
+
+#define AAEC_GPIO_PADR __REG(AAEC_GPIO_PHYS + 0x00)
+#define AAEC_GPIO_PBDR __REG(AAEC_GPIO_PHYS + 0x04)
+#define AAEC_GPIO_PCDR __REG(AAEC_GPIO_PHYS + 0x08)
+#define AAEC_GPIO_PDDR __REG(AAEC_GPIO_PHYS + 0x0c)
+#define AAEC_GPIO_PADDR __REG(AAEC_GPIO_PHYS + 0x10)
+#define AAEC_GPIO_PBDDR __REG(AAEC_GPIO_PHYS + 0x14)
+#define AAEC_GPIO_PCDDR __REG(AAEC_GPIO_PHYS + 0x18)
+#define AAEC_GPIO_PDDDR __REG(AAEC_GPIO_PHYS + 0x1c)
+#define AAEC_GPIO_PEDR __REG(AAEC_GPIO_PHYS + 0x20)
+#define AAEC_GPIO_PEDDR __REG(AAEC_GPIO_PHYS + 0x24)
+#define AAEC_GPIO_KSCAN __REG(AAEC_GPIO_PHYS + 0x28)
+#define AAEC_GPIO_PINMUX __REG(AAEC_GPIO_PHYS + 0x2c)
+#define AAEC_GPIO_PFDR __REG(AAEC_GPIO_PHYS + 0x30)
+#define AAEC_GPIO_PFDDR __REG(AAEC_GPIO_PHYS + 0x34)
+#define AAEC_GPIO_PGDR __REG(AAEC_GPIO_PHYS + 0x38)
+#define AAEC_GPIO_PGDDR __REG(AAEC_GPIO_PHYS + 0x3c)
+#define AAEC_GPIO_PHDR __REG(AAEC_GPIO_PHYS + 0x40)
+#define AAEC_GPIO_PHDDR __REG(AAEC_GPIO_PHYS + 0x44)
+#define AAEC_GPIO_RAZ __REG(AAEC_GPIO_PHYS + 0x48)
+#define AAEC_GPIO_INTTYPE1 __REG(AAEC_GPIO_PHYS + 0x4c)
+#define AAEC_GPIO_INTTYPE2 __REG(AAEC_GPIO_PHYS + 0x50)
+#define AAEC_GPIO_FEOI __REG(AAEC_GPIO_PHYS + 0x54)
+#define AAEC_GPIO_INTEN __REG(AAEC_GPIO_PHYS + 0x58)
+#define AAEC_GPIO_INTSTATUS __REG(AAEC_GPIO_PHYS + 0x5c)
+#define AAEC_GPIO_RAWINTSTATUS __REG(AAEC_GPIO_PHYS + 0x60)
+#define AAEC_GPIO_DB __REG(AAEC_GPIO_PHYS + 0x64)
+#define AAEC_GPIO_PAPINDR __REG(AAEC_GPIO_PHYS + 0x68)
+#define AAEC_GPIO_PBPINDR __REG(AAEC_GPIO_PHYS + 0x6c)
+#define AAEC_GPIO_PCPINDR __REG(AAEC_GPIO_PHYS + 0x70)
+#define AAEC_GPIO_PDPINDR __REG(AAEC_GPIO_PHYS + 0x74)
+#define AAEC_GPIO_PEPINDR __REG(AAEC_GPIO_PHYS + 0x78)
+#define AAEC_GPIO_PFPINDR __REG(AAEC_GPIO_PHYS + 0x7c)
+#define AAEC_GPIO_PGPINDR __REG(AAEC_GPIO_PHYS + 0x80)
+#define AAEC_GPIO_PHPINDR __REG(AAEC_GPIO_PHYS + 0x84)
+
+#define AAEC_GPIO_PINMUX_PE0CON (1 << 0)
+#define AAEC_GPIO_PINMUX_PD0CON (1 << 1)
+#define AAEC_GPIO_PINMUX_CODECON (1 << 2)
+#define AAEC_GPIO_PINMUX_UART3CON (1 << 3)
+
+/* LCD Controller */
+#define AAEC_CLCD_PHYS 0x80003000
+
#endif /* __ARM_ARCH_AAEC2000_H */
diff --git a/include/asm-arm/arch-aaec2000/aaed2000.h b/include/asm-arm/arch-aaec2000/aaed2000.h
new file mode 100644
index 00000000000..bc76d2badb9
--- /dev/null
+++ b/include/asm-arm/arch-aaec2000/aaed2000.h
@@ -0,0 +1,40 @@
+/*
+ * linux/include/asm-arm/arch-aaec2000/aaed2000.h
+ *
+ * AAED-2000 specific bits definition
+ *
+ * Copyright (c) 2005 Nicolas Bellido Y Ortega
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_ARCH_AAED2000_H
+#define __ASM_ARCH_AAED2000_H
+
+/* External GPIOs. */
+
+#define EXT_GPIO_PBASE AAEC_CS3
+#define EXT_GPIO_VBASE 0xf8100000
+#define EXT_GPIO_LENGTH 0x00001000
+
+#define __ext_gpio_p2v(x) ((x) - EXT_GPIO_PBASE + EXT_GPIO_VBASE)
+#define __ext_gpio_v2p(x) ((x) + EXT_GPIO_PBASE - EXT_GPIO_VBASE)
+
+#define __EXT_GPIO_REG(x) (*((volatile u32 *)__ext_gpio_p2v(x)))
+#define __EXT_GPIO_PREG(x) (__ext_gpio_v2p((u32)&(x)))
+
+#define AAED_EXT_GPIO __EXT_GPIO_REG(EXT_GPIO_PBASE)
+
+#define AAED_EGPIO_KBD_SCAN 0x00003fff /* Keyboard scan data */
+#define AAED_EGPIO_PWR_INT 0x00008fff /* Smart battery charger interrupt */
+#define AAED_EGPIO_SWITCHED 0x000f0000 /* DIP Switches */
+#define AAED_EGPIO_USB_VBUS 0x00400000 /* USB Vbus sense */
+#define AAED_EGPIO_LCD_PWR_EN 0x02000000 /* LCD and backlight PWR enable */
+#define AAED_EGPIO_nLED0 0x20000000 /* LED 0 */
+#define AAED_EGPIO_nLED1 0x20000000 /* LED 1 */
+#define AAED_EGPIO_nLED2 0x20000000 /* LED 2 */
+
+
+#endif /* __ARM_ARCH_AAED2000_H */
diff --git a/include/asm-arm/arch-aaec2000/hardware.h b/include/asm-arm/arch-aaec2000/hardware.h
index 4c37219e030..153506fd06e 100644
--- a/include/asm-arm/arch-aaec2000/hardware.h
+++ b/include/asm-arm/arch-aaec2000/hardware.h
@@ -11,7 +11,8 @@
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
-#include <linux/config.h>
+#include <asm/sizes.h>
+#include <asm/arch/aaec2000.h>
/* The kernel is loaded at physical address 0xf8000000.
* We map the IO space a bit after
diff --git a/include/asm-arm/arch-aaec2000/io.h b/include/asm-arm/arch-aaec2000/io.h
index c58a8d10425..8d67907fd4f 100644
--- a/include/asm-arm/arch-aaec2000/io.h
+++ b/include/asm-arm/arch-aaec2000/io.h
@@ -6,6 +6,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/*
diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h
index f0113bc7563..89a33287f4f 100644
--- a/include/asm-arm/arch-cl7500/io.h
+++ b/include/asm-arm/arch-cl7500/io.h
@@ -10,6 +10,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/*
diff --git a/include/asm-arm/arch-clps711x/hardware.h b/include/asm-arm/arch-clps711x/hardware.h
index 1386871e1a5..f864c367c93 100644
--- a/include/asm-arm/arch-clps711x/hardware.h
+++ b/include/asm-arm/arch-clps711x/hardware.h
@@ -235,4 +235,121 @@
#define CEIVA_PB0_BLK_BTN (1<<0)
#endif // #if defined (CONFIG_ARCH_CEIVA)
+#if defined (CONFIG_MACH_MP1000)
+/* NOR FLASH */
+#define MP1000_NIO_BASE 0xf9000000 /* virtual */
+#define MP1000_NIO_START CS0_PHYS_BASE /* physical */
+#define MP1000_NIO_SIZE 0x00400000
+
+/* DSP Interface */
+#define MP1000_DSP_BASE 0xfa000000 /* virtual */
+#define MP1000_DSP_START CS1_PHYS_BASE /* physical */
+#define MP1000_DSP_SIZE 0x00100000
+
+/* LCD, DAA/DSP, RTC, DAA RW Reg all in CS2 */
+#define MP1000_LIO_BASE 0xfb000000 /* virtual */
+#define MP1000_LIO_START CS2_PHYS_BASE /* physical */
+#define MP1000_LIO_SIZE 0x00100000
+
+/* NAND FLASH */
+#define MP1000_FIO_BASE 0xfc000000 /* virtual */
+#define MP1000_FIO_START CS3_PHYS_BASE /* physical */
+#define MP1000_FIO_SIZE 0x00800000
+
+/* Ethernet */
+#define MP1000_EIO_BASE 0xfd000000 /* virtual */
+#define MP1000_EIO_START CS4_PHYS_BASE /* physical */
+#define MP1000_EIO_SIZE 0x00100000
+
+#define MP1000_LCD_OFFSET 0x00000000 /* LCD offset in CS2 */
+#define MP1000_DDD_OFFSET 0x00001000 /* DAA/DAI/DSP sft reset offst*/
+#define MP1000_RTC_OFFSET 0x00002000 /* RTC offset in CS2 */
+#define MP1000_DAA_OFFSET 0x00003000 /* DAA RW reg offset in CS2 */
+
+/* IDE */
+#define MP1000_IDE_BASE 0xfe000000 /* virtual */
+#define MP1000_IDE_START CS5_PHYS_BASE /* physical */
+#define MP1000_IDE_SIZE 0x00100000 /* actually it's only 0x1000 */
+
+#define IRQ_HARDDISK IRQ_EINT2
+
+/*
+ * IDE registers definition
+ */
+
+#define IDE_CONTROL_BASE (MP1000_IDE_BASE + 0x1000)
+#define IDE_BASE_OFF (MP1000_IDE_BASE)
+
+#define IDE_WRITE_DEVICE_DATA (IDE_BASE_OFF + 0x0)
+#define IDE_FEATURES_REGISTER (IDE_BASE_OFF + 0x2)
+#define IDE_SECTOR_COUNT_REGISTER (IDE_BASE_OFF + 0x4)
+#define IDE_SECTOR_NUMBER_REGISTER (IDE_BASE_OFF + 0x6)
+#define IDE_CYLINDER_LOW_REGISTER (IDE_BASE_OFF + 0x8)
+#define IDE_CYLINDER_HIGH_REGISTER (IDE_BASE_OFF + 0xa)
+#define IDE_DEVICE_HEAD_REGISTER (IDE_BASE_OFF + 0xc)
+#define IDE_COMMAND_DATA_REGISTER (IDE_BASE_OFF + 0xe)
+#define IDE_DEVICE_CONTROL_REGISTER (IDE_CONTROL_BASE + 0xc)
+
+#define IDE_IRQ IRQ_EINT2
+
+
+#define RTC_PORT(x) (MP1000_LIO_BASE+0x2000 + (x*2))
+#define RTC_ALWAYS_BCD 0
+
+/*
+// Definitions of the bit fields in the HwPortA register for the
+// MP1000 board.
+*/
+#define HwPortAKeyboardRow1 0x00000001
+#define HwPortAKeyboardRow2 0x00000002
+#define HwPortAKeyboardRow3 0x00000004
+#define HwPortAKeyboardRow4 0x00000008
+#define HwPortAKeyboardRow5 0x00000010
+#define HwPortAKeyboardRow6 0x00000020
+#define HwPortALCDEnable 0x00000040
+#define HwPortAOffhook 0x00000080
+
+/*
+// Definitions of the bit fields in the HwPortB register for the
+// MP1000 board.
+*/
+#define HwPortBL3Mode 0x00000001
+#define HwPortBL3Clk 0x00000002
+#define HwPortBSClk 0x00000001
+#define HwPortBSData 0x00000002
+#define HwPortBL3Data 0x00000004
+#define HwPortBMute 0x00000008
+#define HwPortBQD0 0x00000010
+#define HwPortBQD1 0x00000020
+#define HwPortBQD2 0x00000040
+#define HwPortBQD3 0x00000080
+
+/*
+// Definitions of the bit fields in the HwPortD register for the
+// MP1000 board.
+*/
+#define HwPortDLED1 0x00000001
+#define HwPortDLED2 0x00000002
+#define HwPortDLED3 0x00000004
+#define HwPortDLED4 0x00000008
+#define HwPortDLED5 0x00000010
+#define HwPortDEECS 0x00000020
+#define HwPortBRTS 0x00000040
+#define HwPortBRI 0x00000080
+
+
+/*
+// Definitions of the bit fields in the HwPortE register for the
+// MP1000 board.
+*/
+
+#define HwPortECLE 0x00000001
+#define HwPortESepromDOut 0x00000001
+#define HwPortEALE 0x00000002
+#define HwPortESepromDIn 0x00000002
+#define HwPortENANDCS 0x00000004
+#define HwPortESepromCLK 0x00000004
+
+#endif // #if defined (CONFIG_MACH_MP1000)
+
#endif
diff --git a/include/asm-arm/arch-clps711x/io.h b/include/asm-arm/arch-clps711x/io.h
index 14d7e8da545..62613b0e2d9 100644
--- a/include/asm-arm/arch-clps711x/io.h
+++ b/include/asm-arm/arch-clps711x/io.h
@@ -20,6 +20,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
diff --git a/include/asm-arm/arch-clps711x/mp1000-seprom.h b/include/asm-arm/arch-clps711x/mp1000-seprom.h
new file mode 100644
index 00000000000..3e5566cf966
--- /dev/null
+++ b/include/asm-arm/arch-clps711x/mp1000-seprom.h
@@ -0,0 +1,77 @@
+#ifndef MP1000_SEPROM_H
+#define MP1000_SEPROM_H
+
+/*
+ * mp1000-seprom.h
+ *
+ *
+ * This file contains the Serial EEPROM definitions for the MP1000 board
+ *
+ * Copyright (C) 2005 Comdial Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+#define COMMAND_ERASE (0x1C0)
+#define COMMAND_ERASE_ALL (0x120)
+#define COMMAND_WRITE_DISABLE (0x100)
+#define COMMAND_WRITE_ENABLE (0x130)
+#define COMMAND_READ (0x180)
+#define COMMAND_WRITE (0x140)
+#define COMMAND_WRITE_ALL (0x110)
+
+//
+// Serial EEPROM data format
+//
+
+#define PACKED __attribute__ ((packed))
+
+typedef struct _EEPROM {
+ union {
+ unsigned char eprom_byte_data[128];
+ unsigned short eprom_short_data[64];
+ struct {
+ unsigned char version PACKED; // EEPROM Version "1" for now
+ unsigned char box_id PACKED; // Box ID (Standalone, SOHO, embedded, etc)
+ unsigned char major_hw_version PACKED; // Major Hardware version (Hex)
+ unsigned char minor_hw_version PACKED; // Minor Hardware Version (Hex)
+ unsigned char mfg_id[3] PACKED; // Manufacturer ID (3 character Alphabetic)
+ unsigned char mfg_serial_number[10] PACKED; // Manufacturer Serial number
+ unsigned char mfg_date[3] PACKED; // Date of Mfg (Formatted YY:MM:DD)
+ unsigned char country PACKED; // Country of deployment
+ unsigned char mac_Address[6] PACKED; // MAC Address
+ unsigned char oem_string[20] PACKED; // OEM ID string
+ unsigned short feature_bits1 PACKED; // Feature Bits 1
+ unsigned short feature_bits2 PACKED; // Feature Bits 2
+ unsigned char filler[75] PACKED; // Unused/Undefined “0” initialized
+ unsigned short checksum PACKED; // byte accumulated short checksum
+ } eprom_struct;
+ } variant;
+} eeprom_struct;
+
+/* These settings must be mutually exclusive */
+#define FEATURE_BITS1_DRAMSIZE_16MEG 0x0001 /* 0 signifies 4 MEG system */
+#define FEATURE_BITS1_DRAMSIZE_8MEG 0x0002 /* 1 in bit 1 = 8MEG system */
+#define FEATURE_BITS1_DRAMSIZE_64MEG 0x0004 /* 1 in bit 2 = 64MEG system */
+
+#define FEATURE_BITS1_CPUIS90MEG 0x0010
+
+extern void seprom_init(void);
+extern eeprom_struct* get_seprom_ptr(void);
+extern unsigned char* get_eeprom_mac_address(void);
+
+#endif /* MP1000_SEPROM_H */
+
diff --git a/include/asm-arm/arch-ebsa285/io.h b/include/asm-arm/arch-ebsa285/io.h
index 70576b17f92..776f9d37705 100644
--- a/include/asm-arm/arch-ebsa285/io.h
+++ b/include/asm-arm/arch-ebsa285/io.h
@@ -14,6 +14,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffff
/*
diff --git a/include/asm-arm/arch-epxa10db/io.h b/include/asm-arm/arch-epxa10db/io.h
index 1f0afa25762..9fe100c9d6b 100644
--- a/include/asm-arm/arch-epxa10db/io.h
+++ b/include/asm-arm/arch-epxa10db/io.h
@@ -20,6 +20,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffff
diff --git a/include/asm-arm/arch-h720x/io.h b/include/asm-arm/arch-h720x/io.h
index 68814828c9a..d3ccfd8172b 100644
--- a/include/asm-arm/arch-h720x/io.h
+++ b/include/asm-arm/arch-h720x/io.h
@@ -14,7 +14,7 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
diff --git a/include/asm-arm/arch-imx/io.h b/include/asm-arm/arch-imx/io.h
index 28a4cca6a4c..b191cdd0557 100644
--- a/include/asm-arm/arch-imx/io.h
+++ b/include/asm-arm/arch-imx/io.h
@@ -20,6 +20,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
#define __io(a) ((void __iomem *)(a))
diff --git a/include/asm-arm/arch-integrator/hardware.h b/include/asm-arm/arch-integrator/hardware.h
index be2716eeaa0..6f0947bc500 100644
--- a/include/asm-arm/arch-integrator/hardware.h
+++ b/include/asm-arm/arch-integrator/hardware.h
@@ -33,15 +33,6 @@
#define IO_SIZE 0x0B000000 // How much?
#define IO_START INTEGRATOR_HDR_BASE // PA of IO
-/*
- * Similar to above, but for PCI addresses (memory, IO, Config and the
- * V3 chip itself). WARNING: this has to mirror definitions in platform.h
- */
-#define PCI_MEMORY_VADDR 0xe8000000
-#define PCI_CONFIG_VADDR 0xec000000
-#define PCI_V3_VADDR 0xed000000
-#define PCI_IO_VADDR 0xee000000
-
#define PCIO_BASE PCI_IO_VADDR
#define PCIMEM_BASE PCI_MEMORY_VADDR
diff --git a/include/asm-arm/arch-integrator/io.h b/include/asm-arm/arch-integrator/io.h
index fbea8be67d2..31f2deab51b 100644
--- a/include/asm-arm/arch-integrator/io.h
+++ b/include/asm-arm/arch-integrator/io.h
@@ -22,6 +22,14 @@
#define IO_SPACE_LIMIT 0xffff
+/*
+ * WARNING: this has to mirror definitions in platform.h
+ */
+#define PCI_MEMORY_VADDR 0xe8000000
+#define PCI_CONFIG_VADDR 0xec000000
+#define PCI_V3_VADDR 0xed000000
+#define PCI_IO_VADDR 0xee000000
+
#define __io(a) ((void __iomem *)(PCI_IO_VADDR + (a)))
#define __mem_pci(a) (a)
#define __mem_isa(a) ((a) + PCI_MEMORY_VADDR)
diff --git a/include/asm-arm/arch-iop3xx/io.h b/include/asm-arm/arch-iop3xx/io.h
index 2761dfd8694..f39046a6ab1 100644
--- a/include/asm-arm/arch-iop3xx/io.h
+++ b/include/asm-arm/arch-iop3xx/io.h
@@ -11,6 +11,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
#define __io(p) ((void __iomem *)(p))
diff --git a/include/asm-arm/arch-ixp2000/io.h b/include/asm-arm/arch-ixp2000/io.h
index 3241cd6f077..7fbcdf9931e 100644
--- a/include/asm-arm/arch-ixp2000/io.h
+++ b/include/asm-arm/arch-ixp2000/io.h
@@ -15,6 +15,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
#define __mem_pci(a) (a)
diff --git a/include/asm-arm/arch-ixp2000/ixp2000-regs.h b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
index 32aece06986..def089d693d 100644
--- a/include/asm-arm/arch-ixp2000/ixp2000-regs.h
+++ b/include/asm-arm/arch-ixp2000/ixp2000-regs.h
@@ -392,4 +392,47 @@
#define WDT_RESET_ENABLE 0x01000000
+/*
+ * MSF registers. The IXP2400 and IXP2800 have somewhat different MSF
+ * units, but the registers that differ between the two don't overlap,
+ * so we can have one register list for both.
+ */
+#define IXP2000_MSF_REG(x) ((volatile unsigned long*)(IXP2000_MSF_VIRT_BASE + (x)))
+#define IXP2000_MSF_RX_CONTROL IXP2000_MSF_REG(0x0000)
+#define IXP2000_MSF_TX_CONTROL IXP2000_MSF_REG(0x0004)
+#define IXP2000_MSF_INTERRUPT_STATUS IXP2000_MSF_REG(0x0008)
+#define IXP2000_MSF_INTERRUPT_ENABLE IXP2000_MSF_REG(0x000c)
+#define IXP2000_MSF_CSIX_TYPE_MAP IXP2000_MSF_REG(0x0010)
+#define IXP2000_MSF_FC_EGRESS_STATUS IXP2000_MSF_REG(0x0014)
+#define IXP2000_MSF_FC_INGRESS_STATUS IXP2000_MSF_REG(0x0018)
+#define IXP2000_MSF_HWM_CONTROL IXP2000_MSF_REG(0x0024)
+#define IXP2000_MSF_FC_STATUS_OVERRIDE IXP2000_MSF_REG(0x0028)
+#define IXP2000_MSF_CLOCK_CONTROL IXP2000_MSF_REG(0x002c)
+#define IXP2000_MSF_RX_PORT_MAP IXP2000_MSF_REG(0x0040)
+#define IXP2000_MSF_RBUF_ELEMENT_DONE IXP2000_MSF_REG(0x0044)
+#define IXP2000_MSF_RX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0048)
+#define IXP2000_MSF_RX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0048)
+#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_0 IXP2000_MSF_REG(0x0050)
+#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_1 IXP2000_MSF_REG(0x0054)
+#define IXP2000_MSF_RX_THREAD_FREELIST_TIMEOUT_2 IXP2000_MSF_REG(0x0058)
+#define IXP2000_MSF_TX_SEQUENCE_0 IXP2000_MSF_REG(0x0060)
+#define IXP2000_MSF_TX_SEQUENCE_1 IXP2000_MSF_REG(0x0064)
+#define IXP2000_MSF_TX_SEQUENCE_2 IXP2000_MSF_REG(0x0068)
+#define IXP2000_MSF_TX_MPHY_POLL_LIMIT IXP2000_MSF_REG(0x0070)
+#define IXP2000_MSF_TX_CALENDAR_LENGTH IXP2000_MSF_REG(0x0070)
+#define IXP2000_MSF_RX_UP_CONTROL_0 IXP2000_MSF_REG(0x0080)
+#define IXP2000_MSF_RX_UP_CONTROL_1 IXP2000_MSF_REG(0x0084)
+#define IXP2000_MSF_RX_UP_CONTROL_2 IXP2000_MSF_REG(0x0088)
+#define IXP2000_MSF_RX_UP_CONTROL_3 IXP2000_MSF_REG(0x008c)
+#define IXP2000_MSF_TX_UP_CONTROL_0 IXP2000_MSF_REG(0x0090)
+#define IXP2000_MSF_TX_UP_CONTROL_1 IXP2000_MSF_REG(0x0094)
+#define IXP2000_MSF_TX_UP_CONTROL_2 IXP2000_MSF_REG(0x0098)
+#define IXP2000_MSF_TX_UP_CONTROL_3 IXP2000_MSF_REG(0x009c)
+#define IXP2000_MSF_TRAIN_DATA IXP2000_MSF_REG(0x00a0)
+#define IXP2000_MSF_TRAIN_CALENDAR IXP2000_MSF_REG(0x00a4)
+#define IXP2000_MSF_TRAIN_FLOW_CONTROL IXP2000_MSF_REG(0x00a8)
+#define IXP2000_MSF_TX_CALENDAR_0 IXP2000_MSF_REG(0x1000)
+#define IXP2000_MSF_RX_PORT_CALENDAR_STATUS IXP2000_MSF_REG(0x1400)
+
+
#endif /* _IXP2000_H_ */
diff --git a/include/asm-arm/arch-l7200/io.h b/include/asm-arm/arch-l7200/io.h
index fc012a39e2c..cab8ad0adf0 100644
--- a/include/asm-arm/arch-l7200/io.h
+++ b/include/asm-arm/arch-l7200/io.h
@@ -10,7 +10,7 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
-#include <asm/arch/hardware.h>
+#include <asm/hardware.h>
#define IO_SPACE_LIMIT 0xffffffff
diff --git a/include/asm-arm/arch-lh7a40x/io.h b/include/asm-arm/arch-lh7a40x/io.h
index c13bdd9add9..bbcd4335f44 100644
--- a/include/asm-arm/arch-lh7a40x/io.h
+++ b/include/asm-arm/arch-lh7a40x/io.h
@@ -11,6 +11,8 @@
#ifndef __ASM_ARCH_IO_H
#define __ASM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/* No ISA or PCI bus on this machine. */
diff --git a/include/asm-arm/arch-omap/io.h b/include/asm-arm/arch-omap/io.h
index 11fbf629bf7..3d5bcd54508 100644
--- a/include/asm-arm/arch-omap/io.h
+++ b/include/asm-arm/arch-omap/io.h
@@ -34,6 +34,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/*
diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h
index cf35721cfa4..3e70bd95472 100644
--- a/include/asm-arm/arch-pxa/hardware.h
+++ b/include/asm-arm/arch-pxa/hardware.h
@@ -44,12 +44,12 @@
#ifndef __ASSEMBLY__
-# define __REG(x) (*((volatile unsigned long *)io_p2v(x)))
+# define __REG(x) (*((volatile u32 *)io_p2v(x)))
/* With indexed regs we don't want to feed the index through io_p2v()
especially if it is a variable, otherwise horrible code will result. */
# define __REG2(x,y) \
- (*(volatile unsigned long *)((unsigned long)&__REG(x) + (y)))
+ (*(volatile u32 *)((u32)&__REG(x) + (y)))
# define __PREG(x) (io_v2p((u32)&(x)))
diff --git a/include/asm-arm/arch-pxa/io.h b/include/asm-arm/arch-pxa/io.h
index c3bdbe44e21..eb2dd58d397 100644
--- a/include/asm-arm/arch-pxa/io.h
+++ b/include/asm-arm/arch-pxa/io.h
@@ -6,6 +6,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/*
diff --git a/include/asm-arm/arch-pxa/irda.h b/include/asm-arm/arch-pxa/irda.h
new file mode 100644
index 00000000000..748406f384c
--- /dev/null
+++ b/include/asm-arm/arch-pxa/irda.h
@@ -0,0 +1,17 @@
+#ifndef ASMARM_ARCH_IRDA_H
+#define ASMARM_ARCH_IRDA_H
+
+/* board specific transceiver capabilities */
+
+#define IR_OFF 1
+#define IR_SIRMODE 2
+#define IR_FIRMODE 4
+
+struct pxaficp_platform_data {
+ int transceiver_cap;
+ void (*transceiver_mode)(struct device *dev, int mode);
+};
+
+extern void pxa_set_ficp_info(struct pxaficp_platform_data *info);
+
+#endif
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 3af7165ab0d..a75a2470f4f 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -326,6 +326,25 @@
#define STDLL __REG(0x40700000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
#define STDLH __REG(0x40700004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
+/* Hardware UART (HWUART) */
+#define HWUART HWRBR
+#define HWRBR __REG(0x41600000) /* Receive Buffer Register (read only) */
+#define HWTHR __REG(0x41600000) /* Transmit Holding Register (write only) */
+#define HWIER __REG(0x41600004) /* Interrupt Enable Register (read/write) */
+#define HWIIR __REG(0x41600008) /* Interrupt ID Register (read only) */
+#define HWFCR __REG(0x41600008) /* FIFO Control Register (write only) */
+#define HWLCR __REG(0x4160000C) /* Line Control Register (read/write) */
+#define HWMCR __REG(0x41600010) /* Modem Control Register (read/write) */
+#define HWLSR __REG(0x41600014) /* Line Status Register (read only) */
+#define HWMSR __REG(0x41600018) /* Modem Status Register (read only) */
+#define HWSPR __REG(0x4160001C) /* Scratch Pad Register (read/write) */
+#define HWISR __REG(0x41600020) /* Infrared Selection Register (read/write) */
+#define HWFOR __REG(0x41600024) /* Receive FIFO Occupancy Register (read only) */
+#define HWABR __REG(0x41600028) /* Auto-Baud Control Register (read/write) */
+#define HWACR __REG(0x4160002C) /* Auto-Baud Count Register (read only) */
+#define HWDLL __REG(0x41600000) /* Divisor Latch Low Register (DLAB = 1) (read/write) */
+#define HWDLH __REG(0x41600004) /* Divisor Latch High Register (DLAB = 1) (read/write) */
+
#define IER_DMAE (1 << 7) /* DMA Requests Enable */
#define IER_UUE (1 << 6) /* UART Unit Enable */
#define IER_NRZE (1 << 5) /* NRZ coding Enable */
@@ -1013,14 +1032,12 @@
#define ICCR0_LBM (1 << 1) /* Loopback mode */
#define ICCR0_ITR (1 << 0) /* IrDA transmission */
-#ifdef CONFIG_PXA27x
#define ICCR2_RXP (1 << 3) /* Receive Pin Polarity select */
#define ICCR2_TXP (1 << 2) /* Transmit Pin Polarity select */
#define ICCR2_TRIG (3 << 0) /* Receive FIFO Trigger threshold */
#define ICCR2_TRIG_8 (0 << 0) /* >= 8 bytes */
#define ICCR2_TRIG_16 (1 << 0) /* >= 16 bytes */
#define ICCR2_TRIG_32 (2 << 0) /* >= 32 bytes */
-#endif
#ifdef CONFIG_PXA27x
#define ICSR0_EOC (1 << 6) /* DMA End of Descriptor Chain */
@@ -1250,9 +1267,13 @@
#define GPIO40_FFDTR 40 /* FFUART data terminal Ready */
#define GPIO41_FFRTS 41 /* FFUART request to send */
#define GPIO42_BTRXD 42 /* BTUART receive data */
+#define GPIO42_HWRXD 42 /* HWUART receive data */
#define GPIO43_BTTXD 43 /* BTUART transmit data */
+#define GPIO43_HWTXD 43 /* HWUART transmit data */
#define GPIO44_BTCTS 44 /* BTUART clear to send */
+#define GPIO44_HWCTS 44 /* HWUART clear to send */
#define GPIO45_BTRTS 45 /* BTUART request to send */
+#define GPIO45_HWRTS 45 /* HWUART request to send */
#define GPIO45_AC97_SYSCLK 45 /* AC97 System Clock */
#define GPIO46_ICPRXD 46 /* ICP receive data */
#define GPIO46_STRXD 46 /* STD_UART receive data */
@@ -1378,17 +1399,26 @@
#define GPIO40_FFDTR_MD (40 | GPIO_ALT_FN_2_OUT)
#define GPIO41_FFRTS_MD (41 | GPIO_ALT_FN_2_OUT)
#define GPIO42_BTRXD_MD (42 | GPIO_ALT_FN_1_IN)
+#define GPIO42_HWRXD_MD (42 | GPIO_ALT_FN_3_IN)
#define GPIO43_BTTXD_MD (43 | GPIO_ALT_FN_2_OUT)
+#define GPIO43_HWTXD_MD (43 | GPIO_ALT_FN_3_OUT)
#define GPIO44_BTCTS_MD (44 | GPIO_ALT_FN_1_IN)
+#define GPIO44_HWCTS_MD (44 | GPIO_ALT_FN_3_IN)
#define GPIO45_BTRTS_MD (45 | GPIO_ALT_FN_2_OUT)
+#define GPIO45_HWRTS_MD (45 | GPIO_ALT_FN_3_OUT)
#define GPIO45_SYSCLK_AC97_MD (45 | GPIO_ALT_FN_1_OUT)
#define GPIO46_ICPRXD_MD (46 | GPIO_ALT_FN_1_IN)
#define GPIO46_STRXD_MD (46 | GPIO_ALT_FN_2_IN)
#define GPIO47_ICPTXD_MD (47 | GPIO_ALT_FN_2_OUT)
#define GPIO47_STTXD_MD (47 | GPIO_ALT_FN_1_OUT)
#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
+#define GPIO48_HWTXD_MD (48 | GPIO_ALT_FN_1_OUT)
+#define GPIO48_nPOE_MD (48 | GPIO_ALT_FN_2_OUT)
+#define GPIO49_HWRXD_MD (49 | GPIO_ALT_FN_1_IN)
#define GPIO49_nPWE_MD (49 | GPIO_ALT_FN_2_OUT)
#define GPIO50_nPIOR_MD (50 | GPIO_ALT_FN_2_OUT)
+#define GPIO50_HWCTS_MD (50 | GPIO_ALT_FN_1_IN)
+#define GPIO51_HWRTS_MD (51 | GPIO_ALT_FN_1_OUT)
#define GPIO51_nPIOW_MD (51 | GPIO_ALT_FN_2_OUT)
#define GPIO52_nPCE_1_MD (52 | GPIO_ALT_FN_2_OUT)
#define GPIO53_nPCE_2_MD (53 | GPIO_ALT_FN_2_OUT)
@@ -1763,6 +1793,7 @@
#define CKEN7_BTUART (1 << 7) /* BTUART Unit Clock Enable */
#define CKEN6_FFUART (1 << 6) /* FFUART Unit Clock Enable */
#define CKEN5_STUART (1 << 5) /* STUART Unit Clock Enable */
+#define CKEN4_HWUART (1 << 4) /* HWUART Unit Clock Enable */
#define CKEN4_SSP3 (1 << 4) /* SSP3 Unit Clock Enable */
#define CKEN3_SSP (1 << 3) /* SSP Unit Clock Enable */
#define CKEN3_SSP2 (1 << 3) /* SSP2 Unit Clock Enable */
@@ -2282,4 +2313,11 @@
#endif
+/* PWRMODE register M field values */
+
+#define PWRMODE_IDLE 0x1
+#define PWRMODE_STANDBY 0x2
+#define PWRMODE_SLEEP 0x3
+#define PWRMODE_DEEPSLEEP 0x7
+
#endif
diff --git a/include/asm-arm/arch-pxa/uncompress.h b/include/asm-arm/arch-pxa/uncompress.h
index 4428d3eb743..fe38090444e 100644
--- a/include/asm-arm/arch-pxa/uncompress.h
+++ b/include/asm-arm/arch-pxa/uncompress.h
@@ -12,6 +12,7 @@
#define FFUART ((volatile unsigned long *)0x40100000)
#define BTUART ((volatile unsigned long *)0x40200000)
#define STUART ((volatile unsigned long *)0x40700000)
+#define HWUART ((volatile unsigned long *)0x41600000)
#define UART FFUART
diff --git a/include/asm-arm/arch-rpc/io.h b/include/asm-arm/arch-rpc/io.h
index 24453c405a8..b4da08d7a33 100644
--- a/include/asm-arm/arch-rpc/io.h
+++ b/include/asm-arm/arch-rpc/io.h
@@ -13,6 +13,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/*
diff --git a/include/asm-arm/arch-s3c2410/fb.h b/include/asm-arm/arch-s3c2410/fb.h
index ac57bc887d8..4790491ba9d 100644
--- a/include/asm-arm/arch-s3c2410/fb.h
+++ b/include/asm-arm/arch-s3c2410/fb.h
@@ -13,6 +13,7 @@
* 07-Sep-2004 RTP Created file
* 03-Nov-2004 BJD Updated and minor cleanups
* 03-Aug-2005 RTP Renamed to fb.h
+ * 26-Oct-2005 BJD Changed name of platdata init
*/
#ifndef __ASM_ARM_FB_H
@@ -64,6 +65,6 @@ struct s3c2410fb_mach_info {
unsigned long lpcsel;
};
-void __init set_s3c2410fb_info(struct s3c2410fb_mach_info *hard_s3c2410fb_info);
+extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *);
#endif /* __ASM_ARM_FB_H */
diff --git a/include/asm-arm/arch-s3c2410/io.h b/include/asm-arm/arch-s3c2410/io.h
index 4bf272ed9ad..16fbc8afffd 100644
--- a/include/asm-arm/arch-s3c2410/io.h
+++ b/include/asm-arm/arch-s3c2410/io.h
@@ -15,6 +15,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/*
diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h
index 2053cbacffc..cb33d57c146 100644
--- a/include/asm-arm/arch-s3c2410/regs-gpio.h
+++ b/include/asm-arm/arch-s3c2410/regs-gpio.h
@@ -20,6 +20,7 @@
* 18-11-2004 BJD Added S3C2440 AC97 controls
* 10-Mar-2005 LCVR Changed S3C2410_VA to S3C24XX_VA
* 28-Mar-2005 LCVR Fixed definition of GPB10
+ * 26-Oct-2005 BJD Added generic configuration types
*/
@@ -43,6 +44,11 @@
/* general configuration options */
#define S3C2410_GPIO_LEAVE (0xFFFFFFFF)
+#define S3C2410_GPIO_INPUT (0xFFFFFFF0)
+#define S3C2410_GPIO_OUTPUT (0xFFFFFFF1)
+#define S3C2410_GPIO_IRQ (0xFFFFFFF2) /* not available for all */
+#define S3C2410_GPIO_SFN2 (0xFFFFFFF2) /* not available on A */
+#define S3C2410_GPIO_SFN3 (0xFFFFFFF3) /* not available on A */
/* configure GPIO ports A..G */
diff --git a/include/asm-arm/arch-sa1100/hardware.h b/include/asm-arm/arch-sa1100/hardware.h
index 19c3b1e186b..28711aaa496 100644
--- a/include/asm-arm/arch-sa1100/hardware.h
+++ b/include/asm-arm/arch-sa1100/hardware.h
@@ -22,13 +22,6 @@
/*
- * We requires absolute addresses i.e. (PCMCIA_IO_0_BASE + 0x3f8) for
- * in*()/out*() macros to be usable for all cases.
- */
-#define PCIO_BASE 0
-
-
-/*
* SA1100 internal I/O mappings
*
* We have the following mapping:
diff --git a/include/asm-arm/arch-sa1100/io.h b/include/asm-arm/arch-sa1100/io.h
index 7d969ffbd3b..9d4fe6cf205 100644
--- a/include/asm-arm/arch-sa1100/io.h
+++ b/include/asm-arm/arch-sa1100/io.h
@@ -10,13 +10,19 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/*
* We don't actually have real ISA nor PCI buses, but there is so many
* drivers out there that might just work if we fake them...
*/
-#define __io(a) ((void __iomem *)(PCIO_BASE + (a)))
+static inline void __iomem *__io(unsigned long addr)
+{
+ return (void __iomem *)addr;
+}
+#define __io(a) __io(a)
#define __mem_pci(a) (a)
#define __mem_isa(a) (a)
diff --git a/include/asm-arm/arch-sa1100/system.h b/include/asm-arm/arch-sa1100/system.h
index 6f52118ba1a..0f0612f79b2 100644
--- a/include/asm-arm/arch-sa1100/system.h
+++ b/include/asm-arm/arch-sa1100/system.h
@@ -4,6 +4,7 @@
* Copyright (c) 1999 Nicolas Pitre <nico@cam.org>
*/
#include <linux/config.h>
+#include <asm/hardware.h>
static inline void arch_idle(void)
{
diff --git a/include/asm-arm/arch-shark/io.h b/include/asm-arm/arch-shark/io.h
index 5e6ed0038b2..87ffa27f296 100644
--- a/include/asm-arm/arch-shark/io.h
+++ b/include/asm-arm/arch-shark/io.h
@@ -11,6 +11,8 @@
#ifndef __ASM_ARM_ARCH_IO_H
#define __ASM_ARM_ARCH_IO_H
+#include <asm/hardware.h>
+
#define IO_SPACE_LIMIT 0xffffffff
/*
diff --git a/include/asm-arm/io.h b/include/asm-arm/io.h
index 5c4ae8f5dbb..2e6799632f1 100644
--- a/include/asm-arm/io.h
+++ b/include/asm-arm/io.h
@@ -26,7 +26,6 @@
#include <linux/types.h>
#include <asm/byteorder.h>
#include <asm/memory.h>
-#include <asm/arch/hardware.h>
/*
* ISA I/O bus memory addresses are 1:1 with the physical address.
diff --git a/include/asm-arm/mach/arch.h b/include/asm-arm/mach/arch.h
index 4fa95084a8c..7273c6fd95b 100644
--- a/include/asm-arm/mach/arch.h
+++ b/include/asm-arm/mach/arch.h
@@ -48,10 +48,10 @@ struct machine_desc {
* Set of macros to define architecture features. This is built into
* a table by the linker.
*/
-#define MACHINE_START(_type,_name) \
-const struct machine_desc __mach_desc_##_type \
+#define MACHINE_START(_type,_name) \
+static const struct machine_desc __mach_desc_##_type \
__attribute__((__section__(".arch.info.init"))) = { \
- .nr = MACH_TYPE_##_type, \
+ .nr = MACH_TYPE_##_type, \
.name = _name,
#define MACHINE_END \
diff --git a/include/asm-arm/mach/map.h b/include/asm-arm/mach/map.h
index 9ac47cf8d2e..0619522bd92 100644
--- a/include/asm-arm/mach/map.h
+++ b/include/asm-arm/mach/map.h
@@ -11,7 +11,7 @@
*/
struct map_desc {
unsigned long virtual;
- unsigned long physical;
+ unsigned long pfn;
unsigned long length;
unsigned int type;
};
@@ -27,6 +27,9 @@ struct meminfo;
#define MT_ROM 6
#define MT_IXP2000_DEVICE 7
+#define __phys_to_pfn(paddr) (paddr >> PAGE_SHIFT)
+#define __pfn_to_phys(pfn) (pfn << PAGE_SHIFT)
+
extern void create_memmap_holes(struct meminfo *);
extern void memtable_init(struct meminfo *);
extern void iotable_init(struct map_desc *, int);