summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
Diffstat (limited to 'include')
-rw-r--r--include/asm-generic/dma-coherent.h13
-rw-r--r--include/asm-generic/fixmap.h3
-rw-r--r--include/asm-generic/resource.h2
-rw-r--r--include/asm-generic/word-at-a-time.h2
-rw-r--r--include/drm/drm_pciids.h16
-rw-r--r--include/drm/i915_pciids.h4
-rw-r--r--include/dt-bindings/clock/at91.h (renamed from include/dt-bindings/clk/at91.h)0
-rw-r--r--include/dt-bindings/clock/berlin2.h45
-rw-r--r--include/dt-bindings/clock/berlin2q.h31
-rw-r--r--include/dt-bindings/clock/exynos3250.h258
-rw-r--r--include/dt-bindings/clock/exynos4.h2
-rw-r--r--include/dt-bindings/clock/exynos5250.h21
-rw-r--r--include/dt-bindings/clock/exynos5260-clk.h469
-rw-r--r--include/dt-bindings/clock/exynos5410.h33
-rw-r--r--include/dt-bindings/clock/exynos5420.h43
-rw-r--r--include/dt-bindings/clock/imx6sx-clock.h256
-rw-r--r--include/dt-bindings/clock/lsi,axm5516-clks.h36
-rw-r--r--include/dt-bindings/clock/r7s72100-clock.h41
-rw-r--r--include/dt-bindings/clock/r8a7790-clock.h7
-rw-r--r--include/dt-bindings/clock/r8a7791-clock.h8
-rw-r--r--include/dt-bindings/clock/s3c2410.h62
-rw-r--r--include/dt-bindings/clock/s3c2412.h73
-rw-r--r--include/dt-bindings/clock/s3c2443.h92
-rw-r--r--include/dt-bindings/clock/stih415-clks.h15
-rw-r--r--include/dt-bindings/clock/stih416-clks.h15
-rw-r--r--include/dt-bindings/pinctrl/omap.h25
-rw-r--r--include/dt-bindings/reset-controller/stih415-resets.h1
-rw-r--r--include/dt-bindings/reset-controller/stih416-resets.h1
-rw-r--r--include/dt-bindings/reset/altr,rst-mgr.h90
-rw-r--r--include/dt-bindings/soc/qcom,gsbi.h26
-rw-r--r--include/linux/amba/bus.h1
-rw-r--r--include/linux/amba/mmci.h42
-rw-r--r--include/linux/bio.h2
-rw-r--r--include/linux/blk-mq.h101
-rw-r--r--include/linux/blk_types.h2
-rw-r--r--include/linux/blkdev.h36
-rw-r--r--include/linux/cgroup.h15
-rw-r--r--include/linux/clk/at91_pmc.h1
-rw-r--r--include/linux/dcache.h2
-rw-r--r--include/linux/dma-mapping.h13
-rw-r--r--include/linux/dmaengine.h1
-rw-r--r--include/linux/ftrace.h2
-rw-r--r--include/linux/gpio/consumer.h41
-rw-r--r--include/linux/gpio/driver.h5
-rw-r--r--include/linux/hsi/hsi.h39
-rw-r--r--include/linux/hsi/ssi_protocol.h42
-rw-r--r--include/linux/hugetlb.h10
-rw-r--r--include/linux/if_macvlan.h1
-rw-r--r--include/linux/if_vlan.h15
-rw-r--r--include/linux/interrupt.h9
-rw-r--r--include/linux/irq.h2
-rw-r--r--include/linux/kernfs.h19
-rw-r--r--include/linux/linkage.h4
-rw-r--r--include/linux/mbus.h2
-rw-r--r--include/linux/mfd/rtsx_common.h1
-rw-r--r--include/linux/mfd/rtsx_pci.h6
-rw-r--r--include/linux/mfd/tc3589x.h1
-rw-r--r--include/linux/mlx4/qp.h11
-rw-r--r--include/linux/mm.h2
-rw-r--r--include/linux/net.h15
-rw-r--r--include/linux/netdevice.h34
-rw-r--r--include/linux/netlink.h7
-rw-r--r--include/linux/of.h9
-rw-r--r--include/linux/of_gpio.h35
-rw-r--r--include/linux/of_irq.h5
-rw-r--r--include/linux/of_mdio.h7
-rw-r--r--include/linux/of_platform.h5
-rw-r--r--include/linux/omap-dma.h2
-rw-r--r--include/linux/pci.h40
-rw-r--r--include/linux/pci_ids.h3
-rw-r--r--include/linux/perf_event.h2
-rw-r--r--include/linux/platform_data/at91_adc.h27
-rw-r--r--include/linux/platform_data/atmel.h7
-rw-r--r--include/linux/platform_data/edma.h28
-rw-r--r--include/linux/platform_data/syscon.h8
-rw-r--r--include/linux/reset.h10
-rw-r--r--include/linux/rtnetlink.h5
-rw-r--r--include/linux/sched.h9
-rw-r--r--include/linux/sh_timer.h1
-rw-r--r--include/linux/slub_def.h9
-rw-r--r--include/linux/sock_diag.h2
-rw-r--r--include/linux/tty.h1
-rw-r--r--include/linux/types.h1
-rw-r--r--include/linux/vexpress.h94
-rw-r--r--include/net/af_vsock.h6
-rw-r--r--include/net/cfg80211.h12
-rw-r--r--include/net/ip6_route.h1
-rw-r--r--include/net/netns/ipv4.h9
-rw-r--r--include/net/sock.h5
-rw-r--r--include/trace/events/module.h4
-rw-r--r--include/uapi/asm-generic/resource.h7
-rw-r--r--include/uapi/asm-generic/unistd.h4
-rw-r--r--include/uapi/linux/audit.h12
-rw-r--r--include/uapi/linux/fuse.h22
-rw-r--r--include/uapi/linux/nl80211.h4
-rw-r--r--include/xen/interface/io/blkif.h2
-rw-r--r--include/xen/interface/xen.h6
-rw-r--r--include/xen/xen-ops.h4
98 files changed, 2218 insertions, 364 deletions
diff --git a/include/asm-generic/dma-coherent.h b/include/asm-generic/dma-coherent.h
index 2be8a2dbc86..0297e587579 100644
--- a/include/asm-generic/dma-coherent.h
+++ b/include/asm-generic/dma-coherent.h
@@ -16,16 +16,13 @@ int dma_mmap_from_coherent(struct device *dev, struct vm_area_struct *vma,
* Standard interface
*/
#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
-extern int
-dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
- dma_addr_t device_addr, size_t size, int flags);
+int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
+ dma_addr_t device_addr, size_t size, int flags);
-extern void
-dma_release_declared_memory(struct device *dev);
+void dma_release_declared_memory(struct device *dev);
-extern void *
-dma_mark_declared_memory_occupied(struct device *dev,
- dma_addr_t device_addr, size_t size);
+void *dma_mark_declared_memory_occupied(struct device *dev,
+ dma_addr_t device_addr, size_t size);
#else
#define dma_alloc_from_coherent(dev, size, handle, ret) (0)
#define dma_release_from_coherent(dev, order, vaddr) (0)
diff --git a/include/asm-generic/fixmap.h b/include/asm-generic/fixmap.h
index 5a64ca4621f..f23174fb9ec 100644
--- a/include/asm-generic/fixmap.h
+++ b/include/asm-generic/fixmap.h
@@ -93,5 +93,8 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
#define set_fixmap_io(idx, phys) \
__set_fixmap(idx, phys, FIXMAP_PAGE_IO)
+#define set_fixmap_offset_io(idx, phys) \
+ __set_fixmap_offset(idx, phys, FIXMAP_PAGE_IO)
+
#endif /* __ASSEMBLY__ */
#endif /* __ASM_GENERIC_FIXMAP_H */
diff --git a/include/asm-generic/resource.h b/include/asm-generic/resource.h
index b4ea8f50fc6..5e752b95905 100644
--- a/include/asm-generic/resource.h
+++ b/include/asm-generic/resource.h
@@ -12,7 +12,7 @@
[RLIMIT_CPU] = { RLIM_INFINITY, RLIM_INFINITY }, \
[RLIMIT_FSIZE] = { RLIM_INFINITY, RLIM_INFINITY }, \
[RLIMIT_DATA] = { RLIM_INFINITY, RLIM_INFINITY }, \
- [RLIMIT_STACK] = { _STK_LIM, _STK_LIM_MAX }, \
+ [RLIMIT_STACK] = { _STK_LIM, RLIM_INFINITY }, \
[RLIMIT_CORE] = { 0, RLIM_INFINITY }, \
[RLIMIT_RSS] = { RLIM_INFINITY, RLIM_INFINITY }, \
[RLIMIT_NPROC] = { 0, 0 }, \
diff --git a/include/asm-generic/word-at-a-time.h b/include/asm-generic/word-at-a-time.h
index d96deb443f1..94f9ea8abca 100644
--- a/include/asm-generic/word-at-a-time.h
+++ b/include/asm-generic/word-at-a-time.h
@@ -50,7 +50,7 @@ static inline bool has_zero(unsigned long val, unsigned long *data, const struct
}
#ifndef zero_bytemask
-#define zero_bytemask(mask) (~0ul << __fls(mask) << 1)
+#define zero_bytemask(mask) (~1ul << __fls(mask))
#endif
#endif /* _ASM_WORD_AT_A_TIME_H */
diff --git a/include/drm/drm_pciids.h b/include/drm/drm_pciids.h
index 49376aec2fb..6dfd64b3a60 100644
--- a/include/drm/drm_pciids.h
+++ b/include/drm/drm_pciids.h
@@ -637,6 +637,22 @@
{0x1002, 0x983d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
{0x1002, 0x983e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
{0x1002, 0x983f, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_KABINI|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9851, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9852, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9853, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9854, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9855, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9856, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9857, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9858, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x9859, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x985A, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x985B, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x985C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x985D, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x985E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
+ {0x1002, 0x985F, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_MULLINS|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
{0x1002, 0x9900, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
{0x1002, 0x9901, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
{0x1002, 0x9903, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_ARUBA|RADEON_IS_MOBILITY|RADEON_NEW_MEMMAP|RADEON_IS_IGP}, \
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 940ece4934b..012d58fa8ff 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -191,8 +191,8 @@
INTEL_VGA_DEVICE(0x0A06, info), /* ULT GT1 mobile */ \
INTEL_VGA_DEVICE(0x0A16, info), /* ULT GT2 mobile */ \
INTEL_VGA_DEVICE(0x0A26, info), /* ULT GT3 mobile */ \
- INTEL_VGA_DEVICE(0x0A0E, info), /* ULT GT1 reserved */ \
- INTEL_VGA_DEVICE(0x0A1E, info), /* ULT GT2 reserved */ \
+ INTEL_VGA_DEVICE(0x0A0E, info), /* ULX GT1 mobile */ \
+ INTEL_VGA_DEVICE(0x0A1E, info), /* ULX GT2 mobile */ \
INTEL_VGA_DEVICE(0x0A2E, info), /* ULT GT3 reserved */ \
INTEL_VGA_DEVICE(0x0D06, info), /* CRW GT1 mobile */ \
INTEL_VGA_DEVICE(0x0D16, info), /* CRW GT2 mobile */ \
diff --git a/include/dt-bindings/clk/at91.h b/include/dt-bindings/clock/at91.h
index 0b4cb999a3f..0b4cb999a3f 100644
--- a/include/dt-bindings/clk/at91.h
+++ b/include/dt-bindings/clock/at91.h
diff --git a/include/dt-bindings/clock/berlin2.h b/include/dt-bindings/clock/berlin2.h
new file mode 100644
index 00000000000..0c30800175d
--- /dev/null
+++ b/include/dt-bindings/clock/berlin2.h
@@ -0,0 +1,45 @@
+/*
+ * Berlin2 BG2/BG2CD clock tree IDs
+ */
+
+#define CLKID_SYS 0
+#define CLKID_CPU 1
+#define CLKID_DRMFIGO 2
+#define CLKID_CFG 3
+#define CLKID_GFX 4
+#define CLKID_ZSP 5
+#define CLKID_PERIF 6
+#define CLKID_PCUBE 7
+#define CLKID_VSCOPE 8
+#define CLKID_NFC_ECC 9
+#define CLKID_VPP 10
+#define CLKID_APP 11
+#define CLKID_AUDIO0 12
+#define CLKID_AUDIO2 13
+#define CLKID_AUDIO3 14
+#define CLKID_AUDIO1 15
+#define CLKID_GFX3D_CORE 16
+#define CLKID_GFX3D_SYS 17
+#define CLKID_ARC 18
+#define CLKID_VIP 19
+#define CLKID_SDIO0XIN 20
+#define CLKID_SDIO1XIN 21
+#define CLKID_GFX3D_EXTRA 22
+#define CLKID_GC360 23
+#define CLKID_SDIO_DLLMST 24
+#define CLKID_GETH0 25
+#define CLKID_GETH1 26
+#define CLKID_SATA 27
+#define CLKID_AHBAPB 28
+#define CLKID_USB0 29
+#define CLKID_USB1 30
+#define CLKID_PBRIDGE 31
+#define CLKID_SDIO0 32
+#define CLKID_SDIO1 33
+#define CLKID_NFC 34
+#define CLKID_SMEMC 35
+#define CLKID_AUDIOHD 36
+#define CLKID_VIDEO0 37
+#define CLKID_VIDEO1 38
+#define CLKID_VIDEO2 39
+#define CLKID_TWD 40
diff --git a/include/dt-bindings/clock/berlin2q.h b/include/dt-bindings/clock/berlin2q.h
new file mode 100644
index 00000000000..287fc3b4afb
--- /dev/null
+++ b/include/dt-bindings/clock/berlin2q.h
@@ -0,0 +1,31 @@
+/*
+ * Berlin2 BG2Q clock tree IDs
+ */
+
+#define CLKID_SYS 0
+#define CLKID_DRMFIGO 1
+#define CLKID_CFG 2
+#define CLKID_GFX2D 3
+#define CLKID_ZSP 4
+#define CLKID_PERIF 5
+#define CLKID_PCUBE 6
+#define CLKID_VSCOPE 7
+#define CLKID_NFC_ECC 8
+#define CLKID_VPP 9
+#define CLKID_APP 10
+#define CLKID_SDIO0XIN 11
+#define CLKID_SDIO1XIN 12
+#define CLKID_GFX2DAXI 13
+#define CLKID_GETH0 14
+#define CLKID_SATA 15
+#define CLKID_AHBAPB 16
+#define CLKID_USB0 17
+#define CLKID_USB1 18
+#define CLKID_USB2 19
+#define CLKID_USB3 20
+#define CLKID_PBRIDGE 21
+#define CLKID_SDIO 22
+#define CLKID_NFC 23
+#define CLKID_SMEMC 24
+#define CLKID_PCIE 25
+#define CLKID_TWD 26
diff --git a/include/dt-bindings/clock/exynos3250.h b/include/dt-bindings/clock/exynos3250.h
new file mode 100644
index 00000000000..b535e9da7de
--- /dev/null
+++ b/include/dt-bindings/clock/exynos3250.h
@@ -0,0 +1,258 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * Author: Tomasz Figa <t.figa@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants for Samsung Exynos3250 clock controllers.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H
+
+/*
+ * Let each exported clock get a unique index, which is used on DT-enabled
+ * platforms to lookup the clock from a clock specifier. These indices are
+ * therefore considered an ABI and so must not be changed. This implies
+ * that new clocks should be added either in free spaces between clock groups
+ * or at the end.
+ */
+
+
+/*
+ * Main CMU
+ */
+
+#define CLK_OSCSEL 1
+#define CLK_FIN_PLL 2
+#define CLK_FOUT_APLL 3
+#define CLK_FOUT_VPLL 4
+#define CLK_FOUT_UPLL 5
+#define CLK_FOUT_MPLL 6
+
+/* Muxes */
+#define CLK_MOUT_MPLL_USER_L 16
+#define CLK_MOUT_GDL 17
+#define CLK_MOUT_MPLL_USER_R 18
+#define CLK_MOUT_GDR 19
+#define CLK_MOUT_EBI 20
+#define CLK_MOUT_ACLK_200 21
+#define CLK_MOUT_ACLK_160 22
+#define CLK_MOUT_ACLK_100 23
+#define CLK_MOUT_ACLK_266_1 24
+#define CLK_MOUT_ACLK_266_0 25
+#define CLK_MOUT_ACLK_266 26
+#define CLK_MOUT_VPLL 27
+#define CLK_MOUT_EPLL_USER 28
+#define CLK_MOUT_EBI_1 29
+#define CLK_MOUT_UPLL 30
+#define CLK_MOUT_ACLK_400_MCUISP_SUB 31
+#define CLK_MOUT_MPLL 32
+#define CLK_MOUT_ACLK_400_MCUISP 33
+#define CLK_MOUT_VPLLSRC 34
+#define CLK_MOUT_CAM1 35
+#define CLK_MOUT_CAM_BLK 36
+#define CLK_MOUT_MFC 37
+#define CLK_MOUT_MFC_1 38
+#define CLK_MOUT_MFC_0 39
+#define CLK_MOUT_G3D 40
+#define CLK_MOUT_G3D_1 41
+#define CLK_MOUT_G3D_0 42
+#define CLK_MOUT_MIPI0 43
+#define CLK_MOUT_FIMD0 44
+#define CLK_MOUT_UART_ISP 45
+#define CLK_MOUT_SPI1_ISP 46
+#define CLK_MOUT_SPI0_ISP 47
+#define CLK_MOUT_TSADC 48
+#define CLK_MOUT_MMC1 49
+#define CLK_MOUT_MMC0 50
+#define CLK_MOUT_UART1 51
+#define CLK_MOUT_UART0 52
+#define CLK_MOUT_SPI1 53
+#define CLK_MOUT_SPI0 54
+#define CLK_MOUT_AUDIO 55
+#define CLK_MOUT_MPLL_USER_C 56
+#define CLK_MOUT_HPM 57
+#define CLK_MOUT_CORE 58
+#define CLK_MOUT_APLL 59
+#define CLK_MOUT_ACLK_266_SUB 60
+
+/* Dividers */
+#define CLK_DIV_GPL 64
+#define CLK_DIV_GDL 65
+#define CLK_DIV_GPR 66
+#define CLK_DIV_GDR 67
+#define CLK_DIV_MPLL_PRE 68
+#define CLK_DIV_ACLK_400_MCUISP 69
+#define CLK_DIV_EBI 70
+#define CLK_DIV_ACLK_200 71
+#define CLK_DIV_ACLK_160 72
+#define CLK_DIV_ACLK_100 73
+#define CLK_DIV_ACLK_266 74
+#define CLK_DIV_CAM1 75
+#define CLK_DIV_CAM_BLK 76
+#define CLK_DIV_MFC 77
+#define CLK_DIV_G3D 78
+#define CLK_DIV_MIPI0_PRE 79
+#define CLK_DIV_MIPI0 80
+#define CLK_DIV_FIMD0 81
+#define CLK_DIV_UART_ISP 82
+#define CLK_DIV_SPI1_ISP_PRE 83
+#define CLK_DIV_SPI1_ISP 84
+#define CLK_DIV_SPI0_ISP_PRE 85
+#define CLK_DIV_SPI0_ISP 86
+#define CLK_DIV_TSADC_PRE 87
+#define CLK_DIV_TSADC 88
+#define CLK_DIV_MMC1_PRE 89
+#define CLK_DIV_MMC1 90
+#define CLK_DIV_MMC0_PRE 91
+#define CLK_DIV_MMC0 92
+#define CLK_DIV_UART1 93
+#define CLK_DIV_UART0 94
+#define CLK_DIV_SPI1_PRE 95
+#define CLK_DIV_SPI1 96
+#define CLK_DIV_SPI0_PRE 97
+#define CLK_DIV_SPI0 98
+#define CLK_DIV_PCM 99
+#define CLK_DIV_AUDIO 100
+#define CLK_DIV_I2S 101
+#define CLK_DIV_CORE2 102
+#define CLK_DIV_APLL 103
+#define CLK_DIV_PCLK_DBG 104
+#define CLK_DIV_ATB 105
+#define CLK_DIV_COREM 106
+#define CLK_DIV_CORE 107
+#define CLK_DIV_HPM 108
+#define CLK_DIV_COPY 109
+
+/* Gates */
+#define CLK_ASYNC_G3D 128
+#define CLK_ASYNC_MFCL 129
+#define CLK_PPMULEFT 130
+#define CLK_GPIO_LEFT 131
+#define CLK_ASYNC_ISPMX 132
+#define CLK_ASYNC_FSYSD 133
+#define CLK_ASYNC_LCD0X 134
+#define CLK_ASYNC_CAMX 135
+#define CLK_PPMURIGHT 136
+#define CLK_GPIO_RIGHT 137
+#define CLK_MONOCNT 138
+#define CLK_TZPC6 139
+#define CLK_PROVISIONKEY1 140
+#define CLK_PROVISIONKEY0 141
+#define CLK_CMU_ISPPART 142
+#define CLK_TMU_APBIF 143
+#define CLK_KEYIF 144
+#define CLK_RTC 145
+#define CLK_WDT 146
+#define CLK_MCT 147
+#define CLK_SECKEY 148
+#define CLK_TZPC5 149
+#define CLK_TZPC4 150
+#define CLK_TZPC3 151
+#define CLK_TZPC2 152
+#define CLK_TZPC1 153
+#define CLK_TZPC0 154
+#define CLK_CMU_COREPART 155
+#define CLK_CMU_TOPPART 156
+#define CLK_PMU_APBIF 157
+#define CLK_SYSREG 158
+#define CLK_CHIP_ID 159
+#define CLK_QEJPEG 160
+#define CLK_PIXELASYNCM1 161
+#define CLK_PIXELASYNCM0 162
+#define CLK_PPMUCAMIF 163
+#define CLK_QEM2MSCALER 164
+#define CLK_QEGSCALER1 165
+#define CLK_QEGSCALER0 166
+#define CLK_SMMUJPEG 167
+#define CLK_SMMUM2M2SCALER 168
+#define CLK_SMMUGSCALER1 169
+#define CLK_SMMUGSCALER0 170
+#define CLK_JPEG 171
+#define CLK_M2MSCALER 172
+#define CLK_GSCALER1 173
+#define CLK_GSCALER0 174
+#define CLK_QEMFC 175
+#define CLK_PPMUMFC_L 176
+#define CLK_SMMUMFC_L 177
+#define CLK_MFC 178
+#define CLK_SMMUG3D 179
+#define CLK_QEG3D 180
+#define CLK_PPMUG3D 181
+#define CLK_G3D 182
+#define CLK_QE_CH1_LCD 183
+#define CLK_QE_CH0_LCD 184
+#define CLK_PPMULCD0 185
+#define CLK_SMMUFIMD0 186
+#define CLK_DSIM0 187
+#define CLK_FIMD0 188
+#define CLK_CAM1 189
+#define CLK_UART_ISP_TOP 190
+#define CLK_SPI1_ISP_TOP 191
+#define CLK_SPI0_ISP_TOP 192
+#define CLK_TSADC 193
+#define CLK_PPMUFILE 194
+#define CLK_USBOTG 195
+#define CLK_USBHOST 196
+#define CLK_SROMC 197
+#define CLK_SDMMC1 198
+#define CLK_SDMMC0 199
+#define CLK_PDMA1 200
+#define CLK_PDMA0 201
+#define CLK_PWM 202
+#define CLK_PCM 203
+#define CLK_I2S 204
+#define CLK_SPI1 205
+#define CLK_SPI0 206
+#define CLK_I2C7 207
+#define CLK_I2C6 208
+#define CLK_I2C5 209
+#define CLK_I2C4 210
+#define CLK_I2C3 211
+#define CLK_I2C2 212
+#define CLK_I2C1 213
+#define CLK_I2C0 214
+#define CLK_UART1 215
+#define CLK_UART0 216
+#define CLK_BLOCK_LCD 217
+#define CLK_BLOCK_G3D 218
+#define CLK_BLOCK_MFC 219
+#define CLK_BLOCK_CAM 220
+#define CLK_SMIES 221
+
+/* Special clocks */
+#define CLK_SCLK_JPEG 224
+#define CLK_SCLK_M2MSCALER 225
+#define CLK_SCLK_GSCALER1 226
+#define CLK_SCLK_GSCALER0 227
+#define CLK_SCLK_MFC 228
+#define CLK_SCLK_G3D 229
+#define CLK_SCLK_MIPIDPHY2L 230
+#define CLK_SCLK_MIPI0 231
+#define CLK_SCLK_FIMD0 232
+#define CLK_SCLK_CAM1 233
+#define CLK_SCLK_UART_ISP 234
+#define CLK_SCLK_SPI1_ISP 235
+#define CLK_SCLK_SPI0_ISP 236
+#define CLK_SCLK_UPLL 237
+#define CLK_SCLK_TSADC 238
+#define CLK_SCLK_EBI 239
+#define CLK_SCLK_MMC1 240
+#define CLK_SCLK_MMC0 241
+#define CLK_SCLK_I2S 242
+#define CLK_SCLK_PCM 243
+#define CLK_SCLK_SPI1 244
+#define CLK_SCLK_SPI0 245
+#define CLK_SCLK_UART1 246
+#define CLK_SCLK_UART0 247
+
+/*
+ * Total number of clocks of main CMU.
+ * NOTE: Must be equal to last clock ID increased by one.
+ */
+#define CLK_NR_CLKS 248
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_EXYNOS3250_CLOCK_H */
diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h
index 75aff336dfb..1106ca540a9 100644
--- a/include/dt-bindings/clock/exynos4.h
+++ b/include/dt-bindings/clock/exynos4.h
@@ -33,6 +33,7 @@
#define CLK_MOUT_MPLL_USER_C 18 /* Exynos4x12 only */
#define CLK_MOUT_CORE 19
#define CLK_MOUT_APLL 20
+#define CLK_SCLK_HDMIPHY 22
/* gate for special clocks (sclk) */
#define CLK_SCLK_FIMC0 128
@@ -181,7 +182,6 @@
#define CLK_KEYIF 347
#define CLK_AUDSS 348
#define CLK_MIPI_HSI 349 /* Exynos4210 only */
-#define CLK_MDMA2 350 /* Exynos4210 only */
#define CLK_PIXELASYNCM0 351
#define CLK_PIXELASYNCM1 352
#define CLK_FIMC_LITE0 353 /* Exynos4x12 only */
diff --git a/include/dt-bindings/clock/exynos5250.h b/include/dt-bindings/clock/exynos5250.h
index 922f2dca9bf..be6e97c54f5 100644
--- a/include/dt-bindings/clock/exynos5250.h
+++ b/include/dt-bindings/clock/exynos5250.h
@@ -150,11 +150,30 @@
#define CLK_G2D 345
#define CLK_MDMA0 346
#define CLK_SMMU_MDMA0 347
+#define CLK_SSS 348
+#define CLK_G3D 349
+#define CLK_SMMU_TV 350
+#define CLK_SMMU_FIMD1 351
+#define CLK_SMMU_2D 352
+#define CLK_SMMU_FIMC_ISP 353
+#define CLK_SMMU_FIMC_DRC 354
+#define CLK_SMMU_FIMC_SCC 355
+#define CLK_SMMU_FIMC_SCP 356
+#define CLK_SMMU_FIMC_FD 357
+#define CLK_SMMU_FIMC_MCU 358
+#define CLK_SMMU_FIMC_ODC 359
+#define CLK_SMMU_FIMC_DIS0 360
+#define CLK_SMMU_FIMC_DIS1 361
+#define CLK_SMMU_FIMC_3DNR 362
+#define CLK_SMMU_FIMC_LITE0 363
+#define CLK_SMMU_FIMC_LITE1 364
+#define CLK_CAMIF_TOP 365
/* mux clocks */
#define CLK_MOUT_HDMI 1024
+#define CLK_MOUT_GPLL 1025
/* must be greater than maximal clock id */
-#define CLK_NR_CLKS 1025
+#define CLK_NR_CLKS 1026
#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5250_H */
diff --git a/include/dt-bindings/clock/exynos5260-clk.h b/include/dt-bindings/clock/exynos5260-clk.h
new file mode 100644
index 00000000000..a4bac9a1764
--- /dev/null
+++ b/include/dt-bindings/clock/exynos5260-clk.h
@@ -0,0 +1,469 @@
+/*
+ * Copyright (c) 2014 Samsung Electronics Co., Ltd.
+ * Author: Rahul Sharma <rahul.sharma@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Provides Constants for Exynos5260 clocks.
+*/
+
+#ifndef _DT_BINDINGS_CLK_EXYNOS5260_H
+#define _DT_BINDINGS_CLK_EXYNOS5260_H
+
+/* Clock names: <cmu><type><IP> */
+
+/* List Of Clocks For CMU_TOP */
+
+#define TOP_FOUT_DISP_PLL 1
+#define TOP_FOUT_AUD_PLL 2
+#define TOP_MOUT_AUDTOP_PLL_USER 3
+#define TOP_MOUT_AUD_PLL 4
+#define TOP_MOUT_DISP_PLL 5
+#define TOP_MOUT_BUSTOP_PLL_USER 6
+#define TOP_MOUT_MEMTOP_PLL_USER 7
+#define TOP_MOUT_MEDIATOP_PLL_USER 8
+#define TOP_MOUT_DISP_DISP_333 9
+#define TOP_MOUT_ACLK_DISP_333 10
+#define TOP_MOUT_DISP_DISP_222 11
+#define TOP_MOUT_ACLK_DISP_222 12
+#define TOP_MOUT_DISP_MEDIA_PIXEL 13
+#define TOP_MOUT_FIMD1 14
+#define TOP_MOUT_SCLK_PERI_SPI0_CLK 15
+#define TOP_MOUT_SCLK_PERI_SPI1_CLK 16
+#define TOP_MOUT_SCLK_PERI_SPI2_CLK 17
+#define TOP_MOUT_SCLK_PERI_UART0_UCLK 18
+#define TOP_MOUT_SCLK_PERI_UART2_UCLK 19
+#define TOP_MOUT_SCLK_PERI_UART1_UCLK 20
+#define TOP_MOUT_BUS4_BUSTOP_100 21
+#define TOP_MOUT_BUS4_BUSTOP_400 22
+#define TOP_MOUT_BUS3_BUSTOP_100 23
+#define TOP_MOUT_BUS3_BUSTOP_400 24
+#define TOP_MOUT_BUS2_BUSTOP_400 25
+#define TOP_MOUT_BUS2_BUSTOP_100 26
+#define TOP_MOUT_BUS1_BUSTOP_100 27
+#define TOP_MOUT_BUS1_BUSTOP_400 28
+#define TOP_MOUT_SCLK_FSYS_USB 29
+#define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A 30
+#define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A 31
+#define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A 32
+#define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_B 33
+#define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_B 34
+#define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_B 35
+#define TOP_MOUT_ACLK_ISP1_266 36
+#define TOP_MOUT_ISP1_MEDIA_266 37
+#define TOP_MOUT_ACLK_ISP1_400 38
+#define TOP_MOUT_ISP1_MEDIA_400 39
+#define TOP_MOUT_SCLK_ISP1_SPI0 40
+#define TOP_MOUT_SCLK_ISP1_SPI1 41
+#define TOP_MOUT_SCLK_ISP1_UART 42
+#define TOP_MOUT_SCLK_ISP1_SENSOR2 43
+#define TOP_MOUT_SCLK_ISP1_SENSOR1 44
+#define TOP_MOUT_SCLK_ISP1_SENSOR0 45
+#define TOP_MOUT_ACLK_MFC_333 46
+#define TOP_MOUT_MFC_BUSTOP_333 47
+#define TOP_MOUT_ACLK_G2D_333 48
+#define TOP_MOUT_G2D_BUSTOP_333 49
+#define TOP_MOUT_ACLK_GSCL_FIMC 50
+#define TOP_MOUT_GSCL_BUSTOP_FIMC 51
+#define TOP_MOUT_ACLK_GSCL_333 52
+#define TOP_MOUT_GSCL_BUSTOP_333 53
+#define TOP_MOUT_ACLK_GSCL_400 54
+#define TOP_MOUT_M2M_MEDIATOP_400 55
+#define TOP_DOUT_ACLK_MFC_333 56
+#define TOP_DOUT_ACLK_G2D_333 57
+#define TOP_DOUT_SCLK_ISP1_SENSOR2_A 58
+#define TOP_DOUT_SCLK_ISP1_SENSOR1_A 59
+#define TOP_DOUT_SCLK_ISP1_SENSOR0_A 60
+#define TOP_DOUT_ACLK_GSCL_FIMC 61
+#define TOP_DOUT_ACLK_GSCL_400 62
+#define TOP_DOUT_ACLK_GSCL_333 63
+#define TOP_DOUT_SCLK_ISP1_SPI0_B 64
+#define TOP_DOUT_SCLK_ISP1_SPI0_A 65
+#define TOP_DOUT_ACLK_ISP1_400 66
+#define TOP_DOUT_ACLK_ISP1_266 67
+#define TOP_DOUT_SCLK_ISP1_UART 68
+#define TOP_DOUT_SCLK_ISP1_SPI1_B 69
+#define TOP_DOUT_SCLK_ISP1_SPI1_A 70
+#define TOP_DOUT_SCLK_ISP1_SENSOR2_B 71
+#define TOP_DOUT_SCLK_ISP1_SENSOR1_B 72
+#define TOP_DOUT_SCLK_ISP1_SENSOR0_B 73
+#define TOP_DOUTTOP__SCLK_HPM_TARGETCLK 74
+#define TOP_DOUT_SCLK_DISP_PIXEL 75
+#define TOP_DOUT_ACLK_DISP_222 76
+#define TOP_DOUT_ACLK_DISP_333 77
+#define TOP_DOUT_ACLK_BUS4_100 78
+#define TOP_DOUT_ACLK_BUS4_400 79
+#define TOP_DOUT_ACLK_BUS3_100 80
+#define TOP_DOUT_ACLK_BUS3_400 81
+#define TOP_DOUT_ACLK_BUS2_100 82
+#define TOP_DOUT_ACLK_BUS2_400 83
+#define TOP_DOUT_ACLK_BUS1_100 84
+#define TOP_DOUT_ACLK_BUS1_400 85
+#define TOP_DOUT_SCLK_PERI_SPI1_B 86
+#define TOP_DOUT_SCLK_PERI_SPI1_A 87
+#define TOP_DOUT_SCLK_PERI_SPI0_B 88
+#define TOP_DOUT_SCLK_PERI_SPI0_A 89
+#define TOP_DOUT_SCLK_PERI_UART0 90
+#define TOP_DOUT_SCLK_PERI_UART2 91
+#define TOP_DOUT_SCLK_PERI_UART1 92
+#define TOP_DOUT_SCLK_PERI_SPI2_B 93
+#define TOP_DOUT_SCLK_PERI_SPI2_A 94
+#define TOP_DOUT_ACLK_PERI_AUD 95
+#define TOP_DOUT_ACLK_PERI_66 96
+#define TOP_DOUT_SCLK_FSYS_MMC0_SDCLKIN_B 97
+#define TOP_DOUT_SCLK_FSYS_MMC0_SDCLKIN_A 98
+#define TOP_DOUT_SCLK_FSYS_USBDRD30_SUSPEND_CLK 99
+#define TOP_DOUT_ACLK_FSYS_200 100
+#define TOP_DOUT_SCLK_FSYS_MMC2_SDCLKIN_B 101
+#define TOP_DOUT_SCLK_FSYS_MMC2_SDCLKIN_A 102
+#define TOP_DOUT_SCLK_FSYS_MMC1_SDCLKIN_B 103
+#define TOP_DOUT_SCLK_FSYS_MMC1_SDCLKIN_A 104
+#define TOP_SCLK_FIMD1 105
+#define TOP_SCLK_MMC2 106
+#define TOP_SCLK_MMC1 107
+#define TOP_SCLK_MMC0 108
+#define PHYCLK_DPTX_PHY_CH3_TXD_CLK 109
+#define PHYCLK_DPTX_PHY_CH2_TXD_CLK 110
+#define PHYCLK_DPTX_PHY_CH1_TXD_CLK 111
+#define PHYCLK_DPTX_PHY_CH0_TXD_CLK 112
+#define phyclk_hdmi_phy_tmds_clko 113
+#define PHYCLK_HDMI_PHY_PIXEL_CLKO 114
+#define PHYCLK_HDMI_LINK_O_TMDS_CLKHI 115
+#define PHYCLK_MIPI_DPHY_4L_M_TXBYTECLKHS 116
+#define PHYCLK_DPTX_PHY_O_REF_CLK_24M 117
+#define PHYCLK_DPTX_PHY_CLK_DIV2 118
+#define PHYCLK_MIPI_DPHY_4L_M_RXCLKESC0 119
+#define PHYCLK_USBHOST20_PHY_PHYCLOCK 120
+#define PHYCLK_USBHOST20_PHY_FREECLK 121
+#define PHYCLK_USBHOST20_PHY_CLK48MOHCI 122
+#define PHYCLK_USBDRD30_UDRD30_PIPE_PCLK 123
+#define PHYCLK_USBDRD30_UDRD30_PHYCLOCK 124
+#define TOP_NR_CLK 125
+
+
+/* List Of Clocks For CMU_EGL */
+
+#define EGL_FOUT_EGL_PLL 1
+#define EGL_FOUT_EGL_DPLL 2
+#define EGL_MOUT_EGL_B 3
+#define EGL_MOUT_EGL_PLL 4
+#define EGL_DOUT_EGL_PLL 5
+#define EGL_DOUT_EGL_PCLK_DBG 6
+#define EGL_DOUT_EGL_ATCLK 7
+#define EGL_DOUT_PCLK_EGL 8
+#define EGL_DOUT_ACLK_EGL 9
+#define EGL_DOUT_EGL2 10
+#define EGL_DOUT_EGL1 11
+#define EGL_NR_CLK 12
+
+
+/* List Of Clocks For CMU_KFC */
+
+#define KFC_FOUT_KFC_PLL 1
+#define KFC_MOUT_KFC_PLL 2
+#define KFC_MOUT_KFC 3
+#define KFC_DOUT_KFC_PLL 4
+#define KFC_DOUT_PCLK_KFC 5
+#define KFC_DOUT_ACLK_KFC 6
+#define KFC_DOUT_KFC_PCLK_DBG 7
+#define KFC_DOUT_KFC_ATCLK 8
+#define KFC_DOUT_KFC2 9
+#define KFC_DOUT_KFC1 10
+#define KFC_NR_CLK 11
+
+
+/* List Of Clocks For CMU_MIF */
+
+#define MIF_FOUT_MEM_PLL 1
+#define MIF_FOUT_MEDIA_PLL 2
+#define MIF_FOUT_BUS_PLL 3
+#define MIF_MOUT_CLK2X_PHY 4
+#define MIF_MOUT_MIF_DREX2X 5
+#define MIF_MOUT_CLKM_PHY 6
+#define MIF_MOUT_MIF_DREX 7
+#define MIF_MOUT_MEDIA_PLL 8
+#define MIF_MOUT_BUS_PLL 9
+#define MIF_MOUT_MEM_PLL 10
+#define MIF_DOUT_ACLK_BUS_100 11
+#define MIF_DOUT_ACLK_BUS_200 12
+#define MIF_DOUT_ACLK_MIF_466 13
+#define MIF_DOUT_CLK2X_PHY 14
+#define MIF_DOUT_CLKM_PHY 15
+#define MIF_DOUT_BUS_PLL 16
+#define MIF_DOUT_MEM_PLL 17
+#define MIF_DOUT_MEDIA_PLL 18
+#define MIF_CLK_LPDDR3PHY_WRAP1 19
+#define MIF_CLK_LPDDR3PHY_WRAP0 20
+#define MIF_CLK_MONOCNT 21
+#define MIF_CLK_MIF_RTC 22
+#define MIF_CLK_DREX1 23
+#define MIF_CLK_DREX0 24
+#define MIF_CLK_INTMEM 25
+#define MIF_SCLK_LPDDR3PHY_WRAP_U1 26
+#define MIF_SCLK_LPDDR3PHY_WRAP_U0 27
+#define MIF_NR_CLK 28
+
+
+/* List Of Clocks For CMU_G3D */
+
+#define G3D_FOUT_G3D_PLL 1
+#define G3D_MOUT_G3D_PLL 2
+#define G3D_DOUT_PCLK_G3D 3
+#define G3D_DOUT_ACLK_G3D 4
+#define G3D_CLK_G3D_HPM 5
+#define G3D_CLK_G3D 6
+#define G3D_NR_CLK 7
+
+
+/* List Of Clocks For CMU_AUD */
+
+#define AUD_MOUT_SCLK_AUD_PCM 1
+#define AUD_MOUT_SCLK_AUD_I2S 2
+#define AUD_MOUT_AUD_PLL_USER 3
+#define AUD_DOUT_ACLK_AUD_131 4
+#define AUD_DOUT_SCLK_AUD_UART 5
+#define AUD_DOUT_SCLK_AUD_PCM 6
+#define AUD_DOUT_SCLK_AUD_I2S 7
+#define AUD_CLK_AUD_UART 8
+#define AUD_CLK_PCM 9
+#define AUD_CLK_I2S 10
+#define AUD_CLK_DMAC 11
+#define AUD_CLK_SRAMC 12
+#define AUD_SCLK_AUD_UART 13
+#define AUD_SCLK_PCM 14
+#define AUD_SCLK_I2S 15
+#define AUD_NR_CLK 16
+
+
+/* List Of Clocks For CMU_MFC */
+
+#define MFC_MOUT_ACLK_MFC_333_USER 1
+#define MFC_DOUT_PCLK_MFC_83 2
+#define MFC_CLK_MFC 3
+#define MFC_CLK_SMMU2_MFCM1 4
+#define MFC_CLK_SMMU2_MFCM0 5
+#define MFC_NR_CLK 6
+
+
+/* List Of Clocks For CMU_GSCL */
+
+#define GSCL_MOUT_ACLK_CSIS 1
+#define GSCL_MOUT_ACLK_GSCL_FIMC_USER 2
+#define GSCL_MOUT_ACLK_M2M_400_USER 3
+#define GSCL_MOUT_ACLK_GSCL_333_USER 4
+#define GSCL_DOUT_ACLK_CSIS_200 5
+#define GSCL_DOUT_PCLK_M2M_100 6
+#define GSCL_CLK_PIXEL_GSCL1 7
+#define GSCL_CLK_PIXEL_GSCL0 8
+#define GSCL_CLK_MSCL1 9
+#define GSCL_CLK_MSCL0 10
+#define GSCL_CLK_GSCL1 11
+#define GSCL_CLK_GSCL0 12
+#define GSCL_CLK_FIMC_LITE_D 13
+#define GSCL_CLK_FIMC_LITE_B 14
+#define GSCL_CLK_FIMC_LITE_A 15
+#define GSCL_CLK_CSIS1 16
+#define GSCL_CLK_CSIS0 17
+#define GSCL_CLK_SMMU3_LITE_D 18
+#define GSCL_CLK_SMMU3_LITE_B 19
+#define GSCL_CLK_SMMU3_LITE_A 20
+#define GSCL_CLK_SMMU3_GSCL0 21
+#define GSCL_CLK_SMMU3_GSCL1 22
+#define GSCL_CLK_SMMU3_MSCL0 23
+#define GSCL_CLK_SMMU3_MSCL1 24
+#define GSCL_SCLK_CSIS1_WRAP 25
+#define GSCL_SCLK_CSIS0_WRAP 26
+#define GSCL_NR_CLK 27
+
+
+/* List Of Clocks For CMU_FSYS */
+
+#define FSYS_MOUT_PHYCLK_USBHOST20_PHYCLK_USER 1
+#define FSYS_MOUT_PHYCLK_USBHOST20_FREECLK_USER 2
+#define FSYS_MOUT_PHYCLK_USBHOST20_CLK48MOHCI_USER 3
+#define FSYS_MOUT_PHYCLK_USBDRD30_PIPE_PCLK_USER 4
+#define FSYS_MOUT_PHYCLK_USBDRD30_PHYCLOCK_USER 5
+#define FSYS_CLK_TSI 6
+#define FSYS_CLK_USBLINK 7
+#define FSYS_CLK_USBHOST20 8
+#define FSYS_CLK_USBDRD30 9
+#define FSYS_CLK_SROMC 10
+#define FSYS_CLK_PDMA 11
+#define FSYS_CLK_MMC2 12
+#define FSYS_CLK_MMC1 13
+#define FSYS_CLK_MMC0 14
+#define FSYS_CLK_RTIC 15
+#define FSYS_CLK_SMMU_RTIC 16
+#define FSYS_PHYCLK_USBDRD30 17
+#define FSYS_PHYCLK_USBHOST20 18
+#define FSYS_NR_CLK 19
+
+
+/* List Of Clocks For CMU_PERI */
+
+#define PERI_MOUT_SCLK_SPDIF 1
+#define PERI_MOUT_SCLK_I2SCOD 2
+#define PERI_MOUT_SCLK_PCM 3
+#define PERI_DOUT_I2S 4
+#define PERI_DOUT_PCM 5
+#define PERI_CLK_WDT_KFC 6
+#define PERI_CLK_WDT_EGL 7
+#define PERI_CLK_HSIC3 8
+#define PERI_CLK_HSIC2 9
+#define PERI_CLK_HSIC1 10
+#define PERI_CLK_HSIC0 11
+#define PERI_CLK_PCM 12
+#define PERI_CLK_MCT 13
+#define PERI_CLK_I2S 14
+#define PERI_CLK_I2CHDMI 15
+#define PERI_CLK_I2C7 16
+#define PERI_CLK_I2C6 17
+#define PERI_CLK_I2C5 18
+#define PERI_CLK_I2C4 19
+#define PERI_CLK_I2C9 20
+#define PERI_CLK_I2C8 21
+#define PERI_CLK_I2C11 22
+#define PERI_CLK_I2C10 23
+#define PERI_CLK_HDMICEC 24
+#define PERI_CLK_EFUSE_WRITER 25
+#define PERI_CLK_ABB 26
+#define PERI_CLK_UART2 27
+#define PERI_CLK_UART1 28
+#define PERI_CLK_UART0 29
+#define PERI_CLK_ADC 30
+#define PERI_CLK_TMU4 31
+#define PERI_CLK_TMU3 32
+#define PERI_CLK_TMU2 33
+#define PERI_CLK_TMU1 34
+#define PERI_CLK_TMU0 35
+#define PERI_CLK_SPI2 36
+#define PERI_CLK_SPI1 37
+#define PERI_CLK_SPI0 38
+#define PERI_CLK_SPDIF 39
+#define PERI_CLK_PWM 40
+#define PERI_CLK_UART4 41
+#define PERI_CLK_CHIPID 42
+#define PERI_CLK_PROVKEY0 43
+#define PERI_CLK_PROVKEY1 44
+#define PERI_CLK_SECKEY 45
+#define PERI_CLK_TOP_RTC 46
+#define PERI_CLK_TZPC10 47
+#define PERI_CLK_TZPC9 48
+#define PERI_CLK_TZPC8 49
+#define PERI_CLK_TZPC7 50
+#define PERI_CLK_TZPC6 51
+#define PERI_CLK_TZPC5 52
+#define PERI_CLK_TZPC4 53
+#define PERI_CLK_TZPC3 54
+#define PERI_CLK_TZPC2 55
+#define PERI_CLK_TZPC1 56
+#define PERI_CLK_TZPC0 57
+#define PERI_SCLK_UART2 58
+#define PERI_SCLK_UART1 59
+#define PERI_SCLK_UART0 60
+#define PERI_SCLK_SPI2 61
+#define PERI_SCLK_SPI1 62
+#define PERI_SCLK_SPI0 63
+#define PERI_SCLK_SPDIF 64
+#define PERI_SCLK_I2S 65
+#define PERI_SCLK_PCM1 66
+#define PERI_NR_CLK 67
+
+
+/* List Of Clocks For CMU_DISP */
+
+#define DISP_MOUT_SCLK_HDMI_SPDIF 1
+#define DISP_MOUT_SCLK_HDMI_PIXEL 2
+#define DISP_MOUT_PHYCLK_MIPI_DPHY_4LMRXCLK_ESC0_USER 3
+#define DISP_MOUT_PHYCLK_HDMI_PHY_TMDS_CLKO_USER 4
+#define DISP_MOUT_PHYCLK_HDMI_PHY_REF_CLKO_USER 5
+#define DISP_MOUT_HDMI_PHY_PIXEL 6
+#define DISP_MOUT_PHYCLK_HDMI_LINK_O_TMDS_CLKHI_USER 7
+#define DISP_MOUT_PHYCLK_MIPI_DPHY_4L_M_TXBYTE_CLKHS 8
+#define DISP_MOUT_PHYCLK_DPTX_PHY_O_REF_CLK_24M_USER 9
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CLK_DIV2_USER 10
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CH3_TXD_CLK_USER 11
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CH2_TXD_CLK_USER 12
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CH1_TXD_CLK_USER 13
+#define DISP_MOUT_PHYCLK_DPTX_PHY_CH0_TXD_CLK_USER 14
+#define DISP_MOUT_ACLK_DISP_222_USER 15
+#define DISP_MOUT_SCLK_DISP_PIXEL_USER 16
+#define DISP_MOUT_ACLK_DISP_333_USER 17
+#define DISP_DOUT_SCLK_HDMI_PHY_PIXEL_CLKI 18
+#define DISP_DOUT_SCLK_FIMD1_EXTCLKPLL 19
+#define DISP_DOUT_PCLK_DISP_111 20
+#define DISP_CLK_SMMU_TV 21
+#define DISP_CLK_SMMU_FIMD1M1 22
+#define DISP_CLK_SMMU_FIMD1M0 23
+#define DISP_CLK_PIXEL_MIXER 24
+#define DISP_CLK_PIXEL_DISP 25
+#define DISP_CLK_MIXER 26
+#define DISP_CLK_MIPIPHY 27
+#define DISP_CLK_HDMIPHY 28
+#define DISP_CLK_HDMI 29
+#define DISP_CLK_FIMD1 30
+#define DISP_CLK_DSIM1 31
+#define DISP_CLK_DPPHY 32
+#define DISP_CLK_DP 33
+#define DISP_SCLK_PIXEL 34
+#define DISP_MOUT_HDMI_PHY_PIXEL_USER 35
+#define DISP_NR_CLK 36
+
+
+/* List Of Clocks For CMU_G2D */
+
+#define G2D_MOUT_ACLK_G2D_333_USER 1
+#define G2D_DOUT_PCLK_G2D_83 2
+#define G2D_CLK_SMMU3_JPEG 3
+#define G2D_CLK_MDMA 4
+#define G2D_CLK_JPEG 5
+#define G2D_CLK_G2D 6
+#define G2D_CLK_SSS 7
+#define G2D_CLK_SLIM_SSS 8
+#define G2D_CLK_SMMU_SLIM_SSS 9
+#define G2D_CLK_SMMU_SSS 10
+#define G2D_CLK_SMMU_MDMA 11
+#define G2D_CLK_SMMU3_G2D 12
+#define G2D_NR_CLK 13
+
+
+/* List Of Clocks For CMU_ISP */
+
+#define ISP_MOUT_ISP_400_USER 1
+#define ISP_MOUT_ISP_266_USER 2
+#define ISP_DOUT_SCLK_MPWM 3
+#define ISP_DOUT_CA5_PCLKDBG 4
+#define ISP_DOUT_CA5_ATCLKIN 5
+#define ISP_DOUT_PCLK_ISP_133 6
+#define ISP_DOUT_PCLK_ISP_66 7
+#define ISP_CLK_GIC 8
+#define ISP_CLK_WDT 9
+#define ISP_CLK_UART 10
+#define ISP_CLK_SPI1 11
+#define ISP_CLK_SPI0 12
+#define ISP_CLK_SMMU_SCALERP 13
+#define ISP_CLK_SMMU_SCALERC 14
+#define ISP_CLK_SMMU_ISPCX 15
+#define ISP_CLK_SMMU_ISP 16
+#define ISP_CLK_SMMU_FD 17
+#define ISP_CLK_SMMU_DRC 18
+#define ISP_CLK_PWM 19
+#define ISP_CLK_MTCADC 20
+#define ISP_CLK_MPWM 21
+#define ISP_CLK_MCUCTL 22
+#define ISP_CLK_I2C1 23
+#define ISP_CLK_I2C0 24
+#define ISP_CLK_FIMC_SCALERP 25
+#define ISP_CLK_FIMC_SCALERC 26
+#define ISP_CLK_FIMC 27
+#define ISP_CLK_FIMC_FD 28
+#define ISP_CLK_FIMC_DRC 29
+#define ISP_CLK_CA5 30
+#define ISP_SCLK_SPI0_EXT 31
+#define ISP_SCLK_SPI1_EXT 32
+#define ISP_SCLK_UART_EXT 33
+#define ISP_NR_CLK 34
+
+#endif
diff --git a/include/dt-bindings/clock/exynos5410.h b/include/dt-bindings/clock/exynos5410.h
new file mode 100644
index 00000000000..9b180f032e2
--- /dev/null
+++ b/include/dt-bindings/clock/exynos5410.h
@@ -0,0 +1,33 @@
+#ifndef _DT_BINDINGS_CLOCK_EXYNOS_5410_H
+#define _DT_BINDINGS_CLOCK_EXYNOS_5410_H
+
+/* core clocks */
+#define CLK_FIN_PLL 1
+#define CLK_FOUT_APLL 2
+#define CLK_FOUT_CPLL 3
+#define CLK_FOUT_MPLL 4
+#define CLK_FOUT_BPLL 5
+#define CLK_FOUT_KPLL 6
+
+/* gate for special clocks (sclk) */
+#define CLK_SCLK_UART0 128
+#define CLK_SCLK_UART1 129
+#define CLK_SCLK_UART2 130
+#define CLK_SCLK_UART3 131
+#define CLK_SCLK_MMC0 132
+#define CLK_SCLK_MMC1 133
+#define CLK_SCLK_MMC2 134
+
+/* gate clocks */
+#define CLK_UART0 257
+#define CLK_UART1 258
+#define CLK_UART2 259
+#define CLK_UART3 260
+#define CLK_MCT 315
+#define CLK_MMC0 351
+#define CLK_MMC1 352
+#define CLK_MMC2 353
+
+#define CLK_NR_CLKS 512
+
+#endif /* _DT_BINDINGS_CLOCK_EXYNOS_5410_H */
diff --git a/include/dt-bindings/clock/exynos5420.h b/include/dt-bindings/clock/exynos5420.h
index 5eefd8813f0..97dcb89d37d 100644
--- a/include/dt-bindings/clock/exynos5420.h
+++ b/include/dt-bindings/clock/exynos5420.h
@@ -58,6 +58,9 @@
#define CLK_SCLK_GSCL_WA 156
#define CLK_SCLK_GSCL_WB 157
#define CLK_SCLK_HDMIPHY 158
+#define CLK_MAU_EPLL 159
+#define CLK_SCLK_HSIC_12M 160
+#define CLK_SCLK_MPHY_IXTAL24 161
/* gate clocks */
#define CLK_ACLK66_PERIC 256
@@ -69,10 +72,10 @@
#define CLK_I2C1 262
#define CLK_I2C2 263
#define CLK_I2C3 264
-#define CLK_I2C4 265
-#define CLK_I2C5 266
-#define CLK_I2C6 267
-#define CLK_I2C7 268
+#define CLK_USI0 265
+#define CLK_USI1 266
+#define CLK_USI2 267
+#define CLK_USI3 268
#define CLK_I2C_HDMI 269
#define CLK_TSADC 270
#define CLK_SPI0 271
@@ -85,9 +88,9 @@
#define CLK_PCM2 278
#define CLK_PWM 279
#define CLK_SPDIF 280
-#define CLK_I2C8 281
-#define CLK_I2C9 282
-#define CLK_I2C10 283
+#define CLK_USI4 281
+#define CLK_USI5 282
+#define CLK_USI6 283
#define CLK_ACLK66_PSGEN 300
#define CLK_CHIPID 301
#define CLK_SYSREG 302
@@ -140,7 +143,8 @@
#define CLK_HDMI 413
#define CLK_ACLK300_DISP1 420
#define CLK_FIMD1 421
-#define CLK_SMMU_FIMD1 422
+#define CLK_SMMU_FIMD1M0 422
+#define CLK_SMMU_FIMD1M1 423
#define CLK_ACLK166 430
#define CLK_MIXER 431
#define CLK_ACLK266 440
@@ -152,6 +156,7 @@
#define CLK_JPEG 451
#define CLK_JPEG2 452
#define CLK_SMMU_JPEG 453
+#define CLK_SMMU_JPEG2 454
#define CLK_ACLK300_GSCL 460
#define CLK_SMMU_GSCL0 461
#define CLK_SMMU_GSCL1 462
@@ -159,7 +164,7 @@
#define CLK_GSCL_WB 464
#define CLK_GSCL0 465
#define CLK_GSCL1 466
-#define CLK_CLK_3AA 467
+#define CLK_FIMC_3AA 467
#define CLK_ACLK266_G2D 470
#define CLK_SSS 471
#define CLK_SLIM_SSS 472
@@ -172,12 +177,32 @@
#define CLK_SMMU_FIMCL1 493
#define CLK_SMMU_FIMCL3 494
#define CLK_FIMC_LITE3 495
+#define CLK_FIMC_LITE0 496
+#define CLK_FIMC_LITE1 497
#define CLK_ACLK_G3D 500
#define CLK_G3D 501
#define CLK_SMMU_MIXER 502
+#define CLK_SMMU_G2D 503
+#define CLK_SMMU_MDMA0 504
+#define CLK_MC 505
+#define CLK_TOP_RTC 506
+#define CLK_SCLK_UART_ISP 510
+#define CLK_SCLK_SPI0_ISP 511
+#define CLK_SCLK_SPI1_ISP 512
+#define CLK_SCLK_PWM_ISP 513
+#define CLK_SCLK_ISP_SENSOR0 514
+#define CLK_SCLK_ISP_SENSOR1 515
+#define CLK_SCLK_ISP_SENSOR2 516
+#define CLK_ACLK432_SCALER 517
+#define CLK_ACLK432_CAM 518
+#define CLK_ACLK_FL1550_CAM 519
+#define CLK_ACLK550_CAM 520
/* mux clocks */
#define CLK_MOUT_HDMI 640
+#define CLK_MOUT_G3D 641
+#define CLK_MOUT_VPLL 642
+#define CLK_MOUT_MAUDIO0 643
/* divider clocks */
#define CLK_DOUT_PIXEL 768
diff --git a/include/dt-bindings/clock/imx6sx-clock.h b/include/dt-bindings/clock/imx6sx-clock.h
new file mode 100644
index 00000000000..421d8bb76f2
--- /dev/null
+++ b/include/dt-bindings/clock/imx6sx-clock.h
@@ -0,0 +1,256 @@
+/*
+ * Copyright (C) 2014 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_IMX6SX_H
+#define __DT_BINDINGS_CLOCK_IMX6SX_H
+
+#define IMX6SX_CLK_DUMMY 0
+#define IMX6SX_CLK_CKIL 1
+#define IMX6SX_CLK_CKIH 2
+#define IMX6SX_CLK_OSC 3
+#define IMX6SX_CLK_PLL1_SYS 4
+#define IMX6SX_CLK_PLL2_BUS 5
+#define IMX6SX_CLK_PLL3_USB_OTG 6
+#define IMX6SX_CLK_PLL4_AUDIO 7
+#define IMX6SX_CLK_PLL5_VIDEO 8
+#define IMX6SX_CLK_PLL6_ENET 9
+#define IMX6SX_CLK_PLL7_USB_HOST 10
+#define IMX6SX_CLK_USBPHY1 11
+#define IMX6SX_CLK_USBPHY2 12
+#define IMX6SX_CLK_USBPHY1_GATE 13
+#define IMX6SX_CLK_USBPHY2_GATE 14
+#define IMX6SX_CLK_PCIE_REF 15
+#define IMX6SX_CLK_PCIE_REF_125M 16
+#define IMX6SX_CLK_ENET_REF 17
+#define IMX6SX_CLK_PLL2_PFD0 18
+#define IMX6SX_CLK_PLL2_PFD1 19
+#define IMX6SX_CLK_PLL2_PFD2 20
+#define IMX6SX_CLK_PLL2_PFD3 21
+#define IMX6SX_CLK_PLL3_PFD0 22
+#define IMX6SX_CLK_PLL3_PFD1 23
+#define IMX6SX_CLK_PLL3_PFD2 24
+#define IMX6SX_CLK_PLL3_PFD3 25
+#define IMX6SX_CLK_PLL2_198M 26
+#define IMX6SX_CLK_PLL3_120M 27
+#define IMX6SX_CLK_PLL3_80M 28
+#define IMX6SX_CLK_PLL3_60M 29
+#define IMX6SX_CLK_TWD 30
+#define IMX6SX_CLK_PLL4_POST_DIV 31
+#define IMX6SX_CLK_PLL4_AUDIO_DIV 32
+#define IMX6SX_CLK_PLL5_POST_DIV 33
+#define IMX6SX_CLK_PLL5_VIDEO_DIV 34
+#define IMX6SX_CLK_STEP 35
+#define IMX6SX_CLK_PLL1_SW 36
+#define IMX6SX_CLK_OCRAM_SEL 37
+#define IMX6SX_CLK_PERIPH_PRE 38
+#define IMX6SX_CLK_PERIPH2_PRE 39
+#define IMX6SX_CLK_PERIPH_CLK2_SEL 40
+#define IMX6SX_CLK_PERIPH2_CLK2_SEL 41
+#define IMX6SX_CLK_PCIE_AXI_SEL 42
+#define IMX6SX_CLK_GPU_AXI_SEL 43
+#define IMX6SX_CLK_GPU_CORE_SEL 44
+#define IMX6SX_CLK_EIM_SLOW_SEL 45
+#define IMX6SX_CLK_USDHC1_SEL 46
+#define IMX6SX_CLK_USDHC2_SEL 47
+#define IMX6SX_CLK_USDHC3_SEL 48
+#define IMX6SX_CLK_USDHC4_SEL 49
+#define IMX6SX_CLK_SSI1_SEL 50
+#define IMX6SX_CLK_SSI2_SEL 51
+#define IMX6SX_CLK_SSI3_SEL 52
+#define IMX6SX_CLK_QSPI1_SEL 53
+#define IMX6SX_CLK_PERCLK_SEL 54
+#define IMX6SX_CLK_VID_SEL 55
+#define IMX6SX_CLK_ESAI_SEL 56
+#define IMX6SX_CLK_LDB_DI0_DIV_SEL 57
+#define IMX6SX_CLK_LDB_DI1_DIV_SEL 58
+#define IMX6SX_CLK_CAN_SEL 59
+#define IMX6SX_CLK_UART_SEL 60
+#define IMX6SX_CLK_QSPI2_SEL 61
+#define IMX6SX_CLK_LDB_DI1_SEL 62
+#define IMX6SX_CLK_LDB_DI0_SEL 63
+#define IMX6SX_CLK_SPDIF_SEL 64
+#define IMX6SX_CLK_AUDIO_SEL 65
+#define IMX6SX_CLK_ENET_PRE_SEL 66
+#define IMX6SX_CLK_ENET_SEL 67
+#define IMX6SX_CLK_M4_PRE_SEL 68
+#define IMX6SX_CLK_M4_SEL 69
+#define IMX6SX_CLK_ECSPI_SEL 70
+#define IMX6SX_CLK_LCDIF1_PRE_SEL 71
+#define IMX6SX_CLK_LCDIF2_PRE_SEL 72
+#define IMX6SX_CLK_LCDIF1_SEL 73
+#define IMX6SX_CLK_LCDIF2_SEL 74
+#define IMX6SX_CLK_DISPLAY_SEL 75
+#define IMX6SX_CLK_CSI_SEL 76
+#define IMX6SX_CLK_CKO1_SEL 77
+#define IMX6SX_CLK_CKO2_SEL 78
+#define IMX6SX_CLK_CKO 79
+#define IMX6SX_CLK_PERIPH_CLK2 80
+#define IMX6SX_CLK_PERIPH2_CLK2 81
+#define IMX6SX_CLK_IPG 82
+#define IMX6SX_CLK_GPU_CORE_PODF 83
+#define IMX6SX_CLK_GPU_AXI_PODF 84
+#define IMX6SX_CLK_LCDIF1_PODF 85
+#define IMX6SX_CLK_QSPI1_PODF 86
+#define IMX6SX_CLK_EIM_SLOW_PODF 87
+#define IMX6SX_CLK_LCDIF2_PODF 88
+#define IMX6SX_CLK_PERCLK 89
+#define IMX6SX_CLK_VID_PODF 90
+#define IMX6SX_CLK_CAN_PODF 91
+#define IMX6SX_CLK_USDHC1_PODF 92
+#define IMX6SX_CLK_USDHC2_PODF 93
+#define IMX6SX_CLK_USDHC3_PODF 94
+#define IMX6SX_CLK_USDHC4_PODF 95
+#define IMX6SX_CLK_UART_PODF 96
+#define IMX6SX_CLK_ESAI_PRED 97
+#define IMX6SX_CLK_ESAI_PODF 98
+#define IMX6SX_CLK_SSI3_PRED 99
+#define IMX6SX_CLK_SSI3_PODF 100
+#define IMX6SX_CLK_SSI1_PRED 101
+#define IMX6SX_CLK_SSI1_PODF 102
+#define IMX6SX_CLK_QSPI2_PRED 103
+#define IMX6SX_CLK_QSPI2_PODF 104
+#define IMX6SX_CLK_SSI2_PRED 105
+#define IMX6SX_CLK_SSI2_PODF 106
+#define IMX6SX_CLK_SPDIF_PRED 107
+#define IMX6SX_CLK_SPDIF_PODF 108
+#define IMX6SX_CLK_AUDIO_PRED 109
+#define IMX6SX_CLK_AUDIO_PODF 110
+#define IMX6SX_CLK_ENET_PODF 111
+#define IMX6SX_CLK_M4_PODF 112
+#define IMX6SX_CLK_ECSPI_PODF 113
+#define IMX6SX_CLK_LCDIF1_PRED 114
+#define IMX6SX_CLK_LCDIF2_PRED 115
+#define IMX6SX_CLK_DISPLAY_PODF 116
+#define IMX6SX_CLK_CSI_PODF 117
+#define IMX6SX_CLK_LDB_DI0_DIV_3_5 118
+#define IMX6SX_CLK_LDB_DI0_DIV_7 119
+#define IMX6SX_CLK_LDB_DI1_DIV_3_5 120
+#define IMX6SX_CLK_LDB_DI1_DIV_7 121
+#define IMX6SX_CLK_CKO1_PODF 122
+#define IMX6SX_CLK_CKO2_PODF 123
+#define IMX6SX_CLK_PERIPH 124
+#define IMX6SX_CLK_PERIPH2 125
+#define IMX6SX_CLK_OCRAM 126
+#define IMX6SX_CLK_AHB 127
+#define IMX6SX_CLK_MMDC_PODF 128
+#define IMX6SX_CLK_ARM 129
+#define IMX6SX_CLK_AIPS_TZ1 130
+#define IMX6SX_CLK_AIPS_TZ2 131
+#define IMX6SX_CLK_APBH_DMA 132
+#define IMX6SX_CLK_ASRC_GATE 133
+#define IMX6SX_CLK_CAAM_MEM 134
+#define IMX6SX_CLK_CAAM_ACLK 135
+#define IMX6SX_CLK_CAAM_IPG 136
+#define IMX6SX_CLK_CAN1_IPG 137
+#define IMX6SX_CLK_CAN1_SERIAL 138
+#define IMX6SX_CLK_CAN2_IPG 139
+#define IMX6SX_CLK_CAN2_SERIAL 140
+#define IMX6SX_CLK_CPU_DEBUG 141
+#define IMX6SX_CLK_DCIC1 142
+#define IMX6SX_CLK_DCIC2 143
+#define IMX6SX_CLK_AIPS_TZ3 144
+#define IMX6SX_CLK_ECSPI1 145
+#define IMX6SX_CLK_ECSPI2 146
+#define IMX6SX_CLK_ECSPI3 147
+#define IMX6SX_CLK_ECSPI4 148
+#define IMX6SX_CLK_ECSPI5 149
+#define IMX6SX_CLK_EPIT1 150
+#define IMX6SX_CLK_EPIT2 151
+#define IMX6SX_CLK_ESAI_EXTAL 152
+#define IMX6SX_CLK_WAKEUP 153
+#define IMX6SX_CLK_GPT_BUS 154
+#define IMX6SX_CLK_GPT_SERIAL 155
+#define IMX6SX_CLK_GPU 156
+#define IMX6SX_CLK_OCRAM_S 157
+#define IMX6SX_CLK_CANFD 158
+#define IMX6SX_CLK_CSI 159
+#define IMX6SX_CLK_I2C1 160
+#define IMX6SX_CLK_I2C2 161
+#define IMX6SX_CLK_I2C3 162
+#define IMX6SX_CLK_OCOTP 163
+#define IMX6SX_CLK_IOMUXC 164
+#define IMX6SX_CLK_IPMUX1 165
+#define IMX6SX_CLK_IPMUX2 166
+#define IMX6SX_CLK_IPMUX3 167
+#define IMX6SX_CLK_TZASC1 168
+#define IMX6SX_CLK_LCDIF_APB 169
+#define IMX6SX_CLK_PXP_AXI 170
+#define IMX6SX_CLK_M4 171
+#define IMX6SX_CLK_ENET 172
+#define IMX6SX_CLK_DISPLAY_AXI 173
+#define IMX6SX_CLK_LCDIF2_PIX 174
+#define IMX6SX_CLK_LCDIF1_PIX 175
+#define IMX6SX_CLK_LDB_DI0 176
+#define IMX6SX_CLK_QSPI1 177
+#define IMX6SX_CLK_MLB 178
+#define IMX6SX_CLK_MMDC_P0_FAST 179
+#define IMX6SX_CLK_MMDC_P0_IPG 180
+#define IMX6SX_CLK_AXI 181
+#define IMX6SX_CLK_PCIE_AXI 182
+#define IMX6SX_CLK_QSPI2 183
+#define IMX6SX_CLK_PER1_BCH 184
+#define IMX6SX_CLK_PER2_MAIN 185
+#define IMX6SX_CLK_PWM1 186
+#define IMX6SX_CLK_PWM2 187
+#define IMX6SX_CLK_PWM3 188
+#define IMX6SX_CLK_PWM4 189
+#define IMX6SX_CLK_GPMI_BCH_APB 190
+#define IMX6SX_CLK_GPMI_BCH 191
+#define IMX6SX_CLK_GPMI_IO 192
+#define IMX6SX_CLK_GPMI_APB 193
+#define IMX6SX_CLK_ROM 194
+#define IMX6SX_CLK_SDMA 195
+#define IMX6SX_CLK_SPBA 196
+#define IMX6SX_CLK_SPDIF 197
+#define IMX6SX_CLK_SSI1_IPG 198
+#define IMX6SX_CLK_SSI2_IPG 199
+#define IMX6SX_CLK_SSI3_IPG 200
+#define IMX6SX_CLK_SSI1 201
+#define IMX6SX_CLK_SSI2 202
+#define IMX6SX_CLK_SSI3 203
+#define IMX6SX_CLK_UART_IPG 204
+#define IMX6SX_CLK_UART_SERIAL 205
+#define IMX6SX_CLK_SAI1 206
+#define IMX6SX_CLK_SAI2 207
+#define IMX6SX_CLK_USBOH3 208
+#define IMX6SX_CLK_USDHC1 209
+#define IMX6SX_CLK_USDHC2 210
+#define IMX6SX_CLK_USDHC3 211
+#define IMX6SX_CLK_USDHC4 212
+#define IMX6SX_CLK_EIM_SLOW 213
+#define IMX6SX_CLK_PWM8 214
+#define IMX6SX_CLK_VADC 215
+#define IMX6SX_CLK_GIS 216
+#define IMX6SX_CLK_I2C4 217
+#define IMX6SX_CLK_PWM5 218
+#define IMX6SX_CLK_PWM6 219
+#define IMX6SX_CLK_PWM7 220
+#define IMX6SX_CLK_CKO1 221
+#define IMX6SX_CLK_CKO2 222
+#define IMX6SX_CLK_IPP_DI0 223
+#define IMX6SX_CLK_IPP_DI1 224
+#define IMX6SX_CLK_ENET_AHB 225
+#define IMX6SX_CLK_OCRAM_PODF 226
+#define IMX6SX_CLK_GPT_3M 227
+#define IMX6SX_CLK_ENET_PTP 228
+#define IMX6SX_CLK_ENET_PTP_REF 229
+#define IMX6SX_CLK_ENET2_REF 230
+#define IMX6SX_CLK_ENET2_REF_125M 231
+#define IMX6SX_CLK_AUDIO 232
+#define IMX6SX_CLK_LVDS1_SEL 233
+#define IMX6SX_CLK_LVDS1_OUT 234
+#define IMX6SX_CLK_ASRC_IPG 235
+#define IMX6SX_CLK_ASRC_MEM 236
+#define IMX6SX_CLK_SAI1_IPG 237
+#define IMX6SX_CLK_SAI2_IPG 238
+#define IMX6SX_CLK_ESAI_IPG 239
+#define IMX6SX_CLK_ESAI_MEM 240
+#define IMX6SX_CLK_CLK_END 241
+
+#endif /* __DT_BINDINGS_CLOCK_IMX6SX_H */
diff --git a/include/dt-bindings/clock/lsi,axm5516-clks.h b/include/dt-bindings/clock/lsi,axm5516-clks.h
new file mode 100644
index 00000000000..beb41ace5dd
--- /dev/null
+++ b/include/dt-bindings/clock/lsi,axm5516-clks.h
@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2014 LSI Corporation
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ */
+
+#ifndef _DT_BINDINGS_CLK_AXM5516_H
+#define _DT_BINDINGS_CLK_AXM5516_H
+
+#define AXXIA_CLK_FAB_PLL 0
+#define AXXIA_CLK_CPU_PLL 1
+#define AXXIA_CLK_SYS_PLL 2
+#define AXXIA_CLK_SM0_PLL 3
+#define AXXIA_CLK_SM1_PLL 4
+#define AXXIA_CLK_FAB_DIV 5
+#define AXXIA_CLK_SYS_DIV 6
+#define AXXIA_CLK_NRCP_DIV 7
+#define AXXIA_CLK_CPU0_DIV 8
+#define AXXIA_CLK_CPU1_DIV 9
+#define AXXIA_CLK_CPU2_DIV 10
+#define AXXIA_CLK_CPU3_DIV 11
+#define AXXIA_CLK_PER_DIV 12
+#define AXXIA_CLK_MMC_DIV 13
+#define AXXIA_CLK_FAB 14
+#define AXXIA_CLK_SYS 15
+#define AXXIA_CLK_NRCP 16
+#define AXXIA_CLK_CPU0 17
+#define AXXIA_CLK_CPU1 18
+#define AXXIA_CLK_CPU2 19
+#define AXXIA_CLK_CPU3 20
+#define AXXIA_CLK_PER 21
+#define AXXIA_CLK_MMC 22
+
+#endif
diff --git a/include/dt-bindings/clock/r7s72100-clock.h b/include/dt-bindings/clock/r7s72100-clock.h
new file mode 100644
index 00000000000..5128f4d94f4
--- /dev/null
+++ b/include/dt-bindings/clock/r7s72100-clock.h
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2014 Renesas Solutions Corp.
+ * Copyright (C) 2014 Wolfram Sang, Sang Engineering <wsa@sang-engineering.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ */
+
+#ifndef __DT_BINDINGS_CLOCK_R7S72100_H__
+#define __DT_BINDINGS_CLOCK_R7S72100_H__
+
+#define R7S72100_CLK_PLL 0
+
+/* MSTP3 */
+#define R7S72100_CLK_MTU2 3
+
+/* MSTP4 */
+#define R7S72100_CLK_SCIF0 7
+#define R7S72100_CLK_SCIF1 6
+#define R7S72100_CLK_SCIF2 5
+#define R7S72100_CLK_SCIF3 4
+#define R7S72100_CLK_SCIF4 3
+#define R7S72100_CLK_SCIF5 2
+#define R7S72100_CLK_SCIF6 1
+#define R7S72100_CLK_SCIF7 0
+
+/* MSTP9 */
+#define R7S72100_CLK_I2C0 7
+#define R7S72100_CLK_I2C1 6
+#define R7S72100_CLK_I2C2 5
+#define R7S72100_CLK_I2C3 4
+
+/* MSTP10 */
+#define R7S72100_CLK_SPI0 7
+#define R7S72100_CLK_SPI1 6
+#define R7S72100_CLK_SPI2 5
+#define R7S72100_CLK_SPI3 4
+#define R7S72100_CLK_SPI4 3
+
+#endif /* __DT_BINDINGS_CLOCK_R7S72100_H__ */
diff --git a/include/dt-bindings/clock/r8a7790-clock.h b/include/dt-bindings/clock/r8a7790-clock.h
index 6548a5fbcf4..1118f7a4bca 100644
--- a/include/dt-bindings/clock/r8a7790-clock.h
+++ b/include/dt-bindings/clock/r8a7790-clock.h
@@ -33,8 +33,8 @@
#define R8A7790_CLK_TMU0 25
#define R8A7790_CLK_VSP1_DU1 27
#define R8A7790_CLK_VSP1_DU0 28
-#define R8A7790_CLK_VSP1_RT 30
-#define R8A7790_CLK_VSP1_SY 31
+#define R8A7790_CLK_VSP1_R 30
+#define R8A7790_CLK_VSP1_S 31
/* MSTP2 */
#define R8A7790_CLK_SCIFA2 2
@@ -50,6 +50,7 @@
#define R8A7790_CLK_SYS_DMAC0 19
/* MSTP3 */
+#define R8A7790_CLK_IIC2 0
#define R8A7790_CLK_TPU0 4
#define R8A7790_CLK_MMCIF1 5
#define R8A7790_CLK_SDHI3 11
@@ -57,6 +58,8 @@
#define R8A7790_CLK_SDHI1 13
#define R8A7790_CLK_SDHI0 14
#define R8A7790_CLK_MMCIF0 15
+#define R8A7790_CLK_IIC0 18
+#define R8A7790_CLK_IIC1 23
#define R8A7790_CLK_SSUSB 28
#define R8A7790_CLK_CMT1 29
#define R8A7790_CLK_USBDMAC0 30
diff --git a/include/dt-bindings/clock/r8a7791-clock.h b/include/dt-bindings/clock/r8a7791-clock.h
index 30f82f286e2..b050d18437c 100644
--- a/include/dt-bindings/clock/r8a7791-clock.h
+++ b/include/dt-bindings/clock/r8a7791-clock.h
@@ -32,7 +32,7 @@
#define R8A7791_CLK_TMU0 25
#define R8A7791_CLK_VSP1_DU1 27
#define R8A7791_CLK_VSP1_DU0 28
-#define R8A7791_CLK_VSP1_SY 31
+#define R8A7791_CLK_VSP1_S 31
/* MSTP2 */
#define R8A7791_CLK_SCIFA2 2
@@ -43,7 +43,8 @@
#define R8A7791_CLK_SCIFB1 7
#define R8A7791_CLK_MSIOF1 8
#define R8A7791_CLK_SCIFB2 16
-#define R8A7791_CLK_DMAC 18
+#define R8A7791_CLK_SYS_DMAC1 18
+#define R8A7791_CLK_SYS_DMAC0 19
/* MSTP3 */
#define R8A7791_CLK_TPU0 4
@@ -51,6 +52,8 @@
#define R8A7791_CLK_SDHI1 12
#define R8A7791_CLK_SDHI0 14
#define R8A7791_CLK_MMCIF0 15
+#define R8A7791_CLK_IIC0 18
+#define R8A7791_CLK_IIC1 23
#define R8A7791_CLK_SSUSB 28
#define R8A7791_CLK_CMT1 29
#define R8A7791_CLK_USBDMAC0 30
@@ -61,6 +64,7 @@
#define R8A7791_CLK_PWM 23
/* MSTP7 */
+#define R8A7791_CLK_EHCI 3
#define R8A7791_CLK_HSUSB 4
#define R8A7791_CLK_HSCIF2 13
#define R8A7791_CLK_SCIF5 14
diff --git a/include/dt-bindings/clock/s3c2410.h b/include/dt-bindings/clock/s3c2410.h
new file mode 100644
index 00000000000..352a7673fc6
--- /dev/null
+++ b/include/dt-bindings/clock/s3c2410.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clock controllers of Samsung S3C2410 and later.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2410_CLOCK_H
+
+/*
+ * Let each exported clock get a unique index, which is used on DT-enabled
+ * platforms to lookup the clock from a clock specifier. These indices are
+ * therefore considered an ABI and so must not be changed. This implies
+ * that new clocks should be added either in free spaces between clock groups
+ * or at the end.
+ */
+
+/* Core clocks. */
+
+/* id 1 is reserved */
+#define MPLL 2
+#define UPLL 3
+#define FCLK 4
+#define HCLK 5
+#define PCLK 6
+#define UCLK 7
+#define ARMCLK 8
+
+/* pclk-gates */
+#define PCLK_UART0 16
+#define PCLK_UART1 17
+#define PCLK_UART2 18
+#define PCLK_I2C 19
+#define PCLK_SDI 20
+#define PCLK_SPI 21
+#define PCLK_ADC 22
+#define PCLK_AC97 23
+#define PCLK_I2S 24
+#define PCLK_PWM 25
+#define PCLK_RTC 26
+#define PCLK_GPIO 27
+
+
+/* hclk-gates */
+#define HCLK_LCD 32
+#define HCLK_USBH 33
+#define HCLK_USBD 34
+#define HCLK_NAND 35
+#define HCLK_CAM 36
+
+
+#define CAMIF 40
+
+
+/* Total number of clocks. */
+#define NR_CLKS (CAMIF + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */
diff --git a/include/dt-bindings/clock/s3c2412.h b/include/dt-bindings/clock/s3c2412.h
new file mode 100644
index 00000000000..aac1dcfda81
--- /dev/null
+++ b/include/dt-bindings/clock/s3c2412.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clock controllers of Samsung S3C2412.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H
+
+/*
+ * Let each exported clock get a unique index, which is used on DT-enabled
+ * platforms to lookup the clock from a clock specifier. These indices are
+ * therefore considered an ABI and so must not be changed. This implies
+ * that new clocks should be added either in free spaces between clock groups
+ * or at the end.
+ */
+
+/* Core clocks. */
+
+/* id 1 is reserved */
+#define MPLL 2
+#define UPLL 3
+#define MDIVCLK 4
+#define MSYSCLK 5
+#define USYSCLK 6
+#define HCLK 7
+#define PCLK 8
+#define ARMDIV 9
+#define ARMCLK 10
+
+
+/* Special clocks */
+#define SCLK_CAM 16
+#define SCLK_UART 17
+#define SCLK_I2S 18
+#define SCLK_USBD 19
+#define SCLK_USBH 20
+
+/* pclk-gates */
+#define PCLK_WDT 32
+#define PCLK_SPI 33
+#define PCLK_I2S 34
+#define PCLK_I2C 35
+#define PCLK_ADC 36
+#define PCLK_RTC 37
+#define PCLK_GPIO 38
+#define PCLK_UART2 39
+#define PCLK_UART1 40
+#define PCLK_UART0 41
+#define PCLK_SDI 42
+#define PCLK_PWM 43
+#define PCLK_USBD 44
+
+/* hclk-gates */
+#define HCLK_HALF 48
+#define HCLK_X2 49
+#define HCLK_SDRAM 50
+#define HCLK_USBH 51
+#define HCLK_LCD 52
+#define HCLK_NAND 53
+#define HCLK_DMA3 54
+#define HCLK_DMA2 55
+#define HCLK_DMA1 56
+#define HCLK_DMA0 57
+
+/* Total number of clocks. */
+#define NR_CLKS (HCLK_DMA0 + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2412_CLOCK_H */
diff --git a/include/dt-bindings/clock/s3c2443.h b/include/dt-bindings/clock/s3c2443.h
new file mode 100644
index 00000000000..37e66b054d6
--- /dev/null
+++ b/include/dt-bindings/clock/s3c2443.h
@@ -0,0 +1,92 @@
+/*
+ * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Device Tree binding constants clock controllers of Samsung S3C2443 and later.
+ */
+
+#ifndef _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H
+#define _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H
+
+/*
+ * Let each exported clock get a unique index, which is used on DT-enabled
+ * platforms to lookup the clock from a clock specifier. These indices are
+ * therefore considered an ABI and so must not be changed. This implies
+ * that new clocks should be added either in free spaces between clock groups
+ * or at the end.
+ */
+
+/* Core clocks. */
+#define MSYSCLK 1
+#define ESYSCLK 2
+#define ARMDIV 3
+#define ARMCLK 4
+#define HCLK 5
+#define PCLK 6
+
+/* Special clocks */
+#define SCLK_HSSPI0 16
+#define SCLK_FIMD 17
+#define SCLK_I2S0 18
+#define SCLK_I2S1 19
+#define SCLK_HSMMC1 20
+#define SCLK_HSMMC_EXT 21
+#define SCLK_CAM 22
+#define SCLK_UART 23
+#define SCLK_USBH 24
+
+/* Muxes */
+#define MUX_HSSPI0 32
+#define MUX_HSSPI1 33
+#define MUX_HSMMC0 34
+#define MUX_HSMMC1 35
+
+/* hclk-gates */
+#define HCLK_DMA0 48
+#define HCLK_DMA1 49
+#define HCLK_DMA2 50
+#define HCLK_DMA3 51
+#define HCLK_DMA4 52
+#define HCLK_DMA5 53
+#define HCLK_DMA6 54
+#define HCLK_DMA7 55
+#define HCLK_CAM 56
+#define HCLK_LCD 57
+#define HCLK_USBH 58
+#define HCLK_USBD 59
+#define HCLK_IROM 60
+#define HCLK_HSMMC0 61
+#define HCLK_HSMMC1 62
+#define HCLK_CFC 63
+#define HCLK_SSMC 64
+#define HCLK_DRAM 65
+#define HCLK_2D 66
+
+/* pclk-gates */
+#define PCLK_UART0 72
+#define PCLK_UART1 73
+#define PCLK_UART2 74
+#define PCLK_UART3 75
+#define PCLK_I2C0 76
+#define PCLK_SDI 77
+#define PCLK_SPI0 78
+#define PCLK_ADC 79
+#define PCLK_AC97 80
+#define PCLK_I2S0 81
+#define PCLK_PWM 82
+#define PCLK_WDT 83
+#define PCLK_RTC 84
+#define PCLK_GPIO 85
+#define PCLK_SPI1 86
+#define PCLK_CHIPID 87
+#define PCLK_I2C1 88
+#define PCLK_I2S1 89
+#define PCLK_PCM 90
+
+/* Total number of clocks. */
+#define NR_CLKS (PCLK_PCM + 1)
+
+#endif /* _DT_BINDINGS_CLOCK_SAMSUNG_S3C2443_CLOCK_H */
diff --git a/include/dt-bindings/clock/stih415-clks.h b/include/dt-bindings/clock/stih415-clks.h
new file mode 100644
index 00000000000..0d2c7397e02
--- /dev/null
+++ b/include/dt-bindings/clock/stih415-clks.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH415 SoC.
+ */
+#ifndef _CLK_STIH415
+#define _CLK_STIH415
+
+/* CLOCKGEN A0 */
+#define CLK_ICN_REG 0
+#define CLK_ETH1_PHY 4
+
+/* CLOCKGEN A1 */
+#define CLK_GMAC0_PHY 3
+
+#endif
diff --git a/include/dt-bindings/clock/stih416-clks.h b/include/dt-bindings/clock/stih416-clks.h
new file mode 100644
index 00000000000..552c779eb6a
--- /dev/null
+++ b/include/dt-bindings/clock/stih416-clks.h
@@ -0,0 +1,15 @@
+/*
+ * This header provides constants clk index STMicroelectronics
+ * STiH416 SoC.
+ */
+#ifndef _CLK_STIH416
+#define _CLK_STIH416
+
+/* CLOCKGEN A0 */
+#define CLK_ICN_REG 0
+#define CLK_ETH1_PHY 4
+
+/* CLOCKGEN A1 */
+#define CLK_GMAC0_PHY 3
+
+#endif
diff --git a/include/dt-bindings/pinctrl/omap.h b/include/dt-bindings/pinctrl/omap.h
index b04528cd033..1c75b8ca522 100644
--- a/include/dt-bindings/pinctrl/omap.h
+++ b/include/dt-bindings/pinctrl/omap.h
@@ -62,12 +62,29 @@
#define OMAP3630_CORE2_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x25a0) (val)
#define OMAP3_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2a00) (val)
#define AM33XX_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define OMAP4_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0040) (val)
-#define OMAP4_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0xe040) (val)
#define AM4372_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x0800) (val)
-#define OMAP5_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x2840) (val)
-#define OMAP5_WKUP_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0xc840) (val)
#define DRA7XX_CORE_IOPAD(pa, val) OMAP_IOPAD_OFFSET((pa), 0x3400) (val)
+/*
+ * Macros to allow using the offset from the padconf physical address
+ * instead of the offset from padconf base.
+ */
+#define OMAP_PADCONF_OFFSET(offset, base_offset) ((offset) - (base_offset))
+
+#define OMAP4_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+#define OMAP5_IOPAD(offset, val) OMAP_PADCONF_OFFSET((offset), 0x0040) (val)
+
+/*
+ * Define some commonly used pins configured by the boards.
+ * Note that some boards use alternative pins, so check
+ * the schematics before using these.
+ */
+#define OMAP3_UART1_RX 0x152
+#define OMAP3_UART2_RX 0x14a
+#define OMAP3_UART3_RX 0x16e
+#define OMAP4_UART2_RX 0xdc
+#define OMAP4_UART3_RX 0x104
+#define OMAP4_UART4_RX 0x11c
+
#endif
diff --git a/include/dt-bindings/reset-controller/stih415-resets.h b/include/dt-bindings/reset-controller/stih415-resets.h
index c2f8a66913c..c2329fe29cf 100644
--- a/include/dt-bindings/reset-controller/stih415-resets.h
+++ b/include/dt-bindings/reset-controller/stih415-resets.h
@@ -22,5 +22,6 @@
#define STIH415_USB0_SOFTRESET 3
#define STIH415_USB1_SOFTRESET 4
#define STIH415_USB2_SOFTRESET 5
+#define STIH415_KEYSCAN_SOFTRESET 6
#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH415 */
diff --git a/include/dt-bindings/reset-controller/stih416-resets.h b/include/dt-bindings/reset-controller/stih416-resets.h
index 2127743f23e..fcf9af1ac0b 100644
--- a/include/dt-bindings/reset-controller/stih416-resets.h
+++ b/include/dt-bindings/reset-controller/stih416-resets.h
@@ -46,5 +46,6 @@
#define STIH416_COMPO_A_SOFTRESET 25
#define STIH416_VP8_DEC_SOFTRESET 26
#define STIH416_VTG_MAIN_SOFTRESET 27
+#define STIH416_KEYSCAN_SOFTRESET 28
#endif /* _DT_BINDINGS_RESET_CONTROLLER_STIH416 */
diff --git a/include/dt-bindings/reset/altr,rst-mgr.h b/include/dt-bindings/reset/altr,rst-mgr.h
new file mode 100644
index 00000000000..3f04908fb87
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr.h
@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2014, Steffen Trumtrar <s.trumtrar@pengutronix.de>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_H
+
+/* MPUMODRST */
+#define CPU0_RESET 0
+#define CPU1_RESET 1
+#define WDS_RESET 2
+#define SCUPER_RESET 3
+#define L2_RESET 4
+
+/* PERMODRST */
+#define EMAC0_RESET 32
+#define EMAC1_RESET 33
+#define USB0_RESET 34
+#define USB1_RESET 35
+#define NAND_RESET 36
+#define QSPI_RESET 37
+#define L4WD0_RESET 38
+#define L4WD1_RESET 39
+#define OSC1TIMER0_RESET 40
+#define OSC1TIMER1_RESET 41
+#define SPTIMER0_RESET 42
+#define SPTIMER1_RESET 43
+#define I2C0_RESET 44
+#define I2C1_RESET 45
+#define I2C2_RESET 46
+#define I2C3_RESET 47
+#define UART0_RESET 48
+#define UART1_RESET 49
+#define SPIM0_RESET 50
+#define SPIM1_RESET 51
+#define SPIS0_RESET 52
+#define SPIS1_RESET 53
+#define SDMMC_RESET 54
+#define CAN0_RESET 55
+#define CAN1_RESET 56
+#define GPIO0_RESET 57
+#define GPIO1_RESET 58
+#define GPIO2_RESET 59
+#define DMA_RESET 60
+#define SDR_RESET 61
+
+/* PER2MODRST */
+#define DMAIF0_RESET 64
+#define DMAIF1_RESET 65
+#define DMAIF2_RESET 66
+#define DMAIF3_RESET 67
+#define DMAIF4_RESET 68
+#define DMAIF5_RESET 69
+#define DMAIF6_RESET 70
+#define DMAIF7_RESET 71
+
+/* BRGMODRST */
+#define HPS2FPGA_RESET 96
+#define LWHPS2FPGA_RESET 97
+#define FPGA2HPS_RESET 98
+
+/* MISCMODRST*/
+#define ROM_RESET 128
+#define OCRAM_RESET 129
+#define SYSMGR_RESET 130
+#define SYSMGRCOLD_RESET 131
+#define FPGAMGR_RESET 132
+#define ACPIDMAP_RESET 133
+#define S2F_RESET 134
+#define S2FCOLD_RESET 135
+#define NRSTPIN_RESET 136
+#define TIMESTAMPCOLD_RESET 137
+#define CLKMGRCOLD_RESET 138
+#define SCANMGR_RESET 139
+#define FRZCTRLCOLD_RESET 140
+#define SYSDBG_RESET 141
+#define DBG_RESET 142
+#define TAPCOLD_RESET 143
+#define SDRCOLD_RESET 144
+
+#endif
diff --git a/include/dt-bindings/soc/qcom,gsbi.h b/include/dt-bindings/soc/qcom,gsbi.h
new file mode 100644
index 00000000000..7ac4292333a
--- /dev/null
+++ b/include/dt-bindings/soc/qcom,gsbi.h
@@ -0,0 +1,26 @@
+/* Copyright (c) 2013, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DT_BINDINGS_QCOM_GSBI_H
+#define __DT_BINDINGS_QCOM_GSBI_H
+
+#define GSBI_PROT_IDLE 0
+#define GSBI_PROT_I2C_UIM 1
+#define GSBI_PROT_I2C 2
+#define GSBI_PROT_SPI 3
+#define GSBI_PROT_UART_W_FC 4
+#define GSBI_PROT_UIM 5
+#define GSBI_PROT_I2C_UART 6
+
+#define GSBI_CRCI_QUP 0
+#define GSBI_CRCI_UART 1
+
+#endif
diff --git a/include/linux/amba/bus.h b/include/linux/amba/bus.h
index 63b5eff0a80..fdd7e1b61f6 100644
--- a/include/linux/amba/bus.h
+++ b/include/linux/amba/bus.h
@@ -47,6 +47,7 @@ struct amba_driver {
enum amba_vendor {
AMBA_VENDOR_ARM = 0x41,
AMBA_VENDOR_ST = 0x80,
+ AMBA_VENDOR_QCOM = 0x51,
};
extern struct bus_type amba_bustype;
diff --git a/include/linux/amba/mmci.h b/include/linux/amba/mmci.h
index 32a89cf5ec4..8c98113069c 100644
--- a/include/linux/amba/mmci.h
+++ b/include/linux/amba/mmci.h
@@ -6,28 +6,9 @@
#include <linux/mmc/host.h>
-
-/*
- * These defines is places here due to access is needed from machine
- * configuration files. The ST Micro version does not have ROD and
- * reuse the voltage registers for direction settings.
- */
-#define MCI_ST_DATA2DIREN (1 << 2)
-#define MCI_ST_CMDDIREN (1 << 3)
-#define MCI_ST_DATA0DIREN (1 << 4)
-#define MCI_ST_DATA31DIREN (1 << 5)
-#define MCI_ST_FBCLKEN (1 << 7)
-#define MCI_ST_DATA74DIREN (1 << 8)
-
-/* Just some dummy forwarding */
-struct dma_chan;
-
/**
* struct mmci_platform_data - platform configuration for the MMCI
* (also known as PL180) block.
- * @f_max: the maximum operational frequency for this host in this
- * platform configuration. When this is specified it takes precedence
- * over the module parameter for the same frequency.
* @ocr_mask: available voltages on the 4 pins from the block, this
* is ignored if a regulator is used, see the MMC_VDD_* masks in
* mmc/host.h
@@ -42,37 +23,14 @@ struct dma_chan;
* @gpio_wp: read this GPIO pin to see if the card is write protected
* @gpio_cd: read this GPIO pin to detect card insertion
* @cd_invert: true if the gpio_cd pin value is active low
- * @capabilities: the capabilities of the block as implemented in
- * this platform, signify anything MMC_CAP_* from mmc/host.h
- * @capabilities2: more capabilities, MMC_CAP2_* from mmc/host.h
- * @sigdir: a bit field indicating for what bits in the MMC bus the host
- * should enable signal direction indication.
- * @dma_filter: function used to select an appropriate RX and TX
- * DMA channel to be used for DMA, if and only if you're deploying the
- * generic DMA engine
- * @dma_rx_param: parameter passed to the DMA allocation
- * filter in order to select an appropriate RX channel. If
- * there is a bidirectional RX+TX channel, then just specify
- * this and leave dma_tx_param set to NULL
- * @dma_tx_param: parameter passed to the DMA allocation
- * filter in order to select an appropriate TX channel. If this
- * is NULL the driver will attempt to use the RX channel as a
- * bidirectional channel
*/
struct mmci_platform_data {
- unsigned int f_max;
unsigned int ocr_mask;
int (*ios_handler)(struct device *, struct mmc_ios *);
unsigned int (*status)(struct device *);
int gpio_wp;
int gpio_cd;
bool cd_invert;
- unsigned long capabilities;
- unsigned long capabilities2;
- u32 sigdir;
- bool (*dma_filter)(struct dma_chan *chan, void *filter_param);
- void *dma_rx_param;
- void *dma_tx_param;
};
#endif
diff --git a/include/linux/bio.h b/include/linux/bio.h
index bba55082692..5a645769f02 100644
--- a/include/linux/bio.h
+++ b/include/linux/bio.h
@@ -333,7 +333,7 @@ static inline struct bio *bio_next_split(struct bio *bio, int sectors,
extern struct bio_set *bioset_create(unsigned int, unsigned int);
extern void bioset_free(struct bio_set *);
-extern mempool_t *biovec_create_pool(struct bio_set *bs, int pool_entries);
+extern mempool_t *biovec_create_pool(int pool_entries);
extern struct bio *bio_alloc_bioset(gfp_t, int, struct bio_set *);
extern void bio_put(struct bio *);
diff --git a/include/linux/blk-mq.h b/include/linux/blk-mq.h
index 0120451545d..c1512883310 100644
--- a/include/linux/blk-mq.h
+++ b/include/linux/blk-mq.h
@@ -8,7 +8,13 @@ struct blk_mq_tags;
struct blk_mq_cpu_notifier {
struct list_head list;
void *data;
- void (*notify)(void *data, unsigned long action, unsigned int cpu);
+ int (*notify)(void *data, unsigned long action, unsigned int cpu);
+};
+
+struct blk_mq_ctxmap {
+ unsigned int map_size;
+ unsigned int bits_per_word;
+ struct blk_align_bitmap *map;
};
struct blk_mq_hw_ctx {
@@ -18,7 +24,11 @@ struct blk_mq_hw_ctx {
} ____cacheline_aligned_in_smp;
unsigned long state; /* BLK_MQ_S_* flags */
- struct delayed_work delayed_work;
+ struct delayed_work run_work;
+ struct delayed_work delay_work;
+ cpumask_var_t cpumask;
+ int next_cpu;
+ int next_cpu_batch;
unsigned long flags; /* BLK_MQ_F_* flags */
@@ -27,13 +37,13 @@ struct blk_mq_hw_ctx {
void *driver_data;
+ struct blk_mq_ctxmap ctx_map;
+
unsigned int nr_ctx;
struct blk_mq_ctx **ctxs;
- unsigned int nr_ctx_map;
- unsigned long *ctx_map;
- struct request **rqs;
- struct list_head page_list;
+ unsigned int wait_index;
+
struct blk_mq_tags *tags;
unsigned long queued;
@@ -41,31 +51,40 @@ struct blk_mq_hw_ctx {
#define BLK_MQ_MAX_DISPATCH_ORDER 10
unsigned long dispatched[BLK_MQ_MAX_DISPATCH_ORDER];
- unsigned int queue_depth;
unsigned int numa_node;
unsigned int cmd_size; /* per-request extra data */
+ atomic_t nr_active;
+
struct blk_mq_cpu_notifier cpu_notifier;
struct kobject kobj;
};
-struct blk_mq_reg {
+struct blk_mq_tag_set {
struct blk_mq_ops *ops;
unsigned int nr_hw_queues;
- unsigned int queue_depth;
+ unsigned int queue_depth; /* max hw supported */
unsigned int reserved_tags;
unsigned int cmd_size; /* per-request extra data */
int numa_node;
unsigned int timeout;
unsigned int flags; /* BLK_MQ_F_* */
+ void *driver_data;
+
+ struct blk_mq_tags **tags;
+
+ struct mutex tag_list_lock;
+ struct list_head tag_list;
};
typedef int (queue_rq_fn)(struct blk_mq_hw_ctx *, struct request *);
typedef struct blk_mq_hw_ctx *(map_queue_fn)(struct request_queue *, const int);
-typedef struct blk_mq_hw_ctx *(alloc_hctx_fn)(struct blk_mq_reg *,unsigned int);
-typedef void (free_hctx_fn)(struct blk_mq_hw_ctx *, unsigned int);
typedef int (init_hctx_fn)(struct blk_mq_hw_ctx *, void *, unsigned int);
typedef void (exit_hctx_fn)(struct blk_mq_hw_ctx *, unsigned int);
+typedef int (init_request_fn)(void *, struct request *, unsigned int,
+ unsigned int, unsigned int);
+typedef void (exit_request_fn)(void *, struct request *, unsigned int,
+ unsigned int);
struct blk_mq_ops {
/*
@@ -86,18 +105,20 @@ struct blk_mq_ops {
softirq_done_fn *complete;
/*
- * Override for hctx allocations (should probably go)
- */
- alloc_hctx_fn *alloc_hctx;
- free_hctx_fn *free_hctx;
-
- /*
* Called when the block layer side of a hardware queue has been
* set up, allowing the driver to allocate/init matching structures.
* Ditto for exit/teardown.
*/
init_hctx_fn *init_hctx;
exit_hctx_fn *exit_hctx;
+
+ /*
+ * Called for every command allocated by the block layer to allow
+ * the driver to set up driver specific data.
+ * Ditto for exit/teardown.
+ */
+ init_request_fn *init_request;
+ exit_request_fn *exit_request;
};
enum {
@@ -107,18 +128,24 @@ enum {
BLK_MQ_F_SHOULD_MERGE = 1 << 0,
BLK_MQ_F_SHOULD_SORT = 1 << 1,
- BLK_MQ_F_SHOULD_IPI = 1 << 2,
+ BLK_MQ_F_TAG_SHARED = 1 << 2,
+ BLK_MQ_F_SG_MERGE = 1 << 3,
+ BLK_MQ_F_SYSFS_UP = 1 << 4,
BLK_MQ_S_STOPPED = 0,
+ BLK_MQ_S_TAG_ACTIVE = 1,
BLK_MQ_MAX_DEPTH = 2048,
+
+ BLK_MQ_CPU_WORK_BATCH = 8,
};
-struct request_queue *blk_mq_init_queue(struct blk_mq_reg *, void *);
+struct request_queue *blk_mq_init_queue(struct blk_mq_tag_set *);
int blk_mq_register_disk(struct gendisk *);
void blk_mq_unregister_disk(struct gendisk *);
-int blk_mq_init_commands(struct request_queue *, int (*init)(void *data, struct blk_mq_hw_ctx *, struct request *, unsigned int), void *data);
-void blk_mq_free_commands(struct request_queue *, void (*free)(void *data, struct blk_mq_hw_ctx *, struct request *, unsigned int), void *data);
+
+int blk_mq_alloc_tag_set(struct blk_mq_tag_set *set);
+void blk_mq_free_tag_set(struct blk_mq_tag_set *set);
void blk_mq_flush_plug_list(struct blk_plug *plug, bool from_schedule);
@@ -126,28 +153,28 @@ void blk_mq_insert_request(struct request *, bool, bool, bool);
void blk_mq_run_queues(struct request_queue *q, bool async);
void blk_mq_free_request(struct request *rq);
bool blk_mq_can_queue(struct blk_mq_hw_ctx *);
-struct request *blk_mq_alloc_request(struct request_queue *q, int rw, gfp_t gfp);
-struct request *blk_mq_alloc_reserved_request(struct request_queue *q, int rw, gfp_t gfp);
-struct request *blk_mq_rq_from_tag(struct request_queue *q, unsigned int tag);
+struct request *blk_mq_alloc_request(struct request_queue *q, int rw,
+ gfp_t gfp, bool reserved);
+struct request *blk_mq_tag_to_rq(struct blk_mq_hw_ctx *hctx, unsigned int tag);
struct blk_mq_hw_ctx *blk_mq_map_queue(struct request_queue *, const int ctx_index);
-struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_reg *, unsigned int);
-void blk_mq_free_single_hw_queue(struct blk_mq_hw_ctx *, unsigned int);
+struct blk_mq_hw_ctx *blk_mq_alloc_single_hw_queue(struct blk_mq_tag_set *, unsigned int, int);
-bool blk_mq_end_io_partial(struct request *rq, int error,
- unsigned int nr_bytes);
-static inline void blk_mq_end_io(struct request *rq, int error)
-{
- bool done = !blk_mq_end_io_partial(rq, error, blk_rq_bytes(rq));
- BUG_ON(!done);
-}
+void blk_mq_end_io(struct request *rq, int error);
+void __blk_mq_end_io(struct request *rq, int error);
+void blk_mq_requeue_request(struct request *rq);
+void blk_mq_add_to_requeue_list(struct request *rq, bool at_head);
+void blk_mq_kick_requeue_list(struct request_queue *q);
void blk_mq_complete_request(struct request *rq);
void blk_mq_stop_hw_queue(struct blk_mq_hw_ctx *hctx);
void blk_mq_start_hw_queue(struct blk_mq_hw_ctx *hctx);
void blk_mq_stop_hw_queues(struct request_queue *q);
-void blk_mq_start_stopped_hw_queues(struct request_queue *q);
+void blk_mq_start_hw_queues(struct request_queue *q);
+void blk_mq_start_stopped_hw_queues(struct request_queue *q, bool async);
+void blk_mq_delay_queue(struct blk_mq_hw_ctx *hctx, unsigned long msecs);
+void blk_mq_tag_busy_iter(struct blk_mq_tags *tags, void (*fn)(void *data, unsigned long *), void *data);
/*
* Driver command data is immediately after the request. So subtract request
@@ -162,12 +189,6 @@ static inline void *blk_mq_rq_to_pdu(struct request *rq)
return (void *) rq + sizeof(*rq);
}
-static inline struct request *blk_mq_tag_to_rq(struct blk_mq_hw_ctx *hctx,
- unsigned int tag)
-{
- return hctx->rqs[tag];
-}
-
#define queue_for_each_hw_ctx(q, hctx, i) \
for ((i) = 0; (i) < (q)->nr_hw_queues && \
({ hctx = (q)->queue_hw_ctx[i]; 1; }); (i)++)
diff --git a/include/linux/blk_types.h b/include/linux/blk_types.h
index aa0eaa2d0bd..d8e4cea23a2 100644
--- a/include/linux/blk_types.h
+++ b/include/linux/blk_types.h
@@ -190,6 +190,7 @@ enum rq_flag_bits {
__REQ_PM, /* runtime pm request */
__REQ_END, /* last of chain of requests */
__REQ_HASHED, /* on IO scheduler merge hash */
+ __REQ_MQ_INFLIGHT, /* track inflight for MQ */
__REQ_NR_BITS, /* stops here */
};
@@ -243,5 +244,6 @@ enum rq_flag_bits {
#define REQ_PM (1ULL << __REQ_PM)
#define REQ_END (1ULL << __REQ_END)
#define REQ_HASHED (1ULL << __REQ_HASHED)
+#define REQ_MQ_INFLIGHT (1ULL << __REQ_MQ_INFLIGHT)
#endif /* __LINUX_BLK_TYPES_H */
diff --git a/include/linux/blkdev.h b/include/linux/blkdev.h
index 0d84981ee03..8aba35f46f8 100644
--- a/include/linux/blkdev.h
+++ b/include/linux/blkdev.h
@@ -90,15 +90,15 @@ enum rq_cmd_type_bits {
#define BLK_MAX_CDB 16
/*
- * try to put the fields that are referenced together in the same cacheline.
- * if you modify this structure, be sure to check block/blk-core.c:blk_rq_init()
- * as well!
+ * Try to put the fields that are referenced together in the same cacheline.
+ *
+ * If you modify this structure, make sure to update blk_rq_init() and
+ * especially blk_mq_rq_ctx_init() to take care of the added fields.
*/
struct request {
struct list_head queuelist;
union {
struct call_single_data csd;
- struct work_struct mq_flush_work;
unsigned long fifo_time;
};
@@ -178,7 +178,6 @@ struct request {
unsigned short ioprio;
void *special; /* opaque pointer available for LLD use */
- char *buffer; /* kaddr of the current segment if available */
int tag;
int errors;
@@ -463,6 +462,10 @@ struct request_queue {
struct request *flush_rq;
spinlock_t mq_flush_lock;
+ struct list_head requeue_list;
+ spinlock_t requeue_lock;
+ struct work_struct requeue_work;
+
struct mutex sysfs_lock;
int bypass_depth;
@@ -481,6 +484,9 @@ struct request_queue {
wait_queue_head_t mq_freeze_wq;
struct percpu_counter mq_usage_counter;
struct list_head all_q_node;
+
+ struct blk_mq_tag_set *tag_set;
+ struct list_head tag_set_list;
};
#define QUEUE_FLAG_QUEUED 1 /* uses generic tag queueing */
@@ -504,6 +510,7 @@ struct request_queue {
#define QUEUE_FLAG_SAME_FORCE 18 /* force complete on same CPU */
#define QUEUE_FLAG_DEAD 19 /* queue tear-down finished */
#define QUEUE_FLAG_INIT_DONE 20 /* queue is initialized */
+#define QUEUE_FLAG_NO_SG_MERGE 21 /* don't attempt to merge SG segments*/
#define QUEUE_FLAG_DEFAULT ((1 << QUEUE_FLAG_IO_STAT) | \
(1 << QUEUE_FLAG_STACKABLE) | \
@@ -613,6 +620,15 @@ static inline void queue_flag_clear(unsigned int flag, struct request_queue *q)
#define rq_data_dir(rq) (((rq)->cmd_flags & 1) != 0)
+/*
+ * Driver can handle struct request, if it either has an old style
+ * request_fn defined, or is blk-mq based.
+ */
+static inline bool queue_is_rq_based(struct request_queue *q)
+{
+ return q->request_fn || q->mq_ops;
+}
+
static inline unsigned int blk_queue_cluster(struct request_queue *q)
{
return q->limits.cluster;
@@ -937,6 +953,7 @@ extern struct request *blk_fetch_request(struct request_queue *q);
*/
extern bool blk_update_request(struct request *rq, int error,
unsigned int nr_bytes);
+extern void blk_finish_request(struct request *rq, int error);
extern bool blk_end_request(struct request *rq, int error,
unsigned int nr_bytes);
extern void blk_end_request_all(struct request *rq, int error);
@@ -1053,7 +1070,6 @@ static inline void blk_post_runtime_resume(struct request_queue *q, int err) {}
* schedule() where blk_schedule_flush_plug() is called.
*/
struct blk_plug {
- unsigned long magic; /* detect uninitialized use-cases */
struct list_head list; /* requests */
struct list_head mq_list; /* blk-mq requests */
struct list_head cb_list; /* md requires an unplug callback */
@@ -1102,7 +1118,8 @@ static inline bool blk_needs_flush_plug(struct task_struct *tsk)
/*
* tag stuff
*/
-#define blk_rq_tagged(rq) ((rq)->cmd_flags & REQ_QUEUED)
+#define blk_rq_tagged(rq) \
+ ((rq)->mq_ctx || ((rq)->cmd_flags & REQ_QUEUED))
extern int blk_queue_start_tag(struct request_queue *, struct request *);
extern struct request *blk_queue_find_tag(struct request_queue *, int);
extern void blk_queue_end_tag(struct request_queue *, struct request *);
@@ -1370,8 +1387,9 @@ static inline void put_dev_sector(Sector p)
}
struct work_struct;
-int kblockd_schedule_work(struct request_queue *q, struct work_struct *work);
-int kblockd_schedule_delayed_work(struct request_queue *q, struct delayed_work *dwork, unsigned long delay);
+int kblockd_schedule_work(struct work_struct *work);
+int kblockd_schedule_delayed_work(struct delayed_work *dwork, unsigned long delay);
+int kblockd_schedule_delayed_work_on(int cpu, struct delayed_work *dwork, unsigned long delay);
#ifdef CONFIG_BLK_CGROUP
/*
diff --git a/include/linux/cgroup.h b/include/linux/cgroup.h
index c2515851c1a..d60904b9e50 100644
--- a/include/linux/cgroup.h
+++ b/include/linux/cgroup.h
@@ -473,6 +473,7 @@ struct cftype {
};
extern struct cgroup_root cgrp_dfl_root;
+extern struct css_set init_css_set;
static inline bool cgroup_on_dfl(const struct cgroup *cgrp)
{
@@ -700,6 +701,20 @@ static inline struct cgroup_subsys_state *task_css(struct task_struct *task,
return task_css_check(task, subsys_id, false);
}
+/**
+ * task_css_is_root - test whether a task belongs to the root css
+ * @task: the target task
+ * @subsys_id: the target subsystem ID
+ *
+ * Test whether @task belongs to the root css on the specified subsystem.
+ * May be invoked in any context.
+ */
+static inline bool task_css_is_root(struct task_struct *task, int subsys_id)
+{
+ return task_css_check(task, subsys_id, true) ==
+ init_css_set.subsys[subsys_id];
+}
+
static inline struct cgroup *task_cgroup(struct task_struct *task,
int subsys_id)
{
diff --git a/include/linux/clk/at91_pmc.h b/include/linux/clk/at91_pmc.h
index a6911ebbd02..de4268d4987 100644
--- a/include/linux/clk/at91_pmc.h
+++ b/include/linux/clk/at91_pmc.h
@@ -155,6 +155,7 @@ extern void __iomem *at91_pmc_base;
#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */
#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */
#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */
+#define AT91_PMC_OSCSEL (1 << 7) /* Slow Oscillator Selection [some SAM9] */
#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */
#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */
#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 3b9bfdb83ba..3c7ec327ebd 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -221,6 +221,8 @@ struct dentry_operations {
#define DCACHE_SYMLINK_TYPE 0x00300000 /* Symlink */
#define DCACHE_FILE_TYPE 0x00400000 /* Other file type */
+#define DCACHE_MAY_FREE 0x00800000
+
extern seqlock_t rename_lock;
static inline int dname_external(const struct dentry *dentry)
diff --git a/include/linux/dma-mapping.h b/include/linux/dma-mapping.h
index fd4aee29ad1..0c3eab1e39a 100644
--- a/include/linux/dma-mapping.h
+++ b/include/linux/dma-mapping.h
@@ -8,6 +8,12 @@
#include <linux/dma-direction.h>
#include <linux/scatterlist.h>
+/*
+ * A dma_addr_t can hold any valid DMA or bus address for the platform.
+ * It can be given to a device to use as a DMA source or target. A CPU cannot
+ * reference a dma_addr_t directly because there may be translation between
+ * its physical address space and the bus address space.
+ */
struct dma_map_ops {
void* (*alloc)(struct device *dev, size_t size,
dma_addr_t *dma_handle, gfp_t gfp,
@@ -186,7 +192,7 @@ static inline int dma_get_cache_alignment(void)
#ifndef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
static inline int
-dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
dma_addr_t device_addr, size_t size, int flags)
{
return 0;
@@ -217,13 +223,14 @@ extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
dma_addr_t dma_handle);
#ifdef ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
-extern int dmam_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
+extern int dmam_declare_coherent_memory(struct device *dev,
+ phys_addr_t phys_addr,
dma_addr_t device_addr, size_t size,
int flags);
extern void dmam_release_declared_memory(struct device *dev);
#else /* ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY */
static inline int dmam_declare_coherent_memory(struct device *dev,
- dma_addr_t bus_addr, dma_addr_t device_addr,
+ phys_addr_t phys_addr, dma_addr_t device_addr,
size_t size, gfp_t gfp)
{
return 0;
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 8300fb87b84..72cb0ddb967 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -429,6 +429,7 @@ typedef bool (*dma_filter_fn)(struct dma_chan *chan, void *filter_param);
typedef void (*dma_async_tx_callback)(void *dma_async_param);
struct dmaengine_unmap_data {
+ u8 map_cnt;
u8 to_cnt;
u8 from_cnt;
u8 bidi_cnt;
diff --git a/include/linux/ftrace.h b/include/linux/ftrace.h
index 9212b017bc7..ae9504b4b67 100644
--- a/include/linux/ftrace.h
+++ b/include/linux/ftrace.h
@@ -535,6 +535,7 @@ static inline int ftrace_modify_call(struct dyn_ftrace *rec, unsigned long old_a
extern int ftrace_arch_read_dyn_info(char *buf, int size);
extern int skip_trace(unsigned long ip);
+extern void ftrace_module_init(struct module *mod);
extern void ftrace_disable_daemon(void);
extern void ftrace_enable_daemon(void);
@@ -544,6 +545,7 @@ static inline int ftrace_force_update(void) { return 0; }
static inline void ftrace_disable_daemon(void) { }
static inline void ftrace_enable_daemon(void) { }
static inline void ftrace_release_mod(struct module *mod) {}
+static inline void ftrace_module_init(struct module *mod) {}
static inline __init int register_ftrace_command(struct ftrace_func_command *cmd)
{
return -EINVAL;
diff --git a/include/linux/gpio/consumer.h b/include/linux/gpio/consumer.h
index bed128e8f4b..05e53ccb708 100644
--- a/include/linux/gpio/consumer.h
+++ b/include/linux/gpio/consumer.h
@@ -1,6 +1,7 @@
#ifndef __LINUX_GPIO_CONSUMER_H
#define __LINUX_GPIO_CONSUMER_H
+#include <linux/bug.h>
#include <linux/err.h>
#include <linux/kernel.h>
@@ -23,6 +24,12 @@ struct gpio_desc *__must_check gpiod_get(struct device *dev,
struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
const char *con_id,
unsigned int idx);
+struct gpio_desc *__must_check gpiod_get_optional(struct device *dev,
+ const char *con_id);
+struct gpio_desc *__must_check gpiod_get_index_optional(struct device *dev,
+ const char *con_id,
+ unsigned int index);
+
void gpiod_put(struct gpio_desc *desc);
struct gpio_desc *__must_check devm_gpiod_get(struct device *dev,
@@ -30,6 +37,12 @@ struct gpio_desc *__must_check devm_gpiod_get(struct device *dev,
struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
const char *con_id,
unsigned int idx);
+struct gpio_desc *__must_check devm_gpiod_get_optional(struct device *dev,
+ const char *con_id);
+struct gpio_desc *__must_check
+devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
+ unsigned int index);
+
void devm_gpiod_put(struct device *dev, struct gpio_desc *desc);
int gpiod_get_direction(const struct gpio_desc *desc);
@@ -73,6 +86,20 @@ static inline struct gpio_desc *__must_check gpiod_get_index(struct device *dev,
{
return ERR_PTR(-ENOSYS);
}
+
+static inline struct gpio_desc *__must_check
+gpiod_get_optional(struct device *dev, const char *con_id)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
+static inline struct gpio_desc *__must_check
+gpiod_get_index_optional(struct device *dev, const char *con_id,
+ unsigned int index)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
static inline void gpiod_put(struct gpio_desc *desc)
{
might_sleep();
@@ -93,6 +120,20 @@ struct gpio_desc *__must_check devm_gpiod_get_index(struct device *dev,
{
return ERR_PTR(-ENOSYS);
}
+
+static inline struct gpio_desc *__must_check
+devm_gpiod_get_optional(struct device *dev, const char *con_id)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
+static inline struct gpio_desc *__must_check
+devm_gpiod_get_index_optional(struct device *dev, const char *con_id,
+ unsigned int index)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
static inline void devm_gpiod_put(struct device *dev, struct gpio_desc *desc)
{
might_sleep();
diff --git a/include/linux/gpio/driver.h b/include/linux/gpio/driver.h
index 1827b43966d..573e4f3243d 100644
--- a/include/linux/gpio/driver.h
+++ b/include/linux/gpio/driver.h
@@ -51,7 +51,10 @@ struct seq_file;
* format specifier for an unsigned int. It is substituted by the actual
* number of the gpio.
* @can_sleep: flag must be set iff get()/set() methods sleep, as they
- * must while accessing GPIO expander chips over I2C or SPI
+ * must while accessing GPIO expander chips over I2C or SPI. This
+ * implies that if the chip supports IRQs, these IRQs need to be threaded
+ * as the chip access may sleep when e.g. reading out the IRQ status
+ * registers.
* @exported: flags if the gpiochip is exported for use from sysfs. Private.
*
* A gpio_chip can help platforms abstract various sources of GPIOs so
diff --git a/include/linux/hsi/hsi.h b/include/linux/hsi/hsi.h
index 39bfd5b8907..3ec06300d53 100644
--- a/include/linux/hsi/hsi.h
+++ b/include/linux/hsi/hsi.h
@@ -68,17 +68,31 @@ enum {
};
/**
+ * struct hsi_channel - channel resource used by the hsi clients
+ * @id: Channel number
+ * @name: Channel name
+ */
+struct hsi_channel {
+ unsigned int id;
+ const char *name;
+};
+
+/**
* struct hsi_config - Configuration for RX/TX HSI modules
* @mode: Bit transmission mode (STREAM or FRAME)
- * @channels: Number of channels to use [1..16]
+ * @channels: Channel resources used by the client
+ * @num_channels: Number of channel resources
+ * @num_hw_channels: Number of channels the transceiver is configured for [1..16]
* @speed: Max bit transmission speed (Kbit/s)
* @flow: RX flow type (SYNCHRONIZED or PIPELINE)
* @arb_mode: Arbitration mode for TX frame (Round robin, priority)
*/
struct hsi_config {
- unsigned int mode;
- unsigned int channels;
- unsigned int speed;
+ unsigned int mode;
+ struct hsi_channel *channels;
+ unsigned int num_channels;
+ unsigned int num_hw_channels;
+ unsigned int speed;
union {
unsigned int flow; /* RX only */
unsigned int arb_mode; /* TX only */
@@ -282,6 +296,21 @@ struct hsi_controller *hsi_alloc_controller(unsigned int n_ports, gfp_t flags);
void hsi_put_controller(struct hsi_controller *hsi);
int hsi_register_controller(struct hsi_controller *hsi);
void hsi_unregister_controller(struct hsi_controller *hsi);
+struct hsi_client *hsi_new_client(struct hsi_port *port,
+ struct hsi_board_info *info);
+int hsi_remove_client(struct device *dev, void *data);
+void hsi_port_unregister_clients(struct hsi_port *port);
+
+#ifdef CONFIG_OF
+void hsi_add_clients_from_dt(struct hsi_port *port,
+ struct device_node *clients);
+#else
+static inline void hsi_add_clients_from_dt(struct hsi_port *port,
+ struct device_node *clients)
+{
+ return;
+}
+#endif
static inline void hsi_controller_set_drvdata(struct hsi_controller *hsi,
void *data)
@@ -305,6 +334,8 @@ static inline struct hsi_port *hsi_find_port_num(struct hsi_controller *hsi,
*/
int hsi_async(struct hsi_client *cl, struct hsi_msg *msg);
+int hsi_get_channel_id_by_name(struct hsi_client *cl, char *name);
+
/**
* hsi_id - Get HSI controller ID associated to a client
* @cl: Pointer to a HSI client
diff --git a/include/linux/hsi/ssi_protocol.h b/include/linux/hsi/ssi_protocol.h
new file mode 100644
index 00000000000..1433651be0d
--- /dev/null
+++ b/include/linux/hsi/ssi_protocol.h
@@ -0,0 +1,42 @@
+/*
+ * ssip_slave.h
+ *
+ * SSIP slave support header file
+ *
+ * Copyright (C) 2010 Nokia Corporation. All rights reserved.
+ *
+ * Contact: Carlos Chinea <carlos.chinea@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+
+#ifndef __LINUX_SSIP_SLAVE_H__
+#define __LINUX_SSIP_SLAVE_H__
+
+#include <linux/hsi/hsi.h>
+
+static inline void ssip_slave_put_master(struct hsi_client *master)
+{
+}
+
+struct hsi_client *ssip_slave_get_master(struct hsi_client *slave);
+int ssip_slave_start_tx(struct hsi_client *master);
+int ssip_slave_stop_tx(struct hsi_client *master);
+void ssip_reset_event(struct hsi_client *master);
+
+int ssip_slave_running(struct hsi_client *master);
+
+#endif /* __LINUX_SSIP_SLAVE_H__ */
+
diff --git a/include/linux/hugetlb.h b/include/linux/hugetlb.h
index 5b337cf8fb8..b65166de1d9 100644
--- a/include/linux/hugetlb.h
+++ b/include/linux/hugetlb.h
@@ -412,6 +412,16 @@ static inline spinlock_t *huge_pte_lockptr(struct hstate *h,
return &mm->page_table_lock;
}
+static inline bool hugepages_supported(void)
+{
+ /*
+ * Some platform decide whether they support huge pages at boot
+ * time. On these, such as powerpc, HPAGE_SHIFT is set to 0 when
+ * there is no such support
+ */
+ return HPAGE_SHIFT != 0;
+}
+
#else /* CONFIG_HUGETLB_PAGE */
struct hstate {};
#define alloc_huge_page_node(h, nid) NULL
diff --git a/include/linux/if_macvlan.h b/include/linux/if_macvlan.h
index 7c8b20b120e..a9a53b12397 100644
--- a/include/linux/if_macvlan.h
+++ b/include/linux/if_macvlan.h
@@ -56,6 +56,7 @@ struct macvlan_dev {
int numqueues;
netdev_features_t tap_features;
int minor;
+ int nest_level;
};
static inline void macvlan_count_rx(const struct macvlan_dev *vlan,
diff --git a/include/linux/if_vlan.h b/include/linux/if_vlan.h
index 13bbbde00e6..b2acc4a1b13 100644
--- a/include/linux/if_vlan.h
+++ b/include/linux/if_vlan.h
@@ -73,7 +73,7 @@ static inline struct vlan_ethhdr *vlan_eth_hdr(const struct sk_buff *skb)
/* found in socket.c */
extern void vlan_ioctl_set(int (*hook)(struct net *, void __user *));
-static inline int is_vlan_dev(struct net_device *dev)
+static inline bool is_vlan_dev(struct net_device *dev)
{
return dev->priv_flags & IFF_802_1Q_VLAN;
}
@@ -159,6 +159,7 @@ struct vlan_dev_priv {
#ifdef CONFIG_NET_POLL_CONTROLLER
struct netpoll *netpoll;
#endif
+ unsigned int nest_level;
};
static inline struct vlan_dev_priv *vlan_dev_priv(const struct net_device *dev)
@@ -197,6 +198,12 @@ extern void vlan_vids_del_by_dev(struct net_device *dev,
const struct net_device *by_dev);
extern bool vlan_uses_dev(const struct net_device *dev);
+
+static inline int vlan_get_encap_level(struct net_device *dev)
+{
+ BUG_ON(!is_vlan_dev(dev));
+ return vlan_dev_priv(dev)->nest_level;
+}
#else
static inline struct net_device *
__vlan_find_dev_deep(struct net_device *real_dev,
@@ -263,6 +270,11 @@ static inline bool vlan_uses_dev(const struct net_device *dev)
{
return false;
}
+static inline int vlan_get_encap_level(struct net_device *dev)
+{
+ BUG();
+ return 0;
+}
#endif
static inline bool vlan_hw_offload_capable(netdev_features_t features,
@@ -483,4 +495,5 @@ static inline void vlan_set_encap_proto(struct sk_buff *skb,
*/
skb->protocol = htons(ETH_P_802_2);
}
+
#endif /* !(_LINUX_IF_VLAN_H_) */
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index 8834a7e5b94..051c85032f4 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -210,7 +210,7 @@ extern int __irq_set_affinity(unsigned int irq, const struct cpumask *cpumask,
/**
* irq_set_affinity - Set the irq affinity of a given irq
* @irq: Interrupt to set affinity
- * @mask: cpumask
+ * @cpumask: cpumask
*
* Fails if cpumask does not contain an online CPU
*/
@@ -223,7 +223,7 @@ irq_set_affinity(unsigned int irq, const struct cpumask *cpumask)
/**
* irq_force_affinity - Force the irq affinity of a given irq
* @irq: Interrupt to set affinity
- * @mask: cpumask
+ * @cpumask: cpumask
*
* Same as irq_set_affinity, but without checking the mask against
* online cpus.
@@ -272,6 +272,11 @@ static inline int irq_set_affinity(unsigned int irq, const struct cpumask *m)
return -EINVAL;
}
+static inline int irq_force_affinity(unsigned int irq, const struct cpumask *cpumask)
+{
+ return 0;
+}
+
static inline int irq_can_set_affinity(unsigned int irq)
{
return 0;
diff --git a/include/linux/irq.h b/include/linux/irq.h
index 10a0b1ac4ea..5c57efb863d 100644
--- a/include/linux/irq.h
+++ b/include/linux/irq.h
@@ -603,6 +603,8 @@ static inline u32 irq_get_trigger_type(unsigned int irq)
return d ? irqd_get_trigger_type(d) : 0;
}
+unsigned int arch_dynirq_lower_bound(unsigned int from);
+
int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
struct module *owner);
diff --git a/include/linux/kernfs.h b/include/linux/kernfs.h
index b0122dc6f96..ca1be5c9136 100644
--- a/include/linux/kernfs.h
+++ b/include/linux/kernfs.h
@@ -50,7 +50,24 @@ enum kernfs_node_flag {
/* @flags for kernfs_create_root() */
enum kernfs_root_flag {
- KERNFS_ROOT_CREATE_DEACTIVATED = 0x0001,
+ /*
+ * kernfs_nodes are created in the deactivated state and invisible.
+ * They require explicit kernfs_activate() to become visible. This
+ * can be used to make related nodes become visible atomically
+ * after all nodes are created successfully.
+ */
+ KERNFS_ROOT_CREATE_DEACTIVATED = 0x0001,
+
+ /*
+ * For regular flies, if the opener has CAP_DAC_OVERRIDE, open(2)
+ * succeeds regardless of the RW permissions. sysfs had an extra
+ * layer of enforcement where open(2) fails with -EACCES regardless
+ * of CAP_DAC_OVERRIDE if the permission doesn't have the
+ * respective read or write access at all (none of S_IRUGO or
+ * S_IWUGO) or the respective operation isn't implemented. The
+ * following flag enables that behavior.
+ */
+ KERNFS_ROOT_EXTRA_OPEN_PERM_CHECK = 0x0002,
};
/* type-specific structures for kernfs_node union members */
diff --git a/include/linux/linkage.h b/include/linux/linkage.h
index 34a513a2727..a6a42dd0246 100644
--- a/include/linux/linkage.h
+++ b/include/linux/linkage.h
@@ -12,9 +12,9 @@
#endif
#ifdef __cplusplus
-#define CPP_ASMLINKAGE extern "C" __visible
+#define CPP_ASMLINKAGE extern "C"
#else
-#define CPP_ASMLINKAGE __visible
+#define CPP_ASMLINKAGE
#endif
#ifndef asmlinkage
diff --git a/include/linux/mbus.h b/include/linux/mbus.h
index 345b8c53b89..550c88fb026 100644
--- a/include/linux/mbus.h
+++ b/include/linux/mbus.h
@@ -73,6 +73,6 @@ int mvebu_mbus_del_window(phys_addr_t base, size_t size);
int mvebu_mbus_init(const char *soc, phys_addr_t mbus_phys_base,
size_t mbus_size, phys_addr_t sdram_phys_base,
size_t sdram_size);
-int mvebu_mbus_dt_init(void);
+int mvebu_mbus_dt_init(bool is_coherent);
#endif /* __LINUX_MBUS_H */
diff --git a/include/linux/mfd/rtsx_common.h b/include/linux/mfd/rtsx_common.h
index 7c36cc55d2c..443176ee1ab 100644
--- a/include/linux/mfd/rtsx_common.h
+++ b/include/linux/mfd/rtsx_common.h
@@ -45,7 +45,6 @@ struct platform_device;
struct rtsx_slot {
struct platform_device *p_dev;
void (*card_event)(struct platform_device *p_dev);
- void (*done_transfer)(struct platform_device *p_dev);
};
#endif
diff --git a/include/linux/mfd/rtsx_pci.h b/include/linux/mfd/rtsx_pci.h
index 8d6bbd609ad..a3835976f7c 100644
--- a/include/linux/mfd/rtsx_pci.h
+++ b/include/linux/mfd/rtsx_pci.h
@@ -943,12 +943,6 @@ void rtsx_pci_send_cmd_no_wait(struct rtsx_pcr *pcr);
int rtsx_pci_send_cmd(struct rtsx_pcr *pcr, int timeout);
int rtsx_pci_transfer_data(struct rtsx_pcr *pcr, struct scatterlist *sglist,
int num_sg, bool read, int timeout);
-int rtsx_pci_dma_map_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
- int num_sg, bool read);
-int rtsx_pci_dma_unmap_sg(struct rtsx_pcr *pcr, struct scatterlist *sglist,
- int num_sg, bool read);
-int rtsx_pci_dma_transfer(struct rtsx_pcr *pcr, struct scatterlist *sglist,
- int sg_count, bool read);
int rtsx_pci_read_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
int rtsx_pci_write_ppbuf(struct rtsx_pcr *pcr, u8 *buf, int buf_len);
int rtsx_pci_card_pull_ctl_enable(struct rtsx_pcr *pcr, int card);
diff --git a/include/linux/mfd/tc3589x.h b/include/linux/mfd/tc3589x.h
index 6b8e1ff4672..e6088c2e209 100644
--- a/include/linux/mfd/tc3589x.h
+++ b/include/linux/mfd/tc3589x.h
@@ -111,7 +111,6 @@ enum tx3589x_block {
#define TC3589x_INT_PORIRQ 7
#define TC3589x_NR_INTERNAL_IRQS 8
-#define TC3589x_INT_GPIO(x) (TC3589x_NR_INTERNAL_IRQS + (x))
struct tc3589x {
struct mutex lock;
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index b66e7610d4e..7040dc98ff8 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -421,6 +421,17 @@ struct mlx4_wqe_inline_seg {
__be32 byte_count;
};
+enum mlx4_update_qp_attr {
+ MLX4_UPDATE_QP_SMAC = 1 << 0,
+};
+
+struct mlx4_update_qp_params {
+ u8 smac_index;
+};
+
+int mlx4_update_qp(struct mlx4_dev *dev, struct mlx4_qp *qp,
+ enum mlx4_update_qp_attr attr,
+ struct mlx4_update_qp_params *params);
int mlx4_qp_modify(struct mlx4_dev *dev, struct mlx4_mtt *mtt,
enum mlx4_qp_state cur_state, enum mlx4_qp_state new_state,
struct mlx4_qp_context *context, enum mlx4_qp_optpar optpar,
diff --git a/include/linux/mm.h b/include/linux/mm.h
index bf9811e1321..d6777060449 100644
--- a/include/linux/mm.h
+++ b/include/linux/mm.h
@@ -370,6 +370,8 @@ static inline int is_vmalloc_or_module_addr(const void *x)
}
#endif
+extern void kvfree(const void *addr);
+
static inline void compound_lock(struct page *page)
{
#ifdef CONFIG_TRANSPARENT_HUGEPAGE
diff --git a/include/linux/net.h b/include/linux/net.h
index 94734a6259a..17d83393afc 100644
--- a/include/linux/net.h
+++ b/include/linux/net.h
@@ -248,24 +248,17 @@ do { \
bool __net_get_random_once(void *buf, int nbytes, bool *done,
struct static_key *done_key);
-#ifdef HAVE_JUMP_LABEL
-#define ___NET_RANDOM_STATIC_KEY_INIT ((struct static_key) \
- { .enabled = ATOMIC_INIT(0), .entries = (void *)1 })
-#else /* !HAVE_JUMP_LABEL */
-#define ___NET_RANDOM_STATIC_KEY_INIT STATIC_KEY_INIT_FALSE
-#endif /* HAVE_JUMP_LABEL */
-
#define net_get_random_once(buf, nbytes) \
({ \
bool ___ret = false; \
static bool ___done = false; \
- static struct static_key ___done_key = \
- ___NET_RANDOM_STATIC_KEY_INIT; \
- if (!static_key_true(&___done_key)) \
+ static struct static_key ___once_key = \
+ STATIC_KEY_INIT_TRUE; \
+ if (static_key_true(&___once_key)) \
___ret = __net_get_random_once(buf, \
nbytes, \
&___done, \
- &___done_key); \
+ &___once_key); \
___ret; \
})
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 7ed3a3aa660..b42d07b0390 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -1144,6 +1144,7 @@ struct net_device_ops {
netdev_tx_t (*ndo_dfwd_start_xmit) (struct sk_buff *skb,
struct net_device *dev,
void *priv);
+ int (*ndo_get_lock_subclass)(struct net_device *dev);
};
/**
@@ -2950,7 +2951,12 @@ static inline void netif_addr_lock(struct net_device *dev)
static inline void netif_addr_lock_nested(struct net_device *dev)
{
- spin_lock_nested(&dev->addr_list_lock, SINGLE_DEPTH_NESTING);
+ int subclass = SINGLE_DEPTH_NESTING;
+
+ if (dev->netdev_ops->ndo_get_lock_subclass)
+ subclass = dev->netdev_ops->ndo_get_lock_subclass(dev);
+
+ spin_lock_nested(&dev->addr_list_lock, subclass);
}
static inline void netif_addr_lock_bh(struct net_device *dev)
@@ -3050,10 +3056,19 @@ extern int weight_p;
extern int bpf_jit_enable;
bool netdev_has_upper_dev(struct net_device *dev, struct net_device *upper_dev);
+struct net_device *netdev_upper_get_next_dev_rcu(struct net_device *dev,
+ struct list_head **iter);
struct net_device *netdev_all_upper_get_next_dev_rcu(struct net_device *dev,
struct list_head **iter);
/* iterate through upper list, must be called under RCU read lock */
+#define netdev_for_each_upper_dev_rcu(dev, updev, iter) \
+ for (iter = &(dev)->adj_list.upper, \
+ updev = netdev_upper_get_next_dev_rcu(dev, &(iter)); \
+ updev; \
+ updev = netdev_upper_get_next_dev_rcu(dev, &(iter)))
+
+/* iterate through upper list, must be called under RCU read lock */
#define netdev_for_each_all_upper_dev_rcu(dev, updev, iter) \
for (iter = &(dev)->all_adj_list.upper, \
updev = netdev_all_upper_get_next_dev_rcu(dev, &(iter)); \
@@ -3077,6 +3092,14 @@ void *netdev_lower_get_next_private_rcu(struct net_device *dev,
priv; \
priv = netdev_lower_get_next_private_rcu(dev, &(iter)))
+void *netdev_lower_get_next(struct net_device *dev,
+ struct list_head **iter);
+#define netdev_for_each_lower_dev(dev, ldev, iter) \
+ for (iter = &(dev)->adj_list.lower, \
+ ldev = netdev_lower_get_next(dev, &(iter)); \
+ ldev; \
+ ldev = netdev_lower_get_next(dev, &(iter)))
+
void *netdev_adjacent_get_private(struct list_head *adj_list);
void *netdev_lower_get_first_private_rcu(struct net_device *dev);
struct net_device *netdev_master_upper_dev_get(struct net_device *dev);
@@ -3092,6 +3115,8 @@ void netdev_upper_dev_unlink(struct net_device *dev,
void netdev_adjacent_rename_links(struct net_device *dev, char *oldname);
void *netdev_lower_dev_get_private(struct net_device *dev,
struct net_device *lower_dev);
+int dev_get_nest_level(struct net_device *dev,
+ bool (*type_check)(struct net_device *dev));
int skb_checksum_help(struct sk_buff *skb);
struct sk_buff *__skb_gso_segment(struct sk_buff *skb,
netdev_features_t features, bool tx_path);
@@ -3180,12 +3205,7 @@ void netdev_change_features(struct net_device *dev);
void netif_stacked_transfer_operstate(const struct net_device *rootdev,
struct net_device *dev);
-netdev_features_t netif_skb_dev_features(struct sk_buff *skb,
- const struct net_device *dev);
-static inline netdev_features_t netif_skb_features(struct sk_buff *skb)
-{
- return netif_skb_dev_features(skb, skb->dev);
-}
+netdev_features_t netif_skb_features(struct sk_buff *skb);
static inline bool net_gso_ok(netdev_features_t features, int gso_type)
{
diff --git a/include/linux/netlink.h b/include/linux/netlink.h
index aad8eeaf416..f64b01787dd 100644
--- a/include/linux/netlink.h
+++ b/include/linux/netlink.h
@@ -169,4 +169,11 @@ struct netlink_tap {
extern int netlink_add_tap(struct netlink_tap *nt);
extern int netlink_remove_tap(struct netlink_tap *nt);
+bool __netlink_ns_capable(const struct netlink_skb_parms *nsp,
+ struct user_namespace *ns, int cap);
+bool netlink_ns_capable(const struct sk_buff *skb,
+ struct user_namespace *ns, int cap);
+bool netlink_capable(const struct sk_buff *skb, int cap);
+bool netlink_net_capable(const struct sk_buff *skb, int cap);
+
#endif /* __LINUX_NETLINK_H */
diff --git a/include/linux/of.h b/include/linux/of.h
index 3bad8d106e0..fa362867b45 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -130,6 +130,12 @@ static inline int of_node_check_flag(struct device_node *n, unsigned long flag)
return test_bit(flag, &n->_flags);
}
+static inline int of_node_test_and_set_flag(struct device_node *n,
+ unsigned long flag)
+{
+ return test_and_set_bit(flag, &n->_flags);
+}
+
static inline void of_node_set_flag(struct device_node *n, unsigned long flag)
{
set_bit(flag, &n->_flags);
@@ -197,6 +203,7 @@ static inline unsigned long of_read_ulong(const __be32 *cell, int size)
/* flag descriptions */
#define OF_DYNAMIC 1 /* node and properties were allocated via kmalloc */
#define OF_DETACHED 2 /* node has been detached from the device tree */
+#define OF_POPULATED 3 /* device already created for the node */
#define OF_IS_DYNAMIC(x) test_bit(OF_DYNAMIC, &x->_flags)
#define OF_MARK_DYNAMIC(x) set_bit(OF_DYNAMIC, &x->_flags)
@@ -349,7 +356,7 @@ int of_device_is_stdout_path(struct device_node *dn);
#else /* CONFIG_OF */
-static inline const char* of_node_full_name(struct device_node *np)
+static inline const char* of_node_full_name(const struct device_node *np)
{
return "<no-node>";
}
diff --git a/include/linux/of_gpio.h b/include/linux/of_gpio.h
index f14123a5a9d..38fc0503601 100644
--- a/include/linux/of_gpio.h
+++ b/include/linux/of_gpio.h
@@ -19,7 +19,6 @@
#include <linux/errno.h>
#include <linux/gpio.h>
#include <linux/of.h>
-#include <linux/gpio/consumer.h>
struct device_node;
@@ -48,7 +47,7 @@ static inline struct of_mm_gpio_chip *to_of_mm_gpio_chip(struct gpio_chip *gc)
return container_of(gc, struct of_mm_gpio_chip, gc);
}
-extern struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
+extern int of_get_named_gpio_flags(struct device_node *np,
const char *list_name, int index, enum of_gpio_flags *flags);
extern int of_mm_gpiochip_add(struct device_node *np,
@@ -63,10 +62,10 @@ extern int of_gpio_simple_xlate(struct gpio_chip *gc,
#else /* CONFIG_OF_GPIO */
/* Drivers may not strictly depend on the GPIO support, so let them link. */
-static inline struct gpio_desc *of_get_named_gpiod_flags(struct device_node *np,
+static inline int of_get_named_gpio_flags(struct device_node *np,
const char *list_name, int index, enum of_gpio_flags *flags)
{
- return ERR_PTR(-ENOSYS);
+ return -ENOSYS;
}
static inline int of_gpio_simple_xlate(struct gpio_chip *gc,
@@ -81,18 +80,6 @@ static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
#endif /* CONFIG_OF_GPIO */
-static inline int of_get_named_gpio_flags(struct device_node *np,
- const char *list_name, int index, enum of_gpio_flags *flags)
-{
- struct gpio_desc *desc;
- desc = of_get_named_gpiod_flags(np, list_name, index, flags);
-
- if (IS_ERR(desc))
- return PTR_ERR(desc);
- else
- return desc_to_gpio(desc);
-}
-
/**
* of_gpio_named_count() - Count GPIOs for a device
* @np: device node to count GPIOs for
@@ -129,22 +116,6 @@ static inline int of_gpio_count(struct device_node *np)
return of_gpio_named_count(np, "gpios");
}
-/**
- * of_get_gpiod_flags() - Get a GPIO descriptor and flags to use with GPIO API
- * @np: device node to get GPIO from
- * @index: index of the GPIO
- * @flags: a flags pointer to fill in
- *
- * Returns GPIO descriptor to use with Linux generic GPIO API, or a errno
- * value on the error condition. If @flags is not NULL the function also fills
- * in flags for the GPIO.
- */
-static inline struct gpio_desc *of_get_gpiod_flags(struct device_node *np,
- int index, enum of_gpio_flags *flags)
-{
- return of_get_named_gpiod_flags(np, "gpios", index, flags);
-}
-
static inline int of_get_gpio_flags(struct device_node *np, int index,
enum of_gpio_flags *flags)
{
diff --git a/include/linux/of_irq.h b/include/linux/of_irq.h
index 3f23b4472c3..6404253d810 100644
--- a/include/linux/of_irq.h
+++ b/include/linux/of_irq.h
@@ -44,11 +44,16 @@ extern void of_irq_init(const struct of_device_id *matches);
#ifdef CONFIG_OF_IRQ
extern int of_irq_count(struct device_node *dev);
+extern int of_irq_get(struct device_node *dev, int index);
#else
static inline int of_irq_count(struct device_node *dev)
{
return 0;
}
+static inline int of_irq_get(struct device_node *dev, int index)
+{
+ return 0;
+}
#endif
#if defined(CONFIG_OF)
diff --git a/include/linux/of_mdio.h b/include/linux/of_mdio.h
index 6fe8464ed76..881a7c3571f 100644
--- a/include/linux/of_mdio.h
+++ b/include/linux/of_mdio.h
@@ -31,7 +31,12 @@ extern struct mii_bus *of_mdio_find_bus(struct device_node *mdio_np);
#else /* CONFIG_OF */
static inline int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np)
{
- return -ENOSYS;
+ /*
+ * Fall back to the non-DT function to register a bus.
+ * This way, we don't have to keep compat bits around in drivers.
+ */
+
+ return mdiobus_register(mdio);
}
static inline struct phy_device *of_phy_find_device(struct device_node *phy_np)
diff --git a/include/linux/of_platform.h b/include/linux/of_platform.h
index 05cb4a92825..b1010eeaac0 100644
--- a/include/linux/of_platform.h
+++ b/include/linux/of_platform.h
@@ -72,6 +72,7 @@ extern int of_platform_populate(struct device_node *root,
const struct of_device_id *matches,
const struct of_dev_auxdata *lookup,
struct device *parent);
+extern int of_platform_depopulate(struct device *parent);
#else
static inline int of_platform_populate(struct device_node *root,
const struct of_device_id *matches,
@@ -80,6 +81,10 @@ static inline int of_platform_populate(struct device_node *root,
{
return -ENODEV;
}
+static inline int of_platform_depopulate(struct device *parent)
+{
+ return -ENODEV;
+}
#endif
#endif /* _LINUX_OF_PLATFORM_H */
diff --git a/include/linux/omap-dma.h b/include/linux/omap-dma.h
index 41a13e70f41..7944cdc27be 100644
--- a/include/linux/omap-dma.h
+++ b/include/linux/omap-dma.h
@@ -10,7 +10,7 @@
struct dma_chan;
-#if defined(CONFIG_DMA_OMAP) || defined(CONFIG_DMA_OMAP_MODULE)
+#if defined(CONFIG_DMA_OMAP) || (defined(CONFIG_DMA_OMAP_MODULE) && defined(MODULE))
bool omap_dma_filter_fn(struct dma_chan *, void *);
#else
static inline bool omap_dma_filter_fn(struct dma_chan *c, void *d)
diff --git a/include/linux/pci.h b/include/linux/pci.h
index aab57b4abe7..71d9673c1b2 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -365,6 +365,7 @@ struct pci_dev {
#endif
phys_addr_t rom; /* Physical address of ROM if it's not from the BAR */
size_t romlen; /* Length of ROM if it's not from the BAR */
+ char *driver_override; /* Driver name to force a match */
};
static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
@@ -477,6 +478,19 @@ static inline bool pci_is_root_bus(struct pci_bus *pbus)
return !(pbus->parent);
}
+/**
+ * pci_is_bridge - check if the PCI device is a bridge
+ * @dev: PCI device
+ *
+ * Return true if the PCI device is bridge whether it has subordinate
+ * or not.
+ */
+static inline bool pci_is_bridge(struct pci_dev *dev)
+{
+ return dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
+ dev->hdr_type == PCI_HEADER_TYPE_CARDBUS;
+}
+
static inline struct pci_dev *pci_upstream_bridge(struct pci_dev *dev)
{
dev = pci_physfn(dev);
@@ -518,7 +532,7 @@ static inline int pcibios_err_to_errno(int err)
case PCIBIOS_FUNC_NOT_SUPPORTED:
return -ENOENT;
case PCIBIOS_BAD_VENDOR_ID:
- return -EINVAL;
+ return -ENOTTY;
case PCIBIOS_DEVICE_NOT_FOUND:
return -ENODEV;
case PCIBIOS_BAD_REGISTER_NUMBER:
@@ -529,7 +543,7 @@ static inline int pcibios_err_to_errno(int err)
return -ENOSPC;
}
- return -ENOTTY;
+ return -ERANGE;
}
/* Low-level architecture-dependent routines */
@@ -603,6 +617,9 @@ struct pci_error_handlers {
/* PCI slot has been reset */
pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
+ /* PCI function reset prepare or completed */
+ void (*reset_notify)(struct pci_dev *dev, bool prepare);
+
/* Device driver may resume normal operations */
void (*resume)(struct pci_dev *dev);
};
@@ -680,8 +697,8 @@ struct pci_driver {
/**
* PCI_VDEVICE - macro used to describe a specific pci device in short form
- * @vendor: the vendor name
- * @device: the 16 bit PCI Device ID
+ * @vend: the vendor name
+ * @dev: the 16 bit PCI Device ID
*
* This macro is used to create a struct pci_device_id that matches a
* specific PCI device. The subvendor, and subdevice fields will be set
@@ -689,9 +706,9 @@ struct pci_driver {
* private data.
*/
-#define PCI_VDEVICE(vendor, device) \
- PCI_VENDOR_ID_##vendor, (device), \
- PCI_ANY_ID, PCI_ANY_ID, 0, 0
+#define PCI_VDEVICE(vend, dev) \
+ .vendor = PCI_VENDOR_ID_##vend, .device = (dev), \
+ .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID, 0, 0
/* these external functions are only available when PCI support is enabled */
#ifdef CONFIG_PCI
@@ -764,7 +781,7 @@ int pci_scan_slot(struct pci_bus *bus, int devfn);
struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
void pci_device_add(struct pci_dev *dev, struct pci_bus *bus);
unsigned int pci_scan_child_bus(struct pci_bus *bus);
-int __must_check pci_bus_add_device(struct pci_dev *dev);
+void pci_bus_add_device(struct pci_dev *dev);
void pci_read_bridge_bases(struct pci_bus *child);
struct resource *pci_find_parent_resource(const struct pci_dev *dev,
struct resource *res);
@@ -1158,7 +1175,6 @@ struct msix_entry {
#ifdef CONFIG_PCI_MSI
int pci_msi_vec_count(struct pci_dev *dev);
-int pci_enable_msi_block(struct pci_dev *dev, int nvec);
void pci_msi_shutdown(struct pci_dev *dev);
void pci_disable_msi(struct pci_dev *dev);
int pci_msix_vec_count(struct pci_dev *dev);
@@ -1188,8 +1204,6 @@ static inline int pci_enable_msix_exact(struct pci_dev *dev,
}
#else
static inline int pci_msi_vec_count(struct pci_dev *dev) { return -ENOSYS; }
-static inline int pci_enable_msi_block(struct pci_dev *dev, int nvec)
-{ return -ENOSYS; }
static inline void pci_msi_shutdown(struct pci_dev *dev) { }
static inline void pci_disable_msi(struct pci_dev *dev) { }
static inline int pci_msix_vec_count(struct pci_dev *dev) { return -ENOSYS; }
@@ -1244,7 +1258,7 @@ static inline void pcie_set_ecrc_checking(struct pci_dev *dev) { }
static inline void pcie_ecrc_get_policy(char *str) { }
#endif
-#define pci_enable_msi(pdev) pci_enable_msi_block(pdev, 1)
+#define pci_enable_msi(pdev) pci_enable_msi_exact(pdev, 1)
#ifdef CONFIG_HT_IRQ
/* The functions a driver should call */
@@ -1572,13 +1586,13 @@ extern unsigned long pci_hotplug_io_size;
extern unsigned long pci_hotplug_mem_size;
/* Architecture-specific versions may override these (weak) */
-int pcibios_add_platform_entries(struct pci_dev *dev);
void pcibios_disable_device(struct pci_dev *dev);
void pcibios_set_master(struct pci_dev *dev);
int pcibios_set_pcie_reset_state(struct pci_dev *dev,
enum pcie_reset_state state);
int pcibios_add_device(struct pci_dev *dev);
void pcibios_release_device(struct pci_dev *dev);
+void pcibios_penalize_isa_irq(int irq, int active);
#ifdef CONFIG_HIBERNATE_CALLBACKS
extern struct dev_pm_ops pcibios_pm_ops;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index d4de24b4d4c..7fa31731c85 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -1631,8 +1631,6 @@
#define PCI_DEVICE_ID_ATT_VENUS_MODEM 0x480
#define PCI_VENDOR_ID_SPECIALIX 0x11cb
-#define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000
-#define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000
#define PCI_SUBDEVICE_ID_SPECIALIX_SPEED4 0xa004
#define PCI_VENDOR_ID_ANALOG_DEVICES 0x11d4
@@ -2874,7 +2872,6 @@
#define PCI_DEVICE_ID_SCALEMP_VSMP_CTL 0x1010
#define PCI_VENDOR_ID_COMPUTONE 0x8e0e
-#define PCI_DEVICE_ID_COMPUTONE_IP2EX 0x0291
#define PCI_DEVICE_ID_COMPUTONE_PG 0x0302
#define PCI_SUBVENDOR_ID_COMPUTONE 0x8e0e
#define PCI_SUBDEVICE_ID_COMPUTONE_PG4 0x0001
diff --git a/include/linux/perf_event.h b/include/linux/perf_event.h
index 3356abcfff1..3ef6ea12806 100644
--- a/include/linux/perf_event.h
+++ b/include/linux/perf_event.h
@@ -402,6 +402,8 @@ struct perf_event {
struct ring_buffer *rb;
struct list_head rb_entry;
+ unsigned long rcu_batches;
+ int rcu_pending;
/* poll related */
wait_queue_head_t waitq;
diff --git a/include/linux/platform_data/at91_adc.h b/include/linux/platform_data/at91_adc.h
index b3ca1e94e0c..7819fc78773 100644
--- a/include/linux/platform_data/at91_adc.h
+++ b/include/linux/platform_data/at91_adc.h
@@ -7,23 +7,10 @@
#ifndef _AT91_ADC_H_
#define _AT91_ADC_H_
-/**
- * struct at91_adc_reg_desc - Various informations relative to registers
- * @channel_base: Base offset for the channel data registers
- * @drdy_mask: Mask of the DRDY field in the relevant registers
- (Interruptions registers mostly)
- * @status_register: Offset of the Interrupt Status Register
- * @trigger_register: Offset of the Trigger setup register
- * @mr_prescal_mask: Mask of the PRESCAL field in the adc MR register
- * @mr_startup_mask: Mask of the STARTUP field in the adc MR register
- */
-struct at91_adc_reg_desc {
- u8 channel_base;
- u32 drdy_mask;
- u8 status_register;
- u8 trigger_register;
- u32 mr_prescal_mask;
- u32 mr_startup_mask;
+enum atmel_adc_ts_type {
+ ATMEL_ADC_TOUCHSCREEN_NONE = 0,
+ ATMEL_ADC_TOUCHSCREEN_4WIRE = 4,
+ ATMEL_ADC_TOUCHSCREEN_5WIRE = 5,
};
/**
@@ -42,23 +29,21 @@ struct at91_adc_trigger {
/**
* struct at91_adc_data - platform data for ADC driver
* @channels_used: channels in use on the board as a bitmask
- * @num_channels: global number of channels available on the board
- * @registers: Registers definition on the board
* @startup_time: startup time of the ADC in microseconds
* @trigger_list: Triggers available in the ADC
* @trigger_number: Number of triggers available in the ADC
* @use_external_triggers: does the board has external triggers availables
* @vref: Reference voltage for the ADC in millivolts
+ * @touchscreen_type: If a touchscreen is connected, its type (4 or 5 wires)
*/
struct at91_adc_data {
unsigned long channels_used;
- u8 num_channels;
- struct at91_adc_reg_desc *registers;
u8 startup_time;
struct at91_adc_trigger *trigger_list;
u8 trigger_number;
bool use_external_triggers;
u16 vref;
+ enum atmel_adc_ts_type touchscreen_type;
};
extern void __init at91_add_device_adc(struct at91_adc_data *data);
diff --git a/include/linux/platform_data/atmel.h b/include/linux/platform_data/atmel.h
index e26b0c14ede..1466443797d 100644
--- a/include/linux/platform_data/atmel.h
+++ b/include/linux/platform_data/atmel.h
@@ -87,13 +87,6 @@ struct atmel_uart_data {
int rts_gpio; /* optional RTS GPIO */
};
- /* Touchscreen Controller */
-struct at91_tsadcc_data {
- unsigned int adc_clock;
- u8 pendet_debounce;
- u8 ts_sample_hold_time;
-};
-
/* CAN */
struct at91_can_data {
void (*transceiver_switch)(int on);
diff --git a/include/linux/platform_data/edma.h b/include/linux/platform_data/edma.h
index f50821cb64b..eb8d5627d08 100644
--- a/include/linux/platform_data/edma.h
+++ b/include/linux/platform_data/edma.h
@@ -43,15 +43,15 @@
/* PaRAM slots are laid out like this */
struct edmacc_param {
- unsigned int opt;
- unsigned int src;
- unsigned int a_b_cnt;
- unsigned int dst;
- unsigned int src_dst_bidx;
- unsigned int link_bcntrld;
- unsigned int src_dst_cidx;
- unsigned int ccnt;
-};
+ u32 opt;
+ u32 src;
+ u32 a_b_cnt;
+ u32 dst;
+ u32 src_dst_bidx;
+ u32 link_bcntrld;
+ u32 src_dst_cidx;
+ u32 ccnt;
+} __packed;
/* fields in edmacc_param.opt */
#define SAM BIT(0)
@@ -130,7 +130,7 @@ void edma_set_src(unsigned slot, dma_addr_t src_port,
enum address_mode mode, enum fifo_width);
void edma_set_dest(unsigned slot, dma_addr_t dest_port,
enum address_mode mode, enum fifo_width);
-void edma_get_position(unsigned slot, dma_addr_t *src, dma_addr_t *dst);
+dma_addr_t edma_get_position(unsigned slot, bool dst);
void edma_set_src_index(unsigned slot, s16 src_bidx, s16 src_cidx);
void edma_set_dest_index(unsigned slot, s16 dest_bidx, s16 dest_cidx);
void edma_set_transfer_params(unsigned slot, u16 acnt, u16 bcnt, u16 ccnt,
@@ -158,13 +158,6 @@ struct edma_rsv_info {
/* platform_data for EDMA driver */
struct edma_soc_info {
-
- /* how many dma resources of each type */
- unsigned n_channel;
- unsigned n_region;
- unsigned n_slot;
- unsigned n_tc;
- unsigned n_cc;
/*
* Default queue is expected to be a low-priority queue.
* This way, long transfers on the default queue started
@@ -175,7 +168,6 @@ struct edma_soc_info {
/* Resource reservation for other cores */
struct edma_rsv_info *rsv;
- s8 (*queue_tc_mapping)[2];
s8 (*queue_priority_mapping)[2];
const s16 (*xbar_chans)[2];
};
diff --git a/include/linux/platform_data/syscon.h b/include/linux/platform_data/syscon.h
new file mode 100644
index 00000000000..2354c6fa372
--- /dev/null
+++ b/include/linux/platform_data/syscon.h
@@ -0,0 +1,8 @@
+#ifndef PLATFORM_DATA_SYSCON_H
+#define PLATFORM_DATA_SYSCON_H
+
+struct syscon_platform_data {
+ const char *label;
+};
+
+#endif
diff --git a/include/linux/reset.h b/include/linux/reset.h
index c0eda5023d7..349f150ae12 100644
--- a/include/linux/reset.h
+++ b/include/linux/reset.h
@@ -2,6 +2,7 @@
#define _LINUX_RESET_H_
struct device;
+struct device_node;
struct reset_control;
#ifdef CONFIG_RESET_CONTROLLER
@@ -33,6 +34,9 @@ static inline struct reset_control *devm_reset_control_get_optional(
return devm_reset_control_get(dev, id);
}
+struct reset_control *of_reset_control_get(struct device_node *node,
+ const char *id);
+
#else
static inline int reset_control_reset(struct reset_control *rstc)
@@ -75,6 +79,12 @@ static inline struct reset_control *devm_reset_control_get_optional(
return ERR_PTR(-ENOSYS);
}
+static inline struct reset_control *of_reset_control_get(
+ struct device_node *node, const char *id)
+{
+ return ERR_PTR(-ENOSYS);
+}
+
#endif /* CONFIG_RESET_CONTROLLER */
#endif
diff --git a/include/linux/rtnetlink.h b/include/linux/rtnetlink.h
index 8e3e66ac0a5..953937ea523 100644
--- a/include/linux/rtnetlink.h
+++ b/include/linux/rtnetlink.h
@@ -4,6 +4,7 @@
#include <linux/mutex.h>
#include <linux/netdevice.h>
+#include <linux/wait.h>
#include <uapi/linux/rtnetlink.h>
extern int rtnetlink_send(struct sk_buff *skb, struct net *net, u32 pid, u32 group, int echo);
@@ -22,6 +23,10 @@ extern void rtnl_lock(void);
extern void rtnl_unlock(void);
extern int rtnl_trylock(void);
extern int rtnl_is_locked(void);
+
+extern wait_queue_head_t netdev_unregistering_wq;
+extern struct mutex net_mutex;
+
#ifdef CONFIG_PROVE_LOCKING
extern int lockdep_rtnl_is_held(void);
#else
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 25f54c79f75..221b2bde372 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -220,7 +220,7 @@ print_cfs_rq(struct seq_file *m, int cpu, struct cfs_rq *cfs_rq);
#define TASK_PARKED 512
#define TASK_STATE_MAX 1024
-#define TASK_STATE_TO_CHAR_STR "RSDTtZXxKWP"
+#define TASK_STATE_TO_CHAR_STR "RSDTtXZxKWP"
extern char ___assert_task_state[1 - 2*!!(
sizeof(TASK_STATE_TO_CHAR_STR)-1 != ilog2(TASK_STATE_MAX)+1)];
@@ -1153,9 +1153,12 @@ struct sched_dl_entity {
*
* @dl_boosted tells if we are boosted due to DI. If so we are
* outside bandwidth enforcement mechanism (but only until we
- * exit the critical section).
+ * exit the critical section);
+ *
+ * @dl_yielded tells if task gave up the cpu before consuming
+ * all its available runtime during the last job.
*/
- int dl_throttled, dl_new, dl_boosted;
+ int dl_throttled, dl_new, dl_boosted, dl_yielded;
/*
* Bandwidth enforcement timer. Each -deadline task has its
diff --git a/include/linux/sh_timer.h b/include/linux/sh_timer.h
index 4d9dcd13831..8e1e036d6d4 100644
--- a/include/linux/sh_timer.h
+++ b/include/linux/sh_timer.h
@@ -7,6 +7,7 @@ struct sh_timer_config {
int timer_bit;
unsigned long clockevent_rating;
unsigned long clocksource_rating;
+ unsigned int channels_mask;
};
#endif /* __SH_TIMER_H__ */
diff --git a/include/linux/slub_def.h b/include/linux/slub_def.h
index f2f7398848c..d82abd40a3c 100644
--- a/include/linux/slub_def.h
+++ b/include/linux/slub_def.h
@@ -101,4 +101,13 @@ struct kmem_cache {
struct kmem_cache_node *node[MAX_NUMNODES];
};
+#ifdef CONFIG_SYSFS
+#define SLAB_SUPPORTS_SYSFS
+void sysfs_slab_remove(struct kmem_cache *);
+#else
+static inline void sysfs_slab_remove(struct kmem_cache *s)
+{
+}
+#endif
+
#endif /* _LINUX_SLUB_DEF_H */
diff --git a/include/linux/sock_diag.h b/include/linux/sock_diag.h
index 54f91d35e5f..46cca4c0684 100644
--- a/include/linux/sock_diag.h
+++ b/include/linux/sock_diag.h
@@ -23,7 +23,7 @@ int sock_diag_check_cookie(void *sk, __u32 *cookie);
void sock_diag_save_cookie(void *sk, __u32 *cookie);
int sock_diag_put_meminfo(struct sock *sk, struct sk_buff *skb, int attr);
-int sock_diag_put_filterinfo(struct user_namespace *user_ns, struct sock *sk,
+int sock_diag_put_filterinfo(bool may_report_filterinfo, struct sock *sk,
struct sk_buff *skb, int attrtype);
#endif
diff --git a/include/linux/tty.h b/include/linux/tty.h
index 036cccd80d9..1c3316a47d7 100644
--- a/include/linux/tty.h
+++ b/include/linux/tty.h
@@ -61,7 +61,6 @@ struct tty_bufhead {
struct tty_buffer *head; /* Queue head */
struct work_struct work;
struct mutex lock;
- spinlock_t flush_lock;
atomic_t priority;
struct tty_buffer sentinel;
struct llist_head free; /* Free queue head */
diff --git a/include/linux/types.h b/include/linux/types.h
index 4d118ba1134..a0bb7048687 100644
--- a/include/linux/types.h
+++ b/include/linux/types.h
@@ -142,6 +142,7 @@ typedef unsigned long blkcnt_t;
#define pgoff_t unsigned long
#endif
+/* A dma_addr_t can hold any valid DMA or bus address for the platform */
#ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
typedef u64 dma_addr_t;
#else
diff --git a/include/linux/vexpress.h b/include/linux/vexpress.h
index 617c01b8f74..a4c9547aae6 100644
--- a/include/linux/vexpress.h
+++ b/include/linux/vexpress.h
@@ -15,28 +15,15 @@
#define _LINUX_VEXPRESS_H
#include <linux/device.h>
+#include <linux/platform_device.h>
#include <linux/reboot.h>
+#include <linux/regmap.h>
#define VEXPRESS_SITE_MB 0
#define VEXPRESS_SITE_DB1 1
#define VEXPRESS_SITE_DB2 2
#define VEXPRESS_SITE_MASTER 0xf
-#define VEXPRESS_CONFIG_STATUS_DONE 0
-#define VEXPRESS_CONFIG_STATUS_WAIT 1
-
-#define VEXPRESS_GPIO_MMC_CARDIN 0
-#define VEXPRESS_GPIO_MMC_WPROT 1
-#define VEXPRESS_GPIO_FLASH_WPn 2
-#define VEXPRESS_GPIO_LED0 3
-#define VEXPRESS_GPIO_LED1 4
-#define VEXPRESS_GPIO_LED2 5
-#define VEXPRESS_GPIO_LED3 6
-#define VEXPRESS_GPIO_LED4 7
-#define VEXPRESS_GPIO_LED5 8
-#define VEXPRESS_GPIO_LED6 9
-#define VEXPRESS_GPIO_LED7 10
-
#define VEXPRESS_RES_FUNC(_site, _func) \
{ \
.start = (_site), \
@@ -44,84 +31,43 @@
.flags = IORESOURCE_BUS, \
}
-/* Config bridge API */
+/* Config infrastructure */
-/**
- * struct vexpress_config_bridge_info - description of the platform
- * configuration infrastructure bridge.
- *
- * @name: Bridge name
- *
- * @func_get: Obtains pointer to a configuration function for a given
- * device or a Device Tree node, to be used with @func_put
- * and @func_exec. The node pointer should take precedence
- * over device pointer when both are passed.
- *
- * @func_put: Tells the bridge that the function will not be used any
- * more, so all allocated resources can be released.
- *
- * @func_exec: Executes a configuration function read or write operation.
- * The offset selects a 32 bit word of the value accessed.
- * Must return VEXPRESS_CONFIG_STATUS_DONE when operation
- * is finished immediately, VEXPRESS_CONFIG_STATUS_WAIT when
- * will be completed in some time or negative value in case
- * of error.
- */
-struct vexpress_config_bridge_info {
- const char *name;
- void *(*func_get)(struct device *dev, struct device_node *node);
- void (*func_put)(void *func);
- int (*func_exec)(void *func, int offset, bool write, u32 *data);
-};
+void vexpress_config_set_master(u32 site);
+u32 vexpress_config_get_master(void);
-struct vexpress_config_bridge;
+void vexpress_config_lock(void *arg);
+void vexpress_config_unlock(void *arg);
-struct vexpress_config_bridge *vexpress_config_bridge_register(
- struct device_node *node,
- struct vexpress_config_bridge_info *info);
-void vexpress_config_bridge_unregister(struct vexpress_config_bridge *bridge);
+int vexpress_config_get_topo(struct device_node *node, u32 *site,
+ u32 *position, u32 *dcc);
-void vexpress_config_complete(struct vexpress_config_bridge *bridge,
- int status);
+/* Config bridge API */
-/* Config function API */
+struct vexpress_config_bridge_ops {
+ struct regmap * (*regmap_init)(struct device *dev, void *context);
+ void (*regmap_exit)(struct regmap *regmap, void *context);
+};
-struct vexpress_config_func;
+struct device *vexpress_config_bridge_register(struct device *parent,
+ struct vexpress_config_bridge_ops *ops, void *context);
-struct vexpress_config_func *__vexpress_config_func_get(struct device *dev,
- struct device_node *node);
-#define vexpress_config_func_get_by_dev(dev) \
- __vexpress_config_func_get(dev, NULL)
-#define vexpress_config_func_get_by_node(node) \
- __vexpress_config_func_get(NULL, node)
-void vexpress_config_func_put(struct vexpress_config_func *func);
+/* Config regmap API */
-/* Both may sleep! */
-int vexpress_config_read(struct vexpress_config_func *func, int offset,
- u32 *data);
-int vexpress_config_write(struct vexpress_config_func *func, int offset,
- u32 data);
+struct regmap *devm_regmap_init_vexpress_config(struct device *dev);
/* Platform control */
+unsigned int vexpress_get_mci_cardin(struct device *dev);
u32 vexpress_get_procid(int site);
-u32 vexpress_get_hbi(int site);
void *vexpress_get_24mhz_clock_base(void);
void vexpress_flags_set(u32 data);
-#define vexpress_get_site_by_node(node) __vexpress_get_site(NULL, node)
-#define vexpress_get_site_by_dev(dev) __vexpress_get_site(dev, NULL)
-unsigned __vexpress_get_site(struct device *dev, struct device_node *node);
-
void vexpress_sysreg_early_init(void __iomem *base);
-void vexpress_sysreg_of_early_init(void);
+int vexpress_syscfg_device_register(struct platform_device *pdev);
/* Clocks */
-struct clk *vexpress_osc_setup(struct device *dev);
-void vexpress_osc_of_setup(struct device_node *node);
-
void vexpress_clk_init(void __iomem *sp810_base);
-void vexpress_clk_of_init(void);
#endif
diff --git a/include/net/af_vsock.h b/include/net/af_vsock.h
index 7d64d3609ec..42827786940 100644
--- a/include/net/af_vsock.h
+++ b/include/net/af_vsock.h
@@ -155,7 +155,11 @@ struct vsock_transport {
/**** CORE ****/
-int vsock_core_init(const struct vsock_transport *t);
+int __vsock_core_init(const struct vsock_transport *t, struct module *owner);
+static inline int vsock_core_init(const struct vsock_transport *t)
+{
+ return __vsock_core_init(t, THIS_MODULE);
+}
void vsock_core_exit(void);
/**** UTILS ****/
diff --git a/include/net/cfg80211.h b/include/net/cfg80211.h
index f3539a15c41..f856e5a746f 100644
--- a/include/net/cfg80211.h
+++ b/include/net/cfg80211.h
@@ -3669,6 +3669,18 @@ void cfg80211_sched_scan_results(struct wiphy *wiphy);
void cfg80211_sched_scan_stopped(struct wiphy *wiphy);
/**
+ * cfg80211_sched_scan_stopped_rtnl - notify that the scheduled scan has stopped
+ *
+ * @wiphy: the wiphy on which the scheduled scan stopped
+ *
+ * The driver can call this function to inform cfg80211 that the
+ * scheduled scan had to be stopped, for whatever reason. The driver
+ * is then called back via the sched_scan_stop operation when done.
+ * This function should be called with rtnl locked.
+ */
+void cfg80211_sched_scan_stopped_rtnl(struct wiphy *wiphy);
+
+/**
* cfg80211_inform_bss_width_frame - inform cfg80211 of a received BSS frame
*
* @wiphy: the wiphy reporting the BSS
diff --git a/include/net/ip6_route.h b/include/net/ip6_route.h
index 6c4f5eac98e..216cecce65e 100644
--- a/include/net/ip6_route.h
+++ b/include/net/ip6_route.h
@@ -127,6 +127,7 @@ int rt6_dump_route(struct rt6_info *rt, void *p_arg);
void rt6_ifdown(struct net *net, struct net_device *dev);
void rt6_mtu_change(struct net_device *dev, unsigned int mtu);
void rt6_remove_prefsrc(struct inet6_ifaddr *ifp);
+void rt6_clean_tohost(struct net *net, struct in6_addr *gateway);
/*
diff --git a/include/net/netns/ipv4.h b/include/net/netns/ipv4.h
index 80f500a2949..b2704fd0ec8 100644
--- a/include/net/netns/ipv4.h
+++ b/include/net/netns/ipv4.h
@@ -20,6 +20,11 @@ struct local_ports {
int range[2];
};
+struct ping_group_range {
+ seqlock_t lock;
+ kgid_t range[2];
+};
+
struct netns_ipv4 {
#ifdef CONFIG_SYSCTL
struct ctl_table_header *forw_hdr;
@@ -66,13 +71,13 @@ struct netns_ipv4 {
int sysctl_icmp_ratemask;
int sysctl_icmp_errors_use_inbound_ifaddr;
- struct local_ports sysctl_local_ports;
+ struct local_ports ip_local_ports;
int sysctl_tcp_ecn;
int sysctl_ip_no_pmtu_disc;
int sysctl_ip_fwd_use_pmtu;
- kgid_t sysctl_ping_group_range[2];
+ struct ping_group_range ping_group_range;
atomic_t dev_addr_genid;
diff --git a/include/net/sock.h b/include/net/sock.h
index 8338a14e480..21569cf456e 100644
--- a/include/net/sock.h
+++ b/include/net/sock.h
@@ -2255,6 +2255,11 @@ int sock_get_timestampns(struct sock *, struct timespec __user *);
int sock_recv_errqueue(struct sock *sk, struct msghdr *msg, int len, int level,
int type);
+bool sk_ns_capable(const struct sock *sk,
+ struct user_namespace *user_ns, int cap);
+bool sk_capable(const struct sock *sk, int cap);
+bool sk_net_capable(const struct sock *sk, int cap);
+
/*
* Enable debug/info messages
*/
diff --git a/include/trace/events/module.h b/include/trace/events/module.h
index 11fd51b413d..7c5cbfe3fc4 100644
--- a/include/trace/events/module.h
+++ b/include/trace/events/module.h
@@ -25,7 +25,7 @@ struct module;
{ (1UL << TAINT_OOT_MODULE), "O" }, \
{ (1UL << TAINT_FORCED_MODULE), "F" }, \
{ (1UL << TAINT_CRAP), "C" }, \
- { (1UL << TAINT_UNSIGNED_MODULE), "X" })
+ { (1UL << TAINT_UNSIGNED_MODULE), "E" })
TRACE_EVENT(module_load,
@@ -80,7 +80,7 @@ DECLARE_EVENT_CLASS(module_refcnt,
TP_fast_assign(
__entry->ip = ip;
- __entry->refcnt = __this_cpu_read(mod->refptr->incs) + __this_cpu_read(mod->refptr->decs);
+ __entry->refcnt = __this_cpu_read(mod->refptr->incs) - __this_cpu_read(mod->refptr->decs);
__assign_str(name, mod->name);
),
diff --git a/include/uapi/asm-generic/resource.h b/include/uapi/asm-generic/resource.h
index f863428796d..c6d10af5012 100644
--- a/include/uapi/asm-generic/resource.h
+++ b/include/uapi/asm-generic/resource.h
@@ -57,12 +57,5 @@
# define RLIM_INFINITY (~0UL)
#endif
-/*
- * RLIMIT_STACK default maximum - some architectures override it:
- */
-#ifndef _STK_LIM_MAX
-# define _STK_LIM_MAX RLIM_INFINITY
-#endif
-
#endif /* _UAPI_ASM_GENERIC_RESOURCE_H */
diff --git a/include/uapi/asm-generic/unistd.h b/include/uapi/asm-generic/unistd.h
index 6db66783d26..33364060808 100644
--- a/include/uapi/asm-generic/unistd.h
+++ b/include/uapi/asm-generic/unistd.h
@@ -697,9 +697,11 @@ __SYSCALL(__NR_finit_module, sys_finit_module)
__SYSCALL(__NR_sched_setattr, sys_sched_setattr)
#define __NR_sched_getattr 275
__SYSCALL(__NR_sched_getattr, sys_sched_getattr)
+#define __NR_renameat2 276
+__SYSCALL(__NR_renameat2, sys_renameat2)
#undef __NR_syscalls
-#define __NR_syscalls 276
+#define __NR_syscalls 277
/*
* All syscalls below here should go away really,
diff --git a/include/uapi/linux/audit.h b/include/uapi/linux/audit.h
index 11917f747cb..4c31a366be1 100644
--- a/include/uapi/linux/audit.h
+++ b/include/uapi/linux/audit.h
@@ -331,9 +331,17 @@ enum {
#define AUDIT_FAIL_PRINTK 1
#define AUDIT_FAIL_PANIC 2
+/*
+ * These bits disambiguate different calling conventions that share an
+ * ELF machine type, bitness, and endianness
+ */
+#define __AUDIT_ARCH_CONVENTION_MASK 0x30000000
+#define __AUDIT_ARCH_CONVENTION_MIPS64_N32 0x20000000
+
/* distinguish syscall tables */
#define __AUDIT_ARCH_64BIT 0x80000000
#define __AUDIT_ARCH_LE 0x40000000
+
#define AUDIT_ARCH_ALPHA (EM_ALPHA|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_ARM (EM_ARM|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_ARMEB (EM_ARM)
@@ -346,7 +354,11 @@ enum {
#define AUDIT_ARCH_MIPS (EM_MIPS)
#define AUDIT_ARCH_MIPSEL (EM_MIPS|__AUDIT_ARCH_LE)
#define AUDIT_ARCH_MIPS64 (EM_MIPS|__AUDIT_ARCH_64BIT)
+#define AUDIT_ARCH_MIPS64N32 (EM_MIPS|__AUDIT_ARCH_64BIT|\
+ __AUDIT_ARCH_CONVENTION_MIPS64_N32)
#define AUDIT_ARCH_MIPSEL64 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
+#define AUDIT_ARCH_MIPSEL64N32 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE|\
+ __AUDIT_ARCH_CONVENTION_MIPS64_N32)
#define AUDIT_ARCH_OPENRISC (EM_OPENRISC)
#define AUDIT_ARCH_PARISC (EM_PARISC)
#define AUDIT_ARCH_PARISC64 (EM_PARISC|__AUDIT_ARCH_64BIT)
diff --git a/include/uapi/linux/fuse.h b/include/uapi/linux/fuse.h
index cf4750e1bb4..40b5ca8a1b1 100644
--- a/include/uapi/linux/fuse.h
+++ b/include/uapi/linux/fuse.h
@@ -96,6 +96,11 @@
*
* 7.23
* - add FUSE_WRITEBACK_CACHE
+ * - add time_gran to fuse_init_out
+ * - add reserved space to fuse_init_out
+ * - add FATTR_CTIME
+ * - add ctime and ctimensec to fuse_setattr_in
+ * - add FUSE_RENAME2 request
*/
#ifndef _LINUX_FUSE_H
@@ -191,6 +196,7 @@ struct fuse_file_lock {
#define FATTR_ATIME_NOW (1 << 7)
#define FATTR_MTIME_NOW (1 << 8)
#define FATTR_LOCKOWNER (1 << 9)
+#define FATTR_CTIME (1 << 10)
/**
* Flags returned by the OPEN request
@@ -348,6 +354,7 @@ enum fuse_opcode {
FUSE_BATCH_FORGET = 42,
FUSE_FALLOCATE = 43,
FUSE_READDIRPLUS = 44,
+ FUSE_RENAME2 = 45,
/* CUSE specific operations */
CUSE_INIT = 4096,
@@ -426,6 +433,12 @@ struct fuse_rename_in {
uint64_t newdir;
};
+struct fuse_rename2_in {
+ uint64_t newdir;
+ uint32_t flags;
+ uint32_t padding;
+};
+
struct fuse_link_in {
uint64_t oldnodeid;
};
@@ -438,10 +451,10 @@ struct fuse_setattr_in {
uint64_t lock_owner;
uint64_t atime;
uint64_t mtime;
- uint64_t unused2;
+ uint64_t ctime;
uint32_t atimensec;
uint32_t mtimensec;
- uint32_t unused3;
+ uint32_t ctimensec;
uint32_t mode;
uint32_t unused4;
uint32_t uid;
@@ -559,6 +572,9 @@ struct fuse_init_in {
uint32_t flags;
};
+#define FUSE_COMPAT_INIT_OUT_SIZE 8
+#define FUSE_COMPAT_22_INIT_OUT_SIZE 24
+
struct fuse_init_out {
uint32_t major;
uint32_t minor;
@@ -567,6 +583,8 @@ struct fuse_init_out {
uint16_t max_background;
uint16_t congestion_threshold;
uint32_t max_write;
+ uint32_t time_gran;
+ uint32_t unused[9];
};
#define CUSE_INIT_INFO_MAX 4096
diff --git a/include/uapi/linux/nl80211.h b/include/uapi/linux/nl80211.h
index 1ba9d626aa8..194c1eab04d 100644
--- a/include/uapi/linux/nl80211.h
+++ b/include/uapi/linux/nl80211.h
@@ -3856,6 +3856,8 @@ enum nl80211_ap_sme_features {
* @NL80211_FEATURE_CELL_BASE_REG_HINTS: This driver has been tested
* to work properly to suppport receiving regulatory hints from
* cellular base stations.
+ * @NL80211_FEATURE_P2P_DEVICE_NEEDS_CHANNEL: (no longer available, only
+ * here to reserve the value for API/ABI compatibility)
* @NL80211_FEATURE_SAE: This driver supports simultaneous authentication of
* equals (SAE) with user space SME (NL80211_CMD_AUTHENTICATE) in station
* mode
@@ -3897,7 +3899,7 @@ enum nl80211_feature_flags {
NL80211_FEATURE_HT_IBSS = 1 << 1,
NL80211_FEATURE_INACTIVITY_TIMER = 1 << 2,
NL80211_FEATURE_CELL_BASE_REG_HINTS = 1 << 3,
- /* bit 4 is reserved - don't use */
+ NL80211_FEATURE_P2P_DEVICE_NEEDS_CHANNEL = 1 << 4,
NL80211_FEATURE_SAE = 1 << 5,
NL80211_FEATURE_LOW_PRIORITY_SCAN = 1 << 6,
NL80211_FEATURE_SCAN_FLUSH = 1 << 7,
diff --git a/include/xen/interface/io/blkif.h b/include/xen/interface/io/blkif.h
index 32ec05a6572..c33e1c489eb 100644
--- a/include/xen/interface/io/blkif.h
+++ b/include/xen/interface/io/blkif.h
@@ -86,7 +86,7 @@ typedef uint64_t blkif_sector_t;
* Interface%20manuals/100293068c.pdf
* The backend can optionally provide three extra XenBus attributes to
* further optimize the discard functionality:
- * 'discard-aligment' - Devices that support discard functionality may
+ * 'discard-alignment' - Devices that support discard functionality may
* internally allocate space in units that are bigger than the exported
* logical block size. The discard-alignment parameter indicates how many bytes
* the beginning of the partition is offset from the internal allocation unit's
diff --git a/include/xen/interface/xen.h b/include/xen/interface/xen.h
index 0cd5ca333fa..de082130ba4 100644
--- a/include/xen/interface/xen.h
+++ b/include/xen/interface/xen.h
@@ -275,9 +275,9 @@ DEFINE_GUEST_HANDLE_STRUCT(mmu_update);
* NB. The fields are natural register size for this architecture.
*/
struct multicall_entry {
- unsigned long op;
- long result;
- unsigned long args[6];
+ xen_ulong_t op;
+ xen_long_t result;
+ xen_ulong_t args[6];
};
DEFINE_GUEST_HANDLE_STRUCT(multicall_entry);
diff --git a/include/xen/xen-ops.h b/include/xen/xen-ops.h
index 2cf47175b12..0b3149ed7ea 100644
--- a/include/xen/xen-ops.h
+++ b/include/xen/xen-ops.h
@@ -9,10 +9,6 @@ DECLARE_PER_CPU(struct vcpu_info *, xen_vcpu);
void xen_arch_pre_suspend(void);
void xen_arch_post_suspend(int suspend_cancelled);
-void xen_arch_hvm_post_suspend(int suspend_cancelled);
-
-void xen_mm_pin_all(void);
-void xen_mm_unpin_all(void);
void xen_timer_resume(void);
void xen_arch_resume(void);