summaryrefslogtreecommitdiffstats
path: root/sound/soc/codecs/pcm512x.h
diff options
context:
space:
mode:
Diffstat (limited to 'sound/soc/codecs/pcm512x.h')
-rw-r--r--sound/soc/codecs/pcm512x.h126
1 files changed, 69 insertions, 57 deletions
diff --git a/sound/soc/codecs/pcm512x.h b/sound/soc/codecs/pcm512x.h
index b2f518ecb35..e58743c965d 100644
--- a/sound/soc/codecs/pcm512x.h
+++ b/sound/soc/codecs/pcm512x.h
@@ -17,66 +17,78 @@
#ifndef _SND_SOC_PCM512X
#define _SND_SOC_PCM512X
-#define PCM512x_PAGE_0_BASE 0
+#define PCM512x_VIRT_BASE 0x100
+#define PCM512x_PAGE_LEN 0x100
+#define PCM512x_PAGE_BASE(n) (PCM512x_VIRT_BASE + (PCM512x_PAGE_LEN * n))
#define PCM512x_PAGE 0
-#define PCM512x_RESET (PCM512x_PAGE_0_BASE + 1)
-#define PCM512x_POWER (PCM512x_PAGE_0_BASE + 2)
-#define PCM512x_MUTE (PCM512x_PAGE_0_BASE + 3)
-#define PCM512x_PLL_EN (PCM512x_PAGE_0_BASE + 4)
-#define PCM512x_SPI_MISO_FUNCTION (PCM512x_PAGE_0_BASE + 6)
-#define PCM512x_DSP (PCM512x_PAGE_0_BASE + 7)
-#define PCM512x_GPIO_EN (PCM512x_PAGE_0_BASE + 8)
-#define PCM512x_BCLK_LRCLK_CFG (PCM512x_PAGE_0_BASE + 9)
-#define PCM512x_DSP_GPIO_INPUT (PCM512x_PAGE_0_BASE + 10)
-#define PCM512x_MASTER_MODE (PCM512x_PAGE_0_BASE + 12)
-#define PCM512x_PLL_REF (PCM512x_PAGE_0_BASE + 13)
-#define PCM512x_PLL_COEFF_0 (PCM512x_PAGE_0_BASE + 20)
-#define PCM512x_PLL_COEFF_1 (PCM512x_PAGE_0_BASE + 21)
-#define PCM512x_PLL_COEFF_2 (PCM512x_PAGE_0_BASE + 22)
-#define PCM512x_PLL_COEFF_3 (PCM512x_PAGE_0_BASE + 23)
-#define PCM512x_PLL_COEFF_4 (PCM512x_PAGE_0_BASE + 24)
-#define PCM512x_DSP_CLKDIV (PCM512x_PAGE_0_BASE + 27)
-#define PCM512x_DAC_CLKDIV (PCM512x_PAGE_0_BASE + 28)
-#define PCM512x_NCP_CLKDIV (PCM512x_PAGE_0_BASE + 29)
-#define PCM512x_OSR_CLKDIV (PCM512x_PAGE_0_BASE + 30)
-#define PCM512x_MASTER_CLKDIV_1 (PCM512x_PAGE_0_BASE + 32)
-#define PCM512x_MASTER_CLKDIV_2 (PCM512x_PAGE_0_BASE + 33)
-#define PCM512x_FS_SPEED_MODE (PCM512x_PAGE_0_BASE + 34)
-#define PCM512x_IDAC_1 (PCM512x_PAGE_0_BASE + 35)
-#define PCM512x_IDAC_2 (PCM512x_PAGE_0_BASE + 36)
-#define PCM512x_ERROR_DETECT (PCM512x_PAGE_0_BASE + 37)
-#define PCM512x_I2S_1 (PCM512x_PAGE_0_BASE + 40)
-#define PCM512x_I2S_2 (PCM512x_PAGE_0_BASE + 41)
-#define PCM512x_DAC_ROUTING (PCM512x_PAGE_0_BASE + 42)
-#define PCM512x_DSP_PROGRAM (PCM512x_PAGE_0_BASE + 43)
-#define PCM512x_CLKDET (PCM512x_PAGE_0_BASE + 44)
-#define PCM512x_AUTO_MUTE (PCM512x_PAGE_0_BASE + 59)
-#define PCM512x_DIGITAL_VOLUME_1 (PCM512x_PAGE_0_BASE + 60)
-#define PCM512x_DIGITAL_VOLUME_2 (PCM512x_PAGE_0_BASE + 61)
-#define PCM512x_DIGITAL_VOLUME_3 (PCM512x_PAGE_0_BASE + 62)
-#define PCM512x_DIGITAL_MUTE_1 (PCM512x_PAGE_0_BASE + 63)
-#define PCM512x_DIGITAL_MUTE_2 (PCM512x_PAGE_0_BASE + 64)
-#define PCM512x_DIGITAL_MUTE_3 (PCM512x_PAGE_0_BASE + 65)
-#define PCM512x_GPIO_OUTPUT_1 (PCM512x_PAGE_0_BASE + 80)
-#define PCM512x_GPIO_OUTPUT_2 (PCM512x_PAGE_0_BASE + 81)
-#define PCM512x_GPIO_OUTPUT_3 (PCM512x_PAGE_0_BASE + 82)
-#define PCM512x_GPIO_OUTPUT_4 (PCM512x_PAGE_0_BASE + 83)
-#define PCM512x_GPIO_OUTPUT_5 (PCM512x_PAGE_0_BASE + 84)
-#define PCM512x_GPIO_OUTPUT_6 (PCM512x_PAGE_0_BASE + 85)
-#define PCM512x_GPIO_CONTROL_1 (PCM512x_PAGE_0_BASE + 86)
-#define PCM512x_GPIO_CONTROL_2 (PCM512x_PAGE_0_BASE + 87)
-#define PCM512x_OVERFLOW (PCM512x_PAGE_0_BASE + 90)
-#define PCM512x_RATE_DET_1 (PCM512x_PAGE_0_BASE + 91)
-#define PCM512x_RATE_DET_2 (PCM512x_PAGE_0_BASE + 92)
-#define PCM512x_RATE_DET_3 (PCM512x_PAGE_0_BASE + 93)
-#define PCM512x_RATE_DET_4 (PCM512x_PAGE_0_BASE + 94)
-#define PCM512x_ANALOG_MUTE_DET (PCM512x_PAGE_0_BASE + 108)
-#define PCM512x_GPIN (PCM512x_PAGE_0_BASE + 119)
-#define PCM512x_DIGITAL_MUTE_DET (PCM512x_PAGE_0_BASE + 120)
-
-#define PCM512x_MAX_REGISTER (PCM512x_PAGE_0_BASE + 120)
+#define PCM512x_RESET (PCM512x_PAGE_BASE(0) + 1)
+#define PCM512x_POWER (PCM512x_PAGE_BASE(0) + 2)
+#define PCM512x_MUTE (PCM512x_PAGE_BASE(0) + 3)
+#define PCM512x_PLL_EN (PCM512x_PAGE_BASE(0) + 4)
+#define PCM512x_SPI_MISO_FUNCTION (PCM512x_PAGE_BASE(0) + 6)
+#define PCM512x_DSP (PCM512x_PAGE_BASE(0) + 7)
+#define PCM512x_GPIO_EN (PCM512x_PAGE_BASE(0) + 8)
+#define PCM512x_BCLK_LRCLK_CFG (PCM512x_PAGE_BASE(0) + 9)
+#define PCM512x_DSP_GPIO_INPUT (PCM512x_PAGE_BASE(0) + 10)
+#define PCM512x_MASTER_MODE (PCM512x_PAGE_BASE(0) + 12)
+#define PCM512x_PLL_REF (PCM512x_PAGE_BASE(0) + 13)
+#define PCM512x_PLL_COEFF_0 (PCM512x_PAGE_BASE(0) + 20)
+#define PCM512x_PLL_COEFF_1 (PCM512x_PAGE_BASE(0) + 21)
+#define PCM512x_PLL_COEFF_2 (PCM512x_PAGE_BASE(0) + 22)
+#define PCM512x_PLL_COEFF_3 (PCM512x_PAGE_BASE(0) + 23)
+#define PCM512x_PLL_COEFF_4 (PCM512x_PAGE_BASE(0) + 24)
+#define PCM512x_DSP_CLKDIV (PCM512x_PAGE_BASE(0) + 27)
+#define PCM512x_DAC_CLKDIV (PCM512x_PAGE_BASE(0) + 28)
+#define PCM512x_NCP_CLKDIV (PCM512x_PAGE_BASE(0) + 29)
+#define PCM512x_OSR_CLKDIV (PCM512x_PAGE_BASE(0) + 30)
+#define PCM512x_MASTER_CLKDIV_1 (PCM512x_PAGE_BASE(0) + 32)
+#define PCM512x_MASTER_CLKDIV_2 (PCM512x_PAGE_BASE(0) + 33)
+#define PCM512x_FS_SPEED_MODE (PCM512x_PAGE_BASE(0) + 34)
+#define PCM512x_IDAC_1 (PCM512x_PAGE_BASE(0) + 35)
+#define PCM512x_IDAC_2 (PCM512x_PAGE_BASE(0) + 36)
+#define PCM512x_ERROR_DETECT (PCM512x_PAGE_BASE(0) + 37)
+#define PCM512x_I2S_1 (PCM512x_PAGE_BASE(0) + 40)
+#define PCM512x_I2S_2 (PCM512x_PAGE_BASE(0) + 41)
+#define PCM512x_DAC_ROUTING (PCM512x_PAGE_BASE(0) + 42)
+#define PCM512x_DSP_PROGRAM (PCM512x_PAGE_BASE(0) + 43)
+#define PCM512x_CLKDET (PCM512x_PAGE_BASE(0) + 44)
+#define PCM512x_AUTO_MUTE (PCM512x_PAGE_BASE(0) + 59)
+#define PCM512x_DIGITAL_VOLUME_1 (PCM512x_PAGE_BASE(0) + 60)
+#define PCM512x_DIGITAL_VOLUME_2 (PCM512x_PAGE_BASE(0) + 61)
+#define PCM512x_DIGITAL_VOLUME_3 (PCM512x_PAGE_BASE(0) + 62)
+#define PCM512x_DIGITAL_MUTE_1 (PCM512x_PAGE_BASE(0) + 63)
+#define PCM512x_DIGITAL_MUTE_2 (PCM512x_PAGE_BASE(0) + 64)
+#define PCM512x_DIGITAL_MUTE_3 (PCM512x_PAGE_BASE(0) + 65)
+#define PCM512x_GPIO_OUTPUT_1 (PCM512x_PAGE_BASE(0) + 80)
+#define PCM512x_GPIO_OUTPUT_2 (PCM512x_PAGE_BASE(0) + 81)
+#define PCM512x_GPIO_OUTPUT_3 (PCM512x_PAGE_BASE(0) + 82)
+#define PCM512x_GPIO_OUTPUT_4 (PCM512x_PAGE_BASE(0) + 83)
+#define PCM512x_GPIO_OUTPUT_5 (PCM512x_PAGE_BASE(0) + 84)
+#define PCM512x_GPIO_OUTPUT_6 (PCM512x_PAGE_BASE(0) + 85)
+#define PCM512x_GPIO_CONTROL_1 (PCM512x_PAGE_BASE(0) + 86)
+#define PCM512x_GPIO_CONTROL_2 (PCM512x_PAGE_BASE(0) + 87)
+#define PCM512x_OVERFLOW (PCM512x_PAGE_BASE(0) + 90)
+#define PCM512x_RATE_DET_1 (PCM512x_PAGE_BASE(0) + 91)
+#define PCM512x_RATE_DET_2 (PCM512x_PAGE_BASE(0) + 92)
+#define PCM512x_RATE_DET_3 (PCM512x_PAGE_BASE(0) + 93)
+#define PCM512x_RATE_DET_4 (PCM512x_PAGE_BASE(0) + 94)
+#define PCM512x_ANALOG_MUTE_DET (PCM512x_PAGE_BASE(0) + 108)
+#define PCM512x_GPIN (PCM512x_PAGE_BASE(0) + 119)
+#define PCM512x_DIGITAL_MUTE_DET (PCM512x_PAGE_BASE(0) + 120)
+
+#define PCM512x_OUTPUT_AMPLITUDE (PCM512x_PAGE_BASE(1) + 1)
+#define PCM512x_ANALOG_GAIN_CTRL (PCM512x_PAGE_BASE(1) + 2)
+#define PCM512x_UNDERVOLTAGE_PROT (PCM512x_PAGE_BASE(1) + 5)
+#define PCM512x_ANALOG_MUTE_CTRL (PCM512x_PAGE_BASE(1) + 6)
+#define PCM512x_ANALOG_GAIN_BOOST (PCM512x_PAGE_BASE(1) + 7)
+#define PCM512x_VCOM_CTRL_1 (PCM512x_PAGE_BASE(1) + 8)
+#define PCM512x_VCOM_CTRL_2 (PCM512x_PAGE_BASE(1) + 9)
+
+#define PCM512x_CRAM_CTRL (PCM512x_PAGE_BASE(44) + 1)
+
+#define PCM512x_MAX_REGISTER (PCM512x_PAGE_BASE(44) + 1)
/* Page 0, Register 1 - reset */
#define PCM512x_RSTR (1 << 0)
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-10-30 03:24:39 +0000