Age | Commit message (Collapse) | Author | |
---|---|---|---|
2014-01-23 | drm/nouveau/devinit: tidy up the subdev class definition | Ben Skeggs | |
Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu> Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/bar: tidy up the subdev and object class definitions | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/instmem: tidy up the object class definition | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/instmem: tidy up the subdev class definition | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/pwr: implement a simple i2c stack | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/pwr: have rd/wr32 routines clobber data instead of addr | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb: turn off some bits in 10f584 at init | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: merge a fix from ddr3 for one of the timing settings | Ben Skeggs | |
Titan. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: yet another random 10f200 bit | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nvc0-/fb: hook up skeleton interrupt handler | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: more 10f200 stuff | Ben Skeggs | |
Seen on Titan. NFI what the condition to switch this on is yet, and, hardcoding it to on currently causes master to report unknown intr with a mask of 0x08002000. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/clk: report ddr memory frequency | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/fb/gddr5: make sure we update mr7 when we're supposed to | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: 10f698/69c | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb: it's now safe to obey the memory voltage setting properly | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb: multi-stage reclock is required for certain transitions | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/clk: allow fb to signal it needs to do a multi-stage reclock | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: parse bios data into struct rather than using directly | Ben Skeggs | |
Still essentially a struct of magic values with magic names and unknown purposes. But, we will shortly need to be able to mix and match bits of the previous and next configurations to do a transition reclock, as such, we can no longer directly use the vbios data with any ease. This is probably nicer anyway in the long run, for a few reasons. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: found LP3 setting | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb: note the memory voltage toggle, not using it yet | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: somewhat better attempt at 100770/10f604/610/614 | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> fb/gddr5/nve0: 100770 is like 10f604 Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: fixup delays a bit | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/bios: timing 2.0 entries can have subentries | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: note another semi-unknown | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/fb/gddr5: modify mr8 with high bits of CL/WR | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: fix calculation of RDQS setting | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: switch off some other random bit at some point | Ben Skeggs | |
As seen when comparing us vs nv on my GTX660 Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: punt all 10f910/914 accesses through ram_train | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: not all memory partitions are created equal | Ben Skeggs | |
As seen when comparing us vs nv on my GTX660. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb: typo in register name | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/bios: make common code to handle ramcfg strap etc | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: fix an assumption of sane memory controller layout | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fb/gddr5: fix behaviour of lp3 setting | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fifo: recover from mmu faults on bar1/bar3 | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fifo: keep mmu fault interrupts enabled at all times | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fifo: update human-readable mmu fault descriptions | Ben Skeggs | |
Ordering from Android GK20A driver, names from binary driver strings. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fifo: document more intr status bits | Ben Skeggs | |
As per Android GK20A driver. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fifo: populate PBDMA status bitfield with more definitions | Ben Skeggs | |
As per Android GK20A driver. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fifo: s/subfifo/PBDMA/ | Ben Skeggs | |
As per Android GK20A driver. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nve0/fifo: s/playlist/runlist/ | Ben Skeggs | |
As per Android GK20A driver. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nvf0/gr: enable acceleration with our chsw ucode | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nv108/gr: enable acceleration with our chsw ucode | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nvc0-/gr: handle fwmthd interrupts in ucode | Ben Skeggs | |
Compute code in mesa triggers one of these, hanging the engine. Let's at least ack the request for now to avoid the hang. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nvc0-/gr: fiddle some magic around strand init | Ben Skeggs | |
Fixes HUB_INIT timeout on GK110/GK208 when not using NVIDIA's ucode. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nv108/gr: initial support (need external fuc) | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nv108/ce: enable copy engines | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nv108/fifo: initial support | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nvf0/gr: remove a copy+pasto in ctx reglist | Ben Skeggs | |
Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nvc0-/gr: bring in some macros to abstract falcon isa differences | Ben Skeggs | |
Need. A. Compiler... Signed-off-by: Ben Skeggs <bskeggs@redhat.com> | |||
2014-01-23 | drm/nouveau/falcon: use vmalloc to create firwmare copies | Ilia Mirkin | |
Some firmware images may be large (64K), so using kmalloc memory is inappropriate for them. Use vmalloc instead, to avoid high-order allocation failures. Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> Cc: stable@vger.kernel.org |