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If the kernel's init section is merged back into the main memory region
during boot (which it should since that is how we've laid out the kernel
linker map), we want to make sure that these aren't counted as independent
regions. Otherwise, if a large mapping is attempted which starts in the
init region and extends into the main memory region, the access_ok func
will deny it. This leads to weird messages during runtime like "unable
to map xxx library" from the ldso but upon running the application again,
everything works fine.
So if the address of the end of the init region is the same as the start
of the main memory region, simply enlarge the memory region to include
the init region.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Many Blackfin parts group sets of pins into a single functional unit.
This means you cannot use different pins within a group for different
peripherals. Our resource conflict checking thus far has been limited
to individual pins, so if someone tried to grab a different pin from
the same group, it would be allowed while silently changing the other
pins in the same group.
One common example is the pin set PG12 - PG15 on BF51x parts. They
may either be used with SPI0 (1st function), or they may be used with
PTP/PWM/AMS3 (3rd function). Ideally, we'd like to use PG12 - PG14
for SPI0 while using PG15 with AMS3, but the hardware does not permit
this. In the past, the software would allow the pins to be requested
this way, but ultimately things like the Blackfin SPI driver would
stop working when the hardware rerouted to a different peripheral.
Signed-off-by: steven miao <realmz6@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Reported-by: D Binderman <dcb314@hotmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Flushing caches sometimes requires anomaly workarounds which require
supervisor-only insns. Normally we don't need to flush caches from
userspace so this isn't a problem, but when gcc generates trampolines
on the stack, we do.
So add a new syscall for gcc to use modeled after the mips version.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The BF54x processor has a ton of on-chip peripherals and in order to
support them all, the u-boot image is quite large. So give it 512KiB
in all bootable flashes to make our lives easier.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: steven miao <realmz6@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make sure we include EMAC_SYSTAT when showing errors.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The predefined i2c address 0x2c doesn't match the configuration of the
ad5280 PINs AD0 and AD1 on the tftlcd add-on board. Both AD0 and AD1
are of voltage 3.3V, which means the i2c address should be 0x2F.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Nothing actually needs to use these MMRs (as direct cache manipulation
is done with the DTEST MMRs), so simply hide the read funcs behind the
anomaly define. They're generally unusable anyways when this anomaly
is in effect.
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than use raw numbers for the GPIO pins, use proper GPIO defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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When apps run with their stack in L1, some system calls might be made
where a buffer is in the stack as an argument. So make sure the core
Blackfin access code does not reject this memory location.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This board has an AD1836 codec, so make sure we have the right resources
declared for it.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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If an app is placing its stack in L1 scratchpad SRAM, make sure ptrace
is granted access to it so that gdb can do its thing.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The num_chipselect field for on-chip Blackfin SPI buses is supposed to
be 1 larger than the number of actual CSs available. This is because
the hardware starts counting at 1 and not 0. There is a field for "CS0",
but it is marked as "reserved" everywhere.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We don't need our own header and structure to hook up the ad5398 part,
so drop the custom resources for it.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rather than write our own ADP switch driver, use the existing fixed
regulator driver and rewrite the platform resources accordingly.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Some peripherals might generate an error interrupt shortly after the
data interrupt due to the fact that the peripheral isn't serviced fast
enough. In most cases this isn't a problem and is expected behavior.
This hasn't been a problem on most parts since you simply don't request
the error interrupt (or you leave it disabled while there is an expected
state) and do the peripheral status checking in the data interrupt.
The Blackfin SIC allows people to prioritize data and error interrupts,
and the Blackfin CEC allows interrupts of equal or higher priority to
nest. The current default settings gives error interrupts a higher
priority than data interrupts. So if an error occurs while processing
the data interrupt, it will be serviced immediately.
However, the error interrupt on the BF537 SIC cannot be enabled on a
per-peripheral basis. Once the error interrupt is enabled for one
peripheral, it is automatically enabled for all peripherals.
Therefore lower the default multiplexed error interrupt priority so
most people need not worry themselves with this issue.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Yi Li <yi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The NAND platform driver expects the registers to have a "mem"
resource type rather than "io".
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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With the recent kernel update the isp1362-hcd driver evaluates the
IORESOURCE_IRQ resource flags and requests the irq with the given
polarity/edge settings. However the ISP1362 config requires low
level/edge interrupts. Most of the Blackfin boards use some random
flag or no flag at all. Make all boards use a know good flag
IORESOURCE_IRQ_LOWEDGE.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The NAND platform driver expects the registers to have a "mem"
resource type rather than "io".
Signed-off-by: Valentin Yakovenkov <yakovenkov@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Add platform resources for the on-chip CAN peripheral so we can use it.
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Make sure we use the right Kconfig names and platform strings.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Now that we've rewritten the GPIO CS handling in the Blackfin SPI
peripheral, we need to update the platform resources accordingly.
Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Now that the common header defines everything and the SPI drivers are
using it, we can drop these duplicated global namespace polluters.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (71 commits)
powerpc/44x: Update ppc44x_defconfig
powerpc/watchdog: Make default timeout for Book-E watchdog a Kconfig option
fsl_rio: Add comments for sRIO registers.
powerpc/fsl-booke: Add e55xx (64-bit) smp defconfig
powerpc/fsl-booke: Add p5020 DS board support
powerpc/fsl-booke64: Use TLB CAMs to cover linear mapping on FSL 64-bit chips
powerpc/fsl-booke: Add support for FSL Arch v1.0 MMU in setup_page_sizes
powerpc/fsl-booke: Add support for FSL 64-bit e5500 core
powerpc/85xx: add cache-sram support
powerpc/85xx: add ngPIXIS FPGA device tree node to the P1022DS board
powerpc: Fix compile error with paca code on ppc64e
powerpc/fsl-booke: Add p3041 DS board support
oprofile/fsl emb: Don't set MSR[PMM] until after clearing the interrupt.
powerpc/fsl-booke: Add PCI device ids for P2040/P3041/P5010/P5020 QoirQ chips
powerpc/mpc8xxx_gpio: Add support for 'qoriq-gpio' controllers
powerpc/fsl_booke: Add support to boot from core other than 0
powerpc/p1022: Add probing for individual DMA channels
powerpc/fsl_soc: Search all global-utilities nodes for rstccr
powerpc: Fix invalid page flags in create TLB CAM path for PTE_64BIT
powerpc/mpc83xx: Support for MPC8308 P1M board
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Fix up conflict with the generic irq_work changes in arch/powerpc/kernel/time.c
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git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: (26 commits)
include/linux/libata.h: fix typo
pata_bf54x: fix return type of bfin_set_devctl
Drivers: ata: Makefile: replace the use of <module>-objs with <module>-y
libahci: fix result_tf handling after an ATA PIO data-in command
pata_sl82c105: implement sff_irq_check() method
pata_sil680: implement sff_irq_check() method
pata_pdc202xx_old: implement sff_irq_check() method
pata_cmd640: implement sff_irq_check() method
ata_piix: Add device ID for ICH4-L
pata_sil680: make sil680_sff_exec_command() 'static'
ata: Intel IDE-R support
libata: reorder ata_queued_cmd to remove alignment padding on 64 bit builds
libata: Signal that our SATL supports WRITE SAME(16) with UNMAP
ata_piix: remove SIDPR locking
libata: implement cross-port EH exclusion
libata: add @ap to ata_wait_register() and introduce ata_msleep()
ata_piix: implement LPM support
libata: implement LPM support for port multipliers
libata: reimplement link power management
libata: implement sata_link_scr_lpm() and make ata_dev_set_feature() global
...
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git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/ocfs2
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/ocfs2: (48 commits)
ocfs2: Avoid to evaluate xattr block flags again.
ocfs2/cluster: Release debugfs file elapsed_time_in_ms
ocfs2: Add a mount option "coherency=*" to handle cluster coherency for O_DIRECT writes.
Initialize max_slots early
When I tried to compile I got the following warning: fs/ocfs2/slot_map.c: In function ‘ocfs2_init_slot_info’: fs/ocfs2/slot_map.c:360: warning: ‘bytes’ may be used uninitialized in this function fs/ocfs2/slot_map.c:360: note: ‘bytes’ was declared here Compiler: gcc version 4.4.3 (GCC) on Mandriva I'm not sure why this warning occurs, I think compiler don't know that variable "bytes" is initialized when it is sent by reference to ocfs2_slot_map_physical_size and it throws that ugly warning. However, a simple initialization of "bytes" variable with 0 will fix it.
ocfs2: validate bg_free_bits_count after update
ocfs2/cluster: Bump up dlm protocol to version 1.1
ocfs2/cluster: Show per region heartbeat elapsed time
ocfs2/cluster: Add mlogs for heartbeat up/down events
ocfs2/cluster: Create debugfs dir/files for each region
ocfs2/cluster: Create debugfs files for live, quorum and failed region bitmaps
ocfs2/cluster: Maintain bitmap of failed regions
ocfs2/cluster: Maintain bitmap of quorum regions
ocfs2/cluster: Track bitmap of live heartbeat regions
ocfs2/cluster: Track number of global heartbeat regions
ocfs2/cluster: Maintain live node bitmap per heartbeat region
ocfs2/cluster: Reorganize o2hb debugfs init
ocfs2/cluster: Check slots for unconfigured live nodes
ocfs2/cluster: Print messages when adding/removing nodes
ocfs2/cluster: Print messages when adding/removing heartbeat regions
...
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git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'core-memblock-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (74 commits)
x86-64: Only set max_pfn_mapped to 512 MiB if we enter via head_64.S
xen: Cope with unmapped pages when initializing kernel pagetable
memblock, bootmem: Round pfn properly for memory and reserved regions
memblock: Annotate memblock functions with __init_memblock
memblock: Allow memblock_init to be called early
memblock/arm: Fix memblock_region_is_memory() typo
x86, memblock: Remove __memblock_x86_find_in_range_size()
memblock: Fix wraparound in find_region()
x86-32, memblock: Make add_highpages honor early reserved ranges
x86, memblock: Fix crashkernel allocation
arm, memblock: Fix the sparsemem build
memblock: Fix section mismatch warnings
powerpc, memblock: Fix memblock API change fallout
memblock, microblaze: Fix memblock API change fallout
x86: Remove old bootmem code
x86, memblock: Use memblock_memory_size()/memblock_free_memory_size() to get correct dma_reserve
x86: Remove not used early_res code
x86, memblock: Replace e820_/_early string with memblock_
x86: Use memblock to replace early_res
x86, memblock: Use memblock_debug to control debug message print out
...
Fix up trivial conflicts in arch/x86/kernel/setup.c and kernel/Makefile
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Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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The new devctl func added for us to the driver has the wrong return
type. Which is to say there shouldn't be any. This fixes compile
time warnings as there shouldn't be any runtime difference.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Changed <module>-objs to <module>-y in Makefile.
Signed-off-by: Tracey Dent <tdent48227@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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ATA devices don't send D2H Reg FIS after an successful ATA PIO data-in
command. The host is supposed to take the TF and E_Status of the
preceding PIO Setup FIS. Update ahci_qc_fill_rtf() such that it takes
TF + E_Status from PIO Setup FIS after a successful ATA PIO data-in
command.
Without this patch, result_tf for such a command is filled with the
content of the previous D2H Reg FIS which belongs to a previous
command, which can make the command incorrectly seen as failed.
* Patch updated to grab the whole TF + E_Status from PIO Setup FIS
instead of just E_Status as suggested by Robert Hancock.
Signed-off-by: Tejun Heo <tj@kernel.org>
Reported-by: Mark Lord <kernel@teksavvy.com>
Cc: Robert Hancock <hancockrwd@gmail.com>
Cc: stable@kernel.org
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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ICH4-L is a variant of ICH4 lacking USB2 functionality and with some
different device IDs.
It is documented in Intel specification update 290745-025, currently
at <http://www.intel.com/assets/pdf/specupdate/290745.pdf>, and is
included in the device ID table for piix.
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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... since, of course, it's not used outside this driver.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Intel IDE-R devices are part of the Intel AMT management setup. They don't
have any special configuration registers or settings so the ata_generic
driver will support them fully.
Rather than add a huge table of IDs for each chipset and keep sending in
new ones this patch autodetects them.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Acked-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Reorder structure ata_queued_cmd to remove 8 bytes of alignment padding
on 64 bit builds & therefore reduce the size of structure ata_port by
256 bytes.
Overall this will have little impact, other than reducing the amount of
memory that is cleared when allocating ata_ports.
Signed-off-by: Richard Kennedy <richard@rsk.demon.co.uk>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Until now identifying that a device supports WRITE SAME(16) with the
UNMAP bit set has been black magic. Implement support for the SBC-3
Thin Provisioning VPD page and set the TPWS bit.
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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Now that libata provides proper cross-port EH exclusion. The SIDPR
locking added by commit 213373cf (ata_piix: fix locking around SIDPR
access) is no longer necessary. Remove it.
Signed-off-by: Tejun Heo <tj@kernel.org>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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