Age | Commit message (Collapse) | Author |
|
Implement code for MX51 that allows the SoC to enter WFI when
arch_idle is called.
This patch is also necessary for correctly suspending the system.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
The Genesi EFIKA MX and EFIKA Smartbook are sharing a lot of things
so it makes sense to create a common file for both devices and a specific
file for each. No functionnal change except dropping uart 1 & 2.
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Currently we have a mxc_initialize_usb_hw which is called on every
i.MX SoC. This function dispatches the different SoC types, which
is quite ugly. This patch moves the SoC specific USB initialization
to their correspondive mach directories.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
1. Add Kconfig and Makefile entries
2. Add board definition
3. enable uart and fec for LOCO board
Signed-off-by: Yong Shen <yong.shen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
1. Add Kconfig and Makefile entries
2. Add board definition
3. enable uart and fec for SMD board
Signed-off-by: Yong Shen <yong.shen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
1. Add entries to Kconfig
2. Add machine definition
3. Add Uart platform data, pad setting and base address
4. Adjust GPIO irq number
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Add basic function and uart device support.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Add core definitions and memory map, gpio, irq, iomux, uart device
support.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Add iomux, clocks, and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Signed-off-by: Eric Bénard <eric@eukrea.com>
|
|
Get serial port working for now
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
CPUIMX51 is build around Freescale's i.MX515 and has up to
512MB of RAM, NAND Flash, Ethernet, USB Host with 4 ports
hub, USB OTG, ST16554 Quad UART on nCS1, I2C RTC ...
MBIMX51 adds LEDS, Keypad, TSC2007 touchscreen controler ...
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
3-stack is a reference board from Freescale for their i.MX51 SoC.
Add board definition, Kconfig and Makefile to enable Freescale 3-stack
board.
Boot tested on a i.MX51 3-stack Rev2.0 board
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
|
|
Babbage is a reference board from Freescale for their i.MX51 SoC.
Add board definition, Kconfig and Makefiles to enable Freescale i.MX51
processor and Babbage board.
Boot tested on a Babbage2.5 board
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
|