summaryrefslogtreecommitdiffstats
path: root/arch/arm
AgeCommit message (Collapse)Author
2013-06-17ARM: imx: add VF610 clock supportJingchang Lu
Add clock support for Vybrid VF610. It uses dtc macro support to define all clock IDs in vf610-clock.h to keep clock IDs coherence between kernel and DT. Signed-off-by: Jingchang Lu <b35083@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx_v6_v7_defconfig: enable parallel displayRogerio Pimentel
Enable paralell display by default Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: clk: No need to initialize phandle structFabio Estevam
commit 84344b43c (ARM: i.MX5: Allow DT clock providers) introduce the following sparse warning: arch/arm/mach-imx/clk.c:12:43: warning: Using plain integer as NULL pointer There is no need to initialize phandle, so remove it. Cc: Martin Fuzzey <mfuzzey@parkeon.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: irq-common: Include header to avoid sparse warningFabio Estevam
Fix the following sparse warning: arch/arm/mach-imx/irq-common.c:24:5: warning: symbol 'mxc_set_irq_fiq' was not declared. Should it be static? Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: Enable mx6 solo-lite supportFabio Estevam
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx6: use common of_clk_init() call to initialize clocksShawn Guo
Instead of explicitly calling clock initialization functions, we can declare the functions with CLK_OF_DECLARE() and then call common of_clk_init() to have them invoked properly. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx6q: call of_clk_init() to register fixed rate clocksShawn Guo
As the fixed rate clocks are defined in device tree, we can just call of_clk_init() to register them. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: imx_v6_v7_defconfig: Select CONFIG_DRM_IMX_TVEFabio Estevam
Let the mx53 TVE driver be built by default. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: i.MX6: clk: add different DualLite MLB clock configDirk Behme
The CCM_CBCMR register (address 0x02C4018) has different meaning between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite. Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the i.MX6 Solo/DualLite reuses the gpu2d_core bits for the MLB clock configuration. Signed-off-by: Dirk Behme <dirk.behme@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM i.MX5: Add S/PDIF clocksPhilipp Zabel
This patch adds the S/PDIF clocks for i.MX51 and i.MX53. Tested on i.MX53. The i.MX51 has a second set of spdif_root clock dividers, and on i.MX53 there is an additional input to the spdif_xtal mux. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM i.MX53: Add SATA clockSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx6q: clk: add the eim_slow clockHuang Shijie
Add the eim_slow clock, since the weim needs it. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: remove MLB PLL from pllv3Jiada Wang
MLB PLL should be handled internally in MLB driver, so remove it from pllv3. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> CC: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: disable pll8_mlb in mx6q_clksJiada Wang
The MLB PLL clock's operation doesn't fit for clock framework and it should be handled internally in MLB driver. Remove initialization of pll8_mlb clock device but leave its declaration in mx6q_clks to avoid affecting imx6q clock numbering. Signed-off-by: Jiada Wang <jiada_wang@mentor.com> CC: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: add initial support for imx6slShawn Guo
Add initial support for i.MX6 SoloLite. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: enable low-level debug support for imx6slShawn Guo
Enable low-level debug support for i.MX6 SoloLite by adding the debug port definitions for the SoC. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: add clock support for imx6slShawn Guo
Add clock support for i.MX6 SoloLite. It uses the dtc marco support to define all clock IDs in imx6sl-clock.h, which will be included by both clock driver and device tree sources, so that the data will stay sync all the time between kernel and DT. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: create mxc_arch_reset_init_dt() for DT bootShawn Guo
The mxc_arch_reset_init() uses static mapping and calls clk_get_sys() to get clock. It's suitable for non-DT boot but not for DT boot where dynamic mapping and of_clk_get() should be used instead. Create mxc_arch_reset_init_dt() as the DT variant of mxc_arch_reset_init(), and change DT platforms to use it. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: move clk_prepare() out from mxc_restart()Shawn Guo
It's inappropriate to call clk_prepare() in mxc_restart(), because the restart routine could be called in atomic context. Move clk_get() and clk_prepare() into mxc_arch_reset_init() and only have the atomic part clk_enable() be called in mxc_restart(). As a result, mxc_arch_reset_init() needs to be called after clk gets initialized. While there, it also changes printk(KERN_ERR ...) to pr_err() and adds __init annotation for mxc_arch_reset_init(). Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: imx: include <asm/io.h> in hardware.hShawn Guo
As IOMEM is referenced in hardware.h, <asm/io.h> should be included there. Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: i.MX6: clk: add i.MX6 DualLite differencesDirk Behme
The CCM_CBCMR register (address 0x02C4018) has different meaning between the i.MX6 Quad/Dual and the i.MX6 Solo/DualLite. Compared to the i.MX6 Quad/Dual, the CCM_CBCMR register in the i.MX6 Solo/DualLite doesn't have a gpu3d_shader configuration and moves the gpu2_core configuration at that place. Handle these i.MX6 Quad/Dual vs. i.MX6 Solo/DualLite clock differences by using cpu_is_mx6dl(). Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: i.MX6: add i.MX6 specific L2 cache configurationDirk Behme
To improve the performance and power consumption add an i.MX6 specific L2 cache initialization. This configuration is taken from Freescale's kernel patch "ENGR00153601 [MX6]Adjust L2 cache parameter" [1] with two additional improvements: a) The L2X0_POWER_CTRL has only the two bits we set. So no need to read the register before. Remove the register read done in Freescale's patch. b) In the L2X0_PREFETCH_CTRL register, besides the double linefill (bit[30]), additionally enable the instruction and data prefetch (bit[29-28]). Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> [1] http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/commit/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_12.09.01&id=814656410b40c67a10b25300e51b0477b2bb96d1
2013-06-17ARM: i.MX5: Allow DT clock providersMartin Fuzzey
Currently clock providers defined in the DT are not registered on i.MX5 platforms since of_clk_init() is not called. This is not a problem for the SOC's own clocks, which are registered in code, but prevents the DT being used to define clocks for external hardware. Fix this by calling of_clk_init() and actually using the DT to obtain the 4 SOC fixed clocks. These are already defined in the DT but were previously just used to manually obtain the rate. Fall back to the old scheme for non DT platforms. Since the same method may be useful for other i.MX platforms implement the imx_obtain_fixed_clock() function in common code. Actually changing other i.MX platforms to use this should be done later by someone with access to the appropriate hardware. Signed-off-by: Martin Fuzzey <mfuzzey@parkeon.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: mxs: dt: Add Crystalfontz CFA-10057 device treeBrian Lilly
The CFA-10057 is a breakout board for the CFA-10036 that has Ethernet, USB and a 4.3" LCD screen on it. Signed-off-by: Brian Lilly <brian@crystalfontz.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: mxs: dt: Add the Crystalfontz CFA-10055 device treeBrian Lilly
The CFA-10055 is yet another breakout board for the CFA-10036, and is basically a CFA-10037, with the screen and LCD controller found on the CFA-10049. Signed-off-by: Brian Lilly <brian@crystalfontz.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: cfa10049: Switch the chip select pin of the LCD controllerBrian Lilly
The early prototypes had the chip select pin for the LCD controller wired on the GPIO 3-23, while the production run of the CFA-10049 have this chip select on the GPIO 3-5. Signed-off-by: Brian Lilly <brian@crystalfontz.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: cfa10036: Add USB0 OTG portMaxime Ripard
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: dts: apf28dev: Add touchscreen support for APF28devGwenhael Goavec-Merou
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: mxs: Fix UARTs on M28EVKMarek Vasut
Make use of RTS/CTS lines on AUART0 and register AUART1 and AUART2 which are routed onto a pin header. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: cfa10036: dt: Change i2c0 clock frequencyMaxime Ripard
The OLED display can work faster. Change the i2c controller clock frequency to remove the tearing effect that can be seen on the display. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: dts: cfa10036: Change the OLED display to SSD1306Maxime Ripard
The SSD1307 was used in an early prototype that will never get distributed. The final board now has a SSD1306 instead, that has its own power generation unit and thus doesn't need any PWM. The panel attached to it also changed. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: mx28: add auart4 2 pins pinmux to imx28.dtsiEric Bénard
Add auart4 2 pins configuration on SSP3 pads Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: mx28: add auart3 2 pins pinmux to imx28.dtsiEric Bénard
Add auart3 2 pins configuration on its main pads Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: mx28: add auart2 2 pins pinmux to imx28.dtsiEric Bénard
Add auart2 2 pins configuration on its main pads Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: mxs: Use soc bus infrastructureFabio Estevam
Using the soc bus infrastructure is helpful for reporting several SoC related information such as: family, machine, SoC name and SoC revision. $ cat /sys/bus/soc/devices/soc0/family Freescale MXS Family $ cat /sys/bus/soc/devices/soc0/machine Freescale i.MX28 Evaluation Kit $ cat /sys/bus/soc/devices/soc0/soc_id i.MX28 $ cat /sys/bus/soc/devices/soc0/revision TO1.2 Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: dts: mx28: Adjust the digctl compatible stringFabio Estevam
MX28 has the same DIGCTL block as MX23, so adjust the compatible string to reflect that. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: mxs: Remove init_irq declaration in machine descriptionMaxime Ripard
Commit ebafed7a ("ARM: irq: Call irqchip_init if no init_irq function is specified") removed the need to explictly setup the init_irq field in the machine description when using only irqchip_init. Remove that declaration for mxs as well. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2013-06-17ARM: shmobile: Remove Bonito board supportKuninori Morimoto
Remove board support for the r8a7740 based Bonito board The r8a7740 SoC support code is still kept around since it is in use by the Armadillo800eva board which is basically a more recent board where the design is based on Bonito. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: Remove AP4EVB board supportMagnus Damm
Remove board support for the sh7372 based AP4EVB board The sh7372 SoC support code is still kept around since it is in use by the Mackerel board which is basically a more recent board where the design is based on AP4EVB. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: Remove mach/memory.hMagnus Damm
Remove mach-shmobile memory.h since it is no longer needed. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: Remove MEMORY_START/SIZEMagnus Damm
Remove CONFIG_MEMORY_START and CONFIG_MEMORY_SIZE from mach-shmobile. Boards should use DT to specify their memory setup. Boards that still not support DT may pass ATAGS with memory information from the boot loader. If those ATAGS turn out to be incorrect then appended DTB with memory information should be used as a workaround. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: Enable ARM_PATCH_PHYS_VIRTMagnus Damm
Adjust mach-shmobile to add a select for CONFIG_ARM_PATCH_PHYS_VIRT and at the same time remove NEED_MACH_MEMORY_H. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: Remove old SCU boot codeMagnus Damm
Remove shmobile_secondary_vector_scu now when all SCU enabled SMP platforms instead make use of shmobile_boot_scu. This removes two inline virtual to physical address conversions. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: EMEV2 SMP with SCU boot fn and argsMagnus Damm
Let EMEV2 make use of shmobile_boot_fn and shmobile_boot_arg together with shmobile_boot_scu and the SCU base address. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: sh73a0 SMP with SCU boot fn and argsMagnus Damm
Let sh73a0 make use of shmobile_boot_fn and shmobile_boot_arg together with shmobile_boot_scu and the SCU base address. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: r8a7779 SMP with SCU boot fn and argsMagnus Damm
Let r8a7779 make use of shmobile_boot_fn and shmobile_boot_arg together with shmobile_boot_scu and the SCU base address. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: Add SCU boot function using argumentMagnus Damm
Add a shmoible_boot_scu function that assumes that the base address of the SCU is passed in r0. This code is free from inline virtual to physical address conversion. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: Add SMP boot function and argumentMagnus Damm
Add code for mach-shmobile to allow specifying boot function and argument. Will initially be used for SMP together with SCU but may in the future also be used for deep sleep resume. This patch removes one inline virtual to physical address conversion. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: shmobile: Rework sh7372 sleep code to use virt_to_phys()Magnus Damm
Instead of having a hard coded virt-to-phys address conversion code in sleep-sh7372.S, rework the code to do the conversion in C using virt_to_phys(). This removes the need for PLAT_PHYS_OFFSET which in turn is needed for ARCH_MULTIPLATFORM. Signed-off-by: Magnus Damm <damm@opensource.se> [horms+renesas@verge.net.au: squashed in build fix posted as "ARM: shmobile: sh7372 build fix for SUSPEND=n && CPU_IDLE=n"] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2013-06-17ARM: zynq: Not to rewrite jump code when starting address is 0x0Michal Simek
This configuration is used by remoteproc. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2025-03-16 10:47:27 +0000