Age | Commit message (Collapse) | Author |
|
This patch provide migration to using "mtd-ram" driver instead of using
special driver for handling NVRAM memory.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
We do not have driver for Up/Down digital potentiometer (DPOT), so
just define pins as GPIOs and export these pins to user.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
This clock will be used in audio subsystem. Since audio cannot work
without PLL we should indicate this.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
This patch removes dependency of NEED_MACH_MEMORY_H for CLPS711X-target.
Since some board may have memory holes, define ARCH_HAS_HOLES_MEMORYMODEL
for these boards.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
arch_initcall was been removed from GPIO driver, so this patch
re-add support for GPIO into boards as platform_device.
Since some drivers (spi, nand, etc.) is not support deferred probe,
separate machine init calls is used in board code to make proper
loading sequence.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
|
|
EXYNOS5440 includes both OHCI and EHCI usb host controllers.
This patch adds device tree nodes for both of them. And the
EHCI and OHCI controllers on exynos5440 do not need any
explicit phy configuration. So need to assign a different
compatible value for these controllers.
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
|
Added clock entries to G2D node for exynos4x12 DT file.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
|
Added clock entries to G2D node.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
|
G2D node got added twice in exynos4412-smdk4412.dts instead of
getting added to exynos4412-origen.dts. Remove the duplicate entry
and add it to exynos4412-origen.dts.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
|
Add pin state information for DP HPD support that requires
pin configuration support using pinctrl interface.
Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
|
This patch adds dts support for the sata controller
Signed-off-by: Girish K S <ks.giri@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
|
This patch is to add vmmc regulator node at MSHC and SDHCI for ODROID-X
board file.
Signed-off-by: Dongjin Kim <tobetter@gmail.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
|
|
Use the standard interrupt-controller and ARM GIC constants to
improve the readability of bcm281xx DT irq properties.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Christian Daudt <csd@broadcom.com>
|
|
Replace /include/ by #include for bcm281xx device tree
files, enabling use of the C preprocessor.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Christian Daudt <csd@broadcom.com>
|
|
The mailbox hardware (in OMAP) uses a queued mailbox interrupt
mechanism that provides a communication channel between processors
through a set of registers and their associated interrupt signals
by sending and receiving messages.
The OMAP mailbox framework/driver code is moved to be under
drivers/mailbox, in preparation for adapting to a common mailbox
driver framework. This allows the build for OMAP mailbox to be
enabled (it was disabled during the multi-platform support).
As part of the migration from plat and mach code:
- Kconfig symbols have been renamed to build OMAP1 or OMAP2+ drivers.
- mailbox.h under plat-omap/plat/include has been split into a public
and private header files. The public header has only the API related
functions and types.
- The module name mailbox.ko from plat-omap is changed to
omap-mailbox.ko
- The module name mailbox_mach.ko from mach-omapX is changed as
mailbox_omap1.ko for OMAP1
mailbox_omap2.ko for OMAP2+
Cc: Tony Lindgren <tony@atomide.com>
[gregkh@linuxfoundation.org: ack for staging part]
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Omar Ramirez Luna <omar.ramirez@copitl.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
|
|
The different generations of OMAP2+ SoCs have almost the same
mailbox IP, but the IP has configurable parameters for number
of users (interrupts it can generate out towards processors)
and number of fifos (the base unidirectional h/w communication
channel). This data cannot be read from any registers, and so
has been added to the platform data.
This data together with the interrupt-type configuration can be
used in properly figuring out the number of registers to save
and restore in the OMAP mailbox driver code.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
|
|
The OMAP mailbox platform driver code has been cleaned up to
remove the dependencies with soc.h in preparation for moving
the mailbox code to drivers folder.
The code relied on cpu_is_xxx/soc_is_xxx macros previously to
pick the the right set of mailbox devices and register with the
mailbox driver. This data is now represented in a concise format
and moved to the respective omap_hwmod data files and published
to the driver through the platform data.
Cc: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
|
|
The argument type used in the actual individual omap_mbox_ops
for irqs should be omap_mbox_irq_t instead of omap_mbox_type_t.
Signed-off-by: Suman Anna <s-anna@ti.com>
|
|
The OMAP mailbox startup code is enabling the interrupt before any
of the associated mailbox queues are allocated. Move this code so
that the interrupt configuration for a mailbox is together.
Signed-off-by: Fernando Guzman Lugo <lugo.fernando@gmail.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
|
|
Enable the second PCIe port on QNAP TS-11x/TS-21x devices as newer
revisions (rev 1.3) have a USB 3.0 chip from Etron on PCIe port 1.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
|
|
Add a NULL check for iomem resource in mailbox probe functions.
Signed-off-by: Fernando Guzman Lugo <lugo.fernando@gmail.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
|
|
Add a platform device for the r8a7778 MMC.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Add a platform device for the r8a7778 HSPI.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Add a platform device for the r8a7778 I2C.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
This patch adds r8a7778 MMC clock support.
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
This patch adds r8a7778 HSPI clock support.
It also adds shyway_clk which is requiested
from sh-hspi driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
This patch adds r8a7778 I2C clock support.
It also adds peripheral_clk which is requiested
from i2c-rcar driver
Signed-off-by: Yusuke Goda <yusuke.goda.sx@renesas.com>
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
This patch makes legacy code on suspend/resume path being executed
conditionally, on non-DT platforms only, to fix suspend/resume of
DT-enabled systems, for which the code is inappropriate.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[olof: add #include <linux/of.h>]
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Renesas ARM-based SoC board updates for v3.11
Highlights:
bockw: add SDHI0 support
bockw: add dummy regulators for SMSC
bockw: Document CN9 SCIF/RCAN dipswitch selection
lager: support GPIO switches and LEDs
kzm9g: add AS3711 PMIC platform data
marzen: Use INTC External IRQ pin driver for SMSC
ape6evm: Update MP clock parent become EXTAL2 in line with changes
to r8a73a4 SoC code
* tag 'renesas-boards-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: marzen: keep local function as static
ARM: shmobile: bockw: add SDHI0 support
ARM: shmobile: marzen: Use INTC External IRQ pin driver for SMSC
ARM: shmobile: lager: support GPIO switches
ARM: shmobile: lager: Add GPIO LEDs
ARM: shmobile: bockw: add dummy regulators for SMSC
ARM: shmobile: bockw: add CN9 SCIF/RCAN selection dipswitch explanation
ARM: shmobile: kzm9g: add AS3711 PMIC platform data
ARM: shmobile: kzm9d: resigser smsc911x platform device with id -1
ARM: shmobile: bockw: define FPGA address and rename iomem variable
ARM: shmobile: ape6evm: MP clock parent become EXTAL2
|
|
Signed-off-by: Olof Johansson <olof@lixom.net>
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
|
|
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM-based SoC updates for v3.11
* Increased clock coverage for r8a7740, r8a73a4, r8a7778 and r8a7790
* Use fixed clock ratio for r8a7778
* Always use shmobile_setup_delay for sh73a0
* Add add CPUFreq support for sh73a0
* Check kick bit before changing rate on sh73a0
* Do not overwrite all div4 clock operations on sh73a0
* Cleanup SH_FIXED_RATIO_CLK and SH_FIXED_RATIO_CLK macros
* sh73a0: Use DEFINE_RES_MEM*() everywhere
* r8a7740: Make private clock arrays static
* r8a7778: Correct model number
The last four changes listed above are cleanups. I have included them
in this series as all bar the last one are dependencies of non-cleanup
patches.
* tag 'renesas-soc-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (27 commits)
ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate
ARM: shmobile: sh73a0: do not overwrite all div4 clock operations
ARM: shmobile: sh73a0: Always use shmobile_setup_delay()
ARM: shmobile: sh73a0: add CPUFreq support
ARM: shmobile: sh73a0: add support for adjusting CPU frequency
ARM: shmobile: r8a7790: add TPU PWM support
ARM: shmobile: r8a7790: Make private clock arrays static
ARM: shmobile: r8a7790: add div6 clocks
ARM: shmobile: r8a7790: add div4 clocks
ARM: shmobile: r8a7790: add main clock
ARM: shmobile: r8a7778: Register SDHI device
ARM: shmobile: r8a7778: add SDHI clock support
ARM: shmobile: r8a7778: use fixed ratio clock
ARM: shmobile: r8a7779: Add PCIe clocks
ARM: shmobile: r8a73a4: add div6 clocks
ARM: shmobile: r8a73a4: add div4 clocks
ARM: shmobile: r8a73a4: add pll clocks
ARM: shmobile: r8a73a4: add main clock
ARM: shmobile: r8a7740: add TPU PWM support
ARM: shmobile: r8a7740: Add I2C DT clock names
...
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc
From Simon Horman:
Renesas ARM based SoC pinmux and GPIO update for v3.11
SH-PFC:
* Entries for INTC external IRQs
* Remove dependency on GPIOLIB
* PFC support for r8a7790 SoC
* Pinmux support for r8a7778 SoC
* Increase pin group and function coverage for sh7372, r8a7740,
r8a7778, r8a7779 and r8a7790 SoCs
* Use pinctrl mapping on mackerel, ap4evb, armadillo800eva,
bonito, bockw, lager boards
* Use RCAR_GP_PIN macro in marzen board
* Remove unused GPIOs for sh7372, sh73a0, r8a7740 and r8a7790 SoCs
* Add bias (pull-up/down) pinconf support for r8a7740 SoC
* Add VCCQ support for sh73a0
GPIO car:
* Add RCAR_GP_PIN macro
* Add support for IRQ_TYPE_EDGE_BOTH
* Make the platform data gpio_base field signed
The GPIO changes have been included as the RCAR_GP_PIN and
IRQ_TYPE_EDGE_BOTH changes are depended on by SH-PFC changes.
* tag 'renesas-pinmux-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (132 commits)
ARM: shmobile: marzen: Use RCAR_GP_PIN macro
ARM: shmobile: lager: Initialize pinmux
ARM: shmobile: bockw: add pinctrl support
ARM: shmobile: kzm9g: tidyup FSI pinctrl
ARM: shmobile: r8a7740 pinmux platform device cleanup
ARM: shmobile: r8a7790: Configure R-Car GPIO for IRQ_TYPE_EDGE_BOTH
pinctrl: sh-pfc: r8a7779: Fix missing MOD_SEL2 entry
Revert "ARM: shmobile: Disallow PINCTRL without GPIOLIB"
pinctrl: r8a7790: add pinmux data for MMCIF and SDHI interfaces
sh-pfc: r8a7778: add MMCIF pin groups
sh-pfc: r8a7778: add HSPI pin groups
sh-pfc: r8a7778: add I2C pin groups
pinctrl: sh-pfc: fix a typo in pfc-r8a7790
pinctrl: sh-pfc: fix r8a7790 Function Select register tables
sh-pfc: r8a7778: fixup IRQ1A settings
sh-pfc: r8a7779: add Ether pin groups
sh-pfc: r8a7778: add Ether pin groups
sh-pfc: r8a7778: add VIN pin groups
sh-pfc: sh73a0: Remove function GPIOs
sh-pfc: r8a7790: Add TPU pin groups and functions
...
|
|
Register the USB PHY device from bockw_init(), passing the platform data to it.
Set machine's init_late() method to r8a7778_init_late() in order for [EO]HCI to
get registered too...
Don't forget to add USB PENC0/1 pins to bockw_pinctrl_map[].
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
In prima2, some functions of checking DT is registered in initcall
level. If it doesn't match the compatible name of sirf, kernel
will panic. It blocks the usage of multiplatform on other verndor.
The error message is in below.
Knic - not syncing: unable to find compatible pwrc node in dtb
CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.10.0-rc3-00006-gd7f26ea-dirty #86
[<c0013adc>] (unwind_backtrace+0x0/0xf8) from [<c0011430>] (show_stack+0x10/0x1)
[<c0011430>] (show_stack+0x10/0x14) from [<c026f724>] (panic+0x90/0x1e8)
[<c026f724>] (panic+0x90/0x1e8) from [<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x)
[<c03267fc>] (sirfsoc_of_pwrc_init+0x24/0x58) from [<c0320864>] (do_one_initcal)
[<c0320864>] (do_one_initcall+0x90/0x150) from [<c0320a20>] (kernel_init_freeab)
[<c0320a20>] (kernel_init_freeable+0xfc/0x1c4) from [<c026b9e8>] (kernel_init+0)
[<c026b9e8>] (kernel_init+0x8/0xe4) from [<c000e158>] (ret_from_fork+0x14/0x3c)
Signen-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
Add USB clock and EHCI, OHCI, and USB PHY platform devices for R8A7778 SoC; add
a function to register PHY device with board-specific platform data and register
EHCI and OHCI platfrom devices from the init_late() board method.
Also, don't forget to enable CONFIG_ARCH_HAS_[EO]HCI options for R8A7778 SoC in
Kconfig...
The patch has been tested on the BOCK-W board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Since we're now going to setup the USBPCTRL0 register using the USB PHY device's
platform data, we now need a way to pass those platform data from the board file
to the device which is situated in setup-r8a7779.c -- and what I'm suggesting is
r8a7779_add_usb_phy_device() that will register USB PHY platform device with the
passed platform data using platform_device_register_resndata() call; creating
this function involves deletion of 'usb_phy_device' from r8a7779_devices_dt[],
so that it will no longer be registered for the generic R8A7779 machine (where
we can't provide the platform data anyway), hence EHCI/OHCI drivers will fail
to load as well.
For the Marzen board, this new function will be called from marzen_init() to
register the USB PHY device early enough.
Note that the board and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
The memory region that is used by the driver overlaps EHCI and OHCI register
regions for absolutely no reason now -- fix it by adding offset of 0x800 to
the base address, changing the register #define's accordingly. This has extra
positive effect that we now can use devm_ioremap_resource()...
Note that the driver and the SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Now that 'drivers/usb/phy/phy-rcar-usb.c' doesn't require the second memory
resource anymore, we can remove it from the R8A7779's USB PHY platform device.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Setup the EHCI internal buffer (before EHCI driver has a chance to touch the
registers) using the pre_setup() method in 'struct usb_ehci_pdata'.
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
USB EHCI, OHCI, and common PHY are the SoC devices but are wrongly defined and
registered in the Marzen board file. Move the data and code to their proper
place in setup-r8a7779.c; while at it, we have to rename r8a7779_late_devices[]
to r8a7779_standard_devices[] -- this seems legitimate since they are registered
from r8a7779_add_standard_devices() anyway.
Note that I'm deliberately changing the USB PHY platform device's 'id' field
from (previously just omitted) 0 to -1 as the device is a single of its kind.
Note also that the board and SoC code have to be in one patch to keep the code
bisectable...
The patch has been tested on the Marzen board.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
[horms+renesas@verge.net.au: manually applied]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
Adds support for HSCIF0 and HSCIF1 on the r8a7790.
Signed-off-by: Ulrich Hecht <ulrich.hecht@gmail.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
While recasting commit 524219146a89aee5366326c225ccd71231419d89 (ARM: shmobile:
R8A7778: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
While recasting commit dace48d04dee46a3409d5e13cd98031522e46377 (ARM: shmobile:
R8A7779: add Ether support), I made a typo in the platform device's name: used
underscore instead of hyphen.
However, there's now patch merged to net-next.git renaming the platform device
from "sh-eth" to "r8a777x-ehter", so it makes the most sense to change the name
straight to that one.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
|
|
This branch acts as a base for adding USB support to
r8A7778/BOCK-W and r8A7779/Marzen.
It includes the soc branch to provide dependencies in
the r8A7778 clock code.
It includes pinmux to provide pinmux initialisation for Bock-W
which is a dependency.
Conflicts:
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/include/mach/r8a7778.h
arch/arm/mach-shmobile/setup-r8a7778.c
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt
From Simon Horman:
Renesas ARM-based SoC DT updates for v3.11
* Armadillo800eva reference DT - bring up armadillo800eva baord
using DT as much as possible
* Remove unused GIC dtsi entries for r8a7790 and r8a73a4
* Add AS3711 and CPUFreq DT bindings for kzm9g-reference
* Add irqpin DT support for marzen-reference
* tag 'renesas-dt-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: marzen-reference: add irqpin support in DT
ARM: shmobile: kzm9g-reference: add AS3711 and CPUFreq DT bindings
ARM: shmobile: armadillo800eva: Reference DT implementation
ARM: shmobile: Remove unused r8a7790 GIC CPU interface DT bits
ARM: shmobile: Remove unused r8a73a4 GIC CPU interface DT bits
ARM: shmobile: r8a7740: Prepare for reference DT setup
ARM: shmobile: r8a7740: Add OF support to initialze the GIC
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/boards
From Simon Horman:
Renesas ARM based SoC defconfig updates for v3.11
kzm9g: Enable AS3711 PMIC
bockw: Enable, USB, PM_RUNTIME, I2C and SDHI
armadillo800eva: Correct SERIAL_SH_SCI_NR_UARTS
* tag 'renesas-defconfig-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: kzm9g: enable AS3711 PMIC in defconfig
ARM: shmobile: bockw: enable USB in defconfig
ARM: shmobile: bockw: enable CONFIG_PM_RUNTIME in defconfig
ARM: shmobile: bockw: enable I2C in defconfig
ARM: shmobile: bockw: enable SDHI on defconfig
ARM: shmobile: armadillo800eva: Fix maximum number of SCIF
Signed-off-by: Olof Johansson <olof@lixom.net>
|
|
into next/soc
From Jason Cooper:
mvebu pcie driver (kirkwood) for v3.11 (round 2)
- kirkwood
- migrate Netgear ReadyNAS Duo v2 to pcie DT init
* tag 'pcie_kw-3.11-2' of git://git.infradead.org/users/jcooper/linux:
arm: kirkwood: NETGEAR ReadyNAS Duo v2 init PCIe via DT
Signed-off-by: Olof Johansson <olof@lixom.net>
|