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From Uwe Kleine-König:
* efm32/soc: (1003 commits)
ARM: device trees for Energy Micro's EFM32 Cortex-M3 SoCs
ARM: new platform for Energy Micro's EFM32 Cortex-M3 SoCs
+Linux 3.13-rc4
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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From Sebastian Hesselbarth:
* berlin/soc:
ARM: add initial support for Marvell Berlin SoCs
ARM: add Armada 1500-mini and Chromecast device tree files
ARM: add Armada 1500 and Sony NSZ-GS7 device tree files
ARM: add Marvell Berlin UART0 lowlevel debug
ARM: add Marvell Berlin SoCs to multi_v7_defconfig
ARM: add Marvell Berlin SoC familiy to Marvell doc
MAINTAINERS: add ARM Marvell Berlin SoC
irqchip: add DesignWare APB ICTL interrupt controller
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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Enable USB2 on Beaver, exposed via the mini-PCIe connector.
Signed-off-by: Eric Brower <ebrower@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Modify Tegra30 default USB2 phy_type to UTMI; this matches
power-on-reset defaults and is expected to be the common case.
The current implementation is likely an incorrect
carry-over from Tegra20, where USB2 does default to ULPI.
Signed-off-by: Eric Brower <ebrower@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes
I accidentally removed some mux code for omap4 that I thought was
dead code as omap4 has been booting with device tree only since
v3.10. Turns out I also removed some display related mux code,
so let's revert that except for the dead code parts.
* tag 'omap-for-v3.13/display-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (439 commits)
Revert "ARM: OMAP2+: Remove legacy mux code for display.c"
+Linux 3.13-rc4
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We want to follow the name style of DTS that is SoC-board.dts.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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Since init_time in machine descriptor is already covered by
arch/arm/kernel/time.c by default. We needn't to append it any more.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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Since some new Hisilicon SoCs are not named as hi3xxx, rename mach-hi3xxx
to mach-hisi instead. And the pronounciation of "hisi" is similar to the
chinese pronounciation of Hisilicon. So Hisilicon guys like this name.
ARCH_HI3xxx will be renamed later since other drivers are using it and
they are still in linux-next git tree. So rename ARCH_HI3xxx later.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt
Keystone DTS updates for 3.14
- ddr3 pll clock node typo fixup.
- EVM specific clock setting with board k2hk-evm.dts.
- GIC node updates for missing virtualisation info.
- Adding USB dwc3 and phy nodes.
* tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
ARM: dts: keystone: Add usb devicetree bindings
ARM: dts: keystone: Add usb phy devicetree bindings
ARM: dts: keystone: Add guestos maintenance interrupt
ARM: dts: keystone: Add the GICV and GICH address space
ARM: keystone: dts: add paclk divider clock node
ARM: keystone: dts: fix typo in the ddr3 pllclk node name
ARM: keystone: dts: add a k2hk-evm specific dts file
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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This changes the stack protector config option into a choice of
"None", "Regular", and "Strong":
CONFIG_CC_STACKPROTECTOR_NONE
CONFIG_CC_STACKPROTECTOR_REGULAR
CONFIG_CC_STACKPROTECTOR_STRONG
"Regular" means the old CONFIG_CC_STACKPROTECTOR=y option.
"Strong" is a new mode introduced by this patch. With "Strong" the
kernel is built with -fstack-protector-strong (available in
gcc 4.9 and later). This option increases the coverage of the stack
protector without the heavy performance hit of -fstack-protector-all.
For reference, the stack protector options available in gcc are:
-fstack-protector-all:
Adds the stack-canary saving prefix and stack-canary checking
suffix to _all_ function entry and exit. Results in substantial
use of stack space for saving the canary for deep stack users
(e.g. historically xfs), and measurable (though shockingly still
low) performance hit due to all the saving/checking. Really not
suitable for sane systems, and was entirely removed as an option
from the kernel many years ago.
-fstack-protector:
Adds the canary save/check to functions that define an 8
(--param=ssp-buffer-size=N, N=8 by default) or more byte local
char array. Traditionally, stack overflows happened with
string-based manipulations, so this was a way to find those
functions. Very few total functions actually get the canary; no
measurable performance or size overhead.
-fstack-protector-strong
Adds the canary for a wider set of functions, since it's not
just those with strings that have ultimately been vulnerable to
stack-busting. With this superset, more functions end up with a
canary, but it still remains small compared to all functions
with only a small change in performance. Based on the original
design document, a function gets the canary when it contains any
of:
- local variable's address used as part of the right hand side
of an assignment or function argument
- local variable is an array (or union containing an array),
regardless of array type or length
- uses register local variables
https://docs.google.com/a/google.com/document/d/1xXBH6rRZue4f296vGt9YQcuLVQHeE516stHwt8M9xyU
Find below a comparison of "size" and "objdump" output when built with
gcc-4.9 in three configurations:
- defconfig
11430641 kernel text size
36110 function bodies
- defconfig + CONFIG_CC_STACKPROTECTOR_REGULAR
11468490 kernel text size (+0.33%)
1015 of 36110 functions are stack-protected (2.81%)
- defconfig + CONFIG_CC_STACKPROTECTOR_STRONG via this patch
11692790 kernel text size (+2.24%)
7401 of 36110 functions are stack-protected (20.5%)
With -strong, ARM's compressed boot code now triggers stack
protection, so a static guard was added. Since this is only used
during decompression and was never used before, the exposure
here is very small. Once it switches to the full kernel, the
stack guard is back to normal.
Chrome OS has been using -fstack-protector-strong for its kernel
builds for the last 8 months with no problems.
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Michal Marek <mmarek@suse.cz>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Cc: linux-arch@vger.kernel.org
Link: http://lkml.kernel.org/r/1387481759-14535-3-git-send-email-keescook@chromium.org
[ Improved the changelog and descriptions some more. ]
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Instead of duplicating the CC_STACKPROTECTOR Kconfig and
Makefile logic in each architecture, switch to using
HAVE_CC_STACKPROTECTOR and keep everything in one place. This
retains the x86-specific bug verification scripts.
Signed-off-by: Kees Cook <keescook@chromium.org>
Cc: Arjan van de Ven <arjan@linux.intel.com>
Cc: Michal Marek <mmarek@suse.cz>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Paul Mundt <lethal@linux-sh.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Shawn Guo <shawn.guo@linaro.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Cc: linux-arch@vger.kernel.org
Link: http://lkml.kernel.org/r/1387481759-14535-2-git-send-email-keescook@chromium.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Now that support for Intersil ISL12057 RTC chip is available
upstream, let's enable it in NETGEAR ReadyNAS 2120 .dts file
so that the device stop believing it's the 70's.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Now that support for Intersil ISL12057 RTC chip is available
upstream, let's enable it in NETGEAR ReadyNAS 104 .dts file
so that the device stop believing it's the 70's.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Now that support for Intersil ISL12057 RTC chip is available
upstream, let's enable it in NETGEAR ReadyNAS 102 .dts file
so that the device stop believing it's the 70's.
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
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Add HDMI node to the Dalmore device tree and hook up the VDD and PLL
regulators as well as the I2C adapter used for DDC and the GPIO used
for hotplug detection.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Dalmore has a 10.1" WUXGA panel connected to one of the DSI outputs of
the Tegra114.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add the gr3d device tree node. The gr3d block on Tegra114 is backwards-
compatible with the one on Tegra20.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add the device tree for the gr2d hardware found on Tegra114 SoCs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add device tree nodes for the DSI controllers found on Tegra114 SoCs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add host1x, DC (display controller) and HDMI devices to Tegra114
device tree.
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add a device node for the MIPI calibration block on Tegra114. There is
no need to disable it by default because it only enables the clock while
performing calibration and therefore shouldn't be consuming any power
when unused.
Signed-off-by: Thierry Reding <treding@nvidia.com>
[swarren, add unit address to new DT node name]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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* mvebu/dt-4:
ARM: mvebu: sort DT nodes by address
ARM: orion5x: sort DT nodes by address
ARM: dove: sort DT nodes by address
ARM: kirkwood: sort dt nodes by address
Signed-off-by: Kevin Hilman <khilman@linaro.org>
Conflicts:
arch/arm/boot/dts/armada-370-xp.dtsi
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Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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The d6 and d7 is connected to PWM, we can use PWM to control it,
so switch to PWM leds.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add PWM device node for AT91 series SoC.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Enable DRM panel core support along with support for various simple
panels.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add backlight and panel nodes for the Cardhu 10.1" WXGA TFT LCD panel.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add backlight and panel nodes for the Harmony TFT LCD panel.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This ensures that the PMIC RTC provides the system time, rather than
the on-SoC RTC, which is not battery-backed.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add ams AS3722 entry for gpio/pincontrol and regulators
to venice2 DT.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Compare the initial population of default pinmux configuration of Venice2
with the chrome branch and add/fix the missing configurations.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
[nicolas.ferre@atmel.com: typo, nodes in address ascending order, shrink cmdline]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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From Jason Cooper:
mvebu DT changes for v3.14 (incr. #3)
- kirkwood
- use symbolic names for gpios and key inputs
- mvebu
- add the pxa nand controller to the ReadyNAS and A370-RD boards
* tag 'mvebu-dt-3.14-3' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: Enable NAND controller in A370 Reference Design board
ARM: mvebu: Enable NAND controller in ReadyNAS 2120 .dts file
ARM: mvebu: Enable NAND controller in ReadyNAS 104 .dts file
ARM: mvebu: Enable NAND controller in ReadyNAS 102 .dts file
ARM: DT: Kirkwood: Use symbolic names from gpio.h
ARM: DT: Kirkwood: Use symbolic names from input.h
Signed-off-by: Kevin Hilman <khilman@linaro.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into next/dt
From Linus Walleij:
Some Nomadik Device Tree updates for the v3.14 cycle:
- Drop 0x prefixes
- Get rid of explicit GPIO management
* tag 'nomadik-dt-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: nomadik: get rid of explicit ethernet GPIO management
ARM: nomadik: Remove '0x's from nomadik stn8815 DTS file
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Linux 3.13-rc4
* tag 'v3.13-rc4': (1001 commits)
Linux 3.13-rc4
null_blk: mem garbage on NUMA systems during init
radeon_pm: fix oops in hwmon_attributes_visible() and radeon_hwmon_show_temp_thresh()
Revert "selinux: consider filesystem subtype in policies"
igb: Fix for issue where values could be too high for udelay function.
i40e: fix null dereference
ARM: fix asm/memory.h build error
dm array: fix a reference counting bug in shadow_ablock
dm space map: disallow decrementing a reference count below zero
mm: memcg: do not allow task about to OOM kill to bypass the limit
mm: memcg: fix race condition between memcg teardown and swapin
thp: move preallocated PTE page table on move_huge_pmd()
mfd/rtc: s5m: fix register updating by adding regmap for RTC
rtc: s5m: enable IRQ wake during suspend
rtc: s5m: limit endless loop waiting for register update
rtc: s5m: fix unsuccesful IRQ request during probe
drivers/rtc/rtc-s5m.c: fix info->rtc assignment
include/linux/kernel.h: make might_fault() a nop for !MMU
drivers/rtc/rtc-at91rm9200.c: correct alarm over day/month wrap
procfs: also fix proc_reg_get_unmapped_area() for !MMU case
...
Signed-off-by: Felipe Balbi <balbi@ti.com>
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Correct spelling typo in various part of kernel
Signed-off-by: Masanari Iida <standby24x7@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Sync with Linus' tree to be able to apply fixes on top of newer things
in tree (efi-stub).
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Now that the DTS file r8a7790-lager.dts can be used with board-lager.c
and board-lager-reference.c, proceed with removing
r8a7790-lager-reference.dts.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The external crystal frequency is 20MHz on the Koelsch board. Specify it
in the device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The external crystal frequency is 20MHz on the Lager board. Specify it
in the device tree.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Copy the device nodes from Koelsch reference into the Koeslch device
tree file. This will allow us to use a single DTS file regarless of
kernel configuration. In case of legacy C board code the device nodes
may or may not be used, but in the multiplatform case all the DT device
nodes are used.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Copy the device nodes from Lager reference into the Lager device tree
file. This will allow us to use a single DTS file regarless of kernel
configuration. In case of legacy C board code the device nodes may or
may not be used, but in the multiplatform case all the DT device nodes
are used.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Declare all core clocks and DIV6 clocks, as well as all MSTP clocks
currently used by r8a7791 boards.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Reference clocks using a "clocks" property in all nodes corresponding to
devices that require a clock.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Declare all core clocks and DIV6 clocks, as well as all MSTP clocks
currently used by r8a7790 boards.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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The board had 4 buttons connected to GPIOs, add a corresponding
gpio-keys device.
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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