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2013-12-21KVM: arm-vgic: Support KVM_CREATE_DEVICE for VGICChristoffer Dall
Support creating the ARM VGIC device through the KVM_CREATE_DEVICE ioctl, which can then later be leveraged to use the KVM_{GET/SET}_DEVICE_ATTR, which is useful both for setting addresses in a more generic API than the ARM-specific one and is useful for save/restore of VGIC state. Adds KVM_CAP_DEVICE_CTRL to ARM capabilities. Note that we change the check for creating a VGIC from bailing out if any VCPUs were created, to bailing out if any VCPUs were ever run. This is an important distinction that shouldn't break anything, but allows creating the VGIC after the VCPUs have been created. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-12-21ARM: KVM: Allow creating the VGIC after VCPUsChristoffer Dall
Rework the VGIC initialization slightly to allow initialization of the vgic cpu-specific state even if the irqchip (the VGIC) hasn't been created by user space yet. This is safe, because the vgic data structures are already allocated when the CPU is allocated if VGIC support is compiled into the kernel. Further, the init process does not depend on any other information and the sacrifice is a slight performance degradation for creating VMs in the no-VGIC case. The reason is that the new device control API doesn't mandate creating the VGIC before creating the VCPU and it is unreasonable to require user space to create the VGIC before creating the VCPUs. At the same time move the irqchip_in_kernel check out of kvm_vcpu_first_run_init and into the init function to make the per-vcpu and global init functions symmetric and add comments on the exported functions making it a bit easier to understand the init flow by only looking at vgic.c. Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-12-21ARM/KVM: save and restore generic timer registersAndre Przywara
For migration to work we need to save (and later restore) the state of each core's virtual generic timer. Since this is per VCPU, we can use the [gs]et_one_reg ioctl and export the three needed registers (control, counter, compare value). Though they live in cp15 space, we don't use the existing list, since they need special accessor functions and the arch timer is optional. Acked-by: Marc Zynger <marc.zyngier@arm.com> Signed-off-by: Andre Przywara <andre.przywara@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-12-21arm/arm64: KVM: arch_timer: Initialize cntvoff at kvm_initChristoffer Dall
Initialize the cntvoff at kvm_init_vm time, not before running the VCPUs at the first time because that will overwrite any potentially restored values from user space. Cc: Andre Przywara <andre.przywara@linaro.org> Acked-by: Marc Zynger <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-12-21arm: KVM: Don't return PSCI_INVAL if waitqueue is inactiveChristoffer Dall
The current KVM implementation of PSCI returns INVALID_PARAMETERS if the waitqueue for the corresponding CPU is not active. This does not seem correct, since KVM should not care what the specific thread is doing, for example, user space may not have called KVM_RUN on this VCPU yet or the thread may be busy looping to user space because it received a signal; this is really up to the user space implementation. Instead we should check specifically that the CPU is marked as being turned off, regardless of the VCPU thread state, and if it is, we shall simply clear the pause flag on the CPU and wake up the thread if it happens to be blocked for us. Further, the implementation seems to be racy when executing multiple VCPU threads. There really isn't a reasonable user space programming scheme to ensure all secondary CPUs have reached kvm_vcpu_first_run_init before turning on the boot CPU. Therefore, set the pause flag on the vcpu at VCPU init time (which can reasonably be expected to be completed for all CPUs by user space before running any VCPUs) and clear both this flag and the feature (in case the feature can somehow get set again in the future) and ping the waitqueue on turning on a VCPU using PSCI. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
2013-12-21ARM: dts: Rename Exynos5250 ChromeOS common file to have exynos prefixMark Brown
Make it easier to notice the common file for ChromeOS devices based on the Exynos5250 by giving it the exynos5250 prefix that the boards have. Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Disable I2C controllers by default on Exynos5250Mark Brown
Ensure that unused I2C controllers are not activated, causing problems due to inappropriate pinmuxing or similar, by marking the controllers as disabled by default and requiring boards to explicitly enable those that are in use. Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Leave Exynos5250 SPI controller disabled by defaultMark Brown
Rather than requiring each board to explicitly disable the SPI controllers it is not using instead require boards to enable those that they are using. This is less work overall since normally at most one of the controllers is in use and avoids issues caused by inappropriate pinmuxing. Signed-off-by: Mark Brown <broonie@linaro.org> Acked-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Add CODEC MCLK for SMDK5250Mark Brown
There is a 16.934MHz fixed rate clock connected to MCLK1 on the CODEC, add this to the device tree bindings. Signed-off-by: Mark Brown <broonie@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Add device nodes for TMU blocks for exynos5420Naveen Krishna Chatradhi
Exynos5420 SoC has per core thermal management unit. 5 TMU channels 4 for CPUs and 5th for GPU. This patch adds the device tree nodes to the DT device list. Nodes carry the misplaced second base address and the second clock to access the misplaced base address. Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com> Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Fix status property of mmc nodes for snow boardYuvaraj Kumar C D
Commit e908d5c5 ("ARM: dts: change status property of dwmmc nodes for exynos5250") missed out handling the exynos5250 snow dts file. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Fix missing spaces after labels for exynosTomasz Figa
For consistency with other device tree nodes, this patch adds missing spaces after node labels. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Simplify MCT interrupt map for exynos4 SoCsTomasz Figa
There is no need to use two cells for interrupt specifiers inside the MCT interrupt map, so this patch simplifies the map to use one cell. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Move MCT node to exynos4x12.dtsiTomasz Figa
For MCT block compatible with "samsung,exynos4412-mct", that uses PPI interrupts for local timers, only one local interrupt needs to be specified, since it is a per-processor interrupt. This allows moving MCT node of Exynos4x12 SoCs back to common exynos4x12.dtsi, since they have the same set of interrupts to be specified, which was the only difference. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Drop interrupt controller properties from MCT nodes for exynos4 SoCsTomasz Figa
MCT is not an interrupt controller and so there is no point for device tree nodes representing it to contain interrupt-controller and #interrupt-cells properties. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: add pwm DT nodes to Exynos5250 and Exynos5420Leela Krishna Amudala
Add the device-tree binding for the PWM controller to Exynos5250 and Exynos5420 Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Olof Johansson <olofj@chromium.org> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Add SPI nodes to the exynos5420 device tree fileLeela Krishna Amudala
Add SPI device tree nodes to Exynos5420 SoC Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Reviewed-by: Andrew Bresticker <abrestic@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Add DMA controller node info on Exynos5420Padmavathi Venna
This patch adds dma controller node info on Exynos5420. Exynos5420 has adma for audio IPs. As adma clk is dependent on audss clk provider that will be added later. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Leela Krishna Amudala <l.krishna@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21Merge branch 'v3.14-next/fixes-samsung-2' into v3.14-next/dt-exynos-2Kukjin Kim
2013-12-21ARM: dts: Use MSHC controller for eMMC memory for exynos4412-trats2Tomasz Figa
This patch removes device tree node of SDHCI0 controller and replaces it with MSHC to enable support MMC 4.4 and improve performance of eMMC memory. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Fix definition of MSHC device tree nodes for exynos4x12Tomasz Figa
All SoCs from Exynos4x12 series contain the MSHC block, so its node can be located in exynos4x12.dtsi. In addition, missing clock specifiers are added, generic SoC attributes are moved from board dts files to common dtsi file of SoC family and the node is renamed to a more generic name to follow node naming recommendations. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: add clock provider for mshc node for Exynos4412 SOCSeungwon Jeon
Clock lookup information is required as driver can manipulate clock rate properly. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: EXYNOS: Kill exynos_pm_late_initcall()Sylwester Nawrocki
The only thing exynos_pm_late_initcall() does is calling pm_genpd_poweroff_unused(), which is already stubbed when CONFIG_PM_GENERIC_DOMAINS is not enabled. So replace exynos_pm_late_initcall() with a direct call to pm_genpd_poweroff_unused(). Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: EXYNOS: Consolidate selection of PM_GENERIC_DOMAINS for Exynos4Sylwester Nawrocki
Instead of repeating "select PM_GENERIC_DOMAINS" for all Exynos4 variants add relevant entry in the Kconfig section common to the SoC series. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Fix exynos5250-snow's search key to be L_METADoug Anderson
The device tree sent upstream for exynos5250-snow encoded the search key as CAPSLK. However in all ChromeOS kernels it is L_META. One can certainly have long debates about which it ought to be, but I'm proposing setting it to L_META because: * That's how _all_ ChromeOS kernels do it and will do it. * There is no L_META key on the board, so it's nice to have. * For those people who really want it to be caps lock, they can use xmodmap or somesuch. Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-21ARM: dts: Add the missing "\" key in non-US keyboards for exynos5250-snowDoug Anderson
When the exynos5250 device tree was sent upstream the keyboard mapping was missing the 2nd instance of the "\" key. There are two copies of the "\" because it simply has a different row and column on US and non-US keyboards. For more details, see the previous patch in this series: (mkbp: Fix problems with backslash). Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2013-12-20Merge tag 'renesas-dt-for-v3.14' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt From Simon Horman: Renesas ARM based SoC DT updates for v3.14 * Global - Use interrupt macros - Use #include in device tree sources - Tidyup DT node naming * emev2 (Emma Mobile EV2) SoC - Setup internal peripheral interrupts as level high - Use interrupt macros in DT files - Add clock tree description in DT * r8a7791 (R-Car M2) SoC - Correct GPIO resources * r8a7791 (R-Car M2) based Koelsch board - Configure PFC and GPO - Use r8a7791 suffix for IRQC compat string - Add DT reference * r8a7790 (R-Car H2) based Lager board - Include all 4 GiB of memory - Use r8a7790 suffix for IRQC and MMCIF compat strings - Enable MMCIF - Add default PFC settings * r8a7778 (R-Car M1) SoC - Suffix for INTC compat string - Add HSPI, MMCIF, SDHI and I2C suppport on DTSI - Correct pin control device addresses * r8a7778 (R-Car M1) based Bock-W board - Use falling edge IRQ for LAN9221 in DT reference - Enable I2C, HSPI0, MMCIF and SDHI - Correct MMC pin conflict - Remove manual PFC settings from DT reference - Add default PFC settings * r8a7779 (R-Car H1) SoC - Add HSPI and SDHI support - Suffix for INTC compat string * r8a7779 (R-Car H1) based Marzen board - Enable HSPI0 and SDHI in DTS - Remove SDHI0 WP pin setting - Use falling edge IRQ for LAN9221 in DT reference - Add SDHI support * r8a7740 (R-Mobile A1) SoC - Suffix for INTC compat string - Add FSI support via DTSI - Use interrupt macros * r8a7740 based Armadillo board - Add FSI support for DTS - Use low level IRQ for ST1231 in DT reference * r8a73a4 (SH-Mobile APE6) SoC - Use interrupt macros in DT files * r8a73a4 (R-Mobile APE6) based ape6evm board - Include all 2 GiB of memory * r8a73a0 (SH-Mobile AG5) SoC - Correct SDHI compat string * r8a73a0 (SH-Mobile AG5) based kzm9d board - Add GPIO keys and Add PCF8575 GPIO extender to DT - Enable DSW2 with gpio-keys - Use falling edge IRQ for LAN9221 in DT reference * tag 'renesas-dt-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (102 commits) ARM: shmobile: marzen: enable HSPI0 in DTS ARM: shmobile: r8a7779: add HSPI support to DTSI ARM: shmobile: Use r8a7779 suffix for INTC compat string ARM: shmobile: Use r8a7778 suffix for INTC compat string ARM: shmobile: Use r8a7740 suffix for INTC compat string ARM: shmobile: Use sh73a0 suffix for INTC compat string ARM: shmobile: armadillo: add FSI support for DTS ARM: shmobile: r8a7740: add FSI support via DTSI ARM: shmobile: emev2: Setup internal peripheral interrupts as level high ARM: shmobile: emev2: Use interrupt macros in DT files ARM: shmobile: Use interrupt macros in r8a73a4 and r8a7778 DT files ARM: shmobile: Fix r8a7791 GPIO resources in DTS ARM: shmobile: Include all 4 GiB of memory on Lager DT Ref ARM: shmobile: Include all 4 GiB of memory on Lager ARM: shmobile: Include all 2 GiB of memory on APE6EVM ARM: shmobile: Include all 2 GiB of memory on APE6EVM DT Ref ARM: shmobile: kzm9g-reference: Add GPIO keys to DT ARM: shmobile: kzm9g-reference: Add PCF8575 GPIO extender to DT ARM: shmobile: Koelsch DT reference GPIO LED support ARM: shmobile: Enable DSW2 with gpio-keys on KZM9D ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20Merge tag 'renesas-fixes-for-v3.13' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes From Simon Horman: Renesas ARM based SoC fixes for v3.13 * r8a7790 (R-Car H1) SoC - Correct GPIO resources in DT. This problem has been present since GPIOs were added to the r8a7790 SoC by f98e10c88aa95bf7 ("ARM: shmobile: r8a7790: Add GPIO controller devices to device tree") in v3.12-rc1. * irqchip renesas-intc-irqpin - Correct register bitfield shift calculation This bug has been present since the renesas-intc-irqpin driver was introduced by 443580486e3b9657 ("irqchip: Renesas INTC External IRQ pin driver") in v3.10-rc1 * Lager board - Do not build the phy fixup unless CONFIG_PHYLIB is enabled This problem was introduced by 48c8b96f21817aad * tag 'renesas-fixes-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7790: Fix GPIO resources in DTS irqchip: renesas-intc-irqpin: Fix register bitfield shift calculation ARM: shmobile: lager: phy fixup needs CONFIG_PHYLIB Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20ARM: tegra: Enable power key on Venice2Thierry Reding
Contrary to the rest of the keyboard, which is connected to the ChromeOS embedded controller, the power key is hooked up to a GPIO. Add a device tree node to handle it. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-20ARM: tegra: Enable Venice2 keyboardThierry Reding
The keyboard on Venice2 is attached to the ChromeOS embedded controller. Add the corresponding device tree nodes and use the MATRIX_KEY define to encode keycodes. Signed-off-by: Rhyland Klein <rklein@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-20Merge tag 'renesas-soc-for-v3.14' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc From Simon Horman: Renesas ARM based SoC updates for v3.14 * Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY * r8a7791 SoC (R-Car M2) - Add thermal platform device - Add DU and LVDS clocks - GPIO platform device support - PFC platform device support - Select IRQC * r8a7790 SoC (R-Car H2) - Tidyup clock table order - Fixup I2C clock source - Correct EXTAL divider settings - Add clocks for thermal devices and SSI * r8a7779 SoC (R-Car H1) - Add I2C clock for DT * r8a7778 SoC (R-Car M1) - Add HSPI clocks for DT - Add I2C clock for DT - Add HPBIFx DMAEngine support * r8a7740 SoC (R-Mobile A1) - Add FSI clocks for DT * emev2 SoC (Emma Mobile) - Move to Multi-platform - Remove legacy board code * r7s72100 SoC (RZ/A1H) - Select GPIO * r8a73a4 SoC (R-Mobile APE6) - Don't used named IRC for DMAEngine * tag 'renesas-soc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (33 commits) ARM: shmobile: r8a7779: add HSPI clock support for DT ARM: shmobile: r8a7740: add FSI clock support for DT ARM: shmobile: r8a7790: add SSI MSTP clocks ARM: shmobile: r8a7778: add HPBIFx DMAEngine support ARM: shmobile: Select AUTO_ZRELADDR for EMEV2 ARM: shmobile: r8a7790: tidyup clock table order ARM: shmobile: r8a7790: fixup I2C clock source ARM: shmobile: r8a7790: care EXTAL divider settings ARM: shmobile: Add r8a7791 clocks for thermal devices ARM: shmobile: Add r8a7791 thermal platform device ARM: shmobile: Add r8a7790 clocks for thermal devices ARM: Rename ARCH_SHMOBILE to ARCH_SHMOBILE_LEGACY ARM: shmobile: r8a7791: Add DU and LVDS clocks ARM: shmobile: Select USE_OF on EMEV2 ARM: shmobile: r8a7778: add HSPI clock support for DT ARM: shmobile: Remove legacy platform devices from EMEV2 SoC code ARM: shmobile: Remove legacy KZM9D board code ARM: shmobile: Use ->init_late() in shared EMEV2 case ARM: shmobile: Add shared EMEV2 code for ->init_machine() ARM: shmobile: Enable MTU2 on r7s72100 ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20Merge tag 'stable/for-linus-3.13-rc4-tag' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip Pull Xen bugfixes from Konrad Rzeszutek Wilk: - Fix balloon driver for auto-translate guests (PVHVM, ARM) to not use scratch pages. - Fix block API header for ARM32 and ARM64 to have proper layout - On ARM when mapping guests, stick on PTE_SPECIAL - When using SWIOTLB under ARM, don't call swiotlb functions twice - When unmapping guests memory and if we fail, don't return pages which failed to be unmapped. - Grant driver was using the wrong address on ARM. * tag 'stable/for-linus-3.13-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip: xen/balloon: Seperate the auto-translate logic properly (v2) xen/block: Correctly define structures in public headers on ARM32 and ARM64 arm: xen: foreign mapping PTEs are special. xen/arm64: do not call the swiotlb functions twice xen: privcmd: do not return pages which we have failed to unmap XEN: Grant table address, xen_hvm_resume_frames, is a phys_addr not a pfn
2013-12-20ARM: versatile: enable LEDs by defaultLinus Walleij
This adds the LEDs and triggers used by the Versatile boards to the default configuration. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20ARM: versatile: build using EABILinus Walleij
This should work just fine on this purely v5 platform, so let's config it for EABI by default. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20ARM: versatile: enable GPIOLIB and PL061 by defaultLinus Walleij
Select the GPIOLIB and PL061 in the Versatile defconfig, as this is present on all boards, and so we get compile and test coverage for this. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20ARM: versatile: update defconfigLinus Walleij
This updates the Versatile defconfig to the thing saved by savedefconfig so we don't get confusing diffs when trying to modify other options. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20ARM: versatile: move GPIO2 and GPIO3 to coreLinus Walleij
Move GPIO2 and GPIO3 to be registered from the core as this is certainly available on Versatile AB as well, not just the PB. GPIO2 is used for reading board status and GPIO3 is unused, but it does not hurt to register it anyway. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20ARM: s3c64xx: get rid of custom <mach/gpio.h>Linus Walleij
This isolates the custom S3C64xx GPIO definition table to <linux/platform_data/gpio-samsung-s3x64xx.h> as this is used in a few different places in the kernel, removing the need to depend on the implicit inclusion of <mach/gpio.h> from <linux/gpio.h> and thus getting rid of a few nasty cross-dependencies. Also delete the CONFIG_SAMSUNG_GPIO_EXTRA stuff. Instead roof the number of GPIOs for this platform: First sum up all the GPIO banks from A to Q: 187 GPIOs. Add the 16 "board GPIOs" and the roof for SAMSUNG_GPIO_EXTRA, 128, so in total maximum 187+16+128 = 331 GPIOs, so let's take the same roof as for S3C24XX: 512. This way we can do away with the GPIO calculation macros for GPIO_BOARD_START, BOARD_NR_GPIOS and the definition of ARCH_NR_GPIOS. Cc: Mark Brown <broonie@kernel.org> [on Mini6410 board] Tested-by: Tomasz Figa <t.figa@samsung.com> [for changes in mach-s3c64xx] Acked-by: Tomasz Figa <t.figa@samsung.com> Tested-by: Mark Brown <broonie@linaro.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20ARM: s3c24xx: get rid of custom <mach/gpio.h>Linus Walleij
This isolates the custom S3C24xx GPIO definition table to <linux/platform_data/gpio-samsung-s3x24xx.h> as this is used in a few different places in the kernel, removing the need to depend on the implicit inclusion of <mach/gpio.h> from <linux/gpio.h> and thus getting rid of a few nasty cross-dependencies. We also delete the nifty CONFIG_S3C24XX_GPIO_EXTRA stuff. The biggest this can ever be for the S3C24XX is CONFIG_S3C24XX_GPIO_EXTRA = 128, and then for CPU_S3C2443 or CPU_S3C2416 32*12 GPIOs are added, so 32*12+128 = 512 is the absolute roof value on this platform. So we set the size of ARCH_NR_GPIO to this and the GPIOs array will fit any S3C24XX platform, as per pattern from other archs. ChangeLog v2->v3: - Move the movement of the S3C64XX gpio.h file out of this patch and into the follow-up patch where it belongs. ChangeLog v1->v2: - Added an #ifdef ARCH_S3C24XX around the header inclusion in drivers/gpio/gpio-samsung.c as we would otherwise have colliding definitions when compiling S3C64XX. - Rename inclusion guard in the header file. Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: linux-samsung-soc@vger.kernel.org Acked-by: Kukjin Kim <kgene.kim@samsung.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2013-12-20Merge branch 'keystone/soc' into next/socKevin Hilman
From Santosh Shilimkar: * keystone/soc: ARM: keystone: defconfig: enable USB support ARM: keystone: Avoid calling of_clk_init() twice ARM: keystone: Make PM bus ready before populating platform devices ARM: keystone: enable DMA zone for LPAE ARM: keystone: enable big endian support Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20Merge branch 'efm32/soc' into next/socKevin Hilman
From Uwe Kleine-König: * efm32/soc: (1003 commits) ARM: device trees for Energy Micro's EFM32 Cortex-M3 SoCs ARM: new platform for Energy Micro's EFM32 Cortex-M3 SoCs +Linux 3.13-rc4 Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20Merge branch 'berlin/soc' into next/socKevin Hilman
From Sebastian Hesselbarth: * berlin/soc: ARM: add initial support for Marvell Berlin SoCs ARM: add Armada 1500-mini and Chromecast device tree files ARM: add Armada 1500 and Sony NSZ-GS7 device tree files ARM: add Marvell Berlin UART0 lowlevel debug ARM: add Marvell Berlin SoCs to multi_v7_defconfig ARM: add Marvell Berlin SoC familiy to Marvell doc MAINTAINERS: add ARM Marvell Berlin SoC irqchip: add DesignWare APB ICTL interrupt controller Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20ARM: tegra: enable USB2 on Tegra30 BeaverEric Brower
Enable USB2 on Beaver, exposed via the mini-PCIe connector. Signed-off-by: Eric Brower <ebrower@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-20ARM: tegra: modify Tegra30 USB2 default phy_type to UTMIEric Brower
Modify Tegra30 default USB2 phy_type to UTMI; this matches power-on-reset defaults and is expected to be the common case. The current implementation is likely an incorrect carry-over from Tegra20, where USB2 does default to ULPI. Signed-off-by: Eric Brower <ebrower@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2013-12-20Merge tag 'omap-for-v3.13/display-fix' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes I accidentally removed some mux code for omap4 that I thought was dead code as omap4 has been booting with device tree only since v3.10. Turns out I also removed some display related mux code, so let's revert that except for the dead code parts. * tag 'omap-for-v3.13/display-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (439 commits) Revert "ARM: OMAP2+: Remove legacy mux code for display.c" +Linux 3.13-rc4
2013-12-20ARM: dts: rename hi4511 dts fileHaojian Zhuang
We want to follow the name style of DTS that is SoC-board.dts. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20ARM: hisi: remove init_timeHaojian Zhuang
Since init_time in machine descriptor is already covered by arch/arm/kernel/time.c by default. We needn't to append it any more. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20ARM: hisi: rename hi3xxx to hisiHaojian Zhuang
Since some new Hisilicon SoCs are not named as hi3xxx, rename mach-hi3xxx to mach-hisi instead. And the pronounciation of "hisi" is similar to the chinese pronounciation of Hisilicon. So Hisilicon guys like this name. ARCH_HI3xxx will be renamed later since other drivers are using it and they are still in linux-next git tree. So rename ARCH_HI3xxx later. Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20Merge tag 'keystone-dts' of ↵Kevin Hilman
git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt Keystone DTS updates for 3.14 - ddr3 pll clock node typo fixup. - EVM specific clock setting with board k2hk-evm.dts. - GIC node updates for missing virtualisation info. - Adding USB dwc3 and phy nodes. * tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone: Add usb devicetree bindings ARM: dts: keystone: Add usb phy devicetree bindings ARM: dts: keystone: Add guestos maintenance interrupt ARM: dts: keystone: Add the GICV and GICH address space ARM: keystone: dts: add paclk divider clock node ARM: keystone: dts: fix typo in the ddr3 pllclk node name ARM: keystone: dts: add a k2hk-evm specific dts file Signed-off-by: Kevin Hilman <khilman@linaro.org>
2013-12-20stackprotector: Introduce CONFIG_CC_STACKPROTECTOR_STRONGKees Cook
This changes the stack protector config option into a choice of "None", "Regular", and "Strong": CONFIG_CC_STACKPROTECTOR_NONE CONFIG_CC_STACKPROTECTOR_REGULAR CONFIG_CC_STACKPROTECTOR_STRONG "Regular" means the old CONFIG_CC_STACKPROTECTOR=y option. "Strong" is a new mode introduced by this patch. With "Strong" the kernel is built with -fstack-protector-strong (available in gcc 4.9 and later). This option increases the coverage of the stack protector without the heavy performance hit of -fstack-protector-all. For reference, the stack protector options available in gcc are: -fstack-protector-all: Adds the stack-canary saving prefix and stack-canary checking suffix to _all_ function entry and exit. Results in substantial use of stack space for saving the canary for deep stack users (e.g. historically xfs), and measurable (though shockingly still low) performance hit due to all the saving/checking. Really not suitable for sane systems, and was entirely removed as an option from the kernel many years ago. -fstack-protector: Adds the canary save/check to functions that define an 8 (--param=ssp-buffer-size=N, N=8 by default) or more byte local char array. Traditionally, stack overflows happened with string-based manipulations, so this was a way to find those functions. Very few total functions actually get the canary; no measurable performance or size overhead. -fstack-protector-strong Adds the canary for a wider set of functions, since it's not just those with strings that have ultimately been vulnerable to stack-busting. With this superset, more functions end up with a canary, but it still remains small compared to all functions with only a small change in performance. Based on the original design document, a function gets the canary when it contains any of: - local variable's address used as part of the right hand side of an assignment or function argument - local variable is an array (or union containing an array), regardless of array type or length - uses register local variables https://docs.google.com/a/google.com/document/d/1xXBH6rRZue4f296vGt9YQcuLVQHeE516stHwt8M9xyU Find below a comparison of "size" and "objdump" output when built with gcc-4.9 in three configurations: - defconfig 11430641 kernel text size 36110 function bodies - defconfig + CONFIG_CC_STACKPROTECTOR_REGULAR 11468490 kernel text size (+0.33%) 1015 of 36110 functions are stack-protected (2.81%) - defconfig + CONFIG_CC_STACKPROTECTOR_STRONG via this patch 11692790 kernel text size (+2.24%) 7401 of 36110 functions are stack-protected (20.5%) With -strong, ARM's compressed boot code now triggers stack protection, so a static guard was added. Since this is only used during decompression and was never used before, the exposure here is very small. Once it switches to the full kernel, the stack guard is back to normal. Chrome OS has been using -fstack-protector-strong for its kernel builds for the last 8 months with no problems. Signed-off-by: Kees Cook <keescook@chromium.org> Cc: Arjan van de Ven <arjan@linux.intel.com> Cc: Michal Marek <mmarek@suse.cz> Cc: Russell King <linux@arm.linux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: James Hogan <james.hogan@imgtec.com> Cc: Stephen Rothwell <sfr@canb.auug.org.au> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-mips@linux-mips.org Cc: linux-arch@vger.kernel.org Link: http://lkml.kernel.org/r/1387481759-14535-3-git-send-email-keescook@chromium.org [ Improved the changelog and descriptions some more. ] Signed-off-by: Ingo Molnar <mingo@kernel.org>