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2010-12-22Merge branch 'devel' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6 into devel-stable
2010-12-20ARM: pxa: Add Balloon3 NAND ready checkMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Update Balloon3 for new FPGA firmwareMarek Vasut
The new FPGA firmware in Balloon3 uses different methods to control it's bus control lines. In the new version, there are separate registers to set/clear bus control lines. This patch updates affected places. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Fix number of IRQs on Balloon3Marek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa/colibri: setup pins for USB host port 3Bjorn Forsman
Tested on a Colibri Evaluation Board Rev.2.1 with a Colibri PXA310 module. Signed-off-by: Bjorn Forsman <bjorn.forsman@gmail.com> Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-12-20ARM: mmp: refactored 5V regulator support using fixed-regulatorMark F. Brown
Signed-off-by: Mark F. Brown <mark.brown314@gmail.com> Reviewed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: mmp: correct the naming of GPIOxx_GPIO definitionsEric Miao
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Add gpio-leds and vibrator support to PalmTCMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Modularize Palm Tungsten|CMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Colibri PXA320 PCMCIA driverMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: add clock for static memory controllerEric Miao
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Rename Colibri evalboardMarek Vasut
Rename colibri-pxa270-evalboard to colibri-evalboard as this board is used with all Colibri modules. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Add M41T00 RTC support into Colibri evalboardMarek Vasut
Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Push Colibri evalboard MFP into module filesMarek Vasut
This change -- pushing the MFP configuration back into Module files -- is necessary because some evalboards can be used with multiple modules, where MFP differs from module to module. Therefore MFP isn't board-specific, but module-specific and the module should preconfigure itself for the board. (And there is also the C preprocesor limitation and conflicting #define-s) Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: Toradex Colibri PXA270 CF supportMarek Vasut
This driver also contains structures to eventually support PXA320. This is planned to be added in a later patch. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-20ARM: pxa: add iwmmx support for PJ4Haojian Zhuang
iwmmxt is used in XScale, XScale3, Mohawk and PJ4 core. But the instructions of accessing CP0 and CP1 is changed in PJ4. Append more files to support iwmmxt in PJ4 core. Signed-off-by: Zhou Zhu <zzhu3@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Nicolas Pitre <nico@fluxnic.net> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-18Merge git://git.kernel.org/pub/scm/linux/kernel/git/nico/orion into devel-stableRussell King
2010-12-18Merge branch 'hw-breakpoint' of git://repo.or.cz/linux-2.6/linux-wd into ↵Russell King
devel-stable
2010-12-18ARM: pxa: sanitize IRQ registers access based on offsetHaojian Zhuang
Signed-off-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
2010-12-18ARM: mmp: select CPU_PJ4Haojian Zhuang
Since CPU_PJ4 is shared between PXA95x and MMP2, select CPU_PJ4 in MMP2 configuration. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-18ARM: pxa: support saarb platformHaojian Zhuang
Saarb platform is a handheld platform that supports Marvell PXA955 silicon. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-18ARM: pxa: support pxa95xHaojian Zhuang
The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-18ARM: pxa: introduce pxa3xx_clock_sysclass for clock suspend/resumeEric Miao
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: introduce pxa2xx_clock_sysclass for clock suspend/resumeEric Miao
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: remove get_memclk_frequency_10khz()Eric Miao
Introduce 'struct clk' for memory and remove get_memclk_frequency_10khz(). Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: separate the clock support into clock-{pxa2xx,pxa3xx}.cEric Miao
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: replace duplicated macro DEFINE_PXA3_CK() with DEFINE_CK()Eric Miao
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: redefine irqs.hHaojian Zhuang
Define all IRQs in irqs.h. If some IRQs are sharing one IRQ number, define them together. If some IRQs are sharing same name with different IRQ number, define different IRQ. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: redefine the cpu_is_pxa3xxHaojian Zhuang
After introducing pxa930/pxa935 and new silicons, original cpuid rules of XScale generation 3 can't fit new silicons. Now redefine the rule of PXA3xx. Only PXA300/PXA310/PXA320/PXA930/PXA935 are family members of PXA3xx. PXA930/PXA935 are family members of PXA93x. PXA93x can be considered as PXA3xx + CP. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: mmp: fix the typo - MMP2 is compatible with ARMv7Haojian Zhuang
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: mmp: append brownstone supportHaojian Zhuang
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: mmp: add usb clock for pxa168/pxa910cxie4
Signed-off-by: Chao Xie <chao.xie@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa/raumfeld: enable PXA3XX_GCU driverDaniel Mack
Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: mmp: add sd card to jasperZhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: mmp: add mmc resourceZhangfei Gao
Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: Access SMEMC via virtual addressesMarek Vasut
This is important because on PXA3xx, the physical mapping of SMEMC registers differs from the one on PXA2xx. In order to get PCMCIA working on both PXA2xx and PXA320, the PCMCIA driver was adjusted accordingly as well. Also, various places in the kernel had to be patched to use __raw_read/__raw_write. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: Introduce pxa{25x,27x,3xx}_map_io()Marek Vasut
This patch introduces pxa2xx_map_io() and pxa3xx_map_io() to distinguish between PXA25x/PXA27x and PXA3xx memory mapping. Also, fixup for platforms broken after introducing pxa{25x,27x}_map_io() and pxa3xx_map_io() is included. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: introduce addr-map.h for large bus addresses and rangesEric Miao
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-16ARM: pxa: remove un-used mapping of camera registersEric Miao
The camera registers start and range are encoded into the platform device, and are actually handled by ioremap()'ed, thus the mapping in pxa_map_io() is not necessary. Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
2010-12-15[ARM] Dove: add support for multi-purpose pins configurationMike Rapoport
Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
2010-12-15[ARM] Dove: add support for GPIOs 64-71Mike Rapoport
Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
2010-12-15ARM: hw_breakpoint: do not fail initcall if monitor mode is disabledWill Deacon
The debug registers can only be manipulated from software if monitor debug mode is enabled. On some cores, this can never be enabled (i.e. the corresponding bit in the DSCR is RAZ/WI). This patch ensures we can handle this hardware configuration and fail gracefully, rather than blow up the kernel during boot. Reported-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
2010-12-14Merge branch 'omap-fixes-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: OMAP2: PRCM: fix some SHIFT macros that were actually bitmasks OMAP2+: PM/serial: fix console semaphore acquire during suspend OMAP1: SRAM: fix size for OMAP1611 SoCs arm: omap2: io: fix clk_get() error check arm: plat-omap: counter_32k: use IS_ERR() instead of NULL check omap: nand: remove hardware ECC as default omap: zoom: wl1271 slot is MMC_CAP_POWER_OFF_CARD omap: PM debug: fix wake-on-timer debugfs dependency
2010-12-14ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fixValentine Barshak
Cache ownership must be acquired by reading/writing data from the cache line to make cache operation have the desired effect on the SMP MPCore CPU. However, the ownership is never acquired in the v6_dma_inv_range function when cleaning the first line and flushing the last one, in case the address is not aligned to D_CACHE_LINE_SIZE boundary. Fix this by reading/writing data if needed, before performing cache operations. While at it, fix v6_dma_flush_range to prevent RWFO outside the buffer. Cc: stable@kernel.org Signed-off-by: Valentine Barshak <vbarshak@mvista.com> Signed-off-by: George G. Davis <gdavis@mvista.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: 6534/1: Make CONFIG_FPE_NWFPE depend on !CONFIG_THUMB2_KERNELDave Martin
Because the nwfpe support is unlikely to be used on new platforms and requires CONFIG_OABI_COMPAT, which is not generally used with ARMv7+, we shouldn't expect to build nwfpe support into a Thumb-2 kernel. At present, nwfpe contains assembly code which isn't Thumb-2 compatible, and for now it doesn't appear useful to port this code. All ARMv7-A/R platforms necessarily have VFPv3 hardware floating- point natively, making emulation unnecessary. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-14ARM: 6533/1: Thumb-2: Make CONFIG_THUMB2_KERNEL depend on !CPU_V6Dave Martin
This makes sense, because Thumb-2 code can't execute on plain ARMv6 processors. This will avoid accidentally configuring a broken kernel where the config otherwise would allow multiple architecture versions to coexist in the same kernel. Not adding !CPU_V5 etc., because the chance of anyone trying to put v5 and v7 in the same kernel is low, and I'm not aware of any mach which can do this. These could be added later if it matters. Note that the rules may need to be refined if support for the ARM1156J(F)-S processor is later added to the kernel, since this processor supports the rare ARMv6T2 extensions, which add support for Thumb-2 and a few other ARMv7 features. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-12Merge branch 'fix' of ↵Russell King
git://git.kernel.org/pub/scm/linux/kernel/git/ycmiao/pxa-linux-2.6
2010-12-12ARM: Update mach-typesRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-12ARM: 6528/1: Use CTR for the I-cache line size on ARMv7Catalin Marinas
The current implementation of the v7_coherent_*_range function assumes that the D and I cache lines have the same size, which is incorrect architecturally. This patch adds the icache_line_size macro which reads the CTR register. The main loop in v7_coherent_*_range is split in two independent loops or the D and I caches. This also has the performance advantage that the DSB is moved outside the main loop. Reported-by: Kevin Sapp <ksapp@quicinc.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-12-12ARM: 6527/1: Use CTR instead of CCSIDR for the D-cache line size on ARMv7Catalin Marinas
The current implementation of the dcache_line_size macro reads the L1 cache size from the CCSIDR register. This, however, is not guaranteed to be the smallest cache line in the cache hierarchy. The patch changes to the macro to use the more architecturally correct CTR register. Reported-by: Kevin Sapp <ksapp@quicinc.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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