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2014-11-26ARM: at91/trivial: update Kconfig comment to mention SAMA5Nicolas Ferre
Cortex-A5 SAMA5 processors were not listed, add this in the AT91 comment. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26ARM: at91: always USE_OF from now onNicolas Ferre
As we always use Device Tree now, we can add the configuration here. Also remove the condition for PINCTRL_AT91. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
2014-11-26[media] ARM: dts: meson: add IR receiver nodeBeniamino Galvani
This adds a node for the IR remote control receiver to the Amlogic Meson DTS. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
2014-11-26arm/arm64: kvm: drop inappropriate use of kvm_is_mmio_pfn()Ard Biesheuvel
Instead of using kvm_is_mmio_pfn() to decide whether a host region should be stage 2 mapped with device attributes, add a new static function kvm_is_device_pfn() that disregards RAM pages with the reserved bit set, as those should usually not be mapped as device memory. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-26arm64: KVM: fix unmapping with 48-bit VAsMark Rutland
Currently if using a 48-bit VA, tearing down the hyp page tables (which can happen in the absence of a GICH or GICV resource) results in the rather nasty splat below, evidently becasue we access a table that doesn't actually exist. Commit 38f791a4e499792e (arm64: KVM: Implement 48 VA support for KVM EL2 and Stage-2) added a pgd_none check to __create_hyp_mappings to account for the additional level of tables, but didn't add a corresponding check to unmap_range, and this seems to be the source of the problem. This patch adds the missing pgd_none check, ensuring we don't try to access tables that don't exist. Original splat below: kvm [1]: Using HYP init bounce page @83fe94a000 kvm [1]: Cannot obtain GICH resource Unable to handle kernel paging request at virtual address ffff7f7fff000000 pgd = ffff800000770000 [ffff7f7fff000000] *pgd=0000000000000000 Internal error: Oops: 96000004 [#1] PREEMPT SMP Modules linked in: CPU: 1 PID: 1 Comm: swapper/0 Not tainted 3.18.0-rc2+ #89 task: ffff8003eb500000 ti: ffff8003eb45c000 task.ti: ffff8003eb45c000 PC is at unmap_range+0x120/0x580 LR is at free_hyp_pgds+0xac/0xe4 pc : [<ffff80000009b768>] lr : [<ffff80000009cad8>] pstate: 80000045 sp : ffff8003eb45fbf0 x29: ffff8003eb45fbf0 x28: ffff800000736000 x27: ffff800000735000 x26: ffff7f7fff000000 x25: 0000000040000000 x24: ffff8000006f5000 x23: 0000000000000000 x22: 0000007fffffffff x21: 0000800000000000 x20: 0000008000000000 x19: 0000000000000000 x18: ffff800000648000 x17: ffff800000537228 x16: 0000000000000000 x15: 000000000000001f x14: 0000000000000000 x13: 0000000000000001 x12: 0000000000000020 x11: 0000000000000062 x10: 0000000000000006 x9 : 0000000000000000 x8 : 0000000000000063 x7 : 0000000000000018 x6 : 00000003ff000000 x5 : ffff800000744188 x4 : 0000000000000001 x3 : 0000000040000000 x2 : ffff800000000000 x1 : 0000007fffffffff x0 : 000000003fffffff Process swapper/0 (pid: 1, stack limit = 0xffff8003eb45c058) Stack: (0xffff8003eb45fbf0 to 0xffff8003eb460000) fbe0: eb45fcb0 ffff8003 0009cad8 ffff8000 fc00: 00000000 00000080 00736140 ffff8000 00736000 ffff8000 00000000 00007c80 fc20: 00000000 00000080 006f5000 ffff8000 00000000 00000080 00743000 ffff8000 fc40: 00735000 ffff8000 006d3030 ffff8000 006fe7b8 ffff8000 00000000 00000080 fc60: ffffffff 0000007f fdac1000 ffff8003 fd94b000 ffff8003 fda47000 ffff8003 fc80: 00502b40 ffff8000 ff000000 ffff7f7f fdec6000 00008003 fdac1630 ffff8003 fca0: eb45fcb0 ffff8003 ffffffff 0000007f eb45fd00 ffff8003 0009b378 ffff8000 fcc0: ffffffea 00000000 006fe000 ffff8000 00736728 ffff8000 00736120 ffff8000 fce0: 00000040 00000000 00743000 ffff8000 006fe7b8 ffff8000 0050cd48 00000000 fd00: eb45fd60 ffff8003 00096070 ffff8000 006f06e0 ffff8000 006f06e0 ffff8000 fd20: fd948b40 ffff8003 0009a320 ffff8000 00000000 00000000 00000000 00000000 fd40: 00000ae0 00000000 006aa25c ffff8000 eb45fd60 ffff8003 0017ca44 00000002 fd60: eb45fdc0 ffff8003 0009a33c ffff8000 006f06e0 ffff8000 006f06e0 ffff8000 fd80: fd948b40 ffff8003 0009a320 ffff8000 00000000 00000000 00735000 ffff8000 fda0: 006d3090 ffff8000 006aa25c ffff8000 00735000 ffff8000 006d3030 ffff8000 fdc0: eb45fdd0 ffff8003 000814c0 ffff8000 eb45fe50 ffff8003 006aaac4 ffff8000 fde0: 006ddd90 ffff8000 00000006 00000000 006d3000 ffff8000 00000095 00000000 fe00: 006a1e90 ffff8000 00735000 ffff8000 006d3000 ffff8000 006aa25c ffff8000 fe20: 00735000 ffff8000 006d3030 ffff8000 eb45fe50 ffff8003 006fac68 ffff8000 fe40: 00000006 00000006 fe293ee6 ffff8003 eb45feb0 ffff8003 004f8ee8 ffff8000 fe60: 004f8ed4 ffff8000 00735000 ffff8000 00000000 00000000 00000000 00000000 fe80: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 fea0: 00000000 00000000 00000000 00000000 00000000 00000000 000843d0 ffff8000 fec0: 004f8ed4 ffff8000 00000000 00000000 00000000 00000000 00000000 00000000 fee0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff20: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff40: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff60: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ff80: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ffa0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000005 00000000 ffe0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 Call trace: [<ffff80000009b768>] unmap_range+0x120/0x580 [<ffff80000009cad4>] free_hyp_pgds+0xa8/0xe4 [<ffff80000009b374>] kvm_arch_init+0x268/0x44c [<ffff80000009606c>] kvm_init+0x24/0x260 [<ffff80000009a338>] arm_init+0x18/0x24 [<ffff8000000814bc>] do_one_initcall+0x88/0x1a0 [<ffff8000006aaac0>] kernel_init_freeable+0x148/0x1e8 [<ffff8000004f8ee4>] kernel_init+0x10/0xd4 Code: 8b000263 92628479 d1000720 eb01001f (f9400340) ---[ end trace 3bc230562e926fa4 ]--- Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Jungseok Lee <jungseoklee85@gmail.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-11-26mmc: omap_hsmmc: remove unused slot_id parameterAndreas Fenkart
omap_hsmmc only supports one slot. So slot id is always zero, and slot id was never used in the callbacks anyway Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unnecessary omap_hsmmc_slot_data indirectionAndreas Fenkart
omap_hsmmc supports only one slot per controller, see OMAP_MMC_MAX_SLOTS. This unnecessary indirection leads to confusion in the omap_hsmmc driver. For example the card_detect callback is not installed by platform code but from the driver probe function. So it should be a field of omap_hsmmc_host. But since it is declared under the platform slot while the drivers struct omap_hsmmc_host has no slot abstraction, this looks like a bug, especially when not familiar that this driver only supports 1 slot anyway. Either we should add a slot abstraction to omap_hsmmc_host or remove it from the platform data struct. Removed since slot multiplexing is an un-implemented feature Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unused get_context_loss_count callbackAndreas Fenkart
trigger of this callback has been removed in 0a82e06e6183 Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove never read power_saving field in omap2_hsmmc_infoAndreas Fenkart
these fields are never read, probably an unimplemented feature or superseded by pm_runtime Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26mmc: omap_hsmmc: remove unused fields in platform_dataAndreas Fenkart
platform data is built from omap2_hsmmc_info, remove all fields that are never set in omap_hsmmc_info, hence never copied to platform data. Note that the omap_hsmmc driver is not affected by this patch those fields were completely unused. Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26ARM: OMAP1/2+: MMC: separate platform data for mmc and mmc hs driverAndreas Fenkart
- omap mmc driver supports multiplexing, omap_mmc_hs doesn't this leads to one of the major confusions in the omap_hsmmc driver - platform data should be read-only for the driver most callbacks are not set by the omap3 platform init code while still required. So they are set from the driver probe function, which is against the paradigm that platform-data should not be modified by the driver typical examples are card_detect, read_only callbacks un-bundling by searching for driver name \"omap_hsmmc in the arch/arm folder. omap_hsmmc_platform_data is not initialized directly, but from omap2_hsmmc_info, which is defined in a separate header file not touched by this patch hwmod includes platform headers to declare features of the platform. All the declared features are prefixed OMAP_HSMMC. There is no need to include platform header from hwmod other except for feature defines Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26ARM: OMAP2: MMC: include mmc-omap platform header directlyAndreas Fenkart
Only a few files really need that platform header. When later splitting omap_mmc_platform_data into omap_mmc and omap_mmc_hs, those files declaring an hs mmc platform data will have to change the platform include, which is a good sanity check. Also removing omap242x_init_mmc, which is not used anywhere, checked with grep. Signed-off-by: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2014-11-26ARM: tegra: Move AHB Kconfig to drivers/ambaThierry Reding
This will allow the Kconfig option to be shared among 32-bit and 64-bit ARM. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-26amba: Add Kconfig fileThierry Reding
Rather than duplicate the ARM_AMBA Kconfig symbol in both 32-bit and 64-bit ARM architectures, move the common definition to drivers/amba where dependent drivers will be located. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-11-26arm: mvebu: normalize pinctrl entries for Armada SoCsArnaud Ebalard
There are currently 2 differents naming conventions used between the existing Armada SoC DT files for pinctrl entries (*_pin(s): *-pin(s) and pmx_*: pmx-*) with a vast majority of files using the former: $ grep _pin arch/arm/boot/dts/armada-*.dts* | wc -l 155 $ grep pmx arch/arm/boot/dts/armada-*.dts* | wc -l 13 In fact, only some Armada XP files are using the second variant. This patch normalizes those files (mainly ge0/1 entries) to use the first variant. Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/00114c3169e1d93259ff4150ed46ee36eae16b1e.1416670812.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26arm: mvebu: fix wrongly named DS414 pinctrl entriesArnaud Ebalard
While renaming pinctrl entries during reviews of Synology DS414 support series, I missed three entries, as reported by Ben. This patch fixes those. Reported-by: Ben Peddell <klightspeed@killerwolves.net> Signed-off-by: Arnaud Ebalard <arno@natisbad.org> Link: https://lkml.kernel.org/r/608e4fd6e06e9c5289a84b9c38e81b2456dbcd79.1416670812.git.arno@natisbad.org Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375Gregory CLEMENT
Now that the USB cluster node has been added, use it as a PHY provider for the USB controller linked to it: the first EHCI and the xHCI. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1415879269-29711-7-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375Gregory CLEMENT
On Armada 375, the USB cluster allows to control the cluster composed of the USB2 and USB3 host controllers. Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Link: https://lkml.kernel.org/r/1415879269-29711-6-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26Merge tag 'tags/phy-dt-header' into mvebu/dt-usb_phyJason Cooper
shared header file which will be referenced from both PHY driver and its associated Device Tree node(s)
2014-11-26ARM: orion: convert the irq_reg_{readl,writel} calls to the new APIGregory CLEMENT
The commit "genirq: Generic chip: Change irq_reg_{readl,writel} arguments" modified the API. In the same tome the arch/arm/plat-orion/gpio.c file received a fix with the use of the old API: "ARM: orion: Fix for certain sequence of request_irq can cause irq storm". This commit fixes the use of the API. Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Acked-by: Olof Johansson <olof@lixom.net> Link: https://lkml.kernel.org/r/1416928752-24529-1-git-send-email-gregory.clement@free-electrons.com Signed-off-by: Jason Cooper <jason@lakedaemon.net>
2014-11-26Merge tag 'tags/mvebu-fixes-3.18' into irqchip/coreJason Cooper
mvebu fixes for v3.18 - Armada XP - Generalize i2c quirk - orion - Fix irq storm caused by specific sequence of request_irq
2014-11-26Merge tag 'tags/renesas-dt-du-for-v3.19' into drm/next/adv7511-baseLaurent Pinchart
Renesas ARM Based SoC DT DU Updates for v3.19 * Enable DU using DT on marzen/r8a7779, lager/r8a7790 and koelsch/r8a7791
2014-11-25Merge tag 'usb-for-v3.19' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next Felipe writes: usb: patches for v3.19 merge window This time, a very pull request with 216 non-merge commits. Most of the commits contained here are sparse or coccinelle fixes ranging from missing 'static' to returning 0 in case of errors. More importantly, we have the removal the now unnecessary 'driver' argument to ->udc_stop(). DWC2 learned about Dual-Role builds. Users of this IP can now have a single driver built for host and device roles. DWC3 got support for two new HW platforms: Exynos7 and AMD. The Broadcom USB 3.0 Device Controller IP is now supported and so is PLX USB338x, which means DWC3 has lost is badge as the only USB 3.0 peripheral IP supported on Linux. Thanks for Tony Lindgren's work, we can now have a distro-like kernel where all MUSB glue layers can be built into the same kernel (statically or dynamically linked) and it'll work in PIO (DMA will come probably on v3.20). Other than these, the usual set of cleanups and non-critical fixes. Signed-off-by: Felipe Balbi <balbi@ti.com>
2014-11-25arm/arm64: KVM: avoid unnecessary guest register mangling on MMIO readAndre Przywara
Currently we mangle the endianness of the guest's register even on an MMIO _read_, where it is completely useless, because we will not use the value of that register. Rework the io_mem_abort() function to clearly separate between reads and writes and only do the endianness mangling on MMIO writes. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2014-11-25arm, arm64: KVM: handle potential incoherency of readonly memslotsArd Biesheuvel
Readonly memslots are often used to implement emulation of ROMs and NOR flashes, in which case the guest may legally map these regions as uncached. To deal with the incoherency associated with uncached guest mappings, treat all readonly memslots as incoherent, and ensure that pages that belong to regions tagged as such are flushed to DRAM before being passed to the guest. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2014-11-25arm, arm64: KVM: allow forced dcache flush on page faultsLaszlo Ersek
To allow handling of incoherent memslots in a subsequent patch, this patch adds a paramater 'ipa_uncached' to cache_coherent_guest_page() so that we can instruct it to flush the page's contents to DRAM even if the guest has caching globally enabled. Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2014-11-25arm/arm64: kvm: drop inappropriate use of kvm_is_mmio_pfn()Ard Biesheuvel
Instead of using kvm_is_mmio_pfn() to decide whether a host region should be stage 2 mapped with device attributes, add a new static function kvm_is_device_pfn() that disregards RAM pages with the reserved bit set, as those should usually not be mapped as device memory. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2014-11-25ARM: dts: atlas6: add resets property for SPI nodesQipan Li
this patch adds missed resets property for CSR SiRFatlasVI SPI nodes. Signed-off-by: Qipan Li <Qipan.Li@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-11-25ARM: dts: atlas6: add resets property for VPP nodesRenwei Wu
this patch adds missed resets property for CSR SiRFatlasVI Video Post Processor(VPP) node. Signed-off-by: Renwei Wu <renwei.wu@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-11-25ARM: dts: prima2: add resets property for VPP nodesRenwei Wu
this patch adds missed resets property for CSR SiRFprimaII Video Post Processor(VPP) node. Signed-off-by: Renwei Wu <renwei.wu@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-11-25ARM: dts: prima2: add resets property for GPS nodesTao Huang
this patch adds missed resets property for CSR SiRFprimaII GPS related nodes. Signed-off-by: Tao Huang <Tao.Huang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-11-25ARM: dts: prima2: add node for Performance Monitor UnitYe He
It enables Performance Monitor Unit on CSR SiRFprimaII. Signed-off-by: Ye He <ye.he@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com>
2014-11-25ARM: dts: atlas6: Add I2S external clock input pingroupRongjun Ying
The I2S controller can use the external clock as reference clock with master mode. But based on different hardware or software design, this external clock might be needed or not needed. So the external input pin can be an independent pinctrl group, and the card driver can decice to get it or not. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-11-25ARM: dts: atlas6: add a separate pingroup for i2s mclk outputRongjun Ying
The I2S controller can output mclk to external audio codec. But by hardware design, some codecs need mclk and some codecs do not need mclk. So the mclk pin can be an independent pinctrl group, and the card driver can get it or not based on boards. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-11-25ARM: dts: prima2: add I2S 2ch, 6ch, nodin, mclk groupsRongjun Ying
we have done that for atlas6 in commit ed36c1a, 086b8904 etc. here we do same things for prima2. Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2014-11-24Merge tag 'sunxi-clocks-for-3.19' of ↵Michael Turquette
https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-next Allwinner Clocks additions for 3.19 A few patches that should go through the clock tree, mostly fixes, cleanups, and new clocks additions to start to support the A80.
2014-11-25ARM: dts: rockchip: enable thermal on rk3288-evb boardCaesar Wang
When a thermal temperature is invoked use the CRU to reset the chip on rk3288-evb boards. TSHUT is low active on these boards. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-25ARM: dts: rockchip: add main thermal info to rk3288Caesar Wang
If for some reason we are unable to shut it down in orderly fashion (kernel is stuck holding a lock or similar), then hardware TSHUT will reset it. If the temperature is over 95C over a period of time the thermal shutdown of the tsadc is invoked with can either reset the entire chip via the CRU, or notify the PMIC via a GPIO. This should be set in the specific board. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-25ARM: dts: rockchip: add RK3288 Thermal dataCaesar Wang
This patch changes a dtsi file to contain the thermal data on RK3288 and later SoCs. This data will enable a thermal shutdown over 90C. Signed-off-by: Caesar Wang <caesar.wang@rock-chips.com> Reviewed-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2014-11-24Revert "ARM: dts: sunxi: unify APB1 clock"Arnd Bergmann
This reverts commit e883d67285e9267c73f8d2b9d32aa9e712ad00a4. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: http://lkml.kernel.org/r/7h1toxr0ku.fsf@deeprootsystems.com
2014-11-24Revert "ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks."Arnd Bergmann
This reverts commit 338302ae32b7be73da97b746f660b283642cfc5c. This is one of two commits that resulted in a boot regression. Conflicts: arch/arm/boot/dts/sun6i-a31.dtsi Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: http://lkml.kernel.org/r/7h1toxr0ku.fsf@deeprootsystems.com
2014-11-24ARM: dts: am335x-evm: Add DCAN1 detailsRoger Quadros
DCAN1 is routed to CAN port (J11) when Profile 1 is selected on the profile selection switch. Provide information for DCAN1 pins and node but keep it disabled by default. User has to manually enable it if Profile 1 is chosen. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am33xx: Update DCAN nodesRoger Quadros
Add "raminit-syscon" property to specify the RAMINIT register. Add clock information. Rename can nodes from "d_can" to "can" to be compliant with the ePAPR specs. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am33xx: Add control module syscon nodeRoger Quadros
Use syscon regmap to expose the Control module register space. This register space is shared between many users e.g. DCAN, USB, display, etc. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am437x-gp: Add dcan supportMugunthan V N
Add DCAN support for AM437x GP EVM with both DCAN instances. [Roger Q] Updated output pin to not use pull up. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: George Cherian <george.cherian@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am4372: Add DCAN nodesRoger Quadros
The SoC contains 2 DCAN modules. Add them. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: am4372: Add control module syscon nodeRoger Quadros
Use syscon regmap to expose the Control module register space. This register space is shared between many users e.g. DCAN, USB, display, etc. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: dra72-evm: Add CAN supportRoger Quadros
The board has 2 CAN ports but only the first one can be used. Enable the first CAN port. WAKEUP0 pin doesn't have INPUT enable bit so we just disable weak PULLs. The second CAN port cannot be used without hardware modification so we don't enable the second port. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: dra7-evm: Add CAN supportRoger Quadros
The board has 2 CAN ports but only the first one can be used. Enable the first CAN port. WAKEUP0 pin doesn't have INPUT enable bit so we just disable weak PULLs. The second CAN port cannot be used without hardware modification so we don't enable the second port. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-11-24ARM: dts: DRA7: Add DCAN nodesRoger Quadros
The SoC supports 2 DCAN nodes. Add them. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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