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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/cleanup
Pull "Fifth batch of cleanup/SoC for 3.19" from Nicolas Ferre:
- removal of now dead code and AT91-specific driver
- removal of !DT initialization in some core AT91 drivers
- simplification of Kconfig DT board file selection: now automatic
* tag 'at91-cleanup5' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91: remove unused board.h file
ARM: at91: remove unneeded header files
ARM: at91/clocksource: remove !DT PIT initializations
ARM: at91: at91rm9200 ST initialization is now DT only
ARM: at91: remove old AT91-specific drivers
ARM: at91: cleanup initilisation code by removing dead code
ARM: at91/Kconfig: select board files automatically
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91 into next/defconfig
Pull "First batch of defconfigs for AT91 / 3.19:" from Nicolas Ferre:
- use NEON for all C-A5, neon code handles the !NEON case
- add new XDMA driver
- add some useful drivers as we only have a single defconfig for all
AT91SAM9/RM9200
* tag 'at91-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/nferre/linux-at91:
ARM: at91/defconfig: add DM9000 to at91_dt
ARM: at91/defconfig: add QT1070 to at91_dt
ARM: at91/defconfig: add TCB PWM driver selection
ARM: at91/defconfig: add the XDMA driver
ARM: at91: sama5: update defconfig
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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commit 68a3c0433077 ([media] ARM: OMAP2: RX-51: update
si4713 platform data) updated board-rx51-peripherals.c
so that si4713 could be easily used on DT boot, but
it ended up introducing a build warning whenever
si4713 isn't enabled.
This patches fixes that warning:
arch/arm/mach-omap2/board-rx51-peripherals.c:1000:36: warning: \
‘rx51_si4713_platform_data’ defined but not used [-Wunused-variable]
static struct si4713_platform_data rx51_si4713_platform_data = {
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt
Pull "last dts changes for 3.19" from Jason Cooper:
- rk3288 thermal driver that got accepted into the thermal tree
- mmc fifo sizes for Cortex-A9 SoCs
- labels for the leds on the RadxaRock
- core system supply for the Marsboard
* tag 'v3.19-rockchip-dts4' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
ARM: dts: rockchip: Add input voltage supply regulators in pmic for Marsboard
ARM: dts: rockchip: set FIFO size for SDMMC, SDIO and EMMC on rk3066 and rk3188
ARM: dts: rockchip: add label property for leds on Radxa Rock
ARM: dts: rockchip: enable thermal on rk3288-evb board
ARM: dts: rockchip: add main thermal info to rk3288
ARM: dts: rockchip: add RK3288 Thermal data
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This chip is present on at91sam9261ek board: add it to the at91_dt_defconfig.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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As this touch button driver is used on at91sam9x5ek, it's better to enable it.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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This is the selection of the new PWM driver using TC Blocks. This driver is
useful so we enable it in both sama5 and at91_dt defconfig files.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add the Atmel eXtended DMA Controller driver option. This driver is first used
on SAMA5D4 SoCs and only relevant in sama5_defconfig file.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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Add neon support for sama5d4 and large blocks/files support.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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This commit adjusts the registration of the cpufreq-dt driver in the
mvebu platform to indicate to the cpufreq driver that the platform has
independent clocks for each CPU.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Jason Cooper <jason@lakedaemon.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt2
Pull "ARM: tegra: Device tree changes for v3.19" from Thierry Reding:
The bulk of these changes add memory controller nodes for Tegra30,
Tegra114 and Tegra124. The memory controller implements an IOMMU that
the display controllers are attached to. This allows them to scan out
physically non-contiguous framebuffers and removes one of the primary
users of CMA.
The only other change adds a new MIPI pad control bank to the pin
controller on Tegra124. The corresponding driver patch for this went
into v3.18 as:
3ccc11f6b82c pinctrl: tegra: Add MIPI pad control
* tag 'tegra-for-3.19-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
ARM: tegra: Enable IOMMU for display controllers on Tegra124
ARM: tegra: Enable IOMMU for display controllers on Tegra114
ARM: tegra: Enable IOMMU for display controllers on Tegra30
ARM: tegra: Add memory controller support for Tegra124
ARM: tegra: Add memory controller support for Tegra114
ARM: tegra: Add memory controller support for Tegra30
ARM: tegra: Add APB_MISC_GP as a MIPI pad control bank
These additional commits are merged as dependencies:
memory: Add NVIDIA Tegra memory controller support
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
powerpc/iommu: Rename iommu_[un]map_sg functions
iommu: Improve error handling when setting bus iommu
iommu: Do more input validation in iommu_map_sg()
iommu: Add iommu_map_sg() function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/drivers
Pull "ARM: tegra: IOMMU support for v3.19" from Thierry Reding:
This adds the driver pieces required for IOMMU support on Tegra30,
Tegra114 and Tegra124.
* tag 'tegra-for-3.19-iommu' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: Add NVIDIA Tegra memory controller support
of: Add NVIDIA Tegra memory controller binding
ARM: tegra: Move AHB Kconfig to drivers/amba
amba: Add Kconfig file
clk: tegra: Implement memory-controller clock
powerpc/iommu: Rename iommu_[un]map_sg functions
iommu: Improve error handling when setting bus iommu
iommu: Do more input validation in iommu_map_sg()
iommu: Add iommu_map_sg() function
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into next/cleanup
Pull "arm: Xilinx Zynq cleanup patches for v3.19" from Michal Simek:
- Remove unused file and declaration
* tag 'zynq-cleanup-for-3.19' of https://github.com/Xilinx/linux-xlnx:
ARM: zynq: Remove secondary_startup() declaration from header
ARM: zynq: Actually remove hotplug.c
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/dt
Pull "arm: Xilinx Zynq dt patches for v3.19" from Michal Simek:
- Declare Digilent and vendor
- Add Zybo board support
- Fix VDMA documentation to be align with the driver
* tag 'zynq-dt-for-3.19' of https://github.com/Xilinx/linux-xlnx:
arm: dts: zynq: Add Digilent ZYBO board
arm: dts: zynq: Move crystal freq. to board level
doc: dt: vendor-prefixes: Add Digilent Inc
Documentation: devicetree: Fix Xilinx VDMA specification
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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into next/soc
Pull "mvebu SoC suspend changes for v3.19" from Jason Cooper:
- Armada 370/XP suspend/resume support
- mvebu SoC driver suspend/resume support
- irqchip
- clocksource
- mbus
- clk
* tag 'mvebu-soc-suspend-3.19' of git://git.infradead.org/linux-mvebu:
ARM: mvebu: add SDRAM controller description for Armada XP
ARM: mvebu: adjust mbus controller description on Armada 370/XP
ARM: mvebu: add suspend/resume DT information for Armada XP GP
ARM: mvebu: synchronize secondary CPU clocks on resume
ARM: mvebu: make sure MMU is disabled in armada_370_xp_cpu_resume
ARM: mvebu: Armada XP GP specific suspend/resume code
ARM: mvebu: reserve the first 10 KB of each memory bank for suspend/resume
ARM: mvebu: implement suspend/resume support for Armada XP
clk: mvebu: add suspend/resume for gatable clocks
bus: mvebu-mbus: provide a mechanism to save SDRAM window configuration
bus: mvebu-mbus: suspend/resume support
clocksource: time-armada-370-xp: add suspend/resume support
irqchip: armada-370-xp: Add suspend/resume support
Documentation: dt-bindings: minimal documentation for MVEBU SDRAM controller
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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This is a squash of several imx_v6_v7_defconfig update patches.
- Enable tlv320aic3x audio codec by default (Phytec PBAB01 board)
- Enable DS1307 rtc and gpio fan by default (TBS2910 board)
- Select thermal related drivers
- Add SNVS power off driver
Signed-off-by: Dmitry Lavnikevich <d.lavnikevich@sam-solutions.com>
Signed-off-by: Soeren Moch <smoch@web.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Robin Gong <b38343@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Add iommus properties to the device tree nodes for the two display
controllers found on Tegra124. This will allow the display controllers
to map physically non-contiguous buffers to I/O virtual contiguous
address spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add iommus properties to the device tree nodes for the two display
controllers found on Tegra114. This will allow the display controllers
to map physically non-contiguous buffers to I/O virtual contiguous
address spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add iommus properties to the device tree nodes for the two display
controllers found on Tegra30. This will allow the display controllers to
map physically non-contiguous buffers to I/O virtual contiguous address
spaces so that they can be used for scan-out.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add the memory controller and wire up the interrupt that is used to
report errors. Provide a reference to the memory controller clock and
mark the device as being an IOMMU by adding an #iommu-cells property.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add the device tree node for the memory controller found on Tegra114
SoCs. The memory controller integrates an IOMMU (called SMMU) as well as
various knobs to tweak memory accesses by the various clients.
The old IOMMU device tree node is collapsed into the memory controller
node to more accurately describe the hardware. While this change is
incompatible, the IOMMU driver has never had any users so the change is
not going to cause any breakage.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Collapses the old memory-controller and IOMMU device tree nodes into a
single node to more accurately describe the hardware.
While this is an incompatible change there are no users of the IOMMU on
Tegra, even though a driver has existed for some time.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This patch adds the APB_MISC_GP_MIPI_PAD_CTRL_0 as a pin-control bank on
Tegra124 so the new MIPI pad control group can be muxed between CSI and
DSI_B.
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Introduce support for new hypercall GNTTABOP_cache_flush.
Use it to perform cache flashing on pages used for dma when necessary.
If GNTTABOP_cache_flush is supported by the hypervisor, we don't need to
bounce dma map operations that involve foreign grants and non-coherent
devices.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
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Introduce an arch specific function to find out whether a particular dma
mapping operation needs to bounce on the swiotlb buffer.
On ARM and ARM64, if the page involved is a foreign page and the device
is not coherent, we need to bounce because at unmap time we cannot
execute any required cache maintenance operations (we don't know how to
find the pfn from the mfn).
No change of behaviour for x86.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Merge xen/mm32.c into xen/mm.c.
As a consequence the code gets compiled on arm64 too.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
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In xen_dma_map_page, if the page is a local page, call the native
map_page dma_ops. If the page is foreign, call __xen_dma_map_page that
issues any required cache maintenane operations via hypercall.
The reason for doing this is that the native dma_ops map_page could
allocate buffers than need to be freed. If the page is foreign we don't
call the native unmap_page dma_ops function, resulting in a memory leak.
Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
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dev_addr is the machine address of the page.
The new parameter can be used by the ARM and ARM64 implementations of
xen_dma_map_page to find out if the page is a local page (pfn == mfn) or
a foreign page (pfn != mfn).
dev_addr could be retrieved again from the physical address, using
pfn_to_mfn, but it requires accessing an rbtree. Since we already have
the dev_addr in our hands at the call site there is no need to get the
mfn twice.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
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Use is_device_dma_coherent to check whether we need to issue cache
maintenance operations rather than checking on the existence of a
particular dma_ops function for the device.
This is correct because coherent devices don't need cache maintenance
operations - arm_coherent_dma_ops does not set the hooks that we
were previously checking for existance.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
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Introduce a boolean flag and an accessor function to check whether a
device is dma_coherent. Set the flag from set_arch_dma_coherent_ops.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Russell King <linux@arm.linux.org.uk>
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Remove code duplication in mm32.c by calling the native dma_ops if the
page is a local page (not a foreign page). Use a simple pfn_valid(pfn)
check to figure out if the page is local, exploiting the fact that dom0
is mapped 1:1, therefore pfn_valid always returns false when called on a
foreign mfn.
Suggested-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
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Dom0 is not actually capable of issuing outer_inv_range or
outer_clean_range calls.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
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The feature has been removed from Xen. Also Linux cannot use it on ARM32
without CONFIG_ARM_LPAE.
Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
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Instead of using the dev_ops ->stop|start() callbacks for genpd, let's
convert to use genpd's flag field and set it to GENPD_FLAG_PM_CLK.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Instead of using the dev_ops ->stop|start() callbacks for genpd, let's
convert to use genpd's flag field and set it to GENPD_FLAG_PM_CLK.
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Two files that get included when building the multi_v7_defconfig target
fail to build when selecting THUMB2_KERNEL for this configuration.
In both cases, we can just build the file as ARM code, as none of its
symbols are exported to modules, so there are no interworking concerns.
In the iwmmxt.S case, add ENDPROC() declarations so the symbols are
annotated as functions, resulting in the linker to emit the appropriate
mode switches.
Acked-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This patch just reorders functions/data inside sa1100 irq driver to be
able to merge functions that have the same code after converting to
irqdomains and hwirq. No real code changes.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Switch internally to using hardware irq numbers (hwirq). In case of GPIO
interrupts, hwirq is equal to GPIO number. In case of system interrupts,
hwirq is equal to interrupt number in the interrupt controller.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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IRQ_GPIO11_27 is a shared IRQ receiving IRQs from "high" GPIOs. It is
still handled by sa1100_normal_chip, so there is no point to exclude it
from "normal" irq domain. The IRQF_VALID flag set by domain map function
will be cleared by irq_set_chained_handler() internally.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Use irqdomains to manage both system and GPIO interrupts on SA1100 SoC
family. This opens path to further cleanup and unification in sa1100 IRQ
drivers.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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As IRQ0 should not be used (especially in when using irq domains), shift all
virtual IRQ numbers by one.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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In preparation for further changes replace direct IRQ numbers with
pre-defined names. This imposes no real code changes.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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As mach-sa1100 was converted to MULTI_IRQ_HANDLER, drop now-unused
entry-macro.S file.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Add sa1100_handle_irq implementating handle_irq for sa1100 platform.
It is more or less a translation of old assembly code from assembler to
plain C. Also install this irq handler from sa1100_init_irq().
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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If the kernel is running in hypervisor mode or monitor mode we'll
print UK6_32 or UK10_32 if we call into __show_regs(). Let's
update these strings to indicate the new modes that didn't exist
when this code was written.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Introduce helper functions for pte_mk* functions and it would be
used to change individual bits in ptes at times.
Signed-off-by: Jungseung Lee <js07.lee@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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set_memory_* functions have same implementation
except memory attribute.
This patch makes to use common function for these, and pull out
the functions into arch/arm/mm/pageattr.c like arm64 did.
It will reduce code size and enhance the readability.
Signed-off-by: Jungseung Lee <js07.lee@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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