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add suspend/resume functionality for pxa910
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Raul Xiong <xjian@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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Add 88pm860x into ttc_dkb, and it will impact the suspend/resume
of pxa910
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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For the SOC chips using tauros2 cache, will need disable
and resume tauros2 cache for SOC suspend/resume.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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When enable ARCH_SUSPEND_POSSIBLE, it need defintion of
cpu_mohawk_do_suspend and cpu_mohawk_do_resume
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <<haojian.zhuang@gmail.com>
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MMP2 can enter system sleep level during suspend.
It can be waken up by PMIC interrupt, RTC/ALARM.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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Move APBC_REG, APMU_REG and CIU_REG definition to addr-map.h
driver only need include addr-map.h to get access of the
registers.
Signed-off-by: Chao Xie <chao.xie@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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Commit 4e8ee7de227e3ab9a72040b448ad728c5428a042 (ARM: SMP: use
idmap_pgd for mapping MMU enable during secondary booting)
switched secondary boot to use idmap_pgd, which is initialized
during early_initcall, instead of a page table initialized during
__cpu_up. This causes idmap_pgd to contain the static mappings
but be missing all dynamic mappings.
If a console is registered that creates a dynamic mapping, the
printk in secondary_start_kernel will trigger a data abort on
the missing mapping before the exception handlers have been
initialized, leading to a hang. Initial boot is not affected
because no consoles have been registered, and resume is usually
not affected because the offending console is suspended.
Onlining a cpu with hotplug triggers the problem.
A workaround is to the printk in secondary_start_kernel until
after the page tables have been switched back to init_mm.
Cc: <stable@vger.kernel.org>
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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At the moment, read_persistent_clock is implemented at the
platform level, which makes it impossible to compile these
platforms in a single kernel.
Implement these two functions at the architecture level, and
provide a thin registration interface for both read_boot_clock
and read_persistent_clock. The two affected platforms (OMAP and
Tegra) are converted at the same time.
Reported-by: Jeff Ohlstein <johlstei@codeaurora.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The machine endianness has no direct correspondence to the syscall ABI,
so use only AUDIT_ARCH_ARM when identifying the ABI to the audit tools
in userspace.
Cc: stable@vger.kernel.org
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The ARM audit code incorrectly uses the saved application ip register
value to infer syscall entry or exit. Additionally, the saved value will
be clobbered if the current task is not being traced, which can lead to
libc corruption if ip is live (apparently glibc uses it for the TLS
pointer).
This patch fixes the syscall tracing code so that the why parameter is
used to infer the syscall direction and the saved ip is only updated if
we know that we will be signalling a ptrace trap.
Reported-and-Tested-by: Jon Masters <jcm@jonmasters.org>
Cc: stable@vger.kernel.org
Cc: Eric Paris <eparis@redhat.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The inline assembly in kernel_execve() uses r8 and r9. Since this
code sequence does not return, it usually doesn't matter if the
register clobber list is accurate. However, I saw a case where a
particular version of gcc used r8 as an intermediate for the value
eventually passed to r9. Because r8 is used in the inline
assembly, and not mentioned in the clobber list, r9 was set
to an incorrect value.
This resulted in a kernel panic on execution of the first user-space
program in the system. r9 is used in ret_to_user as the thread_info
pointer, and if it's wrong, bad things happen.
Cc: <stable@vger.kernel.org>
Signed-off-by: Tim Bird <tim.bird@am.sony.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Now that all archs except ia64 are converted, replace the config and
let the ia64 select CONFIG_ARCH_INIT_TASK
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: http://lkml.kernel.org/r/20120503085035.867948914@linutronix.de
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Same code. Use the generic version. The special Makefile treatment is
pointless anyway as init_task.o contains only data which is handled by
the linker script. So no point on being treated like head text.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Russell King <linux@arm.linux.org.uk>
Link: http://lkml.kernel.org/r/20120503085034.221811388@linutronix.de
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Add the two standard UART signals (GPIO46_STUART_RXD, GPIO47_STUART_TXD) to the
initial mfp config table hx4700_pin_config[] passed to pxa2xx_mfp_config().
Although pxa2xx_transceiver_mode() can subsequently set these two signals via
its own call to pxa2xx_mfp_config(), pxa2xx_transceiver_mode() is only present
when CONFIG_PXA_FICP=y. Hence this patch provides a default mfp config.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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Append mmp2 and pxa910 dts files. Update PXA168 dts files for irq,
timer, gpio components.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Suppot gpio/irq/timer in mmp-dt driver. Support PXA910 also in mmp-dt
driver.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Parse timer from DTS file. Avoid to use hardcoding marco for register.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Merge irq-pxa168 and irq-mmp2. And support device tree also.
Since CONFIG_SPARSE_IRQ is enabled in arch-mmp, base irq starts from
NR_IRQS_LEGACY.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Append CONFIG_MACH_MMP2_DT.
CONFIG_MACH_MMP_DT is used to ARMv5 DT support. CONFIG_MACH_MMP2_DT
is used to ARMv7 DT support. These two machine support can't be
selected at the same time.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Since irq_domain_add_simple() is removed, remove it in mmp-dt.c also.
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
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Cc: Ryan Mallon <rmallon@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com>
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Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
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This patch removes support for ARMv3 CPUs, which haven't worked properly
for quite some time (see the FIXME comment in arch/arm/mm/fault.c). The
only V3 parts left is the cache model for ARMv3, which is needed for some
odd reason by ARM740T CPUs, and being able to build with -march=armv3,
which is required for the RiscPC platform due to its bus structure.
Acked-by: Will Deacon <will.deacon@arm.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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At init time, check the powerdomains lookup is successful otherwise
exit the cpuidle driver init function with -ENODEV like what is done for the
omap3 cpuidle driver.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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This reverts commit 46f8c3c7e95c0d30d95911e7975ddc4f93b3e237.
The commit above swapped the DSI1_PPID and DSI2_PPID register fields in
CONTROL_DSIPHY to be in sync with the newer public OMAP TRMs(after version V).
With this commit, contention errors were reported on DSI lanes some OMAP4 SDPs.
After probing the DSI lanes on OMAP4 SDP, it was seen that setting bits in the
DSI2_PPID field was pulling up voltage on DSI1 lanes, and DSI1_PPID field was
pulling up voltage on DSI2 lanes.
This proves that the current version of OMAP4 TRM is incorrect, swap the
position of register fields according to the older TRM versions as they were
correct.
Cc: stable@vger.kernel.org # v3.2+
Acked-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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Commit 384ebe1c2849160d040df3e68634ec506f13d9ff, "gpio/omap: Add DT
support to GPIO driver", introduced dynamic IRQ numbering of OMAP GPIO
interrupts, breaking all IH_GPIO_BASE based IRQ number calculations.
This issue was corrected in the OMAP GPIO driver and the related header
file with commit 25db711df3258d125dc1209800317e5c0ef3c870, "gpio/omap:
Fix IRQ handling for SPARSE_IRQ".
However, the Amstrad Delta FIQ handler, which replaces the gpio-omap
driver in serving GPIO interrupts on this board, still uses that
outdated method. Fix it.
Signed-off-by: Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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There is just no point mapping up to 512MB for a serial port.
Using a single 1MB entry is way sufficient for all users.
This will create less interference for the following debugging patch.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The MMCI and PL022 SPI drivers sure need their platform data to
work on the Versatile as well. (This does not fix the auxdata for
MMCI instance mmc1 on the Versatile PB though.)
Cc: Niklas Hernaeus <niklas.hernaeus@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This does two things to the FPGA IRQ controller in the versatile
family:
- Convert to MULTI_IRQ_HANDLER so we can drop the entry macro
from the Integrator. The C IRQ handler was inspired from
arch/arm/common/vic.c, recent bug discovered in this handler was
accounted for.
- Convert to using IRQ domains so we can get rid of the NO_IRQ
mess and proceed with device tree and such stuff.
As part of the exercise, bump all the low IRQ numbers on the
Integrator PIC to start from 1 rather than 0, since IRQ 0 is
now NO_IRQ. The Linux IRQ numbers are thus entirely decoupled
from the hardware IRQ numbers in this controller.
I was unable to split this patch. The main reason is the half-done
conversion to device tree in Versatile.
Tested on Integrator/AP and Integrator/CP.
Cc: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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This code removes platform dependency from s3c-hsotg driver.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into devel-stable
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git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux into devel-stable
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This adds a driver for the ST-Ericsson ux500 hash hardware
module. The driver implements support for SHA-1 and SHA-2.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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This adds a driver for the ST-Ericsson ux500 crypto hardware
module. It supports AES, DES and 3DES, the driver implements
support for AES-ECB,CBC and CTR.
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andreas Westin <andreas.westin@stericsson.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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* Add node for the audio codec
* Enable Tegra's I2S1 controller and DAS
* Add node for top-level sound complex
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This is the micro-SD card slot.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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According to the device's datasheet, it can support an interrupt too.
However, the existing board file doesn't specify an interrupt, and I
don't have the schematics, so I can't add an interrupts property. The
current Linux driver doesn't support anyway.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add the known i2c devices on seaboard to the i2c table.
Also rename the temperature sensor device node, and mark it as a nct1008
instead of an adt7461 (which it is -- the chips are compatible though).
Signed-off-by: Olof Johansson <olof@lixom.net>
[swarren: Removed isl29018 from patch; it's already there now. Fixed
interrupts properties now that Tegra GPIO is an interrupt controller.
Moved smart-battery to the correct I2C bus.]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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The I2C2 controller can be routed to either pingroup DDC or PTA. Seaboard
actually uses this as an I2C bus mux, and devices are connected to both
pingroups. This change statically assigns the I2C2 controller to pingroup
PTA, so that on-board devices can be accessed. The DDC pingroup is used
for EDID/DDC accesses which are not yet required, given the absence of
any Tegra graphics support. I2C muxing will be supported later.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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This I2C bus is used for EDID/DDC reads and other "slow" I2C devices.
This requires a 100KHz SCL (clock) rate.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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Add the device info for ALS and proximity sensor for tegra
boards cardhu, ventana and seaboard.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
[swarren: s/PZ02/PZ2/ in .dts files, s/seabridge/seaboard/ in commit
description]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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struct powerdomain varialbes are all file local, make them static.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
[khilman@ti.com: update changelog, drop error check in fast path]
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Reduce the scope of the omap3_idle_data to the file as it is only used
in cpuidle34xx.c.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Simplify the indentation by removing the useless 'else' statement.
Remove the first loop for the 'idx' search as we have it already
with the 'index' passed as parameter.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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We are storing the 'omap3_idle_data' in the private data field
of the cpuidle device. As we are using this variable only in this file,
that does not really make sense. Let's use the global variable directly.
As the table is initialized statically, let's remove the initialization at
startup too.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Initialize the omap3_idle_data array at compile time, that will allow
to remove the initialization at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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We do not longer need the ''cpuidle_params_table' array as
we defined the states in the driver and we checked they are
all valid.
We also remove the structure definition as it is no longer used.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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With the previous changes all the states are valid, except the last
state which is now handled at runtime by next_valid_state() based on
the errata flags.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
[khilman@ti.com: minor changelog rework]
Signed-off-by: Kevin Hilman <khilman@ti.com>
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