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The errata check is done in the next_valid_state function, no need to check
that in the omap3_idle_init function.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Use the new cpuidle API and define in the driver the states.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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As suggested, this table is an optimized version for rx51 and we
remove it in order to consolidate the cpuidle code between omap3
and omap4, we remove this specific data definition which is used
to override the default omap3 latencies but at the cost of extra
code and complexity.
In order to not lose the values which probably took time to be
measured, the table is converted into a comment with an array
description.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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We initialized it at compile time, no need to do that at boot
time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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We are storing the 'omap4_idle_data' in the private data field
of the cpuidle device. As we are using this variable only in this file,
that does not really make sense. Let's use the global variable directly.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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We initialize the omap4_idle_data variable at compile time allowing us
to remove in the next patch the initialization done at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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Add the static declaration for the omap4_idle_data variable because its scope
is in the file only.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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We do not longer need this table as we defined the values
in the driver states.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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The cpuidle API allows to declare statically the states in the driver
structure. Let's use it.
We do no longer need the fill_cstate function called at runtime and
by the way adding more instructions at boot time.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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The 'valid' field is never used in the code, let's remove it.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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This allows platforms to set up things that need to be done at
late_initcall time.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: Robert Lee <rob.lee@linaro.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
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The ehci-mv can support PXA168, PXA910 and PXA920, use this driver to
support pxa168 SPH usb.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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There is an U2O OTG controller on ttc dkb, this patch is going to enable
it.
At this moment, it can only works in device mode, because when works in
host mode, it needs to supply vbus, but we have no vbus driver added
at this moment. Once the vbus driver is added, I'll prepar another
patch to enable the switch function.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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Add usb device support for Marvell PXA910.
Actually PXA920 will use the same device.
Signed-off-by: Neil Zhang <zhangwm@marvell.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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This patch is part of a set which adds PCMCIA/CF support for the hx4700.
This patch modifies asic3_gpio_config[] as follows:
1. Remove ASIC3_GPIOC4_CF_nCD, whose purpose is unknown.
2. Add ASIC3_GPIOD4_CF_nCD, the actual CF card detect GPIO.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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This patch enables the ASIC3 GPIO (12) as a wakeup source:
1. Set the WAKEUP_ON_EDGE_RISE MFP config bits for GPIO12 in
hx4700_pin_config[].
2. Call gpio_set_wake() for GPIO12.
With GPIO12 thus enabled, the mfd/asic3 driver can enable its own GPIOs
as wakeup sources by implementing a irq_set_wake() handler.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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The asic3 driver now sets the DS1WM clock_rate from the newly added
asic3_platform_data clock_rate field.
This patch initializes the asic3_platform_data clock_rate field on the
hx4700 platform.
Signed-off-by: Paul Parsons <lost.distance@yahoo.com>
Cc: Philipp Zabel <philipp.zabel@gmail.com>
Signed-off-by: Haojian Zhuang <haojian.zhuang@gmail.com>
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Tegra doesn't yet support system sleep. Explicitly disable support
for this feature in Kconfig.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/newsoc
From: Linus Walleij <linus.walleij@linaro.org>:
Core support for the U9540 after finalized review
* 'ux500-u9540-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson: (2 commits)
ARM: ux500: ioremap differences for DB9540
ARM: ux500: core U9540 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/cleanup
Linus Walleij <linus.walleij@linaro.org> writes:
Delete U5500 after obsoletion of this ASIC, including two patches to the MFD
subsystem that have been ACK:ed by Samuel Ortiz.
* 'ux500-del-u5500-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
mfd/ab5500: delete AB5500 support
mfd/db5500-prcmu: delete DB5500 PRCMU support
ARM: ux500: delete U5500 support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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next/cleanup
From: Sascha Hauer <s.hauer@pengutronix.de>
ARM: i.MX cleanups for 3.5
* tag 'imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6: (5 commits)
ARM: mx53: fix pad definitions for MX53_PAD_EIM_D28__I2C1_SDA and MX53_PAD_GPIO_8__CAN1_RXCAN
ARM: imx/eukrea_mbimx27-baseboard: fix typo in error message
ARM: i.MX51 iomux: add missed definitions for SION-bit and mode for some pads
arm: imx: add missing select IMX_HAVE_PLATFORM for MACH_MX35_3DS in Kconfig
arm: imx: make various struct sys_timer static
Includes an update to 3.4-rc4
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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The cacheflush syscall can fail for two reasons:
(1) The arguments are invalid (nonsensical address range or no VMA)
(2) The region generates a translation fault on a VIPT or PIPT cache
This patch allows do_cache_op to return an error code to userspace in
the case of the above. The various coherent_user_range implementations
are modified to return 0 in the case of VIVT caches or -EFAULT in the
case of an abort on v6/v7 cores.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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We can't be holding the mmap_sem while calling flush_cache_user_range
because the flush can fault. If we fault on a user address, the
page fault handler will try to take mmap_sem again. Since both places
acquire the read lock, most of the time it succeeds. However, if another
thread tries to acquire the write lock on the mmap_sem (e.g. mmap) in
between the call to flush_cache_user_range and the fault, the down_read
in do_page_fault will deadlock.
[will: removed drop of vma parameter as already queued by rmk (7365/1)]
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Dima Zavin <dima@android.com>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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This also changes the DMA clkdev lookup to use the imx-dma driver name
and "ahb" as connection ID to request the hclk dma clock.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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This gate consists of two bits:
0b00: clk disabled
0b01: clk enabled in run mode and disabled in sleep mode
0b11: clk enabled
Currently only disabled and enabled are supported. As it's unlikely
that we find something like this in another SoC create a i.MX specific
clk helper for this.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This PLL is found on i.MX6 SoCs
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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This PLL is found on i.MX51 and i.MX53
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The pllv1 is found on i.MX1, i.M25, i.MX27, i.MX31 and i.MX35.
Currently only reading the rate is supported.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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MX53_PAD_GPIO_8__CAN1_RXCAN
MX53_PAD_EIM_D28__I2C1_SDA uses an undefined PAD_CTRL_I2C
MX53_PAD_GPIO_8__CAN1_RXCAN has an incorrect input_select value
Signed-off-by: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This patch adds the cpuidle driver for the ux500 SoC.
The boards saves 12mA with these states. It is based on the latest
cpuidle consolidation from Robert Lee.
The cpu can go to retention only if the other core is in WFI.
If the other cpu is in WFI and we decoupled the gic from the cores,
then we have the guarantee, it won't be wake up.
It is up to the prcmu firmware to recouple the gic automatically
after the power state mode is selected.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Vincent Guittot <vincent.guittot@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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In dbx500 based devices the PRCMU Timer 4 is used as a clocksource
and sched_clock. Here we fetch all necessary addressing information
required for correct PRCMU initialisation from the Device Tree
instead of using hard-coded values.
CC: Samuel Ortiz <sameo@linux.intel.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Now the SCMC911x is correctly enabled in Device Tree, there is no need
to continue registering it from platform code. In fact, if we continue
doing so, the system will throw an error on boot.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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To aid in sequential one-by-one Device Tree enablement, we split
cpu-db8500's platform_devs structure into normal platform boot, where
we leave all devices to be added in tact and a DT version where we
will remove the devices as they are DT enabled.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This patch prevents i2c devices which are not present on the Snowball
low-cost development board from being registered. Devices such as;
tc3589x, bu1780 and lp5521 are present on other supported boards,
but are not located on Snowball.
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This platform has been obsoleted and was only available inside of
ST-Ericsson, no users of this code are left in the world. This
deletes the core U5500 support entirely in the same manner as the
obsoleted U8500 silicon was previously deleted.
The cpu_is_u5500() macros that can read out the CPU ID is left
until the next kernel cycle, this makes it possible to merge
deletion of dependent drivers without breakage.
This also has the upside of removing the mailbox driver which was
our only driver that was outside the drivers/* hiearchy, now the
machine directory only handles machines and nothing else.
Cc: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Cc: Rabin Vincent <rabin.vincent@stericsson.com>
Cc: Jonas Aberg <jonas.aberg@stericsson.com>
Cc: Per Forlin <per.forlin@stericsson.com>
Cc: Ulf Hansson <ulf.hansson@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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The DB9540 ASIC has bigger PRCMU and PRCMU TCDM memories,
so create a separate mapping table for these.
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This adds support for the U9540 variant of the U8500 series. This
is an application processor without internal modem. This is the
most basic part with ASIC ID, CPU-related fixes, IRQ list, register
ranges, timer, UART, and L2 cache setup. This is based on a patch
by Michel Jaouen which was rewritten to fit with the latest 3.3
kernel.
ChangeLog v1->v2: deleted the irqs-db9540.h file since we expect to
migrate to using Device Tree for getting the IRQs to devices.
ChangeLog v2->v3: introduced a fixed virtual offset for the ROM
as suggested by Arnd Bergmann.
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Sebastien Pasdeloup <sebastien.pasdeloup-nonst@stericsson.com>
Signed-off-by: Michel Jaouen <michel.jaouen@stericsson.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Pull ARM fixes from Russell King.
* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
ARM: 7406/1: hotplug: copy the affinity mask when forcefully migrating IRQs
ARM: 7405/1: kexec: call platform_cpu_kill on the killer rather than the victim
ARM: 7403/1: tls: remove covert channel via TPIDRURW
ARM: 7401/1: mm: Fix section mismatches
ARM: OMAP: fix DMA vs memory ordering
ARM: 7390/1: dts: versatile-pb/ab fix MMC IRQs
ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handler
ARM: 7399/1: vfp: move user vfp state save/restore code out of signal.c
ARM: 7398/1: l2x0: only write to debug registers on PL310
ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310
ARM: 7396/1: errata: only handle ARM erratum #326103 on affected cores
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git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson into next/gpio
Linus Walleij <linus.walleij@linaro.org> writes:
This is a pull request for the GPIO and pin control stuff
accumulated in the ST-Ericsson tree. Here we have:
- Improvements and fixes and a custom pin config API from
Rabin Vincent
- Device Tree bindings from Lee Jones
- Some accumulated patches by yours truly.
- A MSP platform data init patch from Ola Lilja that is merged
here due to dependency on pin config work. It is to be
used with work being worked on in parallel in the ALSA
SoC subsystem.
If you wonder about the custom pin config implementation this
is to be used as a transition base as I am rewriting the
driver to use pinctrl. Expect a final pull request on top
of this one that will move the ux500 over to pinctrl.
* 'ux500-gpio-pins-for-arm-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Add support for MSP I2S-devices
drivers/gpio: gpio-nomadik: Add support for irqdomains
drivers/gpio: gpio-nomadik: Apply Device Tree bindings
ARM: ux500: update pin handling
ARM: ux500: implement pin API
ARM: ux500: remove a bunch of internal pull-ups
plat-nomadik: new sleep mode pincfg macros
gpio/nomadik: use ioremap() instead of static mappings
gpio/nomadik: support low EMI mode
gpio/nomadik: fix spurious interrupts with SKE
gpio/nomadik: cache [rf]w?imsc
gpio/nomadik: don't set SLPM to 1 for non-wakeup pins
Also includes an update to v3.4-rc4.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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keyboard data passed via DT is in wrong format. Fix it.
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into pm-regulator
Conflicts:
arch/arm/mach-omap2/twl-common.c
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The AT91RM9200 Ethernet controller still has a fixed IO mapping.
So:
* Remove the fixed IO mapping and AT91_VA_BASE_EMAC definition.
* Pass the physical base-address via platform-resources to the driver.
* Convert at91_ether.c driver to perform an ioremap().
* Ethernet PHY detection needs to be performed during the driver
initialization process, it can no longer be done first.
Signed-off-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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