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2012-04-25ARM: tegra: Add pllc clock init tableAllen Martin
pll_c will be used as a clock source. Fill in tegra_pll_c_freq_table[] so that it's possible to explicitly initialize the PLL. NVIDIA's downstream nv-3.1 kernel and the ChromeOS kernel have different pll_c tables. nv-3.1 contains entries for 522MHz and 598MHz output, whereas the ChromeOS kernel contains entries for 600MHz output. I chose to upstream the ChromeOS values for now, since the 600MHz rate appears to match the default rate of this PLL when the HW boots, and it's not clear to me why 522 or 598MHz are more useful. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Olof Johansson <olofj@chromium.org> Signed-off-by: Stephen Warren <swarren@nvidia.com> [swarren: wrote commit description]
2012-04-25ARM: dt: tegra cardhu: basic audio supportStephen Warren
Add WM8903 codec nodes, and top-level sound complex node for basic analog audio over headset jack and internal speakers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
2012-04-25ARM: dt: tegra30.dtsi: Add audio-related nodesStephen Warren
Add nodes for the Tegra30 AHUB and I2S controllers. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
2012-04-25ARM: tegra: add AUXDATA required for audioStephen Warren
Both the Tegra30 I2S and AHUB modules used clocks, and hence currently require AUXDATA in order to get specific device names so that clock lookups work. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
2012-04-25ARM: tegra: set up audio clocks for tegra30 dtStephen Warren
Set up the audio clock tree for Tegra30 in an equivalent fashion to the existing setup for Tegra20. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
2012-04-25ARM: tegra: Initialize pll_p_out1Peter De Schrijver
pll_a uses pll_p_out1 as its parent. Therefore this clock needs to be initialized to make sure pll_a has a known input clock. Failure to do so will cause the system to crash early in the bootup. Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
2012-04-25ARM: tegra: provide clock aliases for AHUB configlinkStephen Warren
The Tegra30 AHUB driver must call tegra_periph_reset_deassert() for all devices on the AHUB's configlink bus. The AHUB driver must be able to call clk_get_sys() to retrieve the clock parameter for this function. Add the necessary clock aliases to allow this. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Olof Johansson <olof@lixom.net>
2012-04-25ARM: 7374/1: add TRACEHOOK supportWade Farnsworth
Add calls to tracehook_report_syscall_{entry,exit} and tracehook_signal_handler Signed-off-by: Steven Walter <stevenrwalter@gmail.com> Signed-off-by: Wade Farnsworth <wade_farnsworth@mentor.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-25ARM: 7373/1: add support for the generic syscall.h interfaceWade Farnsworth
Supplying the asm-generic/syscall.h interface is a pre-requisite for HAVE_ARCH_TRACEHOOK Signed-off-by: Steven Walter <stevenrwalter@gmail.com> Signed-off-by: Wade Farnsworth <wade_farnsworth@mentor.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-25ARM: 7385/1: ThumbEE: Use cpuid macros to read ID_PFR0 for ThumbEEJonathan Austin
The ThumbEE probe code uses inline assembly to read ID_PFR0 in order to detect whether ThumbEE is implemented by the processor. This patch replaces the inline asm with the read_cpuid_ext macro. Reviewed-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Jonathan Austin <jonathan.austin@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-25Merge branch 'msm-fix' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into fixes * 'msm-fix' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm: ARM: msm: Fix gic irqdomain support
2012-04-25Merge tag 'imx-features-board-20120411-2' of ↵Olof Johansson
git://git.pengutronix.de/git/imx/linux-2.6 into next/boards * tag 'imx-features-board-20120411-2' of git://git.pengutronix.de/git/imx/linux-2.6: ARM i.MX: Visstrim_M10: Add board version detection. ARM: imx_v4_v5_defconfig: enable adc and touch driver of mc13783 ARM: i.MX: i.MX35-PDK: Add regulator support
2012-04-25Merge tag 'arm-imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6 ↵Olof Johansson
into next/cleanup ARM: i.MX: misc board cleanups * tag 'arm-imx-cleanup' of git://git.pengutronix.de/git/imx/linux-2.6: ARM: i.MX: efikamx: match machine descriptions with legacy ARM: imx/mx21ads: remove unneeded cast
2012-04-25ARM i.MX: prepare for common clock frameworkSascha Hauer
- Add necessary #ifdefs for CONFIG_COMMON_CLOCK - Add a global spinlock to protect the CCM registers Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-04-25ARM i.MX3: Make ccm base address a variableSascha Hauer
Instead of having a cpu_is_* in each ccm register access it is more efficient to make it a variable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-04-25ARM i.MX timer: request correct clockSascha Hauer
We used to pass the timer clock directly to mxc_timer_init. We should instead request the correct clock. This is an intermediate step: For now we request the clock in the timer code when NULL is passed as clock. Also, the gpt on some i.MX have an additional ipg clock which can be gated. Request and enable this. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-04-25ARM i.MX5: prepare gpc_dvfs_clkSascha Hauer
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
2012-04-25ARM: 7395/1: VIC: use the domain mapping function to assign handlersLinus Walleij
This removes the internal functions for assigning IRQ handlers to each interrupt in favor of using the internal map iterator in the irq domain code. Cc: Will Deacon <will.deacon@arm.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-25ARM: 7394/1: VIC: respect list of valid sourcesLinus Walleij
The current IRQ domain implementation in the VIC allocates 32 interrupts for each VIC instance no matter whether the controller actually use all the IRQs or not. Alter this so we only allocate a domain up until the last IRQ marked valid. Cc: Will Deacon <will.deacon@arm.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-25ARM: Remove unnecessary selection of TICK_ONESHOTRussell King
In 3872c48b (tick: Document TICK_ONESHOT config option) Thomas describes the circumstances under which TICK_ONESHOT should be selected. This is an internal time keeping configuration symbol which should not be selected by platform or arch code. So remove our select statements for it. This kills these warnings in OMAP builds: kernel/time/tick-sched.c:47: warning: 'tick_do_update_jiffies64' defined but not used kernel/time/tick-sched.c:89: warning: 'tick_init_jiffy_update' defined but not used Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-25ARM: ux500: Configure the PRCMU Timer for db8500 based devices in DTLee Jones
This patch adds the information required for successful registration of the PRCMU timer 4 (clocksource) driver to the db8500 Device Tree include file. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-25ARM: ux500: Enable the SMSC9115 on Snowball via Device TreeLee Jones
Here we split the description of the external-bus@50000000 over two description files. In the more generic db8500 description file we only specify the external-bus. Normally this would be used to communicate with a NOR-flash device. On the Snowball however, the SMSC9115 Ethernet chip occupies it. In the Snowball board specific description file is where we actually specify that it is in fact the Ethernet device which lives here. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-25dma/amba-pl08x: add support for the Nomadik variantLinus Walleij
The Nomadik PL080 variant has some extra protection bits that may be set, so we need to check these bits to see if the channels are actually available for the DMAengine to use. Cc: Russell King <linux@arm.linux.org.uk> Cc: Alim Akhtar <alim.akhtar@gmail.com> Cc: Alessandro Rubini <rubini@gnudd.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
2012-04-24ARM: S3C24XX: Add HSSPI setup callback for s3c64xx-spi driverHeiko Stuebner
This lets the s3c64xx-spi driver know the specifics of the controller- variant and also setups the gpios and the misccr bit. This setup is valid for all S3C24XX SoCs containing a HSSPI controller (i.e. S3C2416/2450 and S3C2443) Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: S3C24XX: Add clock-lookup entries required by s3c64xx-spiHeiko Stuebner
Currently usable are busclk0 and busclk2. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: S3C24XX: Add map entries needed by the s3c64xx-spi devicesHeiko Stuebner
The S3C_PA_SPIx constants are only used by the s3c64xx-spi driver and don't conflict with the older SoCs as they don't support hsspi. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: S3C24XX: claim spi channels for hsspi in dma-s3c2443Heiko Stuebner
SoCs starting with the S3C2443 contain SPI controllers compatible with the spi-s3c64xx driver and therefore need separate dma channels for rx and tx. This patch introduces dma channel declarations for these and changes the dma-s3c2443.c accordingly. None of the older SoCs use the spi-dma at all. Most boards bitbang their spi use and the spi-s3c24xx driver also does not use the dma system. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: S3C24XX: Add forgotten clock lookup table to S3C2443Heiko Stuebner
When the hsmmc clock lookup was changed to be lookup tables based, it seems the S3C2443 was forgotten. As subsequent patches will want to add more lookups to it, this patch adds the base table with the missing hsmmc lookup. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: SAMSUNG: add missing MMC_CAP2_BROKEN_VOLTAGE capabilityMarek Szyprowski
Commit 6e8201f57c935 "mmc: core: add the capability for broken voltage" introduced a new quirk to indicate that MMC core should ignore voltage change errors reported by the regulators core. This is required to get SDHCI working on UniversalC210, NURI and GONI boards again after commit ceb6143b2df81c ("mmc: sdhci: fix vmmc handling"). Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: EXYNOS: Fix compilation error when CONFIG_OF is not definedTushar Behera
Fixed following compile time error. arch/arm/mach-exynos/common.c: In function 'exynos5_init_irq': arch/arm/mach-exynos/common.c:539:2: error: implicit declaration of function 'of_irq_init' arch/arm/mach-exynos/common.c:539:14: error: 'exynos4_dt_irq_match' undeclared (first use in this function) arch/arm/mach-exynos/common.c:539:14: note: each undeclared identifier is reported only once for each function it appears in Cc: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: EXYNOS: Fix resource on dev-dwmci.cKukjin Kim
Should be EXYNOS4_IRQ_DWMCI instead of IRQ_DWMCI, and use DEFINE_RES_{MEM,IRQ}. Reported-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: S3C24XX: Fix build warning for S3C2410_PMKukjin Kim
warning: (CPU_S3C2440 && CPU_S3C2442) selects S3C2410_PM which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410) warning: (CPU_S3C2440 && CPU_S3C2442) selects S3C2410_PM which has unmet direct dependencies (ARCH_S3C24XX && CPU_S3C2410) Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: mini2440_defconfig: Fix build errorArnd Bergmann
This is needed to fix mini2440_defconfig after the platform files have been moved around. arm-none-linux-gnueabi-ld: no machine record defined arm-none-linux-gnueabi-ld: no machine record defined arm-none-linux-gnueabi-ld: no machine record defined make: *** [.tmp_vmlinux1] Error 1 Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
2012-04-24ARM: ux500: Add support for MSP I2S-devicesOla Lilja
Create devices for the MSP-blocks (MSP0, MSP1, MSP2 and MSP3) and associate it with the correct clocks in the clock-framework. Signed-off-by: Ola Lilja <ola.o.lilja@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-24drivers/gpio: gpio-nomadik: Add support for irqdomainsLee Jones
Add irq domain support to the gpio-nomadik GPIO driver. This enables its users to support dynamic IRQ assignment, which is requried by Device Tree. Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-24drivers/gpio: gpio-nomadik: Apply Device Tree bindingsLee Jones
This creates Device Tree bindings for the Nomadik GPIO driver. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-24ARM: ux500: update pin handlingLinus Walleij
This updates the Ux500 pin handling to take much more care when applying pin settings for different platforms and peripherals. This is an accumulation of a longer history of updates to the MOP500 family pin file. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-24ARM: ux500: implement pin APIRabin Vincent
Implement an API to allow a list of pincfgs to be remuxed to active and sleep modes, for power saving. This is not exported on purpose, because it is not to be called by drivers directly. Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-24ARM: ux500: remove a bunch of internal pull-upsLinus Walleij
The default configuration for a number of I2C and keypad pins was to pull-up. However on most reference designs the electronics already contain external pull-ups which means the internal pull-ups will lower the common resistance and increase power consumption on these lines, and in some reference designs the keypad inputs are not used so this will just cause problems. So remove these pull-ups and add them on demand instead if needed. Signed-off-by: Magnus Templing <magnus.templing@stericsson.com> Signed-off-by: Naveen Kumar Gaddipati <naveen.gaddipati@stericsson.com> Reviewed-by: Jonas Aberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-24plat-nomadik: new sleep mode pincfg macrosLinus Walleij
This adds a few sleep mode pin config macros for sleep mode for the Nomadik GPIO/pin controller. Signed-off-by: Rickard Andersson <rickard.andersson@stericsson.com> Signed-off-by: Rikard Olsson <rikard.p.olsson@stericsson.com> Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2012-04-23Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Fix merge between commit 3adadc08cc1e ("net ax25: Reorder ax25_exit to remove races") and commit 0ca7a4c87d27 ("net ax25: Simplify and cleanup the ax25 sysctl handling") The former moved around the sysctl register/unregister calls, the later simply removed them. With help from Stephen Rothwell. Signed-off-by: David S. Miller <davem@davemloft.net>
2012-04-23ARM: msm: Fix gic irqdomain supportDavid Brown
As of commit 75294957be1dee7d22dd7d90bd31334ba410e836 Author: Grant Likely <grant.likely@secretlab.ca> Date: Tue Feb 14 14:06:57 2012 -0700 irq_domain: Remove 'new' irq_domain in favour of the ppc one the ARM gic controller uses proper irq domains. Fix the MSM gic initialization and DT so that it works again. Signed-off-by: David Brown <davidb@codeaurora.org> Acked-by: Grant Likely <grant.likely@secretlab.ca>
2012-04-23Merge 3.4-rc4 into tty-nextGreg Kroah-Hartman
This resolves the merge problem with: drivers/tty/serial/pch_uart.c Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2012-04-23ARM: OMAP: fix DMA vs memory orderingRussell King
Using coherent DMA memory with the OMAP DMA engine results in unpredictable behaviour due to memory ordering issues; as things stand, there is no guarantee that data written to coherent DMA memory will be visible to the DMA hardware. This is because the OMAP dma_write() accessor contains no barriers, necessary on ARMv6 and above. The effect of this can be seen in comments in the OMAP serial driver, which incorrectly talks about cache flushing for the coherent DMA stuff. Rather than adding barriers to the accessors, add it in the DMA support code just before we enable DMA, and just after we disable DMA. This avoids having barriers for every DMA register access. Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-23ARM: 7390/1: dts: versatile-pb/ab fix MMC IRQsLinus Walleij
The MMCI driver will not work without two IRQs since this is not flagged as a single-irq variant. Looking through the complex IRQ definition for the MMCI on the versatile (including an #if 1 statement forcing MMCI IRQ0 to the VIC) this appears to the the correct IRQ number for both models. Cc: Niklas Hernaeus <niklas.hernaeus@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-23ARM: 7400/1: vfp: clear fpscr length and stride bits on entry to sig handlerWill Deacon
The ARM PCS mandates that the length and stride bits of the fpscr are cleared on entry to and return from a public interface. Although signal handlers run asynchronously with respect to the interrupted function, the handler itself expects to run as though it has been called like a normal function. This patch updates the state mirroring the VFP hardware before entry to a signal handler so that it adheres to the PCS. Furthermore, we disable VFP to ensure that we trap on any floating point operation performed by the signal handler and synchronise the hardware appropriately. A check is inserted after the signal handler to avoid redundant flushing if VFP was not used. Reported-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-23ARM: 7399/1: vfp: move user vfp state save/restore code out of signal.cWill Deacon
The user VFP state must be preserved (subject to ucontext modifications) across invocation of a signal handler and this is currently handled by vfp_{preserve,restore}_context in signal.c Since this code requires intimate low-level knowledge of the VFP state, this patch moves it into vfpmodule.c. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-23ARM: 7398/1: l2x0: only write to debug registers on PL310Will Deacon
PL310 errata #588369 and #727915 require writes to the debug registers of the cache controller to work around known problems. Writing these registers on L220 may cause deadlock, so ensure that we only perform this operation when we identify a PL310 at probe time. Cc: stable@vger.kernel.org Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-23ARM: 7397/1: l2x0: only apply workaround for erratum #753970 on PL310Will Deacon
The workaround for PL310 erratum #753970 can lead to deadlock on systems with an L220 cache controller. This patch makes the workaround effective only when the cache controller is identified as a PL310 at probe time. Cc: stable@vger.kernel.org Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-04-23ARM: 7396/1: errata: only handle ARM erratum #326103 on affected coresWill Deacon
Erratum #326103 ("FSR write bit incorrect on a SWP to read-only memory") only affects the ARM 1136 core prior to r1p0. The workaround disassembles the faulting instruction to determine whether it was a read or write access on all v6 cores. An issue has been reported on the ARM 11MPCore whereby loading the faulting instruction may happen in parallel with that page being unmapped, resulting in a deadlock due to the lack of TLB broadcasting in hardware: http://lists.infradead.org/pipermail/linux-arm-kernel/2012-March/091561.html This patch limits the workaround so that it is only used on affected cores, which are known to be UP only. Other v6 cores can rely on the FSR to indicate the access type correctly. Cc: stable@vger.kernel.org Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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