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2014-09-26Merge tag 'at91-soc2' of git://github.com/at91linux/linux-at91 into next/socArnd Bergmann
Pull "Second SoC batch for 3.18" from Nicolas Ferre: - introduction of the new SAMA5D4 SoC and associated Evaluation Kit - low level soc detection and early printk code - taking advantage of this, documentation of all AT91 SoC DT strings Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'at91-soc2' of git://github.com/at91linux/linux-at91: ARM: at91: document Atmel SMART compatibles ARM: at91: add sama5d4 support to sama5_defconfig ARM: at91: dt: add device tree file for SAMA5D4ek board ARM: at91: dt: add device tree file for SAMA5D4 SoC ARM: at91: SAMA5D4 SoC detection code and low level routines ARM: at91: introduce basic SAMA5D4 support clk: at91: add a driver for the h32mx clock
2014-09-26Merge branch 'at91/soc' into next/socArnd Bergmann
The soc2 branch is based on this cleanup: * at91/soc: ARM: at91: Remove the support for the RSI EWS board ARM: at91: remove board file for Acme Systems Fox G20 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-09-26Merge tag 'soc-part2-for-v3.18' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc Pull "part 2 of omap SoC changes" from Tony Lindgren: Few hwmod changes to support upcoming 8250 driver with DMA, start using the SRAM driver for some omaps, and update the defconfig. Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'soc-part2-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: ARM: OMAP4+: Remove static iotable mappings for SRAM ARM: OMAP4+: Move SRAM data to DT ARM: AM335x: Get rid of unused sram init function ARM: omap2plus_defconfig: Enable some display features ARM: omap2plus_defconfig: Enable battery and reset drivers ARM: omap2plus_defconfig: Add support for distros with systemd ARM: omap2plus_defconfig: Add cpufreq to defconfig ARM: omap2plus_defconfig: Shrink with savedefconfig ARM: OMAP3: Use manual idle for UARTs because of DMA errata ARM: OMAP2+: Add hwmod flag for HWMOD_RECONFIG_IO_CHAIN
2014-09-25Merge tag 'bcm63138-v4' of http://github.com/brcm/linux into next/socArnd Bergmann
Merge "ARM: BCM: Broadcom BCM63138 support" from Florian Fainelli: This patchset adds very minimal support for the BCM63138 SoC which is a xDSL SoC using a dual Cortex A9 CPU complex. * tag 'bcm63138-v4' of http://github.com/brcm/linux: MAINTAINERS: add entry for the Broadcom BCM63xx ARM SoCs ARM: BCM63XX: add BCM963138DVT Reference platform DTS ARM: BCM63XX: add BCM63138 minimal Device Tree ARM: BCM63XX: add low-level UART debug support ARM: BCM63XX: add basic support for the Broadcom BCM63138 DSL SoC Conflicts: arch/arm/Kconfig.debug Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-09-25Merge tag 'renesas-soc5-for-v3.18' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Pull "Fifth Round of Renesas ARM Based SoC Soc Updates for v3.18" from Simon Horman: * r8a7740: Fix documentation error copied from elsewhere * r8a7794: Reserve memory for CMA in a manner consistent to other R-Car Gen2 SoCs Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'renesas-soc5-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7740 legacy: Fix copied bug in comment ARM: shmobile: r8a7794: Reserve memory as other R-Car Gen2 SoCs
2014-09-25Merge tag 'pxa3xx-ssp-name' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux into next/soc Pull "fix PXA3xx SSP naming issue" from Haojian Zhuang: It's imported by 972a55b62 ASoC: fix pxa-ssp compiling issue under mach-mmp from v3.5 Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'pxa3xx-ssp-name' of https://git.kernel.org/pub/scm/linux/kernel/git/hzhuang1/linux: ARM: pxa3xx: provide specific platform_devices for all ssp ports ARM: pxa: ssp: provide platform_device_id for PXA3xx
2014-09-25Merge tag 'tegra-for-3.18-soc' of ↵Arnd Bergmann
git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/soc Pull "ARM: tegra: core SoC code changes for 3.18" from Stephen Warren: the primary change here gets its address information from DT rather than iomap.h. This removes one more user of iomap.h, and will help allow the code to move to a location that can be shared between arch/arm and arch/arm64. An unused header file was also removed. Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'tegra-for-3.18-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: remove unused tegra_emc.h ARM: tegra: Initialize flow controller from DT of: Add NVIDIA Tegra flow controller bindings
2014-09-25Merge tag 'zynq-cleanup-for-3.18' of git://git.xilinx.com/linux-xlnx into ↵Arnd Bergmann
next/soc Pull "arm: Xilinx Zynq cleanup patches for v3.18" from Michal Simek: - PM support - Fix L2 useless setting Signed-off-by: Arnd Bergmann <arnd@arndb.de> * tag 'zynq-cleanup-for-3.18' of git://git.xilinx.com/linux-xlnx: ARM: zynq: Remove useless L2C AUX setting ARM: zynq: Rename 'zynq_platform_cpu_die' ARM: zynq: Remove hotplug.c ARM: zynq: Synchronise zynq_cpu_die/kill ARM: zynq: cpuidle: Remove pointless code ARM: zynq: Remove invalidate cache for cpu die ARM: zynq: PM: Enable DDR clock stop ARM: zynq: DT: Add DDRC node Documentation: devicetree: Add binding for Synopsys DDR controller ARM: zynq: PM: Enable A9 internal clock gating feature
2014-09-25ARM: meson: add basic support for MesonX SoCsCarlo Caione
This patch adds the basic machine file for the MesonX SoCs. Only Meson6 is populated. Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-09-25ARM: meson: debug: add debug UART for earlyprintk supportCarlo Caione
Add the UART definitions needed to support earlyprintk for MesonX SoCs on UARTAO. Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2014-09-24Merge tag 'imx-soc-3.18' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/soc Merge "ARM: imx: SoC updates for 3.18" from Shawn Guo: The i.MX SoC updates for 3.18: - Add initial devicetree support for i.MX1 - Support GPT per clock source from OSC for i.MX6 - A couple of parent selection corrections for i.MX6SL clock driver - Support more chip revision for i.MX6 - Convert pr_warning to pr_warn - Add exclusive gate clock support - Add BYPASS support for i.MX6 PLL clocks - Update i.MX6 clock tree for audio use case - A couple of VF610 clock driver updates * tag 'imx-soc-3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (30 commits) ARM: imx_v6_v7_defconfig updates ARM: imx_v4_v5_defconfig: Select CONFIG_IMX_WEIM arm: mach-imx: Convert pr_warning to pr_warn ARM: imx: source gpt per clk from OSC for system timer ARM: imx: add gpt_3m clk for i.mx6qdl ARM: imx: fix register offset of pll7_usb_host gate clock ARM: clk-imx6sl: refine clock tree for SSI ARM: imx: remove ENABLE and BYPASS bits from clk-pllv3 driver ARM: imx6sx: add BYPASS support for PLL clocks ARM: imx6sl: add BYPASS support for PLL clocks ARM: imx6q: add BYPASS support for PLL clocks ARM: imx: add an exclusive gate clock type ARM: clk-imx6q: refine clock tree for SSI ARM: clk-imx6q: refine clock tree for ASRC ARM: clk-imx6sl: correct the pxp and epdc axi clock selections ARM: clk-imx6q: refine clock tree for ESAI ARM: clk-imx6sl: Select appropriate parents for LCDIF clocks ARM: clk-imx6sl: Remove csi_lcdif_sels[] ARM: imx: clk-vf610: Add USBPHY clocks ARM: imx: add cpufreq support for i.mx6sx ... Signed-off-by: Olof Johansson <olof@lixom.net>
2014-09-24Merge tag 'renesas-soc4-for-v3.18' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc Merge "Fourth Round of Renesas ARM Based SoC Soc Updates for v3.18" from Simon Horman: Fourth Round of Renesas ARM Based SoC Soc Updates for v3.18 * r8a7794: Remove unnecessary #ifdef CONFIG_USE_OF * tag 'renesas-soc4-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7794: Remove unnecessary #ifdef CONFIG_USE_OF Signed-off-by: Olof Johansson <olof@lixom.net>
2014-09-24ARM: mediatek: Add earlyprintk support for mt6589Matthias Brugger
Enable low-level debug for Mediatek mt6589 SoC on UART0. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-09-24ARM: hisi: Fix platmcpm compilation when ARMv6 is selectedWei Xu
When compiling with "ARCH=arm" and "allmodconfig", with commit: 9cdc99919a95e8b54c1998b65bb1bfdabd47d27b [2/7] ARM: hisi: enable MCPM implementation we will get: /tmp/cc6DjYjT.s: Assembler messages: /tmp/cc6DjYjT.s:63: Error: selected processor does not support ARM mode `ubfx r1,r0,#8,#8' /tmp/cc6DjYjT.s:761: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:762: Error: selected processor does not support ARM mode `dsb ' /tmp/cc6DjYjT.s:769: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:775: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:776: Error: selected processor does not support ARM mode `dsb ' /tmp/cc6DjYjT.s:795: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:801: Error: selected processor does not support ARM mode `isb ' /tmp/cc6DjYjT.s:802: Error: selected processor does not support ARM mode `dsb ' Fix platmcpm compilation when ARMv6 is selected. Signed-off-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Olof Johansson <olof@lixom.net>
2014-09-23ARM: debug: fix alphanumerical order on debug uartsOlof Johansson
HIP04 was added out of order, but so was the previous HISI debug uart support as well. Minor reshuffling of order. Signed-off-by: Olof Johansson <olof@lixom.net>
2014-09-23Merge tag 'D01-for-3.18' of git://github.com/hisilicon/linux-hisi into next/socOlof Johansson
Merge "pull request for hisilicon hip04 soc and D01 board updates" from Wei Xu: ARM: mach-hisi: Hisilicon hip04 soc and D01 board updates for 3.18 - Add the CONFIG_MCPM_QUAD_CLUSTER configuration to enlarge cluster number from 2 to 4 - Enable MCPM on HiP04 SoC - Enable 16 cores on HiP04 SoC - Add platform & Fabric controller devicetree binding document for HiP04 SoC - Add hip04.dtsi & hip04-d01.dts for hip04 SoC platform and D01 board - Enable HiP04 SoC in both hi3xxx_defconfig & multi_v7_defconfig - Add the support of Hisilicon HiP04 debug uart * tag 'D01-for-3.18' of git://github.com/hisilicon/linux-hisi: ARM: debug: add HiP04 debug uart ARM: config: enable hisilicon hip04 ARM: dts: add hip04 dts document: dt: add the binding on HiP04 ARM: hisi: enable HiP04 ARM: hisi: enable MCPM implementation ARM: mcpm: support 4 clusters Signed-off-by: Olof Johansson <olof@lixom.net>
2014-09-23Merge tag 'soc-for-v3.18' of ↵Olof Johansson
git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/soc SoC related changes for omaps for v3.18 merge window: - PM changes to make the code easier to use on newer SoCs - PM changes for newer SoCs suspend and resume and wake-up events - Minor clean-up to remove dead Kconfig options Note that these have a dependency to the fixes-v3.18-not-urgent tag and is based on a commit in that series. * tag 'soc-for-v3.18' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (514 commits) ARM: OMAP5+: Reuse OMAP4 PM code for OMAP5 and DRA7 ARM: dts: OMAP3+: Add PRM interrupt ARM: omap: Remove stray ARCH_HAS_OPP references ARM: DRA7: Add hook in SoC initcalls to enable pm initialization ARM: OMAP5: Add hook in SoC initcalls to enable pm initialization ARM: OMAP5 / DRA7: Enable CPU RET on suspend ARM: OMAP5 / DRA7: PM: Provide a dummy startup function for CPU hotplug ARM: OMAP5 / DRA7: PM: Avoid all SAR saves ARM: OMAP5 / DRA7: PM: Enable Mercury retention mode on CPUx powerdomains ARM: OMAP5 / DRA7: PM / wakeupgen: Enables ES2 PM mode by default ARM: OMAP5 / DRA7: PM: Set MPUSS-EMIF clock-domain static dependency ARM: OMAP5 / DRA7: PM: Update CPU context register offset ARM: AM437x: use pdata quirks for pinctrl information ARM: DRA7: use pdata quirks for pinctrl information ARM: OMAP5: use pdata quirks for pinctrl information ARM: OMAP4+: PM: Use only valid low power state for CPU hotplug ARM: OMAP4+: PM: use only valid low power state for suspend ARM: OMAP4+: PM: Make logic state programmable ARM: OMAP2+: powerdomain: introduce logic for finding valid power domain ARM: OMAP2+: powerdomain: pwrdm_for_each_clkdm iterate only valid clkdms ...
2014-09-22ARM: at91: add sama5d4 support to sama5_defconfigAlexandre Belloni
Add sama5d4 to sama5_defconfig to build kernel booting on both sama5d3 and samad4. Note that earlyprintk can only be working for one or the other. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-09-22ARM: at91: dt: add device tree file for SAMA5D4ek boardNicolas Ferre
Add reference SAMA5D4-EK platform DT file. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2014-09-22ARM: at91: dt: add device tree file for SAMA5D4 SoCNicolas Ferre
Add SAMA5D4 SoC DT file. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2014-09-22ARM: at91: SAMA5D4 SoC detection code and low level routinesNicolas Ferre
SoC identification code, kernel uncompress and low level debugging routines update. On SAMA5D4, DBGU is at another address AT91_BASE_DBGU2 so another round of detection is needed. We also had to differentiate with SAMA5D3 SoC family and rename some variables. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2014-09-22ARM: at91: introduce basic SAMA5D4 supportNicolas Ferre
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2014-09-22clk: at91: add a driver for the h32mx clockAlexandre Belloni
Newer SoCs have two different AHB interconnect. The AHB 32 bits Matrix interconnect (h32mx) has a clock that can be setup at the half of the h64mx clock (which is mck). The h32mx clock can not exceed 90 MHz. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-09-19ARM: at91: Remove the support for the RSI EWS boardJosef Holzmayr
The platform is end of life/support and should not clutter the mach-at91 directory with non-DT files. It is therefore removed. Signed-off-by: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2014-09-19ARM: pxa3xx: provide specific platform_devices for all ssp portsDaniel Mack
Currently, devices for SSP ports 1, 2 and 3 are registered as compatible devices to pxa27x-ssp. While the actual IP core is comparable, there are some subtle differences which users of the SSP ports address by looking at the 'type' field. By registering devices of type 'pxa27x-ssp', this 'type' field is incorrectly set to PXA27x_SSP which confuses the users. To fix this, provide specific ssp port plaform devices which use 'pxa3xx-ssp' as driver name, an instantiate them from pxa3xx.c. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-09-19ARM: pxa: ssp: provide platform_device_id for PXA3xxDaniel Mack
Provide an explicit match string for PXA3xx SSP ports. Without this match string, SSP0/SSP1/SSP2 in PXA3xxx will be consided as PXA27x SSP Port. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-09-18ARM: OMAP4+: Remove static iotable mappings for SRAMRajendra Nayak
In order to handle errata I688, a page of sram was reserved by doing a static iotable map. Now that we use gen_pool to manage sram, we can completely remove all of these static mappings and use gen_pool_alloc() to get the one page of sram space needed to implement errata I688. omap_bus_sync will be NOP until SRAM initialization happens. Suggested-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: OMAP4+: Move SRAM data to DTRajendra Nayak
Use drivers/misc/sram.c driver to manage SRAM on all DT only OMAP platforms (am33xx, am43xx, omap4 and omap5) instead of the existing private plat-omap/sram.c Address and size related data is removed from mach-omap2/sram.c and now passed to drivers/misc/sram.c from DT. Users can hence use general purpose allocator apis instead of OMAP private ones to manage and use SRAM. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: AM335x: Get rid of unused sram init functionRajendra Nayak
Remove the empty am33xx_sram_init() function. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: omap2plus_defconfig: Enable some display featuresTony Lindgren
Now that we have panel support for DT based booting, let's make it usable and enable most things as modules. Note that omap3 boards need also the ads7847 module for the panel that we're now changing to a loadable module. And n900 seems to require setting the brightness via sysfs for acx565akm/brightness after modprobe of panel_sony_acx565akm and omapfb. Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: omap2plus_defconfig: Enable battery and reset driversTony Lindgren
Since many omaps run on battery, we should have the battery drivers enabled. Let's also enable the reset driver. Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: omap2plus_defconfig: Add support for distros with systemdTony Lindgren
Some distros are now using systemd, so let's enable most of what's recommended at: http://cgit.freedesktop.org/systemd/systemd/tree/README Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: omap2plus_defconfig: Add cpufreq to defconfigTony Lindgren
Note that we can now use the CONFIG_GENERIC_CPUFREQ_CPU0, so let's only enable that. Let's use CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND as suggested by Nishant. And also let's enable thermal as explained by Nishant Menon: Many TI SoCs using Highest frequency is not really too nice of an idea for long periods of time. And not everything is upstream to support things optimially - example avs class 0, 1.5 ABB consolidation with cpufreq etc.. We definitely need thermal enabled as well for device safety needs. [tony@atomide.com: updated per Nishant's suggestions] Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: omap2plus_defconfig: Shrink with savedefconfigTony Lindgren
This saves few lines and makes it easier to make patches against omap2plus_defconfig. Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: OMAP3: Use manual idle for UARTs because of DMA errataTony Lindgren
In sprz318f.pdf "Usage Note 2.7" says that UARTs cannot acknowledge idle requests in smartidle mode when configured for DMA operations. This prevents L4 from going idle. So let's use manual idle mode instead. Otherwise systems using Sebastian's 8250 patches with DMA will never enter deeper idle states because of the errata above. Cc: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-18ARM: OMAP2+: Add hwmod flag for HWMOD_RECONFIG_IO_CHAINTony Lindgren
Commit cc824534d4fe ("ARM: OMAP2+: hwmod: Rearm wake-up interrupts for DT when MUSB is idled") fixed issues with hung UART wake-up events by calling _reconfigure_io_chain() when MUSB is connected or disconnected. As pointed out by Paul Walmsley, we may need to also call _reconfigure_io_chain() in other cases, so it should be a separate flag. Let's add HWMOD_RECONFIG_IO_CHAIN as suggested by Paul. Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2014-09-17ARM: BCM63XX: add BCM963138DVT Reference platform DTSFlorian Fainelli
Add a DTS file for the Broadcom BCM963138DVT reference platform board which leverages the bcm63138.dtsi SoC DTSi file. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-09-17ARM: BCM63XX: add BCM63138 minimal Device TreeFlorian Fainelli
Add a very minimalistic BCM63138 Device Tree include file which describes the BCM63138 SoC with only the basic set of required peripherals: - Cortex A9 CPUs - ARM GIC - ARM SCU - PL310 Level-2 cache controller - ARM TWD & Global timers - ARM TWD watchdog - legacy MIPS bus (UBUS) - BCM6345-style UARTs (disabled by default) Since the PL310 L2 cache controller does not come out of reset with correct default values, we need to override the 'cache-sets' and 'cache-size' properties to get its geometry right. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-09-17ARM: BCM63XX: add low-level UART debug supportFlorian Fainelli
Broadcom BCM63xx DSL SoCs have a different UART implementation for which we need specially crafted low-level debug assembly code to support. Add support for this using the standard definitions provided in include/linux/serial_bcm63xx.h (shared with their MIPS counterparts). Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-09-17ARM: BCM63XX: add basic support for the Broadcom BCM63138 DSL SoCFlorian Fainelli
This patch adds basic support for the Broadcom BCM63138 DSL SoC which is using a dual-core Cortex A9 system. Add the very minimum required code boot Linux on this SoC. Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2014-09-17ARM: shmobile: r8a7740 legacy: Fix copied bug in commentGeert Uytterhoeven
The corresponding bug in pm-sh7372.c was fixed in commit 70fe7b24672a988f ("ARM: shmobile: Do not access sh7372 A4S domain internals directly"). Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2014-09-16ARM: at91: remove board file for Acme Systems Fox G20Nicolas Ferre
As Acme Systems Fox G20 is available in Device Tree flavor and that we plan to remove all the board files soon, we can remove this one without problem. If you use this board, please use a DT-enabled at91sam9g20 kernel with at91-foxg20.dts. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: Sergio Tanzilli <tanzilli@acmesystems.it>
2014-09-16ARM: zynq: Remove useless L2C AUX settingMichal Simek
AUX setting has no effect that's why remove it. Warning log: L2C: platform provided aux values match the hardware, so have no effect. Please remove them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: Rename 'zynq_platform_cpu_die'Soren Brinkmann
Match the naming pattern of all other SMP ops and rename zynq_platform_cpu_die --> zynq_cpu_die. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: Remove hotplug.cSoren Brinkmann
The hotplug code contains only a single function, which is an SMP function. Move that to platsmp.c where all other SMP runctions reside. That allows removing hotplug.c and declaring the cpu_die function static. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: Synchronise zynq_cpu_die/killSoren Brinkmann
Avoid races and add synchronisation between the arch specific kill and die routines. The same synchronisation issue was fixed on IMX platform by this commit: "ARM: imx: fix sync issue between imx_cpu_die and imx_cpu_kill" (sha1: 2f3edfd7e27ad4206acbc2ae99c9df5f46353024) Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: Remove invalidate cache for cpu dieDaniel Lezcano
As there is no Power management unit on this board, it is not possible to power down a core, just WFI is allowed. There is no point to invalidate the cache and exit coherency. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Reviewed-and-tested-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: PM: Enable DDR clock stopSoren Brinkmann
The DDR controller can detect idle periods and leverage low power features clock stop. When new requests occur, the DDRC resumes normal operation. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: DT: Add DDRC nodeSoren Brinkmann
Add the DDR controller to the Zynq devicetree. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2014-09-16ARM: zynq: PM: Enable A9 internal clock gating featureSoren Brinkmann
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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