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2015-01-07ARM: dts: am437x-sk: remove ethernet pullsFelipe Balbi
AM437x Starter Kit already has discrete pulls where they are necessary. It's safe (and actually better) to remove internal pulls. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: dts: am437x-sk: add explicit MMC0 pinmuxFelipe Balbi
By don't relying on implicit MMC0 pulldown we make sure that pins are marked busy and even if we have a broken bootloader, MMC0 will remain functional. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-08ARM: shmobile: sh73a0 legacy: Set .control_parent for all irqpin instancesGeert Uytterhoeven
The sh73a0 INTC can't mask interrupts properly most likely due to a hardware bug. Set the .control_parent flag to delegate masking to the parent interrupt controller, like was already done for irqpin1. Without this, accessing the three-axis digital accelerometer ADXL345 on kzm9g through /dev/input/event1 causes an interrupt storm, which requires a power-cycle to recover from. This was inspired by a patch for arch/arm/boot/dts/sh73a0.dtsi from Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Fixes: 341eb5465f67437a ("ARM: shmobile: INTC External IRQ pin driver on sh73a0") Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-01-08ARM: shmobile: sh73a0 dtsi: Add SoC-specific FSI2 compatible propertyGeert Uytterhoeven
The FSI2 sound node used the generic compatible property only. Add the SoC-specific one, to make it future proof. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
2015-01-07ARM: dts: am437x-sk: remove internal pulls from QSPIFelipe Balbi
QSPI doesn't need any pullups of any sort, let's remove them. Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: dts: am437x-sk-evm: Hook dcdc2 as the cpu0-supplyDave Gerlach
Hook dcdc2 as the cpu0-supply. Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Tested-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP3+: PRM: remove prm_get_reset_sources declaration from headersTero Kristo
There is no implementation for this anywhere, so remove it from the header files also. Signed-off-by: Tero Kristo <t-kristo@ti.com> [tony@atomide.com: updated to apply] Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP2: CM: remove unused PLL functionsTero Kristo
omap2xxx_cm_get_pll_config and omap2xxx_cm_get_pll_status are not used for anything, so remove these. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: 8253/1: mm: use phys_addr_t type in map_lowmem() for kernel mem regionGrygorii Strashko
Now local variables kernel_x_start and kernel_x_end defined using 'unsigned long' type which is wrong because they represent physical memory range and will be calculated wrongly if LPAE is enabled. As result, all following code in map_lowmem() will not work correctly. For example, Keystone 2 boot is broken because kernel_x_start == 0x0000 0000 kernel_x_end == 0x0080 0000 instead of kernel_x_start == 0x0000 0008 0000 0000 kernel_x_end == 0x0000 0008 0080 0000 and as result whole low memory will be mapped with MT_MEMORY_RW permissions by code (start > kernel_x_end): } else if (start >= kernel_x_end) { map.pfn = __phys_to_pfn(start); map.virtual = __phys_to_virt(start); map.length = end - start; map.type = MT_MEMORY_RW; create_mapping(&map); } Hence, fix it by using phys_addr_t type for variables kernel_x_start and kernel_x_end. Tested-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-01-07ARM: 8249/1: mm: dump: don't skip regionsMark Rutland
Currently the arm page table dumping code starts dumping page tables from USER_PGTABLES_CEILING. This is unnecessary for skipping any entries related to userspace as the swapper_pg_dir does not contain such entries, and results in a couple of unfortuante side effects. Firstly, any kernel mappings which might exist below USER_PGTABLES_CEILING will not be accounted in the dump output. This masks any entries erroneously created below this address. Secondly, if the final page table entry walked is part of a valid mapping the page table dumping code will not log the region this entry is part of, as the final note_page call in walk_pgd will trigger an early return when 0 < USER_PGTABLES_CEILING. Luckily this isn't seen on contemporary systems as they typically don't have enough RAM to extend the linear mapping right to the end of the address space. Due to the way addr is constructed in the walk_* functions, it can never be less than USER_PGTABLES_CEILING when walking the page tables, so it is not necessary to avoid dereferencing invalid table addresses. The existing checks for st->current_prot and st->marker[1].start_address are sufficient to ensure we will not print and/or dereference garbage when trying to log information. This patch removes both problematic uses of USER_PGTABLES_CEILING from the arm page table dumping code, preventing both of these issues. We will now report any low mappings, and the final note_page call will not return early, ensuring all regions are logged. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Cc: Steve Capper <steve.capper@linaro.org> Cc: Kees Cook <keescook@chromium.org> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-01-07ARM: wire up execveat syscallRussell King
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2015-01-07ARM: OMAP2: clock: remove unused apll codeTero Kristo
APLL clock type is no longer needed as the legacy clock support is removed. Signed-off-by: Tero Kristo <t-kristo@ti.com> [tony@atomide.com: updated to apply] Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP: dma.c: Remove unused functionRickard Strandqvist
Remove the function get_gdma_dev() that is not used anywhere. This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP1: timer32k.c: Remove unused functionRickard Strandqvist
Remove the function omap_32k_timer_read() that is not used anywhere. This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP1: irq.c: Remove unused functionRickard Strandqvist
Remove the function irq_bank_readl() that is not used anywhere. This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP2+: omap-pm-noop.c: Remove some unused functionsRickard Strandqvist
Removes some functions that are not used anywhere: omap_pm_set_max_dev_wakeup_lat() omap_pm_if_exit() omap_pm_cpu_get_freq() omap_pm_cpu_set_freq() omap_pm_cpu_get_freq_table() omap_pm_dsp_get_opp() omap_pm_dsp_set_min_opp() omap_pm_dsp_get_opp_table() omap_pm_set_min_clk_rate() omap_pm_set_max_sdma_lat() This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP2+: voltage: Remove some unused functionsRickard Strandqvist
Removes some functions that are not used anywhere: omap_change_voltscale_method() voltdm_add_pwrdm() voltdm_for_each() voltdm_for_each_pwrdm() And remove define VOLTSCALE_VPFORCEUPDATE and VOLTSCALE_VCBYPASS This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP2+: powerdomain.c: Remove some unused functionsRickard Strandqvist
Removes some functions that are not used anywhere: pwrdm_get_voltdm() pwrdm_for_each_clkdm() pwrdm_del_clkdm() This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP2+: omap_hwmod.c: Remove some unused functionsRickard Strandqvist
Removes some functions that are not used anywhere: omap_hwmod_pad_route_irq() omap_hwmod_no_setup_reset() omap_hwmod_read_hardreset() omap_hwmod_del_initiator_dep() omap_hwmod_enable_clocks() omap_hwmod_reset() omap_hwmod_ocp_barrier() omap_hwmod_disable_clocks() omap_hwmod_add_initiator_dep() This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP2+: dpll44xx.c: Remove unused functionRickard Strandqvist
Remove the function omap4_dpllmx_gatectrl_read() that is not used anywhere. This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP2+: cm33xx.c: Remove some unused functionsRickard Strandqvist
Removes some functions that are not used anywhere: am33xx_cm_read_reg_bits() am33xx_cm_clear_reg_bits() am33xx_cm_set_reg_bits() This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: OMAP2+: clkt2xxx_apll.c: Remove some unused functionsRickard Strandqvist
Removes some functions that are not used anywhere: omap2_clk_apll54_disable() omap2_clk_apll96_disable() omap2_clk_apll54_enable() omap2_clk_apll96_enable() omap2xxx_get_apll_clkin() omap2_clk_apll96_recalc() omap2_clk_apll54_recalc() This was partially found by using a static code analysis program called cppcheck. Signed-off-by: Rickard Strandqvist <rickard_strandqvist@spectrumdigital.se> [tony@atomide.com: updated to fix a build warning] Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-07ARM: dts: tegra20: fix GR3D, DSI unit and reg base addressesDmitry Osipenko
Commit 58ecb23f64ee ("ARM: tegra: add missing unit addresses to DT") added unit address and changed reg base for GR3D and DSI host1x modules, but these addresses belongs to GR2D and TVO modules respectively. Fix it by changing modules unit and reg base addresses to proper ones. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Fixes: 58ecb23f64ee (ARM: tegra: add missing unit addresses to DT) Cc: <stable@vger.kernel.org> # v3.13+ Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-07ARM: dts: berlin: correct BG2Q's SM GPIO location.Jisheng Zhang
The gpio4 and gpio5 are in 0xf7fc0000 apb which is located in the SM domain. This patch moves gpio4 and gpio5 to the correct location. This patch also renames them as the following to match the names we internally used in marvell: gpio4 -> sm_gpio1 gpio5 -> sm_gpio0 porte -> portf portf -> porte This also matches what we did for BG2 and BG2CD's SM GPIO. Cc: stable@vger.kernel.org # 3.16+ Fixes: cedf57fc4f2f ("ARM: dts: berlin: add the BG2Q GPIO nodes") Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-01-07ARM: dts: berlin: add PPI cpu mask to twd timer interruptsJisheng Zhang
According to the gic binding document, "bits[15:8] PPI interrupt cpu mask. Each bit corresponds to each of the 8 possible cpus attached to the GIC. A bit set to '1' indicated the interrupt is wired to that CPU." This patch wants to add the PPI cpu mask for completeness. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-01-07ARM: dts: berlin: add pmu node for BG2Q and BG2CDJisheng Zhang
This patch adds the pmu node, enabling the PMU unit on Marvell BG2Q and BG2CD SoCs. Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-01-07ARM: dts: berlin: add broken-cd and set bus width for eMMC in Marvell DMP DTJisheng Zhang
There's no card detection for the eMMC, so this patch adds the missing broken-cd property. This patch also sets bus width as 8 to add MMC_CAP_8_BIT_DATA in the Host capabilities. Cc: stable@vger.kernel.org # 3.16+ Fixes: 3047086dfd56 ("ARM: dts: berlin: enable SD card reader and eMMC for the BG2Q DMP") Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-01-07ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 hostJisheng Zhang
On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk. The shdci2 can't work without this patch due to the "core" clk is gated. Cc: stable@vger.kernel.org # 3.16+ Fixes: 0d859a6a9d14 ("ARM: dts: berlin: add the SDHCI nodes for the BG2Q") Signed-off-by: Jisheng Zhang <jszhang@marvell.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
2015-01-07ARM: sunxi: Register cpufreq-dt for sun[45678]iChen-Yu Tsai
On sun[45678]i, we have one cluster of identical cores sharing a clock, which is ideal for using cpufreq-dt. Register a platform device for cpufreq-dt. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-06Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
2015-01-06rcu: Make SRCU optional by using CONFIG_SRCUPranith Kumar
SRCU is not necessary to be compiled by default in all cases. For tinification efforts not compiling SRCU unless necessary is desirable. The current patch tries to make compiling SRCU optional by introducing a new Kconfig option CONFIG_SRCU which is selected when any of the components making use of SRCU are selected. If we do not select CONFIG_SRCU, srcu.o will not be compiled at all. text data bss dec hex filename 2007 0 0 2007 7d7 kernel/rcu/srcu.o Size of arch/powerpc/boot/zImage changes from text data bss dec hex filename 831552 64180 23944 919676 e087c arch/powerpc/boot/zImage : before 829504 64180 23952 917636 e0084 arch/powerpc/boot/zImage : after so the savings are about ~2000 bytes. Signed-off-by: Pranith Kumar <bobby.prani@gmail.com> CC: Paul E. McKenney <paulmck@linux.vnet.ibm.com> CC: Josh Triplett <josh@joshtriplett.org> CC: Lai Jiangshan <laijs@cn.fujitsu.com> Signed-off-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> [ paulmck: resolve conflict due to removal of arch/ia64/kvm/Kconfig. ]
2015-01-06ARM: dts: Revert disabling of smc91x for n900Tony Lindgren
Revert "ARM: dts: Disable smc91x on n900 until bootloader dependency is removed". We've now fixed the issues that caused problems with uninitialized hardware depending on the bootloader version. Mostly things got fixed with the following commits: 9a894953a97b ("ARM: dts: Fix bootloader version dependencies by muxing n900 smc91x pins") 7d2911c43815 ("net: smc91x: Fix gpios for device tree based booting") Note that this only affects the early development boards with Ethernet that we still have in a few automated boot test systems. And it's also available supposedly in some versions of qemu. Tested-by: Kevin Hilman <khilman@linaro.org> Tested-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-06ARM: sunxi: Add AXP20x support multi_v7_defconfigCarlo Caione
Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-06ARM: sunxi: Add AXP20x support in defconfigCarlo Caione
Signed-off-by: Carlo Caione <carlo@caione.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-06ARM: multi_v7_defconfig: Enable TOUCHSCREEN_SUN4I, CPU_THERMALChen-Yu Tsai
This patch enables TOUCHSCREEN_SUN4I and CPU_THERMAL to enable cpufreq support with passive cpu cooling (thermal throttling) on sunxi by default. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-06ARM: sunxi_defconfig: Enable TOUCHSCREEN_SUN4I, CPUFREQ_DT, CPU_THERMALChen-Yu Tsai
This patch enables TOUCHSCREEN_SUN4I, CPUFREQ_DT, and CPU_THERMAL to enable cpufreq support with passive cpu cooling (thermal throttling) by default. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Eduardo Valentin <edubezval@gmail.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-06ARM: tegra: Regenerate defconfig based on v3.19-rc1Thierry Reding
Removes the following entries from the default configuration: - PM: enabled by default (via PM_SLEEP -> SUSPEND) - RESOURCE_COUNTERS: removed Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-06ARM: dts: imx51-babbage: Fix ULPI PHY reset modellingFabio Estevam
GPIO2_5 is the reset GPIO for the USB3317 ULPI PHY. Instead of modelling it as a regulator, the correct approach is to use the 'reset_gpios' property of the "usb-nop-xceiv" node. GPIO1_7 is the reset GPIO for the USB2517 USB hub. As we currently don't have dt bindings to describe a HUB reset, let's keep using the regulator approach. Rename the regulator to 'reg_hub_reset' to better describe its function and bind it with the USB host1 port instead. USB host support has been introduced by commit 9bf206a9d13be3 ("ARM: dts: imx51-babbage: Add USB Host1 support"), which landed in 3.16 and it seems that USB has only been functional due to previous bootloader initialization. With this patch applied we can get USB host to work without relying on the bootloader. Cc: <stable@vger.kernel.org> # 3.16+ Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-06ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sxShawn Guo
As the result of commit b82b6cca4880 ("cpuidle: Invert CPUIDLE_FLAG_TIME_VALID logic"), the flag gets removed and hence we see the compile error below. CC arch/arm/mach-imx/cpuidle-imx6sx.o arch/arm/mach-imx/cpuidle-imx6sx.c:69:13: error: ‘CPUIDLE_FLAG_TIME_VALID’ undeclared here (not in a function) Since the behavior of the original flag has been the default, we can simply drop the flag now. Reported-by: kbuild test robot <fengguang.wu@intel.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-06ARM: dts: imx6dl-udoo: Add board support based off imx6q-udooRobert Nelson
For more information about the Udoo boards: http://www.udoo.org/ Signed-off-by: Robert Nelson <robertcnelson@gmail.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
2015-01-06ARM: tegra: Enable the mic-detect gpio on Acer Chromebook 13Dylan Reid
Enables the gpio-base mic detection on the Acer Chromebook 13. This gpio is set by the jack-detection chip when it notices either of the TRRS type headsets with a microphone. Signed-off-by: Dylan Reid <dgreid@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-01-06ARM: dts: sun6i: ippo-q8h-v5: Fix serial0 aliasHans de Goede
The Ippo q8h has its serial console connected to the r-uart. Adjust the serial0 alias to match. This fixes the kernel serial console no longer working since 3.19-rc1, because 8250_dw.c now honors dt aliases, causing the serial console to be ttyS5 rather then being ttyS0, as it was in 3.18 and before. Note that adjusting bootargs instead is not an acceptable fix, because console=ttyS0,115200 is used by a lot of bootscripts, etc. and this should continue to work. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2015-01-05ARM: dts: dra7-evm: fix qspi device tree partition sizeMugunthan V N
64KiB is allocated for qspi dtb partition which is not sufficient, so updating the partition table size to 512KiB for device tree partition. This also aligns the QSPI partition definitions between kernel and U-Boot. Fixes: dc2dd5b8 ("ARM: dts: dra7: Add qspi device") Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-05ARM: omap2plus_defconfig: use CONFIG_CPUFREQ_DTNishanth Menon
CONFIG_GENERIC_CPUFREQ_CPU0 disappeared with commit bbcf071969b20f ("cpufreq: cpu0: rename driver and internals to 'cpufreq_dt'") Use the renamed CONFIG_CPUFREQ_DT generic driver. It looks like with v3.18-rc1, commit bbcf071969b20f and fdc509b15eb3eb came in via different trees causing the resultant v3.18-rc1 to be non-functional for cpufreq as default supported with omap2plus_defconfig. Fixes: fdc509b15eb3eb ("ARM: omap2plus_defconfig: Add cpufreq to defconfig") Cc: <stable@vger.kernel.org> # 3.18 Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-05ARM: OMAP2+: Fix n900 board name for legacy user spaceTony Lindgren
N900 legacy user space apps need the board name in /proc/cpuinfo to work properly for the Hardware entry. For other boards this should not be an issues and they can use the generic Hardware entry. Let's fix the issue by adding a custom DT_MACHINE_START for n900. Tested-by: Pali Rohár <pali.rohar@gmail.com> Acked-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-05ARM: omap5/dra7xx: Enable booting secondary CPU in HYP modeLennart Sorensen
If the boot loader enables HYP mode on the boot CPU, the secondary CPU also needs to call into the ROM to switch to HYP mode before booting. The firmwares on the omap5 and dra7xx unfortunately do not take care of this, so it has to be handled by the kernel. This patch is based on "[PATCH 2/2] ARM: OMAP5: Add HYP mode entry support for secondary CPUs" by Santosh Shilimkar <santosh.shilimkar@ti.com>, except this version does not require a compile time CONFIG to control if it should enable HYP mode or not, it simply does it based on the mode of the boot CPU, so it works whether the CPU boots in SVC or HYP mode, and should even work as a guest kernel inside kvm if qemu decides to support emulating the omap5 or dra7xx. Cc: stable@vger.kernel.org #v3.16+ Signed-off-by: Len Sorensen <lsorense@csclub.uwaterloo.ca> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-05ARM: dra7xx: Fix counter frequency drift for AM572x errata i856Lennart Sorensen
Errata i856 for the AM572x (DRA7xx) points out that the 32.768KHz external crystal is not enabled at power up. Instead the CPU falls back to using an emulation for the 32KHz clock which is SYSCLK1/610. SYSCLK1 is usually 20MHz on boards so far (which gives an emulated frequency of 32.786KHz), but can also be 19.2 or 27MHz which result in much larger drift. Since this is used to drive the master counter at 32.768KHz * 375 / 2 = 6.144MHz, the emulated speed for 20MHz is of by 570ppm, or about 43 seconds per day, and more than the 500ppm NTP is able to tolerate. Checking the CTRL_CORE_BOOTSTRAP register can determine if the CPU is using the real 32.768KHz crystal or the emulated SYSCLK1/610, and by known that the real counter frequency can be determined and used. The real speed is then SYSCLK1 / 610 * 375 / 2 or SYSCLK1 * 75 / 244. Signed-off-by: Len Sorensen <lsorense@csclub.uwaterloo.ca> Tested-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-05ARM: omap5/dra7xx: Fix frequency typosLennart Sorensen
The switch statement of the possible list of SYSCLK1 frequencies is missing a 0 in 4 out of the 7 frequencies. Fixes: fa6d79d27614 ("ARM: OMAP: Add initialisation for the real-time counter") Cc: stable@vger.kernel.org # v3.7+ Signed-off-by: Len Sorensen <lsorense@csclub.uwaterloo.ca> Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-01-05Kirkwood: add support for Seagate BlackArmor NAS220Evgeni Dobrev
This patch adds support for Seagate BlackArmor NAS220. The Seagate BlackArmor NAS 220 is a NAS system based on Marvell 88f6192. It has 32MB NAND and 128MB DRAM. It has two SATA slots, one Gigabit Ethernet port, two USB 2.0 ports, two buttons and three LEDs. There is a serial port available on the CN5 connector on the board (1 - TX, 4 - RX, 6 - GND). The only functionality still not implemented is the bi-color led on the front panel (status). Pins mpp22 and mpp23 control this led. Setting mpp22 to high and mpp23 to low results in orange color. Setting mpp22 to low and mpp23 to high results in blue color. The third led is wired to show the SATA activity on the two drives. Signed-off-by: Evgeni Dobrev <evgeni@studio-punkt.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Andrew Lunn <andrew@lunn.ch>
2015-01-05ARM: imx: support arm power off in cpuidle for i.mx6sxAnson Huang
This patch introduces an independent cpuidle driver for i.MX6SX, and supports arm power off in idle, totally 3 levels of cpuidle are supported as below: 1. ARM WFI; 2. SOC in WAIT mode; 3. SOC in WAIT mode + ARM power off. ARM power off can save at least 5mW power. This patch also replaces imx6q_enable_rbc with imx6_enable_rbc. Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>