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git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (44 commits)
vlynq: make whole Kconfig-menu dependant on architecture
add descriptive comment for TIF_MEMDIE task flag declaration.
EEPROM: max6875: Header file cleanup
EEPROM: 93cx6: Header file cleanup
EEPROM: Header file cleanup
agp: use NULL instead of 0 when pointer is needed
rtc-v3020: make bitfield unsigned
PCI: make bitfield unsigned
jbd2: use NULL instead of 0 when pointer is needed
cciss: fix shadows sparse warning
doc: inode uses a mutex instead of a semaphore.
uml: i386: Avoid redefinition of NR_syscalls
fix "seperate" typos in comments
cocbalt_lcdfb: correct sections
doc: Change urls for sparse
Powerpc: wii: Fix typo in comment
i2o: cleanup some exit paths
Documentation/: it's -> its where appropriate
UML: Fix compiler warning due to missing task_struct declaration
UML: add kernel.h include to signal.c
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Signed-off-by: Andreas Dilger <adilger@dilger.ca>
Acked-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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There is necessary to flush whole dcache. Icache work should be
done in kernel/module.c.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Export __strncpy_user, memory_size, ioremap_bot for modules.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Remove eeh_add_device_tree_late which is powerpc specific code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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CC arch/microblaze/kernel/cpu/cache.o
arch/microblaze/kernel/cpu/cache.c: In function '__invalidate_dcache_range_wb':
arch/microblaze/kernel/cpu/cache.c:398: warning: ISO C90 forbids mixed declarations and code
arch/microblaze/kernel/cpu/cache.c: In function '__flush_dcache_range_wb':
arch/microblaze/kernel/cpu/cache.c:509: warning: ISO C90 forbids mixed declara
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Modules that use copy_{to,from}_user(), memcpy(), and memset() fail to build
in certain circumstances.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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The Microblaze implementations of get_user() and (MMU) put_user() evaluate
the address argument more than once. This causes unexpected side-effects for
invocations that include increment operators, i.e. get_user(foo, bar++).
This patch also removes the distinction between MMU and noMMU put_user().
Without the patch:
$ echo 1234567890 > /proc/sys/kernel/core_pattern
$ cat /proc/sys/kernel/core_pattern
12345
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
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schedule() should not be called with interrupts disabled.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Signed-off-by: Michal Simek <monstr@monstr.eu>
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1. Remove CACHE_ALL_LOOP2 macro because it is identical to CACHE_ALL_LOOP
2. Change BUG_ON to WARN_ON
3. Remove end aligned from CACHE_LOOP_LIMITS.
C implementation do not need aligned end address and ASM code do aligned
in their macros
4. ASM optimized CACHE_RANGE_LOOP_1/2 macros needs to get aligned end address.
Because end address is compound from start + size, end address is the first address
which is exclude.
Here is the corresponding code which describe it.
+ int align = ~(line_length - 1);
+ end = ((end & align) == end) ? end - line_length : end & align;
a) end is aligned:
it is necessary to subtruct line length because we don't want to work with
next cacheline
b) end address is not aligned:
Just align it to be ready for ASM code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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PCI_DMA_FROMDEVICE should call invalidation not flushing.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Microblaze cacheline length is configurable and current cpu
uses two cacheline length 4 and 8.
We are taking conservative maximum value to be sure that cacheline
alignment is satisfied for all cases.
Here is the calculation for cacheline lenght 8 32bit=4Byte values
which is corresponding with SHIFT 5.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Show cache line length in /proc/cpuinfo.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Based on PowerPC patche 52142e756e9bf6485d3d53596e8aff2e816a7253
PowerPC description:
On platforms doing non-coherent DMA (4xx, 8xx, ...), it's important
that the kmalloc minimum alignment is set to the cache line size, to
avoid sharing cache lines between different objects, so that DMA to
one of the objects doesn't corrupt the other.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Copy & paste error.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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This patch fix consistent code which had problems with consistent_free
function.
I am not sure if we need to call flush_tlb_all after it but it keeps
tlbs synced.
I added noMMU and MMU version together.
Uncached shadow feature is not tested.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Based on af407c6db16aa9ca63559076dbe620220a822580
and f41b177157718abe9a93868bb76e47d4a6f3681d
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Remove ancient macros which are here from Linux-2.4
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Current implementation doesn't handle dcache_line_length
correctly that's why is better to use generic memcpy.
Cache optimized function could be good way howto improve
performance but must be based on benchmarking not blind
function like this.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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As explained in commit 1c0fe6e3bd, we want to call the architecture independent
oom killer when getting an unexplained OOM from handle_mm_fault, rather than
simply killing current.
Cc: microblaze-uclinux@itee.uq.edu.au
Cc: Michal Simek <monstr@monstr.eu>
Cc: linux-arch@vger.kernel.org
Signed-off-by: Nick Piggin <npiggin@suse.de>
Acked-by: David Rientjes <rientjes@google.com>
Acked-by: Michal Simek <monstr@monstr.eu>
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Fix divide exception message to say "divide by zero".
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: microblaze-uclinux@itee.uq.edu.au
Signed-off-by: Michal Simek <monstr@monstr.eu>
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It is necessary for several drivers.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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I found several function which we don't use that's why I am removing them.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Remove section mismatch - based on ppc aproach.
WARNING: vmlinux.o(.text+0x64834): Section mismatch in reference
from the function __pte_alloc_kernel() to the function .init.text:early_get_page()
The function __pte_alloc_kernel() references
the function __init early_get_page().
This is often because __pte_alloc_kernel lacks a __init
annotation or the annotation of early_get_page is wrong.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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_start is located in .text, which causes mismatch warnings with
machine_early_init() and start_kernel() in .init.text.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Function traces on Microblaze don't include IRQ entry and exit arrows,
i.e.
0) | memcpy_toiovec() {
0) ==========> |
0) | do_IRQ() {
...
0) <========== |
0) ! 5414.000 us | }
...because do_IRQ() doesn't have the proper attributes.
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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This change should be part of b26b2d494b659f988b4d75eb394dfa0ddac415c9
Origin description:
resource/PCI: align functions now return start of resource
As suggested by Linus, align functions should return the start
of a resource, not void. An update of "res->start" is no longer
necessary.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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bus->resource[] refs
This change should be part of 89a74ecccd1f78e51faf6287e5c0e93a92ac096e
Origin description:
PCI: add pci_bus_for_each_resource(), remove direct bus->resource[] refs
No functional change; this converts loops that iterate from 0 to
PCI_BUS_NUM_RESOURCES through pci_bus resource[] table to use the
pci_bus_for_each_resource() iterator instead.
This doesn't change the way resources are stored; it merely removes
dependencies on the fact that they're in a table.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Patch b3c1e01a09d6af2dd7811a066ffcfc5171be2bed should do it.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Add new io big-endian function. They will be used
for uartlite and spi driver.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Use logical and NOT for ANDN. It was likely type fault.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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The Microblaze dynamic ftrace code assumes a call ordering that is not met
in all scenarios. Specifically, executing a command similar to:
echo 105 > /sys/kernel/debug/tracing/set_ftrace_pid
before any other tracing-related commands results in a kernel panic:
BUG: failure at arch/microblaze/kernel/ftrace.c:198/ftrace_update_ftrace_func()!
Recoding ftrace_update_ftrace_func() to use &ftrace_caller directly eliminates
the need to capture its address elsewhere (and thus rely on a particular call
sequence).
Signed-off-by: Steven J. Magnani <steve@digidescorp.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Word copying is used only for aligned addresses.
Here is space for improving to use any better copying technique.
Look at memcpy implementation.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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If early printk console is not enabled then all messages
are written to log buffer.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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I forget to change register name in comments.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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TLB size was hardcoded in asm code. This patch brings ability
to change TLB size only in one place. (mmu.h).
Signed-off-by: Michal Simek <monstr@monstr.eu>
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I forget to remove pci Kconfig option.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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On the base on GCOV analytics is helpful to add likely/unlikely
macros.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Cachegrind analysis need this fix to be able to log asm functions.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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To be able to do trace TLB operations.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Sync labels.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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RESR and REAR uses the same regs in whole file.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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This change synchronize register usage in code.
ESR = R4
EAR = R3
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Any sync branch must follow mts instructions not mfs.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Disable debug option in asm code.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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When the system has no lmb bram, main memory should be start from
zero because of microblaze vectors.
DTS fragment could look like:
DDR2_SDRAM: memory@0 {
device_type = "memory";
reg = < 0x0 0x10000000 >;
} ;
Then you have to setup CONFIG_KERNEL_BASE_ADDR=0 which caused
that kernel physical start address will be zero. On reset vector place
will be jump to 0x100 and on 0x100 starts kernel text.
You have to solve how to load the kernel before cpu starts.
Tested with XMD.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Last sync.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Move to generic location.
Signed-off-by: Michal Simek <monstr@monstr.eu>
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