summaryrefslogtreecommitdiffstats
path: root/arch/mips/kernel/traps.c
AgeCommit message (Expand)Author
2009-01-30MIPS: Read watch registers with interrupts disabled.David Daney
2009-01-30MIPS: R2: Fix broken installation of cache error handler.Ralf Baechle
2009-01-11MIPS: For Cavium OCTEON set hwrena and lazily restore CP2 state.David Daney
2008-10-30MIPS: Switch FPU emulator trap to BREAK instruction.Ralf Baechle
2008-10-30MIPS: Consider value of c0_ebase when computing value of exception base.David Daney
2008-10-11MIPS: Watch exception handling for HARDWARE_WATCHPOINTS.David Daney
2008-10-03[MIPS] SMTC: Fix holes in SMTC and FPU affinity support.Kevin D. Kissell
2008-09-21[MIPS] Fix potential latency problem due to non-atomic cpu_wait.Atsushi Nemoto
2008-09-05[MIPS] Fix WARNING: at kernel/smp.c:290Thomas Bogendoerfer
2008-09-05[MIPS] Fix data bus error recoveryThomas Bogendoerfer
2008-07-30[MIPS] kgdb: add arch support for the kernel's kgdb coreJason Wessel
2008-07-15[MIPS] Replace use of print_symbol with new %sP pointer format.Ralf Baechle
2008-07-15[MIPS] Remove board_watchpoint_handlerDavid Daney
2008-06-05[MIPS] Fix check for valid stack pointer during backtraceThomas Bogendoerfer
2008-04-28[MIPS] Fix handling of trap and breakpoint instructionsRalf Baechle
2008-04-28[MIPS] Add support for MIPS CMP platform.Ralf Baechle
2008-04-28[MIPS] Add noulri kernel argument to disable "rdhwr $29" usermode support.Chris Dearman
2008-03-12[MIPS] Fix loads of section missmatchesRalf Baechle
2008-03-12[MIPS] Added missing cases for rdhwr emulationChris Dearman
2007-12-14[MIPS] Ensure that ST0_FR is never set on a 32 bit kernelChris Dearman
2007-11-15[MIPS] Fix shadow register support.Ralf Baechle
2007-10-19Use helpers to obtain task pid in printks (arch code)Alexey Dobriyan
2007-10-18[MIPS] time: Move R4000 clockevent device code to separate configurable fileRalf Baechle
2007-10-17[MIPS] SYNC emulation for MIPS I processorsMaciej W. Rozycki
2007-10-16[MIPS] IP22: Fix warning.Ralf Baechle
2007-10-11[MIPS] Make facility to convert CPU types to strings generally available.Ralf Baechle
2007-10-11[MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle
2007-10-11[MIPS] Allow hardwiring of the CPU type to a single type for optimization.Ralf Baechle
2007-10-11[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle
2007-10-11[MIPS] Kill useless volatile keywordRalf Baechle
2007-08-27[MIPS] Maintain si_code field properly for FP exceptionsThiemo Seufer
2007-08-27[MIPS] SMTC: Fix duplicate status dumps on NMIThiemo Seufer
2007-07-31[MIPS] Fixup secure computing stuff.Ralf Baechle
2007-07-17Report that kernel is tainted if there was an OOPSPavel Emelianov
2007-07-13[MIPS] Make show_code static and add __user tagAtsushi Nemoto
2007-07-13[MIPS] Add some __user tagsAtsushi Nemoto
2007-07-12[MIPS] Sparse: Use NULL for pointerAtsushi Nemoto
2007-07-10[MIPS] PMC MSP71xx mips commonMarc St-Jean
2007-07-10[MIPS] Enable support for the userlocal hardware registerRalf Baechle
2007-07-10[MIPS] FP affinity: Coding style cleanups Ralf Baechle
2007-07-10[MIPS] Remove unused watchpoint support and arch/mips/lib-{32,64}Atsushi Nemoto
2007-07-10[MIPS] Transform old-style macros to newer "__noreturn"Robert P. J. Day
2007-07-06[MIPS] Fix timer/performance interrupt detectionChris Dearman
2007-06-20[MIPS] Don't drag a platform specific header into generic arch code.Ralf Baechle
2007-06-11[MIPS] SMTC: The MT ASE requires to initialize c0_pagemask and c0_wired.Ralf Baechle
2007-06-11[MIPS] SMTC: Don't continue in set_vi_srs_handler on detected bad arguments.Ralf Baechle
2007-06-11[MIPS] Always install the DSP exception handler.Chris Dearman
2007-06-06[MIPS] Fix warning by moving do_default_vi into CONFIG_CPU_MIPSR2_SRSAtsushi Nemoto
2007-05-11[MIPS] Define and use vi_handler_t for vectored interrupt handlers.Ralf Baechle
2007-05-11[MIPS] Fix do_default_vi to use get_irq_regs to get the irq register ptr.Ralf Baechle
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2024-11-06 21:45:01 +0000