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2012-10-11MIPS: perf: Change the "mips_perf_event" table unsupported indicator.Al Cooper
Change the indicator from 0xffffffff in the "event_id" member to zero in the "cntr_mask" member. This removes the need to initialize entries that are unsupported. This also solves a problem where the number of entries in the table was increased based on a globel enum used for all platforms, but the new unsupported entries were not added for mips. This was leaving new table entries of all zeros that we not marked UNSUPPORTED. Signed-off-by: Al Cooper <alcooperx@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/4110/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-11MIPS: Align swapper_pg_dir to 64K for better TLB Refill code.David Daney
We can save an instruction in the TLB Refill path for kernel mappings by aligning swapper_pg_dir on a 64K boundary. The address of swapper_pg_dir can be generated with a single LUI instead of LUI/{D}ADDUI. The alignment of __init_end is bumped up to 64K so there are no holes between it and swapper_pg_dir, which is placed at the very beginning of .bss. The alignment of invalid_pmd_table and invalid_pte_table can be relaxed to PAGE_SIZE. We do this by using __page_aligned_bss, which has the added benefit of eliminating alignment holes in .bss. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-arch@vger.kernel.org, Cc: linux-kernel@vger.kernel.org Acked-by: Arnd Bergmann <arnd@arndb.de> Patchwork: https://patchwork.linux-mips.org/patch/4220/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-09Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds
Pull MIPS update from Ralf Baechle: "This is the MIPS update for 3.7. A fair chunk of them are platform updates to the Cavium Octeon SOC (which involves machine generated header files of considerable size), Atheros ATH79xx, RMI aka Netlogic aka Broadcom XLP, Broadcom BCM63xx platforms. Support for the commercial MIPS simulator MIPSsim has been removed as MIPS Technologies is shifting away from this product and Qemu is offering various more powerful platforms. The generic MIPS code can now also probe for no-execute / write-only TLB features implemented without the full SmartMIPS extension as permitted by the latest MIPS processor architecture. Lots of small changes to generic code." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (78 commits) MIPS: ath79: Fix CPU/DDR frequency calculation for SRIF PLLs MIPS: ath79: use correct fractional dividers for {CPU,DDR}_PLL on AR934x MIPS: BCM63XX: Properly handle mac address octet overflow MIPS: Kconfig: Avoid build errors by hiding USE_OF from the user. MIPS: Replace `-' in defconfig filename wth `_' for consistency. MIPS: Wire kcmp syscall. MIPS: MIPSsim: Remove the MIPSsim platform. MIPS: NOTIFY_RESUME is not needed in TIF masks MIPS: Merge the identical "return from syscall" per-ABI code MIPS: Unobfuscate _TIF..._MASK MIPS: Prevent hitting do_notify_resume() with !user_mode(regs). MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'. MIPS: Add base architecture support for RI and XI. MIPS: Optimise TLB handlers for MIPS32/64 R2 cores. MIPS: uasm: Add INS and EXT instructions. MIPS: Avoid pipeline stalls on some MIPS32R2 cores. MIPS: Make VPE count to be one-based. MIPS: Add new end of interrupt functionality for GIC. MIPS: Add EIC support for GIC. MIPS: Code clean-ups for the GIC. ...
2012-10-08Merge branch 'rc-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild Pull kbuild fixes from Michal Marek: "Here are two fixes I intended to send after v3.6-rc7, but failed to do so. So please pull them for v3.7-rc1 and they will be picked up by stable. The first one fixes gcc -x <language> syntax in various build-time tests, which icecream and possible other gcc wrappers did not understand (and yes, icecream is going to be fixed as well). The second one fixes make tar-pkg so that unpacking the tarball does not replace the /lib -> /usr/lib symlink on recent Fedora releases." * 'rc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/mmarek/kbuild: kbuild: Fix gcc -x syntax kbuild: Do not package /boot and /lib in make tar-pkg
2012-10-05Merge branch 'master' of git://dev.phrozen.org/mips-next into ↵Ralf Baechle
mips-for-linux-next
2012-10-03kbuild: Fix gcc -x syntaxJean Delvare
The correct syntax for gcc -x is "gcc -x assembler", not "gcc -xassembler". Even though the latter happens to work, the former is what is documented in the manual page and thus what gcc wrappers such as icecream do expect. This isn't a cosmetic change. The missing space prevents icecream from recognizing compilation tasks it can't handle, leading to silent kernel miscompilations. Besides me, credits go to Michael Matz and Dirk Mueller for investigating the miscompilation issue and tracking it down to this incorrect -x parameter syntax. Signed-off-by: Jean Delvare <jdelvare@suse.de> Acked-by: Ingo Molnar <mingo@kernel.org> Cc: stable@vger.kernel.org Cc: Bernhard Walle <bernhard@bwalle.de> Cc: Michal Marek <mmarek@suse.cz> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Michal Marek <mmarek@suse.cz>
2012-09-28Merge branch 'ralf-3.7' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
2012-09-28Merge branch 'rixi-3.7' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
2012-09-27Merge branch 'cn68xx-ciu2' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/daney/upstream-daney into mips-for-linux-next
2012-09-26MIPS: Wire kcmp syscall.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-22Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds
Pull MIPS fixes from Ralf Baechle: "Random fixes across arch/mips, essentially. One fix for an issue in get_user_pages_fast() which previously was discovered on x86, a miscalculation in the support for the MIPS MT hardware multithreading support, the RTC support for the Malta and a fix for a spurious interrupt issue that seems to bite only very special Malta configurations." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Malta: Don't crash on spurious interrupt. MIPS: Malta: Remove RTC Data Mode bootstrap breakage MIPS: mm: Add compound tail page _mapcount when mapped MIPS: CMP/SMTC: Fix tc_id calculation
2012-09-22MIPS: Merge the identical "return from syscall" per-ABI codeAl Viro
No need to keep 4 copies of that stuff; merged and taken to entry.S, unused public symbols there killed off. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-22MIPS: Prevent hitting do_notify_resume() with !user_mode(regs).Al Viro
Too late to do anything there... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-13MIPS: Add base architecture support for RI and XI.Steven J. Hill
Originally both Read Inhibit (RI) and Execute Inhibit (XI) were supported by the TLB only for a SmartMIPS core. The MIPSr3(TM) Architecture now defines an optional feature to implement these TLB bits separately. Support for one or both features can be checked by looking at the Config3.RXI bit. Signed-off-by: Steven J. Hill <sjhill@mips.com> Acked-by: David Daney <david.daney@cavium.com>
2012-09-13MIPS: Make VPE count to be one-based.Steven J. Hill
When dealing with multiple VPEs, the count needs to be one-based for correct initialization of the GIC. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-13MIPS: Add new end of interrupt functionality for GIC.Steven J. Hill
Each platform should define its own 'gic_finish_irq' function. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-13MIPS: Add EIC support for GIC.Steven J. Hill
Add support to use an external interrupt controller with the GIC. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-13MIPS: Code clean-ups for the GIC.Steven J. Hill
Fix whitespace, beautify the code and remove debug statements. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-13MIPS: Make GIC code platform independent.Steven J. Hill
The GIC interrupt code is used by multiple platforms and the current code was half Malta dependent code. These changes abstract away the platform specific differences. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-13MIPS: Add support for the 1074K core.Steven J. Hill
Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-08-27MIPS: CMP/SMTC: Fix tc_id calculationRongQing.Li
Currently the tc_id code is: (read_c0_tcbind() >> TCBIND_CURTC_SHIFT) & TCBIND_CURTC; After processing this becomes: (read_c0_tcbind() >> 21) & ((0xff) << 21) But it should be: (read_c0_tcbind() & ((0xff)<< 21)) >> 21 Signed-off-by: RongQing.Li <roy.qing.li@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4077/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-22MIPS: Fix build error for non-malta VSMP kernelAnoop P A
VSMP kernel build for non-malta platforms fails with following error LD init/built-in.o LD .tmp_vmlinux1 arch/mips/built-in.o: In function `vsmp_init_secondary': smp-mt.c:(.cpuinit.text+0x23cc): undefined reference to `gic_present' smp-mt.c:(.cpuinit.text+0x23d0): undefined reference to `gic_present' make: *** [.tmp_vmlinux1] Error 1 gic_present variable is declared only if IRQ_GIC is selected. Signed-off-by: Anoop P A <anoop.pa@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/2039/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-22MIPS: introduce CPU_R4K_FPUFlorian Fainelli
R4K-style CPUs have this boolean defined by default. Allows us to remove some lines in arch/mips/kernel/Makefile. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/3330/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-17MIPS: Synchronize MIPS count one CPU at a timeJayachandran C
The current implementation of synchronise_count_{master,slave} blocks slave CPUs in early boot until all of them come up. This no longer works because blocking a CPU with interrupts off after notifying the CPU to be online causes problems with the current kernel. Specifically, after the workqueue changes (commit a08489c569dc1 "Pull workqueue changes from Tejun Heo") the CPU_ONLINE notification callback workqueue_cpu_up_callback() will hang on wait_for_completion(&idle_rebind.done), if the slave CPUs are blocked for synchronize_count_slave(). The changes are to update synchronize_count_{master,slave}() to handle one CPU at a time and to call synchronise_count_master() in __cpu_up() so that the CPU_ONLINE notification goes out only after the COP0 COUNT register is synchronized. [ralf@linux-mips.org: This matter only to those few platforms which are using the cp0 counter as their clocksource which are XLP, XLR and MIPS' CMP solution.] Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4216/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: Module: Deal with malformed HI16/LO16 relocation sequences.Ralf Baechle
In case a series of R_MIPS_HI16 relocations was not followed by an R_MIPS_LO16 relocation we were leaking the hi16 relocation chain. Handle that error and return an error. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: Fix race condition in module relocation code.Ralf Baechle
The relocation code was essentially taken from the 2.4 modutils which perform relocation in userspace. In 2.6 relocation of multiple modules may be performed in parallel by the in-kernel loader so the global variable mips_hi16_list won't fly anymore. Fix race by moving it into mod_arch_specific. [ralf@linux-mips.org: folded in Tony's followup fix. Thanks Tony!] Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/4189/
2012-08-17MIPS: Fix memory leak in error path of HI16/LO16 relocation handling.Ralf Baechle
Commit 6f5d2e970452b5c86906adcb8e7ad246f535ba39 (lmo) / 477c4b07406357ad93d0e32788dbf3ee814eadaa (kernel.org) [[MIPS: VPE: Free relocation chain on error.] fixed the same issue in the vpe loader in 2009 but back then the same bug in module.c went unfixed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Akhilesh Kumar <akhilesh.lxr@gmail.com>
2012-08-01MIPS: Loongson 2: Sort out clock managment.Ralf Baechle
For unexplainable reasons the Loongson 2 clock API was implemented in a module so fixing this involved shifting large amounts of code around. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-30Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds
Pull MIPS updates from Ralf Baechle: "More hardware support across the field including a bunch of device drivers. The highlight however really are further steps towards device tree. This has been sitting in -next for ages. All MIPS _defconfigs have been tested to boot or where I don't have hardware available, to at least build fine." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (77 commits) MIPS: Loongson 1B: Add defconfig MIPS: Loongson 1B: Add board support MIPS: Netlogic: early console fix MIPS: Netlogic: Fix indentation of smpboot.S MIPS: Netlogic: remove cpu_has_dc_aliases define for XLP MIPS: Netlogic: Remove unused pcibios_fixups MIPS: Netlogic: Add XLP SoC devices in FDT MIPS: Netlogic: Add IRQ mappings for more devices MIPS: Netlogic: USB support for XLP MIPS: Netlogic: XLP PCIe controller support. MIPS: Netlogic: Platform changes for XLR/XLS I2C MIPS: Netlogic: Platform NAND/NOR flash support MIPS: Netlogic: Platform changes for XLS USB MIPS: Netlogic: Remove NETLOGIC_ prefix MIPS: Netlogic: SMP wakeup code update MIPS: Netlogic: Update comments in smpboot.S MIPS: BCM63XX: Add 96328avng reference board MIPS: Expose PCIe drivers for MIPS MIPS: BCM63XX: Add PCIe Support for BCM6328 MIPS: BCM63XX: Move the PCI initialization into its own function ...
2012-07-26posix_types.h: Cleanup stale __NFDBITS and related definitionsJosh Boyer
Recently, glibc made a change to suppress sign-conversion warnings in FD_SET (glibc commit ceb9e56b3d1). This uncovered an issue with the kernel's definition of __NFDBITS if applications #include <linux/types.h> after including <sys/select.h>. A build failure would be seen when passing the -Werror=sign-compare and -D_FORTIFY_SOURCE=2 flags to gcc. It was suggested that the kernel should either match the glibc definition of __NFDBITS or remove that entirely. The current in-kernel uses of __NFDBITS can be replaced with BITS_PER_LONG, and there are no uses of the related __FDELT and __FDMASK defines. Given that, we'll continue the cleanup that was started with commit 8b3d1cda4f5f ("posix_types: Remove fd_set macros") and drop the remaining unused macros. Additionally, linux/time.h has similar macros defined that expand to nothing so we'll remove those at the same time. Reported-by: Jeff Law <law@redhat.com> Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> CC: <stable@vger.kernel.org> Signed-off-by: Josh Boyer <jwboyer@redhat.com> [ .. and fix up whitespace as per akpm ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-07-25Merge branches 'next/generic', 'next/alchemy', 'next/bcm63xx', ↵Ralf Baechle
'next/cavium', 'next/jz4740', 'next/lantiq', 'next/loongson1b' and 'next/netlogic' into mips-for-linux-next
2012-07-23MIPS: Add CPU support for Loongson1BKelvin Cheung
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: SMTC: Support for Multi-threaded FPUsSteven J. Hill
Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3603/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Prune some target specific code out of prom.cDavid Daney
This code is not common enough to be in a shared file. It is also not used by any existing boards, so just remove it. [ralf@linux-mips.org: Dropped removal of irq_create_of_mapping which was already removed by abd2363f6a5f1030b935e0bdc15cf917313b3b10 [irq_domain/mips: Allow irq_domain on MIPS]. Moved device_tree_init() and dependencies to its sole user, the XLP code.] Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: grant.likely@secretlab.ca Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2946/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: sync-r4k: remove redundant irq operationYong Zhang
Since we have delayed irq enabling to ->smp_finish() Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: smp: Warn on too early irq enableYong Zhang
Just to catch a potential issue. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3852/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: call set_cpu_online() on cpu being brought up with irq disabledYong Zhang
To prevent a problem as commit 5fbd036b [sched: Cleanup cpu_active madness] and commit 2baab4e9 [sched: Fix select_fallback_rq() vs cpu_active/cpu_online] try to resolve, move set_cpu_online() to the brought up CPU and with irq disabled. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3851/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: call ->smp_finish() a little lateYong Zhang
We have move irq enable to ->smp_finish. Place ->smp_finish() a little late to prepare for move set_cpu_online() into start_secondary. And it's not necessary to call cpu_set(cpu, cpu_callin_map) and synchronise_count_slave() with irq enabled. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3850/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: SMTC: delay irq enable to ->smp_finish()Yong Zhang
To prepare for smoothing set_cpu_[active|online]() mess up Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: BMIPS: delay irq enable to ->smp_finish()Yong Zhang
To prepare for smoothing set_cpu_[active|online]() mess up Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3846/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Oprofile: Fix build as a module.Ralf Baechle
When building oprofile as a module for R10000 or R7000 class processors, E9000 or MIPSxx class cores since 3572a2c37f667ee49333f8863722b8f43eac506b [MIPS: make oprofile use cp0_perfcount_irq if it is set] an ERROR: "cp0_compare_irq" [arch/mips/oprofile/oprofile.ko] undefined! error will happen. Fixed by exporting cp0_compare_irq. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: perf: Fix build error caused by unused counters_per_cpu_to_total()Florian Fainelli
cc1: warnings being treated as errors arch/mips/kernel/perf_event_mipsxx.c:166: error: 'counters_per_cpu_to_total' defined but not used make[2]: *** [arch/mips/kernel/perf_event_mipsxx.o] Error 1 make[2]: *** Waiting for unfinished jobs.... It was first introduced by 82091564cfd7ab8def42777a9c662dbf655c5d25 [MIPS: perf: Add support for 64-bit perf counters.] in 3.2. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: david.daney@cavium.com Patchwork: https://patchwork.linux-mips.org/patch/3357/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Fix Magic SysRq L kernel crash.Vincent Wen
show_backtrace() was passed a NULL pointer which caused paging request fail. Set to current task as other architectures (ARM, etc) do when passed a NULL task pointer. Signed-off-by: Vincent Wen <vincentwenlinux@gmail.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/3524/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: BMIPS: Fix duplicate header inclusion.Danny Kukawka
Signed-off-by: Danny Kukawka <danny.kukawka@bisect.de> Cc: Danny Kukawka <dkukawka@suse.de> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3369/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: SMTC: Spelling and grammar corrections.Ralf Baechle
Extractd from Steven J. Hill's https://patchwork.linux-mips.org/patch/3603/. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Properly align the .data..init_task section.David Daney
Improper alignment can lead to unbootable systems and/or random crashes. [ralf@linux-mips.org: This is a lond standing bug since 6eb10bc9e2deab06630261cd05c4cb1e9a60e980 (kernel.org) rsp. c422a10917f75fd19fa7fe070aaaa23e384dae6f (lmo) [MIPS: Clean up linker script using new linker script macros.] so dates back to 2.6.32.] Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/3881/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Fix race condition with FPU thread task flag during context switch.Leonid Yegoshin
[ralf@linux-mips.org: Cosmetic changes; also fixed up r2300_switch.S and octeon_switch.S which needed similar modifications.] Signed-off-by: Leonid Yegoshin <yegoshin@mips.com> Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3784/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Refactor 'clear_page' and 'copy_page' functions.Steven J. Hill
Remove usage of the '__attribute__((alias("...")))' hack that aliased to integer arrays containing micro-assembled instructions. This hack breaks when building a microMIPS kernel. It also makes the code much easier to understand. [ralf@linux-mips.org: Added back export of the clear_page and copy_page symbols so certain modules will work again. Also fixed build with CONFIG_SIBYTE_DMA_PAGEOPS enabled.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3866/ Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Don't panic on 5KEc.Leonid Yegoshin
It's a bloody bog standard MIPS64R2 core with just a new PrId ID. Iow that essentially means Linux just panics because it doesn't know how to name the core. [ralf@linux-mips.org: Split original patch into several smaller patches.] Signed-off-by: Leonid Yegoshin <yegoshin@mips.com> Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3792/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-06MIPS: Add support for the M14Kc core.Steven J. Hill
[ralf@linux-mips.org: Fixed whitespace damage.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3773/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>