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lantiq
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irq.c
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Commit message (
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Author
2014-11-24
MIPS: lantiq: move eiu init after irq_domain register
John Crispin
2014-11-24
MIPS: Add hook to get C0 performance counter interrupt
Andrew Bresticker
2014-05-24
MIPS: MT: Remove SMTC support
Ralf Baechle
2013-10-29
MIPS: Panic messages should not end in \n.
Ralf Baechle
2013-07-14
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
Paul Gortmaker
2013-02-17
MIPS: lantiq: rework external irq code
John Crispin
2013-01-30
MIPS: Lantiq: Fix cp0_perfcount_irq mapping
John Crispin
2012-08-23
MIPS: lantiq: external irq sources are not loaded properly
John Crispin
2012-08-23
MIPS: lantiq: dont register irq_chip for the irq cascade
John Crispin
2012-08-23
MIPS: lantiq: timer irq can be different to 7
John Crispin
2012-08-23
MIPS: lantiq: split up IRQ IM ranges
John Crispin
2012-05-21
OF: MIPS: lantiq: implement irq_domain support
John Crispin
2012-05-15
MIPS: lantiq: add ipi handlers to make vsmp work
John Crispin
2012-05-15
MIPS: lantiq: enable oprofile support on lantiq targets
John Crispin
2012-05-15
MIPS: lantiq: clear all irqs properly on boot
John Crispin
2012-01-11
Merge branch 'next/generic' into mips-for-linux-next
Ralf Baechle
2011-12-07
MIPS: irq: Remove IRQF_DISABLED
Yong Zhang
2011-12-07
MIPS: Fix up inconsistency in panic() string argument.
Ralf Baechle
2011-09-21
MIPS: Lantiq: Fix external interrupt sources
John Crispin
2011-05-19
MIPS: Lantiq: Add initial support for Lantiq SoCs
John Crispin