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path: root/arch/mips/lantiq/xway/sysctrl.c
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2013-10-29MIPS: Panic messages should not end in \n.Ralf Baechle
Panic() is going to add a \n itself and it's annoying if a panic message rolls of the screen on a device with no scrollback. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-17MIPS: lantiq: add GPHY clock gate bitsJohn Crispin
Explicitly enable the clock gate of the internal GPHYs found on xrx200. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4816/
2013-02-17MIPS: lantiq: adds static clock for PP32John Crispin
The Lantiq DSL SoCs have an internal networking processor. Add code to read the static clock rate. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4815/
2013-02-17MIPS: lantiq: trivial typo fixJohn Crispin
"nodes" is written with a single "s" Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4814/
2012-11-11MIPS: lantiq: adds xrx200 ethernet clock definitionJohn Crispin
Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4521
2012-10-05Merge branch 'master' of git://dev.phrozen.org/mips-next into ↵Ralf Baechle
mips-for-linux-next
2012-08-23MIPS: lantiq: enable pci clk conditional for xrx200 SoCJohn Crispin
The xrx200 SoC family has the same PCI clock register layout as the AR9. Enable the same quirk as for AR9 Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4235/
2012-08-22MIPS: lantiq: explicitly enable clkout generationJohn Crispin
Previously we relied on the bootloader to have enabled this bit. However some bootloaders seem to not enable this for us. Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4120/
2012-08-01MIPS: Lantiq: Fix interface clock and PCI control register offsetJohn Crispin
The XRX200 based SoC have a different register offset for the interface clock and PCI control registers. This patch detects the SoC and sets the register offset at runtime. This make PCI work on the VR9 SoC. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4113/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-26MIPS: lantiq: remove orphaned codeJohn Crispin
Now that all drivers are converted to OF we are able to remove some remaining pieces of orphaned code. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3841/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-21MIPS: lantiq: implement support for clkdev apiJohn Crispin
This patch unifies all clock generation and gating code into one file. All drivers will now be able to request their clocks via their device. This patch also adds support for the clockout feature, which allows clock generation on external pins. Support for COMMON_CLK will be provided in the next series. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3804/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>