asmadeus/linux.git - The linux kernel

Age	Commit message (Expand)	Author
2014-12-11	Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus	Linus Torvalds
2014-11-27	MIPS: tlbex: Fix potential HTW race on TLBL/M/S handlers	Leonid Yegoshin
2014-11-24	MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT	Ralf Baechle
2014-10-22	MIPS: tlbex: Properly fix HUGE TLB Refill exception handler	David Daney
2014-08-02	Merge branch '3.16-fixes' into mips-for-linux-next	Ralf Baechle
2014-08-02	MIPS: Use dedicated exception handler if CPU supports RI/XI exceptions	Leonid Yegoshin
2014-08-02	MIPS: mm: Use the Hardware Page Table Walker if the core supports it	Markos Chandras
2014-08-01	MIPS: bugfix: missed cache flush of TLB refill handler	Leonid Yegoshin
2014-07-30	MIPS: tlbex: Fix a missing statement for HUGETLB	Huacai Chen
2014-06-02	MIPS: Add code for new system 'paravirt'	David Daney
2014-05-30	MIPS: Don't build fast TLB refill handler with 32-bit kernels	David Daney
2014-05-14	MIPS: mm: Fix broken microMIPS kernel regression.	Steven J. Hill
2014-03-31	MIPS: Loongson: Add basic Loongson-3 CPU support	Huacai Chen
2014-03-31	MIPS: Use current_cpu_type() instead of c->cputype	Wu Zhangjin
2014-03-26	MIPS: Add support for the M5150 processor	Leonid Yegoshin
2014-03-26	MIPS: Add cases for CPU_P5600	James Hogan
2014-03-06	MIPS: Add 1074K CPU support explicitly.	Steven J. Hill
2014-01-24	mips: delete non-required instances of include <linux/init.h>	Paul Gortmaker
2014-01-22	MIPS: Add support for the proAptiv cores	Leonid Yegoshin
2013-10-29	MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips.	Ralf Baechle
2013-10-29	MIPS: mm: Use scratch for PGD when !CONFIG_MIPS_PGD_C0_CONTEXT	Jayachandran C
2013-10-29	MIPS: Move definition of SMP processor id register to header file	Jayachandran C
2013-09-17	MIPS: Optimize current_cpu_type() for better code.	Ralf Baechle
2013-08-26	MIPS: Generate OCTEON3 TLB handlers with the same features as OCTEON2.	David Daney
2013-07-19	Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus	Linus Torvalds
2013-07-19	MIPS: tlbex: fix broken build in v3.11-rc1	Aaro Koskinen
2013-07-19	MIPS: tlbex: Fix typo in r3000 tlb store handler	Tony Wu
2013-07-14	MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code	Paul Gortmaker
2013-07-12	Merge branch '3.10-fixes' into mips-for-linux-next	Ralf Baechle
2013-07-01	MIPS: Fix typos and cleanup comment	Tony Wu
2013-07-01	MIPS: Move generated code to .text for microMIPS	Jayachandran C
2013-06-27	MIPS: tlbex: Fix size of area to be flushed.	Ralf Baechle
2013-06-25	MIPS: Flush TLB handlers directly after writing them	Jonas Gorski
2013-06-21	MIPS: Fix TLBR-use hazards for R2 cores in the TLB reload handlers	Ralf Baechle
2013-06-13	MIPS: Fixup check for invalid scratch register	Jayachandran C
2013-06-13	MIPS: Allow platform specific scratch registers	Jayachandran C
2013-05-23	MIPS: Remove duplicate definition of check_for_high_segbits.	David Daney
2013-05-16	Revert "MIPS: Allow ASID size to be determined at boot time."	David Daney
2013-05-16	Revert "MIPS: microMIPS: Support dynamic ASID sizing."	David Daney
2013-05-09	Merge branch 'mti-next' of git://git.linux-mips.org/pub/scm/sjhill/linux-sjhi...	Ralf Baechle
2013-05-09	MIPS: microMIPS: Add support for exception handling.	Steven J. Hill
2013-05-08	MIPS: microMIPS: Support dynamic ASID sizing.	Steven J. Hill
2013-05-08	MIPS: Allow ASID size to be determined at boot time.	Steven J. Hill
2013-05-08	Merge branch 'mips-next-3.10' of git://git.linux-mips.org/pub/scm/john/linux-...	Ralf Baechle
2013-05-08	MIPS: Build uasm-generated code only once to avoid CPU Hotplug problem	Huacai Chen
2013-04-11	MIPS: Make declarations and definitions of tlbmiss_handler_setup_pgd match.	Ralf Baechle
2013-02-21	Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...	Ralf Baechle
2013-02-17	MIPS: Add support for the M14KEc core.	Steven J. Hill
2013-02-01	MIPS: Whitespace cleanup.	Ralf Baechle
2012-12-27	Revert "MIPS: Optimise TLB handlers for MIPS32/64 R2 cores."	Ralf Baechle