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2013-07-14MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker
commit 3747069b25e419f6b51395f48127e9812abc3596 upstream. The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) and are flagged as __cpuinit -- so if we remove the __cpuinit from the arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit related content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. Here, we remove all the MIPS __cpuinit from C code and __CPUINIT from asm files. MIPS is interesting in this respect, because there are also uasm users hiding behind their own renamed versions of the __cpuinit macros. [1] https://lkml.org/lkml/2013/5/20/589 [ralf@linux-mips.org: Folded in Paul's followup fix.] Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5494/ Patchwork: https://patchwork.linux-mips.org/patch/5495/ Patchwork: https://patchwork.linux-mips.org/patch/5509/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-12Merge branch '3.10-fixes' into mips-for-linux-nextRalf Baechle
This that should have been fixed but weren't, way to much, intrusive and late.
2013-07-01MIPS: Malta: Update GCMP detection.Leonid Yegoshin
Add GCMP detection for IASim Marvell chip emulation support. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Acked-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/5529/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-01MIPS: Malta: Move platform-specific PCI code to arch/mips/pci.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-21MIPS: malta: Remove software reset defines from generic header.Steven J. Hill
Remove the software reset register and reset value definitions from the 'include/asm/mips-boards/generic.h' header file. Also clean up header and whitespace in platform file. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5456/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-21MIPS: malta: Move defines of reset registers and values.Steven J. Hill
Remove usage of 'include/asm/mips-boards/generic.h' header file. Instead, move the defines for SOFTRES_REG and GORESET local to the platform file. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5455/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-09Merge branch 'mti-next' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
2013-05-09MIPS: Add new GIC clockevent driver.Raghu Gandham
Add new clockevent driver that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Raghu Gandham <Raghu.Gandham@imgtec.com> Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-09MIPS: Refactor GIC clocksource code.Steven J. Hill
Reorganize some of the GIC clocksource driver code. Below is a list of the various changes. * No longer select CSRC_GIC by default for Malta platform. * Limit choice for either the GIC or R4K clocksource, not both. * Change location in Makefile. * Created new 'gic_read_count' function in common 'irq-gic.c' file. * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function. * Surround GIC specific code in Malta platform code with #ifdef's. * Only initialize the GIC clocksource if it was selected. Original code called it unconditionally if a GIC was found. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-09MIPS: Move 'gic_frequency' to common location.Steven J. Hill
Move the global variable 'gic_frequency' to be defined in the file 'arch/mips/kernel/irq-gic.c' instead of defining it individually for each platform making use of the GIC. Also change the type to be an unsigned integer instead of signed. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-09MIPS: Move 'gic_present' to common location.Steven J. Hill
Move the global variable 'gic_present' to be defined in the file 'arch/mips/kernel/irq-gic.c' instead of defining it individually for each platform making use of the GIC. Also change the type to be an unsigned integer instead of signed. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: malta: Code formatting clean-ups.Steven J. Hill
Clean-up code according to the 'checkpatch.pl' script. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: Remove obsolete header file for MTI platforms.Steven J. Hill
Remove 'arch/mips/include/asm/mips-boards/prom.h' and get rid of all inclusions of it by Malta and SEAD-3 platforms. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: ar7 powertv build"]. [ralf@linux-mips.org: Fold in John Crispin <blogic@openwrt.org>'s "MIPS: unbreak powertv build"]. [ralf@linux-mips.org: Test. Build. Your. Fscking. Code. Or...] Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08MIPS: FW: malta: Use new common FW library variable processing.Steven J. Hill
Remove old YAMON prom code and use common firmware library code. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-05-08KVM/MIPS32: KVM Guest kernel support.Sanjay Lal
Both Guest kernel and Guest Userspace execute in UM. The memory map is as follows: Guest User address space: 0x00000000 -> 0x40000000 Guest Kernel Unmapped: 0x40000000 -> 0x60000000 Guest Kernel Mapped: 0x60000000 -> 0x80000000 - Guest Usermode virtual memory is limited to 1GB. Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-08KVM/MIPS32: Infrastructure/build files.Sanjay Lal
- Add the KVM option to MIPS build files. - Add default config files for KVM host/guest kernels. - Change the link address for the Malta KVM Guest kernel to UM (0x40100000). - Add KVM Kconfig file with KVM/MIPS specific options Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> Cc: kvm@vger.kernel.org Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-05-01MIPS: Add option to disable software I/O coherency.Steven J. Hill
Some MIPS controllers have hardware I/O coherency. This patch detects those and turns off software coherency. A new kernel command line option also allows the user to manually turn software coherency on or off. Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
2013-02-21Merge branch 'mips-next-3.9' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/john/linux-john into mips-for-linux-next
2013-02-17MIPS: Add new GIC clocksource.Steven J. Hill
Add new clocksource that uses the counter present on the MIPS Global Interrupt Controller. Signed-off-by: Steven J. Hill <sjhill@mips.com> Patchwork: http://patchwork.linux-mips.org/patch/4681/ Signed-off-by: John Crispin <blogic@openwrt.org>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-11-13MIPS: Malta: Fix interupt number of CBUS UART.Ralf Baechle
The CBUS UART's interrupt number was wrong conflicting with the interrupt being tied to the Intel PIIX4. Since the PIIX4's interrupt is registered before the CBUS UART which is not being used on most systems this would not be noticed. Attempts to open the ttyS2 CBUS UART would result in: genirq: Flags mismatch irq 18. 00000000 (serial) vs. 00010000 (XT-PIC cascade) serial_link_irq_chain: request failed: -16 for irq: 18 Qemu was written to match the kernel so will need to be fixed also. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-28Merge branch 'ralf-3.7' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
2012-09-27Merge branch 'cn68xx-ciu2' of ↵Ralf Baechle
git://git.linux-mips.org/pub/scm/daney/upstream-daney into mips-for-linux-next
2012-09-17MIPS: Malta: Don't crash on spurious interrupt.Ralf Baechle
48d480b0bde794781fcae9501fb043c1bac0e523 [[MIPS] Malta: Fix off by one bug in interrupt handler.] did not take in account that irq_ffs() will also return 0 if for some reason the set of pending interrupts happens to be empty. This is trivial to trigger with a RM5261 CPU module running a 64-bit kernel and results in something like the following: CPU 0 Unable to handle kernel paging request at virtual address 0000000000000000, epc == ffffffff801772d0, ra == ffffffff8017ad24 Oops[#1]: Cpu 0 $ 0 : 0000000000000000 ffffffff9000a4e0 ffffffff9000a4e0 ffffffff9000a4e0 $ 4 : ffffffff80592be0 0000000000000000 00000000000000d6 ffffffff80322ed0 $ 8 : ffffffff805fe538 0000000000000000 ffffffff9000a4e0 ffffffff80590000 $12 : 00000000000000d6 0000000000000000 ffffffff80600000 ffffffff805fe538 $16 : 0000000000000000 0000000000000010 ffffffff80592be0 0000000000000010 $20 : 0000000000000000 0000000000500001 0000000000000000 ffffffff8051e078 $24 : 0000000000000028 ffffffff803226e8 $28 : 9800000003828000 980000000382b900 ffffffff8051e060 ffffffff8017ad24 Hi : 0000000000000000 Lo : 0000006388974000 epc : ffffffff801772d0 handle_irq_event_percpu+0x70/0x2f0 Not tainted ra : ffffffff8017ad24 handle_percpu_irq+0x54/0x88 Status: 9000a4e2 KX SX UX KERNEL EXL Cause : 00808008 BadVA : 0000000000000000 PrId : 000028a0 (Nevada) Modules linked in: Process init (pid: 1, threadinfo=9800000003828000, task=9800000003827968, tls=0000000077087490) Stack : ffffffff80592be0 ffffffff8058d248 0000000000000040 0000000000000000 ffffffff80613340 0000000000500001 ffffffff805a0000 0000000000000882 9800000003b89000 ffffffff8017ad24 00000000000000d5 0000000000000010 ffffffff9000a4e1 ffffffff801769f4 ffffffff9000a4e0 ffffffff801037f8 0000000000000000 ffffffff80101c44 0000000000000000 ffffffff9000a4e0 0000000000000000 9000000018000000 90000000180003f9 0000000000000001 0000000000000000 00000000000000ff 0000000000000018 0000000000000001 0000000000000001 00000000003fffff 0000000000000020 ffffffff802cf7ac ffffffff80208918 000000007fdadf08 ffffffff80612d88 ffffffff9000a4e1 0000000000000040 0000000000000000 ffffffff80613340 0000000000500001 ... Call Trace: [<ffffffff801772d0>] handle_irq_event_percpu+0x70/0x2f0 [<ffffffff8017ad24>] handle_percpu_irq+0x54/0x88 [<ffffffff801769f4>] generic_handle_irq+0x44/0x60 [<ffffffff801037f8>] do_IRQ+0x48/0x70 [<ffffffff80101c44>] ret_from_irq+0x0/0x4 [<ffffffff80326170>] serial8250_startup+0x310/0x870 [<ffffffff8032175c>] uart_startup.part.7+0x9c/0x330 [<ffffffff80321b4c>] uart_open+0x15c/0x1b0 [<ffffffff80302034>] tty_open+0x1fc/0x720 [<ffffffff801bffac>] chrdev_open+0x7c/0x180 [<ffffffff801b9ab8>] do_dentry_open.isra.14+0x288/0x390 [<ffffffff801bac5c>] nameidata_to_filp+0x5c/0xc0 [<ffffffff801ca700>] do_last.isra.33+0x330/0x8f0 [<ffffffff801caf3c>] path_openat+0xbc/0x440 [<ffffffff801cb3c8>] do_filp_open+0x38/0xa8 [<ffffffff801bade4>] do_sys_open+0x124/0x218 [<ffffffff80110538>] handle_sys+0x118/0x13c Code: 02d5a825 12800012 02a0b02d <de820000> de850008 0040f809 0220202d 0040a82d 40026000 ---[ end trace 5d8e7b9a86badd2d ]--- Kernel panic - not syncing: Fatal exception in interrupt Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-14MIPS: Malta: Remove RTC Data Mode bootstrap breakageMaciej W. Rozycki
YAMON requires and enforces the RTC Data Mode (Register B, DM bit) to binary, that is the bit is set every time the board goes through the firmware bootstrap sequence. Likewise its calendar manipulation commands interpret or set the RTC registers unconditionally as binary, never actually checking what the value of the DM bit is, under the (correct) assumption that it has been previously set, to indicate the binary mode. A change to Linux a while ago however introduced a platform-specific tweak that clears that bit and therefore forces the data mode to BCD. This causes clock corruption and misinterpretation that has to be fixed up by user-mode tools in system startup scripts as the initial clock is often incorrect according to the BCD interpretation forced. This change removes the hack; a comment included refers to alarm code, but even if it was broken at one point by requiring the BCD mode, it should have been trivially corrected and even if not, given how rarely the alarm feature is used, that was not really a reasonable justification to break the system clock that is indeed used by virtually everything. And either way the alarm code has been since fixed anyway. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4336/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-13MIPS: Make GIC code platform independent.Steven J. Hill
The GIC interrupt code is used by multiple platforms and the current code was half Malta dependent code. These changes abstract away the platform specific differences. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-08-17MIPS: Malta: Delete duplicate PCI fixup.Ralf Baechle
2ec8663f9c03a96f2c328c7c483603c31d62ad37 (lmo) rsp. 497e5ff03f58583ada469db8a1aa34eced9dd63e (kernel.org) [MIPS: Malta: Move PIIX4 PCI fixup to where it belongs.] attempted to move this PCI fixup but really only added it at it's new location without deleting the old instance. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: PCI: Move fixups from __init to __devinit.Sebastian Andrzej Siewior
Fixups are executed once the pci-device is found which is during boot process so __init seems fine as long as the platform does not support hotplug. However it is possible to remove the PCI bus at run time and have it rediscovered again via "echo 1 > /sys/bus/pci/rescan" and this will call the fixups again. [ralf@linux-mips.org: Made piixirqmap[] in malta_piix_func0_fixup() __initdata.] Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc> Cc: linux-mips@linux-mips.org Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19mips: mark const init data with __initconst instead of __initdataUwe Kleine-König
As long as there is no other non-const variable marked __initdata in the same compilation unit it doesn't hurt. If there were one however compilation would fail with error: $variablename causes a section type conflict because a section containing const variables is marked read only and so cannot contain non-const variables. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: kernel@pengutronix.de Patchwork: https://patchwork.linux-mips.org/patch/3565/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Malta: Change start address to avoid conflicts.Steven J. Hill
There are ACPI and SMB devices in the 0x1000..0x1fff address range. Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3581/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-03-28Disintegrate asm/system.h for MIPSDavid Howells
Disintegrate asm/system.h for MIPS. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> cc: linux-mips@linux-mips.org
2011-12-07MIPS: irq: Remove IRQF_DISABLEDYong Zhang
Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. [ralf@linux-mips.org: Fixed up conflicts in arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and arch/mips/kernel/perf_event.c.] Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> To: linux-kernel@vger.kernel.org Cc: tglx@linutronix.de linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2835/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-21MIPS: Mark cascade and low level interrupts IRQF_NO_THREADWu Zhangjin
Mark interrupts with no_action handler, cascade interrupts, low level interrupts (bus error, halt ..) with IRQF_NO_THREAD to exclude them from forced threading. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: linux-mips@linux-mips.org Cc: Wu Zhangjin <wuzhangjin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-07-26Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linusLinus Torvalds
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: (31 commits) MIPS: Close races in TLB modify handlers. MIPS: Add uasm UASM_i_SRL_SAFE macro. MIPS: RB532: Use hex_to_bin() MIPS: Enable cpu_has_clo_clz for MIPS Technologies' platforms MIPS: PowerTV: Provide cpu-feature-overrides.h MIPS: Remove pointless return statement from empty void functions. MIPS: Limit fixrange_init() to the FIXMAP region MIPS: Install handlers for software IRQs MIPS: Move FIXADDR_TOP into spaces.h MIPS: Add SYNC after cacheflush MIPS: pfn_valid() is broken on low memory HIGHMEM systems MIPS: HIGHMEM DMA on noncoherent MIPS32 processors MIPS: topdown mmap support MIPS: Remove redundant addr_limit assignment on exec. MIPS: AR7: Replace __attribute__((__packed__)) with __packed MIPS: AR7: Remove 'space before tabs' in platform.c MIPS: Lantiq: Add missing clk_enable and clk_disable functions. MIPS: AR7: Fix trailing semicolon bug in clock.c MAINTAINERS: Update MIPS entry. MIPS: BCM63xx: Remove duplicate PERF_IRQSTAT_REG definition ...
2011-07-20MIPS: Malta: Fix crash in SMP kernel on non-CMP systems.Ralf Baechle
Since 6be63bbbdab66b9185dc6f67c8b1bacb6f37f946 (lmo) rsp. af3a1f6f4813907e143f87030cde67a9971db533 (kernel.org) the Malta code does no longer probe for presence of GCMP if CMP is not configured. This means that the variable gcmp_present well be left at its default value of -1 which normally is meant to indicate that GCMP has not yet been mmapped. This non-zero value is now interpreted as GCMP being present resulting in a write attempt to a GCMP register resulting in a crash. Reported and a build fix on top of my fix by Rob Landley <rob@landley.net>. Reported-by: Rob Landley <rob@landley.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2413/
2011-07-20MIPS: Malta SMTC: Fix build.Ralf Baechle
Commit a561b02a2577aec51277ba39c82bd192a79c0267 (lmo) rsp. 7c8d948f1633da5ff81e4f5b31ef237d74c40127 (kernel.org) ["MIPS: i8259: Convert to new irq_chip functions"] missed one location to modify resulting in build breakage. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-06-09i8253: Create linux/i8253.h and use it in all 8253 related filesRalf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Cc: linux-mips@linux-mips.org Link: http://lkml.kernel.org/r/20110601180610.054254048@duck.linux-mips.net Signed-off-by: Thomas Gleixner <tglx@linutronix.de> arch/arm/mach-footbridge/isa-timer.c | 2 +- arch/mips/cobalt/time.c | 2 +- arch/mips/jazz/irq.c | 2 +- arch/mips/kernel/i8253.c | 2 +- arch/mips/mti-malta/malta-time.c | 2 +- arch/mips/sgi-ip22/ip22-time.c | 2 +- arch/mips/sni/time.c | 2 +- arch/x86/kernel/apic/apic.c | 2 +- arch/x86/kernel/apm_32.c | 2 +- arch/x86/kernel/hpet.c | 2 +- arch/x86/kernel/i8253.c | 2 +- arch/x86/kernel/time.c | 2 +- drivers/block/hd.c | 2 +- drivers/clocksource/i8253.c | 2 +- drivers/input/gameport/gameport.c | 2 +- drivers/input/joystick/analog.c | 2 +- drivers/input/misc/pcspkr.c | 2 +- include/linux/i8253.h | 11 +++++++++++ sound/drivers/pcsp/pcsp.h | 2 +- 19 files changed, 29 insertions(+), 18 deletions(-)
2011-05-19Merge branches 'sched-core-for-linus' and 'sched-urgent-for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'sched-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (60 commits) sched: Fix and optimise calculation of the weight-inverse sched: Avoid going ahead if ->cpus_allowed is not changed sched, rt: Update rq clock when unthrottling of an otherwise idle CPU sched: Remove unused parameters from sched_fork() and wake_up_new_task() sched: Shorten the construction of the span cpu mask of sched domain sched: Wrap the 'cfs_rq->nr_spread_over' field with CONFIG_SCHED_DEBUG sched: Remove unused 'this_best_prio arg' from balance_tasks() sched: Remove noop in alloc_rt_sched_group() sched: Get rid of lock_depth sched: Remove obsolete comment from scheduler_tick() sched: Fix sched_domain iterations vs. RCU sched: Next buddy hint on sleep and preempt path sched: Make set_*_buddy() work on non-task entities sched: Remove need_migrate_task() sched: Move the second half of ttwu() to the remote cpu sched: Restructure ttwu() some more sched: Rename ttwu_post_activation() to ttwu_do_wakeup() sched: Remove rq argument from ttwu_stat() sched: Remove rq->lock from the first half of ttwu() sched: Drop rq->lock from sched_exec() ... * 'sched-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: sched: Fix rt_rq runtime leakage bug
2011-05-10MIPS: Malta: Fix GCC 4.6.0 build errorRalf Baechle
CC arch/mips/mti-malta/malta-int.o arch/mips/mti-malta/malta-int.c: In function 'mips_pcibios_iack': arch/mips/mti-malta/malta-int.c:59:6: error: variable 'dummy' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-10MIPS: Malta: Fix GCC 4.6.0 build errorRalf Baechle
CC arch/mips/mti-malta/malta-init.o arch/mips/mti-malta/malta-init.c: In function 'prom_init': arch/mips/mti-malta/malta-init.c:196:6: error: variable 'result' set but not used [-Werror=unused-but-set-variable] cc1: all warnings being treated as errors Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-04-14sched: Provide scheduler_ipi() callback in response to smp_send_reschedule()Peter Zijlstra
For future rework of try_to_wake_up() we'd like to push part of that function onto the CPU the task is actually going to run on. In order to do so we need a generic callback from the existing scheduler IPI. This patch introduces such a generic callback: scheduler_ipi() and implements it as a NOP. BenH notes: PowerPC might use this IPI on offline CPUs under rare conditions! Acked-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reviewed-by: Frank Rowand <frank.rowand@am.sony.com> Cc: Mike Galbraith <efault@gmx.de> Cc: Nick Piggin <npiggin@kernel.dk> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Link: http://lkml.kernel.org/r/20110405152728.744338123@chello.nl
2011-03-31Fix common misspellingsLucas De Marchi
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-29MIPS: Convert the irq functions to the new namesThomas Gleixner
Scripted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-25MIPS: i8259: Convert to new irq_chip functionsThomas Gleixner
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2185/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-25MIPS: SMTC: Move declaration of smtc_init_secondary to <asm/smtc.h>.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-11-01tree-wide: fix comment/printk typosUwe Kleine-König
"gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-10-07MIPS: Add missing #inclusions of <linux/irq.h>David Howells
Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should really include it. Note that this can replace #inclusions of <asm/irq.h>. This is required for the patch to sort out irqflags handling function naming to compile on MIPS. The problem is that these files require access to things like setup_irq() - which isn't available by #including <linux/interrupt.h> Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Ralf Baechle <ralf@linux-mips.org>
2010-10-04MIPS: GIC: Remove dependencies from Malta files.Ralf Baechle
This prevents the GIC code from being reusable sanely. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-08-05MIPS: Malta: Migrate to new platform makefile style.Ralf Baechle
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-07-26MIPS: Set io_map_base for several PCI bridges lacking itBen Hutchings
Several MIPS platforms don't set pci_controller::io_map_base for their PCI bridges. This results in a panic in pci_iomap(). (The panic is conditional on CONFIG_PCI_DOMAINS, but that is now enabled for all PCI MIPS systems.) Signed-off-by: Ben Hutchings <ben@decadent.org.uk> Cc: linux-mips@linux-mips.org Cc: Martin Michlmayr <tbm@cyrius.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: 584784@bugs.debian.org Patchwork: https://patchwork.linux-mips.org/patch/1377/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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