Age | Commit message (Expand) | Author |
2011-02-09 | mn10300: Switch do_timer() to xtimer_update() | Torben Hohn |
2011-01-25 | percpu: align percpu readmostly subsection to cacheline | Tejun Heo |
2011-01-21 | mn10300: Use generic irq Kconfig | Thomas Gleixner |
2011-01-21 | genirq: Remove __do_IRQ | Thomas Gleixner |
2011-01-20 | kconfig: rename CONFIG_EMBEDDED to CONFIG_EXPERT | David Rientjes |
2011-01-13 | kernel: clean up USE_GENERIC_SMP_HELPERS | Amerigo Wang |
2011-01-13 | set_rtc_mmss: show warning message only once | Stephen Hemminger |
2011-01-03 | arch/mn10300/kernel/irq.c: fix build | Andrew Morton |
2010-12-20 | clarify a usage constraint for cnt32_to_63() | Nicolas Pitre |
2010-12-07 | MN10300: Fix interrupt mask alteration function call name in gdbstub | David Howells |
2010-12-03 | MN10300: Implement asm/syscall.h | David Howells |
2010-11-17 | BKL: remove extraneous #include <smp_lock.h> | Arnd Bergmann |
2010-10-28 | Merge branch 'kconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/mmare... | Linus Torvalds |
2010-10-27 | Merge git://git.kernel.org/pub/scm/linux/kernel/git/dhowells/linux-2.6-mn10300 | Linus Torvalds |
2010-10-27 | ptrace: cleanup arch_ptrace() on mn10300 | Namhyung Kim |
2010-10-27 | ptrace: change signature of arch_ptrace() | Namhyung Kim |
2010-10-27 | mm: fix race in kunmap_atomic() | Peter Zijlstra |
2010-10-27 | MN10300: Save frame pointer in thread_info struct rather than global var | David Howells |
2010-10-27 | MN10300: Change "Matsushita" to "Panasonic". | Akira Takeuchi |
2010-10-27 | MN10300: Create a defconfig for the ASB2364 board | Akira Takeuchi |
2010-10-27 | MN10300: Update the ASB2303 defconfig | Akira Takeuchi |
2010-10-27 | MN10300: ASB2364: Add support for SMSC911X and SMC911X | Akira Takeuchi |
2010-10-27 | MN10300: ASB2364: Handle the IRQ multiplexer in the FPGA | David Howells |
2010-10-27 | MN10300: Generic time support | Mark Salter |
2010-10-27 | MN10300: Specify an ELF HWCAP flag for MN10300 Atomic Operations Unit support | Mark Salter |
2010-10-27 | MN10300: Map userspace atomic op regs as a vmalloc page | Mark Salter |
2010-10-27 | MN10300: And Panasonic AM34 subarch and implement SMP | Akira Takeuchi |
2010-10-27 | MN10300: Delete idle_timestamp from irq_cpustat_t | Akira Takeuchi |
2010-10-27 | MN10300: Make various interrupt priority settings configurable | Akira Takeuchi |
2010-10-27 | MN10300: Optimise do_csum() | Akira Takeuchi |
2010-10-27 | MN10300: Implement atomic ops using atomic ops unit | Mark Salter |
2010-10-27 | MN10300: Make the FPU operate in non-lazy mode under SMP | Akira Takeuchi |
2010-10-27 | MN10300: SMP TLB flushing | Akira Takeuchi |
2010-10-27 | MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control | Akira Takeuchi |
2010-10-27 | MN10300: Make the use of PIDR to mark TLB entries controllable | Akira Takeuchi |
2010-10-27 | MN10300: Rename __flush_tlb*() to local_flush_tlb*() | David Howells |
2010-10-27 | MN10300: AM34 erratum requires MMUCTR read and write on exception entry | Akira Takeuchi |
2010-10-27 | MN10300: Make the boot wrapper able to use writeback caching | Akira Takeuchi |
2010-10-27 | MN10300: Cache: Implement SMP global cache flushing | Akira Takeuchi |
2010-10-27 | MN10300: Allow some cacheflushes to be avoided if cache snooping is available | David Howells |
2010-10-27 | MN10300: AM34: Add cacheflushing by using the AM34 purge registers | Akira Takeuchi |
2010-10-27 | MN10300: SMP: Differentiate local cache flushing | Akira Takeuchi |
2010-10-27 | MN10300: Cacheflush functions should take unsigned long addresses | Akira Takeuchi |
2010-10-27 | MN10300: AM34: The current cacheflush routines operate by controlling tag regs | David Howells |
2010-10-27 | MN10300: Reorder asm/cacheflush.h to put primitives first | David Howells |
2010-10-27 | MN10300: Provide a MN10300_CACHE_ENABLED config option | David Howells |
2010-10-27 | MN10300: Cache: Split cache bits out of arch Kconfig | David Howells |
2010-10-27 | MN10300: Remove monitor/JTAG functions | Akira Takeuchi |
2010-10-27 | MN10300: Add CPU register bits for AM34 | Akira Takeuchi |
2010-10-27 | MN10300: Don't hard code the cacheline size in register defs | Akira Takeuchi |