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P1020, P1021, P1022, P1023 when the lbc get error, the error
interrupt will be triggered. The corresponding interrupt is
internal IRQ0. So system have to process the lbc IRQ0 interrupt.
The corresponding lbc general interrupt is internal IRQ3.
Signed-off-by: Wang Dongsheng <dongsheng.wang@freescale.com>
[scottwood@freescale.com: bracketed individual list elements]
Signed-off-by: Scott Wood <scottwood@freescale.com>
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Fix and/or improve the compatible strings of the PCI device tree nodes for
some Freescale SOCs. This fixes some issues and improves consistency among
the SOCs.
Specifically:
1) The P1022 has a v1 PCIe controller, so the compatible property should just
say "fsl,mpc8548-pcie". U-Boot does not look for "fsl,p1022-pcie", so it
wasn't fixing up the node.
2) The P4080 has a v2.1 PCIe controller, so add that version-specific string
to the device tree. Update the kernel to also look for that string.
Currently, the kernel looks for "fsl,p4080-pcie" specifically, but
eventually that check should be deleted.
3) The P1010 device tree claims compatibility with v2.2 and v2.3, but that's
redundant. No other device tree does this. Remove the v2.2 string.
4) The kernel looks for both "fsl,p1023-pcie" and "fsl,qoriq-pcie-v2.2",
even though the P1023 device trees has always included both strings. Remove
the search for "fsl,p1023-pcie".
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The Freescale P1022 has a unique pin muxing "feature" where the DIU video
controller's video signals are muxed with 24 of the local bus address signals.
When the DIU is enabled, the bulk of the local bus is disabled, preventing
access to memory-mapped devices like NOR flash and the pixis FPGA.
Therefore, if the DIU is going to be enabled, then memory-mapped devices on
the localbus, like NOR flash, need to be disabled.
This also means that the localbus is not a 'simple-bus' any more, so remove
that string from the compatible node.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add usb controller version info for the following:
MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041,
P3041, P3060, P5020
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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According to latest kernel, the auto-cmd12 property should be
"sdhci,auto-cmd12", and according to the SDHC binding and the workaround for
the special chip, add the chip compatible for eSDHC: "fsl,p1022-esdhc",
"fsl,mpc8536-esdhc", "fsl,p1020-esdhc", "fsl,p2020-esdhc" and
"fsl,p1010-esdhc".
Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Utilize new split between board & SoC, and new SoC device trees split
into pre & post utilizing 'template' includes for SoC IP blocks.
Other changes include:
* Reworked PCIe nodes to allow supportin IRQs for controller (errors)
and moved PCI device IRQs down to virtual bridge level
* Changed GPIO compatiable from 'fsl,mpc8572-gpio' to 'fsl,pq3-gpio' as the
'mpc8572' compatiable is to deal with a 'mpc8572' specific to an erratum
* Updated spi node to new espi binding specification
* Renamed SDHC node from 'sdhci' to 'sdhc'
* Added usb node for 2nd usb controller
* Dropping "fsl,p1022-IP..." from compatibles for standard blocks
* Fixed bug in local bus range node for CS2, was maping to
0x0 0x0xffa00000 instead of 0xf 0xffa00000
* Fixed localbus reg property should have been 0xf 0xffe05000
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Tested-by: Timur Tabi <timur@freescale.com>
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