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path: root/arch/powerpc/boot/dts/mpc8536ds.dts
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2012-03-16powerpc/85xx: Add some DTS nodes and attributes for mpc8536dsXie Xiaobo
Add partitions for NOR and NAND Flash. Signed-off-by: Xie Xiaobo <X.Xie@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2011-11-24powerpc/85xx: Rework MPC8536DS device treesKumar Gala
Utilize new split between board & SoC, and new SoC device trees split into pre & post utilizing 'template' includes for SoC IP blocks. Other changes include: * Moved to specifying interrupt-parent for mpic at root * Moved to 4-cell mpic interrupt cells to support MPIC timers * Added localbus node, but no chipselect details at this point * Reworked PCIe nodes to allow supportin IRQs for controller (errors) * and moved PCI device IRQs down to virtual bridge level * Moved mdio nodes up one level instead of under tsec nodes * Added GPIO controller node to MPC8536 SoC template [ marked as MPC8572 compatiable to get errata handling that applies ] * Added missing cache-line-size & cache-size properties missing from L2-cache node * Added IP level IEEE 1588 / ptp timer node Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-12powerpc/of: add eSPI controller dts bindings and DTS modificationMingkai Hu
Also modifiy the document of cell-index in SPI controller. Add the SPI flash(s25fl128p01) support on p4080ds and mpc8536ds board. Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
2009-08-25powerpc/85xx: Add eSDHC support for MPC8536DS boardsAnton Vorontsov
This patch simply adds sdhci node to the device tree. We specify clock-frequency manually, so that eSDHC will work without upgrading U-Boot. Though, that'll only work for default setup (1500 MHz) on new board revisions. For non-default setups, it's recommended to upgrade U-Boot, since it will fixup clock-frequency automatically. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-20powerpc/85xx: Move mpc8536ds.dts to address-cells/size-cells = <2>Kumar Gala
Change the top-level #address-cells and #size-cells to <2> so the mpc8536ds.dts is easier to deal with both a true 32-bit physical or 36-bit physical address space. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2009-05-19powerpc/fsl: Removed reg property from 85xx/86xx soc nodeKumar Gala
Between the addition of the ecm/mcm law nodes and the fact that the get_immrbase() has been using the range property of the SoC to determine the base address of CCSR space we no longer need the reg property at the soc node level. It has been ill specified and varied between device trees to cover either the {e,m}cm-law node, some odd subset of CCSR space or all of CCSR space. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/85xx: Add new LAW & ECM device tree nodes for all 85xx systemsKumar Gala
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-05-19powerpc/fsl: Remove cell-index from PCI nodesKumar Gala
The cell-index property isn't used on PCI nodes and is ill defined. Remove it for now and if someone comes up with a good reason and consistent definition for it we can add it back Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-03-24powerpc/85xx: Move gianfar mdio nodes under the ethernet nodesAnton Vorontsov
Currently it doesn't matter where the mdio nodes are placed, but with power management support (i.e. when sleep = <> properties will take effect), mdio nodes placement will become important: mdio controller is a part of the ethernet block, so the mdio nodes should be placed correctly. Otherwise we may wrongly assume that MDIO controllers are available during sleep. Suggested-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-12-16gianfar: Convert gianfar to an of_platform_driverAndy Fleming
Does the same for the accompanying MDIO driver, and then modifies the TBI configuration method. The old way used fields in einfo, which no longer exists. The new way is to create an MDIO device-tree node for each instance of gianfar, and create a tbi-handle property to associate ethernet controllers with the TBI PHYs they are connected to. Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2008-10-20powerpc/85xx: Fix mpc8536ds dma interrupt numbersEd Swarthout
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-20powerpc/85xx: Enable enhanced functions for 8536 TSECJason Jin
Signed-off-by: Jason Jin <Jason.jin@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-10-13powerpc/85xx: Wire up RTC interrupt on MPC8536DSKumar Gala
Add interrupt info to the MPC8536DS .dts for the RTC Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-29powerpc/fsl: proliferate simple-bus compatibility to soc nodesKim Phillips
add simple-bus compatible property to soc nodes for 83xx/85xx platforms that were missing them. Add same to platform probe code. This fixes SoC device drivers (such as talitos) to succeed in matching devices present in the soc node. also update mpc836x_rdk dts to new SEC bindings (overlooked in commit 3fd4473: powerpc/fsl: update crypto node definition and device tree instances). Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/fsl: update crypto node definition and device tree instancesKim Phillips
delete obsolete device-type property, delete model property (use compatible property instead), prepend "fsl," to Freescale specific properties. Add nodes to device trees that are missing them, and fix broken property values in other trees. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2008-07-14powerpc/85xx: Add support for MPC8536DSKumar Gala
Add support for the MPC8536 process and MPC8536DS reference board. The MPC8536 is an e500v2 based SoC which eTSEC, USB, SATA, PCI, and PCIe. The USB and SATA IP blocks are similiar to those on the PQ2 Pro SoCs and thus use the same drivers. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>