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2006-12-05[POWERPC] Add missing EXPORTS for mpc52xx supportGrant Likely
Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Replace kmalloc+memset with kzallocYan Burman
Replace kmalloc+memset with kzalloc. Signed-off-by: Yan Burman <burman.yan@gmail.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Linkstation / kurobox supportGuennadi Liakhovetski
Support for the Kurobox(HG)/LinkStation-I NAS systems by Buffalo Technology, should be also applicable to the PPC TeraStation family. Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] iSeries: stop dt_mod.o being rebuilt unnecessarilyStephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Fix cputable.h for combined buildStephen Rothwell
Remove CPU_FTR_16M_PAGE from the cupfeatures mask at runtime on iSeries. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Add lite5200 board support to arch/powerpcGrant Likely
Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Add common routines for 52xx support in arch/powerpcGrant Likely
Adds utility routines used by 52xx device drivers and board support code. Main functionality is to add device nodes to the of_platform_bus, retrieve the IPB bus frequency, and find+ioremap device registers. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Separate IRQ config / register set from main headerSylvain Munaut
There is no need to expose these settings outside the scope of the interrupt controller code itself. Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Move Efika support files into platforms/52xxGrant Likely
The Efika board isn't different enough from other 52xx based boards to justify a separate platform. This patch merges it with the support code for all other 52xx based boards. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Put mpc52xx support file in platforms/52xxGrant Likely
platforms/embedded6xx is probably going away, and 52xx boards need some extra support the 52xx interrupt controller and DMA engine anyway. It makes sense to group all the 52xx bits into a single path. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Move MPC52xx PIC driver into arch/powerpc/platforms/52xxGrant Likely
No other chips use this device, it belongs in a 52xx-specific path. Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Sylvain Munaut <tnt@246tNt.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] pSeries/kexec: Fix for interrupt distributionMohan Kumar M
This allows any secondary CPU thread also to become boot cpu for POWER5. The patch is required to solve kdump boot issue when the kdump kernel is booted with parameter "maxcpus=1". XICS init code tries to match the current boot cpu id with "reg" property in each CPU node in the device tree. But CPU node is created only for primary thread CPU ids and "reg" property only reflects primary CPU ids. So when a kernel is booted on a secondary cpu thread above condition will never meet and the default distribution server is left as zero. This leads to route the interrupts to CPU 0, but which is not online at this time. We use ibm,ppc-interrupt-server#s to check for both primary and secondary CPU ids. Accordingly default distribution server value is initialized from "ibm,ppc-interrupt-gserver#s" property. We loop through ibm,ppc-interrupt-gserver#s property to find the global distribution server from the last entry that matches with boot cpuid. Signed-off-by: Mohan Kumar M <mohan@in.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] ps3: multiplatform build fixesArnd Bergmann
A few code paths need to check whether or not they are running on the PS3's LV1 hypervisor before making hcalls. This introduces a new firmware feature bit for this, FW_FEATURE_PS3_LV1. Now when both PS3 and IBM_CELL_BLADE are enabled, but not PSERIES, FW_FEATURE_PS3_LV1 and FW_FEATURE_LPAR get enabled at compile time, which is a bug. The same problem can also happen for (PPC_ISERIES && !PPC_PSERIES && PPC_SOMETHING_ELSE). In order to solve this, I introduce a new CONFIG_PPC_NATIVE option that is set when at least one platform is selected that can run without a hypervisor and then turns the firmware feature check into a run-time option. The new cell oprofile support that was recently merged does not work on hypervisor based platforms like the PS3, therefore make it depend on PPC_CELL_NATIVE instead of PPC_CELL. This may change if we get oprofile support for PS3. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: Missed renames of CONFIG_PS3 to CONFIG_PPC_PS3Geert Uytterhoeven
When renaming CONFIG_PS3 to CONFIG_PPC_PS3, a few occurrences have been missed. I also fixed up the alignment in arch/powerpc/platforms/Makefile. Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] spufs: we should only execute init_spu_base on cellStephen Rothwell
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] spufs: always send sigtrap on breakpointArnd Bergmann
Currently, we only send a sigtrap if the current task is being ptraced. This is somewhat inconsistant, and it breaks utrace support in fedora. Removing the check should do the right thing in all cases. Cc: Ulrich Weigand <ulrich.weigand@de.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] spufs: return an error in spu_create is isolated create isnt supportedJeremy Kerr
This changes the spu_create system call to return an error (-ENODEV) if and isolated spu context is requested on hardware that doesn't support isolated mode. Tested on systemsim with and without isolation support Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Fix compile issue for Efika platformNicolas DET
This patch fixes a compile issue for the Efika platform recently introduced by API changes. Signed-off-by: Nicolas DET <nd@bplan-gmbh.de> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] ps3: add spu supportGeoff Levand
Adds spu support for the PS3 platform. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add OS params supportGeoff Levand
Adds support for early access to the parameter data from the PS3 'Other OS' flash memory area. The parameter data mainly holds user preferences like static ip address. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add lpar addressingGeoff Levand
Adds some needed bits for a config option PS3_USE_LPAR_ADDR that disables the PS3 lpar address translation mechanism. This is a currently needed workaround for limitations in the design of the generic cell spu support. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add interrupt supportGeoff Levand
Adds routines to interface with the PS3 interrupt services. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add repository supportGeoff Levand
Adds support for the PS3 repository. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add htab routinesGeoff Levand
Adds pagetable management routines for the PS3. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add lv1 hvcallsGeoff Levand
Adds the PS3 hvcalls. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] ps3: add support for ps3 platformGeoff Levand
Adds the core platform support for the PS3 game console and other devices using the PS3 hypervisor. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] cell: abstract spu management routinesGeoff Levand
This adds a platform specific spu management abstraction and the coresponding routines to support the IBM Cell Blade. It also removes the hypervisor only resources that were included in struct spu. Three new platform specific routines are introduced, spu_enumerate_spus(), spu_create_spu() and spu_destroy_spu(). The underlying design uses a new type, struct spu_management_ops, to hold function pointers that the platform setup code is expected to initialize to instances appropriate to that platform. For the IBM Cell Blade support, I put the hypervisor only resources that were in struct spu into a platform specific data structure struct spu_pdata. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] cell: hard disable interrupts in power_save()Benjamin Herrenschmidt
With soft-disabled interrupts in power_save, we can still get external exceptions on Cell, even if we are in pause(0) a.k.a. sleep state. When the CPU really wakes up through the 0x100 (system reset) vector, while we have already started processing the 0x500 (external) exception, we get a panic in unrecoverable_exception() because of the lost state. This occurred in Systemsim for Cell, but as far as I can see, it can theoretically occur on any machine that uses the system reset exception to get out of sleep state. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] coredump: Add SPU elf notes to coredump.Dwayne Grant McConnell
This patch adds SPU elf notes to the coredump. It creates a separate note for each of /regs, /fpcr, /lslr, /decr, /decr_status, /mem, /signal1, /signal1_type, /signal2, /signal2_type, /event_mask, /event_status, /mbox_info, /ibox_info, /wbox_info, /dma_info, /proxydma_info, /object-id. A new macro, ARCH_HAVE_EXTRA_NOTES, was created for architectures to specify they have extra elf core notes. A new macro, ELF_CORE_EXTRA_NOTES_SIZE, was created so the size of the additional notes could be calculated and added to the notes phdr entry. A new macro, ELF_CORE_WRITE_EXTRA_NOTES, was created so the new notes would be written after the existing notes. The SPU coredump code resides in spufs. Stub functions are provided in the kernel which are hooked into the spufs code which does the actual work via register_arch_coredump_calls(). A new set of __spufs_<file>_read/get() functions was provided to allow the coredump code to read from the spufs files without having to lock the SPU context for each file read from. Cc: <linux-arch@vger.kernel.org> Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
2006-12-04[POWERPC] Distinguish POWER6 partition modes and tell userspacePaul Mackerras
This adds code to look at the properties firmware puts in the device tree to determine what compatibility mode the partition is in on POWER6 machines, and set the ELF aux vector AT_HWCAP and AT_PLATFORM entries appropriately. Specifically, we look at the cpu-version property in the cpu node(s). If that contains a "logical" PVR value (of the form 0x0f00000x), we call identify_cpu again with this PVR value. A value of 0x0f000001 indicates the partition is in POWER5+ compatibility mode, and a value of 0x0f000002 indicates "POWER6 architected" mode, with various extensions disabled. We also look for various other properties: ibm,dfp, ibm,purr and ibm,spurr. Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: Add oprofile supportMaynard Johnson
Add PPU event-based and cycle-based profiling support to Oprofile for Cell. Oprofile is expected to collect data on all CPUs simultaneously. However, there is one set of performance counters per node. There are two hardware threads or virtual CPUs on each node. Hence, OProfile must multiplex in time the performance counter collection on the two virtual CPUs. The multiplexing of the performance counters is done by a virtual counter routine. Initially, the counters are configured to collect data on the even CPUs in the system, one CPU per node. In order to capture the PC for the virtual CPU when the performance counter interrupt occurs (the specified number of events between samples has occurred), the even processors are configured to handle the performance counter interrupts for their node. The virtual counter routine is called via a kernel timer after the virtual sample time. The routine stops the counters, saves the current counts, loads the last counts for the other virtual CPU on the node, sets interrupts to be handled by the other virtual CPU and restarts the counters, the virtual timer routine is scheduled to run again. The virtual sample time is kept relatively small to make sure sampling occurs on both CPUs on the node with a relatively small granularity. Whenever the counters overflow, the performance counter interrupt is called to collect the PC for the CPU where data is being collected. The oprofile driver relies on a firmware RTAS call to setup the debug bus to route the desired signals to the performance counter hardware to be counted. The RTAS call must set the routing registers appropriately in each of the islands to pass the signals down the debug bus as well as routing the signals from a particular island onto the bus. There is a second firmware RTAS call to reset the debug bus to the non pass thru state when the counters are not in use. Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: Add routines for managing PMU interruptsKevin Corry
The following routines are added to arch/powerpc/platforms/cell/pmu.c: cbe_clear_pm_interrupts() cbe_enable_pm_interrupts() cbe_disable_pm_interrupts() cbe_query_pm_interrupts() cbe_pm_irq() cbe_init_pm_irq() This also adds a routine in arch/powerpc/platforms/cell/interrupt.c and some macros in cbe_regs.h to manipulate the IIC_IR register: iic_set_interrupt_routing() Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: Move PMU-related stuff to include/asm-powerpc/cell-pmu.hKevin Corry
Move some PMU-related macros and function prototypes from cbe_regs.h and pmu.h in arch/powerpc/platforms/cell/ to a new header at include/asm-powerpc/cell-pmu.h This is cleaner to use from the oprofile code, since that sits in arch/powerpc/oprofile, not in the cell platform directory. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: PMU register macrosKevin Corry
More macros for manipulating bits in the Cell PMU control registers. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Carl Love <carll@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] cell: Add symbol exports for oprofileArnd Bergmann
Add symbol-exports for the new routines in arch/powerpc/platforms/cell/pmu.c. They are needed for Oprofile, which can be built as a module. Signed-off-by: Kevin Corry <kevcorry@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Load isolation kernel from spu_runJeremy Kerr
In order to fit with the "don't-run-spus-outside-of-spu_run" model, this patch starts the isolated-mode loader in spu_run, rather than spu_create. If spu_run is passed an isolated-mode context that isn't in isolated mode state, it will run the loader. This fixes potential races with the isolated SPE app doing a stop-and-signal before the PPE has called spu_run: bugzilla #29111. Also (in conjunction with a mambo patch), this addresses #28565, as we always set the runcntrl register when entering spu_run. It is up to libspe to ensure that isolated-mode apps are cleaned up after running to completion - ie, put the app through the "ISOLATE EXIT" state (see Ch11 of the CBEA). Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Add runcntrl read accessorsJeremy Kerr
This change adds a read accessor for the SPE problem-state run control register. This is required for for applying (userspace) changes made to the run control register while the SPE is stopped - simply asserting the master run control bit is not sufficient. My next patch for isolated-mode setup requires this. Signed-off-by: Jeremy Kerr <jk@ozlabs.org> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Use SPU master control to prevent wild SPU executionArnd Bergmann
When the user changes the runcontrol register, an SPU might be running without a process being attached to it and waiting for events. In order to prevent this, make sure we always disable the priv1 master control when we're not inside of spu_run. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Fix return value of spufs_mfc_writeMasato Noguchi
This patch changes spufs_mfc_write() to return correct size instead of 0. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Always map local store non-guardedArnd Bergmann
When fixing spufs to map the 'mem' file backing store cacheable, I incorrectly set the physical mapping to use both cache-inhibited and guarded mapping, which resulted in a serious performance degradation. Debugged-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Avoid user-triggered oops in ptraceChristoph Hellwig
When one of the spufs files is mapped into a process address space, regular users can use ptrace to attempt accessing them with access_process_vm(). With the way that the mappings currently work, this likely causes an oops. Setting the vm_flags to VM_IO makes sure that ptrace can not access them but returns an error code. This is not the perfect solution in case of the local store mapping, but it fixes the oops in a well-defined way. Also remove leftover VM_RESERVED flags in spufs. The VM_RESERVED flag is on it's way out and not checked by the memory managment code anymore. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Christoph Hellwig <chellwig@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Fix missing stop-and-signalMasato Noguchi
When there is pending signals, current spufs_run_spu() always returns -ERESTARTSYS and it is called again automatically. But, if spe already stopped by stop-and-signal or halt instruction, returning -ERESTARTSYS makes stop-and-signal/halt lost and spu run over the end-point. For your convenience, I attached a sample code to restage this bug. If there is no bug, printed NPC will be 0x4000. Signed-off-by: Masato Noguchi <Masato.Noguchi@jp.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Return correct event for data storage interruptArnd Bergmann
When we attempt an MFC DMA to an unmapped address, the event returned from spu_run should be SPE_EVENT_SPE_DATA_STORAGE, not SPE_EVENT_INVALID_DMA. Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Replace spu.nid with spu.nodeGeoff Levand
Replace the use of the platform specific variable spu.nid with the platform independednt variable spu.node. Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Read from signal files only if data is thereDwayne Grant McConnell
We need to check the channel count of the signal notification registers before reading them, because it can be undefined when the count is zero. In order to read count and data atomically, we read from the saved context. This patch uses spu_acquire_saved() to force a context save before a /signal1 or /signal2 read. Because of this it is no longer necessary to have backing_ops and hw_ops versions of this function so they have been removed. Regular applications should not rely on reading this register to be fast, as it's conceptually a write-only file from the PPE perspective. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Implement /mbox_info, /ibox_info, and /wbox_info.Dwayne Grant McConnell
This patch implements read only access to /mbox_info - SPU Write Outbound Mailbox /ibox_info - SPU Write Outbound Interrupt Mailbox /wbox_info - SPU Read Inbound Mailbox These files are used by gdb in order to look into the current mailbox queues without changing the contents at the same time. They are not meant for general programming use, since the access requires a context save and is therefore rather slow. It would be good to complement this patch with one that adds write support as well. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Remove /spu_tag_mask fileDwayne Grant McConnell
This patch removes the /spu_tag_mask file from spufs. The data provided by this file is also available from the /dma_info file in the dma_info_mask of the spu_dma_info struct. The file was intended to be used by gdb, but that never used it, and now it has been replaced with the more verbose dma_info file. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Add /lslr, /dma_info and /proxydma filesDwayne Grant McConnell
The /lslr file gives read access to the SPU_LSLR register in hex; 0x3fff for example The /dma_info file provides read access to the SPU Command Queue in a binary format. The /proxydma_info files provides read access access to the Proxy Command Queue in a binary format. The spu_info.h file provides data structures for interpreting the binary format of /dma_info and /proxydma_info. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] spufs: Change %llx to 0x%llx.Dwayne Grant McConnell
This patches changes /npc, /decr, /decr_status, /spu_tag_mask, /event_mask, /event_status, and /srr0 files to provide output according to the format string "0x%llx" instead of "%llx". Before this patch some files used "0x%llx" and other used "%llx" which is inconsistent and potentially confusing. A user might assume "%llx" numbers were decimal if they happened to not contain any a-f digits. This change will break any code cannot tolerate a leading 0x in the file contents. The only known users of these files are the libspe but there might also be some scripts which access these files. This risk is deemed acceptable for future consistency. Signed-off-by: Dwayne Grant McConnell <decimal@us.ibm.com> Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-12-04[POWERPC] Wrap cpu_die() with CONFIG_HOTPLUG_CPULinas Vepstas
Per email discussion, it appears that rtas_stop_self() and pSeries_mach_cpu_die() should not be compiled if CONFIG_HOTPLUG_CPU is not defined. This patch adds #ifdefs around these bits of code. Signed-off-by: Linas Vepstas <linas@austin.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>