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There is no point in applying this quirk when par_io is not present.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Move the code for this quirk to a dedicated function.
Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Fix and/or improve the compatible strings of the PCI device tree nodes for
some Freescale SOCs. This fixes some issues and improves consistency among
the SOCs.
Specifically:
1) The P1022 has a v1 PCIe controller, so the compatible property should just
say "fsl,mpc8548-pcie". U-Boot does not look for "fsl,p1022-pcie", so it
wasn't fixing up the node.
2) The P4080 has a v2.1 PCIe controller, so add that version-specific string
to the device tree. Update the kernel to also look for that string.
Currently, the kernel looks for "fsl,p4080-pcie" specifically, but
eventually that check should be deleted.
3) The P1010 device tree claims compatibility with v2.2 and v2.3, but that's
redundant. No other device tree does this. Remove the v2.2 string.
4) The kernel looks for both "fsl,p1023-pcie" and "fsl,qoriq-pcie-v2.2",
even though the P1023 device trees has always included both strings. Remove
the search for "fsl,p1023-pcie".
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The PAMU caches use the LIODNs to determine which cache lines hold the
entries for the corresponding LIODs. The LIODNs must therefore be
carefully assigned to avoid cache thrashing -- two active LIODs with
LIODNs that put them in the same cache line.
Currently, LIODNs are statically assigned by U-Boot, but this has
limitations. LIODNs are assigned even for devices that may be disabled
or unused by the kernel. Static assignments also do not allow for device
drivers which may know which LIODs can be used simultaneously. In
other words, we really should assign LIODNs dynamically in Linux.
To do that, we need to describe the PAMU device and cache topologies in
the device trees.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Stuart Yoder <stuart.yoder@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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This board has soldered on flash, and a SODIMM flash module.
Both can be used for booting, via switching JP12 and SW2.8
and using the sbc8548-altflash.dts when booting from SODIMM.
Here we enable MTD in kernel so that we can see the bootloader
(and other flash sectors) from linux.
Normal configuration:
root@sbc8548:~# cat /proc/mtd
dev: size erasesize name
mtd0: 007a0000 00020000 "space"
mtd1: 00060000 00020000 "bootloader"
mtd2: 03f00000 00080000 "space"
mtd3: 00100000 00080000 "bootloader"
root@sbc8548:~# dd if=/dev/mtd1 count=1 bs=48|hexdump -C
1+0 records in
1+0 records out
00000000 27 05 19 56 55 2d 42 6f 6f 74 20 32 30 31 32 2e |'..VU-Boot 2012.|
00000010 31 30 2d 64 69 72 74 79 20 28 4a 61 6e 20 31 39 |10-dirty (Jan 19|
00000020 20 32 30 31 33 20 2d 20 31 39 3a 34 30 3a 31 31 | 2013 - 19:40:11|
00000030
root@sbc8548:~# dd if=/dev/mtd3 count=1 bs=48|hexdump -C
1+0 records in
1+0 records out
00000000 27 05 19 56 55 2d 42 6f 6f 74 20 32 30 31 32 2e |'..VU-Boot 2012.|
00000010 31 30 2d 64 69 72 74 79 20 28 44 65 63 20 31 33 |10-dirty (Dec 13|
00000020 20 32 30 31 32 20 2d 20 31 35 3a 30 30 3a 30 37 | 2012 - 15:00:07|
00000030
root@sbc8548:~#
Alternate configuration, with sbc8548-altflash.dts:
root@sbc8548:~# cat /proc/mtd
dev: size erasesize name
mtd0: 03f00000 00080000 "space"
mtd1: 00100000 00080000 "bootloader"
mtd2: 007a0000 00020000 "space"
mtd3: 00060000 00020000 "bootloader"
root@sbc8548:~# dd if=/dev/mtd1 count=1 bs=48|hexdump -C
1+0 records in
1+0 records out
00000000 27 05 19 56 55 2d 42 6f 6f 74 20 32 30 31 32 2e |'..VU-Boot 2012.|
00000010 31 30 2d 64 69 72 74 79 20 28 44 65 63 20 31 33 |10-dirty (Dec 13|
00000020 20 32 30 31 32 20 2d 20 31 35 3a 30 30 3a 30 37 | 2012 - 15:00:07|
00000030
root@sbc8548:~# dd if=/dev/mtd3 count=1 bs=48|hexdump -C
1+0 records in
1+0 records out
00000000 27 05 19 56 55 2d 42 6f 6f 74 20 32 30 31 32 2e |'..VU-Boot 2012.|
00000010 31 30 2d 64 69 72 74 79 20 28 4a 61 6e 20 31 39 |10-dirty (Jan 19|
00000020 20 32 30 31 33 20 2d 20 31 39 3a 34 30 3a 31 31 | 2013 - 19:40:11|
00000030
root@sbc8548:~#
Note that in the latter, the larger SODIMM device appears 1st,
as mtd0 and mtd1, as indicated in the sizes, and in the date
of the u-boot image.
The kernel configuration is the same in both cases; only the dtb
needs to be changed in accordance with the JP12/SW2.8 settings.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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By moving the two JP12 jumpers 90 degrees, and switching the
setting of SW2.8, the sbc8548 can be configured to boot off
the alternate 64MB SODIMM, which when populated with u-boot
can be a handy recovery option, in case the u-boot in the
8MB soldered on flash gets corrupted. Here we add an alternate
dts file to match that configuration.
To better highlight the differences, the output from the u-boot
"fli" command is shown for the normal configuration and then
the alternate configuration.
Normal:
-----------------------
Bank # 1: CFI conformant flash (8 x 8) Size: 8 MB in 64 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x17
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes
Sector Start Addresses:
FF800000 E FF820000 E FF840000 E FF860000 E FF880000 E
[...]
FFEE0000 E FFF00000 E FFF20000 E FFF40000 E FFF60000 E
FFF80000 FFFA0000 RO FFFC0000 RO FFFE0000 RO
Bank # 2: CFI conformant flash (32 x 8) Size: 64 MB in 128 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes
Sector Start Addresses:
EC000000 E EC080000 E EC100000 E EC180000 E EC200000 E
[...]
EFC00000 E EFC80000 E EFD00000 E EFD80000 E EFE00000 E
EFE80000 E EFF00000 EFF80000
-----------------------
Alternate:
-----------------------
Bank # 1: CFI conformant flash (32 x 8) Size: 64 MB in 128 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x18
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes
Sector Start Addresses:
FC000000 E FC080000 E FC100000 E FC180000 E FC200000 E
[...]
FFC00000 E FFC80000 E FFD00000 E FFD80000 E FFE00000 E
FFE80000 E FFF00000 RO FFF80000 RO
Bank # 2: CFI conformant flash (8 x 8) Size: 8 MB in 64 Sectors
Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x17
Erase timeout: 4096 ms, write timeout: 1 ms
Buffer write timeout: 2 ms, buffer size: 32 bytes
Sector Start Addresses:
EF800000 E EF820000 E EF840000 E EF860000 E EF880000 E
[...]
EFEE0000 E EFF00000 E EFF20000 E EFF40000 E EFF60000 E
EFF80000 E EFFA0000 EFFC0000 EFFE0000
-----------------------
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The original memory map for the sbc8548 had the 64MB SODIMM flash
device misaligned by 8MB to allow a window of address space for
the soldered on 8MB device -- i.e.
start end CS<n> width Desc.
----------------------------------------------------------
fb80_0000 ff7f_ffff CS6 32 SODIMM flash (64MB)
ff80_0000 ffff_ffff CS0 8 Boot flash (8MB)
However, if we want to change the configuration so that it boots
off the 64MB flash, it is in turn then aligned with a 64MB boundary,
starting at fc00_0000 (and the 8MB @ fb80_0000 -> fbff_ffff).
This makes for complicated updates, since what is the beginning
of the physical device is 8MB into its address space in the default
configuration shown above.
This issue was fixed as of u-boot commit 3fd673cf363bc86ed42eff713d4
("sbc8548: relocate 64MB user flash to sane boundary") -- in which
the SODIMM was mapped to ec00_0000 (natively aligned under efff_ffff)
and so when JP12/SW2.8 are switched, it will be a a simple 0xec --> 0xfc
mapping between the two instances.
Here we make the associated changes in the localbus flash memory
map in the dts file: indicating the 64MB device starts at ec00_0000
and that the tail end of the 64MB device (last 2 sectors) can contain
a bootloader image.
The partitions for both flash devices get a clean-up; there were
non-meaningful assignments in there that probably originated from
the MPC8548CDS on which the file was based on. Now there is just
the categorization of free space and bootloader images.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Updates to u-boot allow this board to boot off of either
the 8MB soldered on flash, or the 64MB SODIMM flash.
This is achieved by changing JP12 and SW2.8 which in turn
swaps which flash device appears on /CS0 and /CS6 respectively.
Since the flash devices are not the same size, this also
changes the MTD memory map layout on the local bus.
Here we split the common chunks out into a pre and post
include, so they can be reused by an upcoming "alternative
boot" dts file; leaving only the local bus chunk behind.
No content changes are made at this point - it is just purely
the move to using include files.
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Use for_each_compatible_node() macro instead of open coding it.
Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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When the guest triggers an alignment interrupt, we don't handle it properly
today and instead BUG_ON(). This really shouldn't happen.
Instead, we should just pass the interrupt back into the guest so it can deal
with it.
Reported-by: Gao Guanhua-B22826 <B22826@freescale.com>
Tested-by: Gao Guanhua-B22826 <B22826@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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Current kvmppc_booke_handlers uses the same macro (KVM_HANDLER) and
all handlers are considered to be the same size. This will not be
the case if we want to use different macros for different handlers.
This patch improves the kvmppc_booke_handler so that it can
support different macros for different handlers.
Signed-off-by: Liu Yu <yu.liu@freescale.com>
[bharat.bhushan@freescale.com: Substantial changes]
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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Like other places, use thread_struct to get vcpu reference.
Signed-off-by: Bharat Bhushan <bharat.bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
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arch/powerpc/sysdev/fsl_msi.c:31:1: warning: symbol 'msi_head' was not declared. Should it be static?
arch/powerpc/sysdev/fsl_msi.c:138:40: warning: incorrect type in argument 1 (different base types)
arch/powerpc/sysdev/fsl_msi.c:138:40: expected restricted __be64 const [usertype] *p
arch/powerpc/sysdev/fsl_msi.c:138:40: got unsigned long long const [usertype] *[assigned] reg
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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arch/powerpc/sysdev/fsl_ifc.c:66:38: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_ifc.c:66:38: expected restricted __be32 [usertype] cspr
arch/powerpc/sysdev/fsl_ifc.c:66:38: got unsigned int
arch/powerpc/sysdev/fsl_ifc.c:67:21: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_ifc.c:67:39: warning: restricted __be32 degrades to integer
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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arch/powerpc/sysdev/fsl_soc.c:70:67: warning: incorrect type in argument 2 (different base types)
arch/powerpc/sysdev/fsl_soc.c:70:67: expected restricted __be32 const [usertype] *addr
arch/powerpc/sysdev/fsl_soc.c:70:67: got unsigned int const [usertype] *
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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arch/powerpc/sysdev/fsl_lbc.c:77:36: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_lbc.c:77:36: expected restricted __be32 [usertype] br
arch/powerpc/sysdev/fsl_lbc.c:77:36: got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:78:36: warning: incorrect type in initializer (different base types)
arch/powerpc/sysdev/fsl_lbc.c:78:36: expected restricted __be32 [usertype] or
arch/powerpc/sysdev/fsl_lbc.c:78:36: got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:80:21: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:80:38: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:111:12: warning: incorrect type in assignment (different base types)
arch/powerpc/sysdev/fsl_lbc.c:111:12: expected restricted __be32 [usertype] br
arch/powerpc/sysdev/fsl_lbc.c:111:12: got unsigned int
arch/powerpc/sysdev/fsl_lbc.c:113:17: warning: restricted __be32 degrades to integer
arch/powerpc/sysdev/fsl_lbc.c:127:17: warning: restricted __be32 degrades to integer
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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The DTC labels feature allows a dts file to reference a node without
having to reproduce the entire node hierarchy above it. We can use this
to simplify the MPC5200 board dts files by referencing the gpt nodes by
label.
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
[agust: fixed gpt7 phandle in the csi node of o2d.dtsi]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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The Lite5200 evaluation board has a number of debug LEDs that Linux
doesn't know about yet. This change adds a gpio-leds stanza to the
lite5200 device tree so that the correct driver can get hooked up.
Also, make use of the dtc labels feature to reduce the number of source
lines required to add the gpio-controller property to the general
purpose timer nodes. In addition, the required #gpio-cells properties
are added to the common mpc5200b dtsi include file so that each board
doesn't need to add them explicitly. This still doesn't enable gpio
mode, 'gpio-controller' is required for that, but it means less work
needs to be done by board ports.
Cc: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
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Fix PowerPC/Cell build fallout from:
8bd75c77b7c6 sched/rt: Move rt specific bits into new header file
Reported-by: Michael Ellerman <michael@ellerman.id.au>
Cc: Clark Williams <williams@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Steven Rostedt <rostedt@goodmis.org>
Link: http://lkml.kernel.org/r/20130207094707.7b9f825f@riff.lan
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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Synchronize with 'net' in order to sort out some l2tp, wireless, and
ipv6 GRE fixes that will be built on top of in 'net-next'.
Signed-off-by: David S. Miller <davem@davemloft.net>
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This patch adds support for enabling and context switching the Target
Address Register in Power8. The TAR is a new special purpose register
that can be used for computed branches with the bctar[l] (branch
conditional to TAR) instruction in the same manner as the count and link
registers.
Signed-off-by: Ian Munsie <imunsie@au1.ibm.com>
Signed-off-by: Matt Evans <matt@ozlabs.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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pseries/iommu: remove DDW on kexec
We currently insert a property in the device-tree when we successfully
configure DDW for a given slot. This was meant to be an optimization to
speed up kexec/kdump, so that we don't need to make the RTAS calls again
to re-configured DDW in the new kernel.
However, we end up tripping a plpar_tce_stuff failure on kexec/kdump
because we unconditionally parse the ibm,dma-window property for the
node at bus/dev setup time. This property contains the 32-bit DMA window
LIOBN, which is distinct from the DDW window's. We pass that LIOBN (via
iommu_table_init -> iommu_table_clear -> tce_free ->
tce_freemulti_pSeriesLP) to plpar_tce_stuff, which fails because that
32-bit window is no longer present after
25ebc45b93452d0bc60271f178237123c4b26808 ("powerpc/pseries/iommu: remove
default window before attempting DDW manipulation").
I believe the simplest, easiest-to-maintain fix is to just change our
initcall to, rather than detecting and updating the new kernel's DDW
knowledge, just remove all DDW configurations. When the drivers
re-initialize, we will set everything back up as it was before.
Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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The parameter is unused, and complicates a following fix. Just remove
it.
Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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It seems, we're fine with just annotating the two functions.
Thus, this fixes the following build warnings on ppc64:
WARNING: arch/powerpc/sysdev/xics/built-in.o(.text+0x1664):
The function .ics_rtas_init() references
the function __init .xics_register_ics().
This is often because .ics_rtas_init lacks a __init
annotation or the annotation of .xics_register_ics is wrong.
WARNING: arch/powerpc/sysdev/built-in.o(.text+0x6044):
The function .ics_rtas_init() references
the function __init .xics_register_ics().
This is often because .ics_rtas_init lacks a __init
annotation or the annotation of .xics_register_ics is wrong.
WARNING: arch/powerpc/kernel/built-in.o(.text+0x2db30):
The function .start_secondary() references
the function __cpuinit .vdso_getcpu_init().
This is often because .start_secondary lacks a __cpuinit
annotation or the annotation of .vdso_getcpu_init is wrong.
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Daniel Borkmann <dborkman@redhat.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
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Fix compile errors like those below:
CC arch/powerpc/perf/power7-pmu.o
/home/git/linux/arch/powerpc/perf/power7-pmu.c:397:2: error: initialization from incompatible pointer type [-Werror]
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Acked-by: Arnaldo Carvalho de Melo <acme@ghostprotocols.net>
Cc: linuxppc-dev@ozlabs.org
Link: http://lkml.kernel.org/r/20130205231938.GA24125@us.ibm.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
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The Bestcomm driver requests a memory region larger than the one
described in the device tree. This is due to an extra undocumented field
in the bestcomm register structure. This hasn't been a problem up to
now, but there is a patch pending to make the DT platform_bus support
code use platform_device_add() which tightens the rules and provides
extra checks for drivers to stay within the specified register regions.
Alternately, I could have removed the extra field from the structure,
but I'm not sure if it is still needed for resume to work. Better be
safe and leave it in.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Anatolij Gustschin <agust@denx.de>
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Fix warning:
symbol 'mpc5xxx_get_bus_frequency' was not declared. Should it be static?
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Fix warnings:
symbol 'clockctl' was not declared. Should it be static?
symbol 'rate_clks' was not declared. Should it be static?
symbol 'dev_clks' was not declared. Should it be static?
symbol 'mpc5121_clk_init' was not declared. Should it be static?
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Fix:
warning: dereference of noderef expression
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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Add ability to configure chip select (CS) parameters for devices
that need different CS parameters setup after their configuration.
I.e. an FPGA device on LP bus can require different CS parameters
for its bus interface after loading firmware into it. A driver
can easily reconfigure the LPC CS parameters using this function.
Acked-by: Timur Tabi <timur@tabi.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
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The IRQ_PER_CPU Kconfig symbol was removed in the following commit:
Commit 6a58fb3bad099076f36f0f30f44507bc3275cdb6 ("genirq: Remove
CONFIG_IRQ_PER_CPU") merged in v2.6.39-rc1.
But IRQ_PER_CPU wasn't removed from any of the architecture Kconfig
files where it was defined or selected. It's completely unused so remove
the remaining references.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: <uclinux-dist-devel@blackfin.uclinux.org>
Cc: <linux-mips@linux-mips.org>
Cc: <linuxppc-dev@lists.ozlabs.org>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: James E.J. Bottomley <jejb@parisc-linux.org>
Cc: Helge Deller <deller@gmx.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Acked-by: Paul Mundt <lethal@linux-sh.org>
Acked-by: Tony Luck <tony.luck@intel.com>
Acked-by: Richard Kuo <rkuo@codeaurora.org>
Link: http://lkml.kernel.org/r/1359972583-17134-1-git-send-email-james.hogan@imgtec.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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into timers/core
Trivial conflict in arch/x86/Kconfig
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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The ASM version of hash computation function was truncating the upper bit.
Make the ASM version similar to hpt_hash function. Remove masking vsid bits.
Without this patch, we observed hang during bootup due to not satisfying page
fault request correctly. The fault handler used wrong hash values to update
the HPTE. Hence we kept looping with page fault.
hash_page(ea=000001003e260008, access=203, trap=300 ip=3fff91787134 dsisr 42000000
The computed value of hash 000000000f22f390
update: avpnv=4003e46054003e00, hash=000000000722f390, f=80000006, psize: 2 ...
BenH: The over-masking has been there for ever but only hurts with the
new 64T support introduced in 3.7
Reported-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Tested-by: Mike Qiu <qiudayu@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: <stable@vger.kernel.org> [v3.7]
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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SYSCALL_DEFINE and COMPAT_SYSCALL_DEFINE do all argument normalization
we need.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Only alpha and sparc are unusual - they have ka_restorer in it.
And nobody needs that exposed to userland.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Switch from __ARCH_WANT_SYS_RT_SIGACTION to opposite
(!CONFIG_ODD_RT_SIGACTION); the only two architectures that
need it are alpha and sparc. The reason for use of CONFIG_...
instead of __ARCH_... is that it's needed only kernel-side
and doing it that way avoids a mess with include order on many
architectures.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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Make some POWER7-specific perf events available in sysfs.
$ /bin/ls -1 /sys/bus/event_source/devices/cpu/events/
branch-instructions
branch-misses
cache-misses
cache-references
cpu-cycles
instructions
PM_BRU_FIN
PM_BRU_MPRED
PM_CMPLU_STALL
PM_CYC
PM_GCT_NOSLOT_CYC
PM_INST_CMPL
PM_LD_MISS_L1
PM_LD_REF_L1
stalled-cycles-backend
stalled-cycles-frontend
where the 'PM_*' events are POWER specific and the others are the
generic events.
This will enable users to specify these events with their symbolic
names rather than with their raw code.
perf stat -e 'cpu/PM_CYC' ...
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Anton Blanchard <anton@au1.ibm.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Robert Richter <robert.richter@amd.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: linuxppc-dev@ozlabs.org
Link: http://lkml.kernel.org/r/20130123062528.GE13720@us.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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