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path: root/arch/ppc64/kernel/bpa_setup.c
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2005-11-01[PATCH] powerpc: move arch/ppc64/kernel/bpa* to arch/powerpc/platforms/cellArnd Bergmann
This patch simply moves files over to arch/powerpc without making any changes to them. Signed-off-by: Arnd Bergmann <arndb@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-01[PATCH] powerpc: Rename BPA to CellArnd Bergmann
The official name for BPA is now CBEA (Cell Broadband Engine Architecture). This patch renames all occurences of the term BPA to 'Cell' for easier recognition. Signed-off-by: Arnd Bergmann <arndb@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-20ppc64: Change ppc_md.get_cpuinfo to ppc_md.show_cpuinfoPaul Mackerras
... for consistency with ppc32; also add in ppc32's show_percpuinfo function. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-10-10powerpc: Get 64-bit configs to compile with ARCH=powerpcPaul Mackerras
This is a bunch of mostly small fixes that are needed to get ARCH=powerpc to compile for 64-bit. This adds setup_64.c from arch/ppc64/kernel/setup.c and locks.c from arch/ppc64/lib/locks.c. Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-09-28powerpc: Move iSeries_pci.c to powerpc/platform/iseriesStephen Rothwell
and rename it to pci.c. This also required moving arch/ppc64/kernel/pci.h into include/asm-powerpc (called ppc-pci.h. Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2005-06-23[PATCH] ppc64: Add driver for BPA iommuArnd Bergmann
Implementation of software load support for the BE iommu. This is very different from other iommu code on ppc64, since we only do a static mapping. The mapping is currently hardcoded but should really be read from the firmware, but they don't set up the device nodes yet. There is a single 512MB DMA window for PCI, USB and ethernet at 0x20000000 for our RAM. The Cell processor can put the I/O page table either in memory like the hashed page table (hardware load) or have the operating system write the entries into memory mapped CPU registers (software load). I use the software load mechanism because I know that all I/O page table entries for the amount of installed physical memory fit into the IO TLB cache. At the point when we get machines with more than 4GB of installed memory, we can either use hardware I/O page table access like the other platforms do or dynamically update the I/O TLB entries when a page fault occurs in the I/O subsystem. The software load can then use the macros that I have implemented for the static mapping in order to do the TLB cache updates. Signed-off-by: Arnd Bergmann <arndb@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-06-23[PATCH] ppc64: Add driver for BPA interrupt controllersArnd Bergmann
Add support for the integrated interrupt controller on BPA CPUs. There is one of those for each SMT thread. The mapping of interrupt numbers to HW interrupt sources is described in arch/ppc64/kernel/bpa_iic.h. This version hardcodes the 'Spider' chip as the secondary interrupt controller. That is not really generic for the architecture, but at the moment it is the only secondary PIC that exists. A little more work will be needed on this as soon as we have boards with multiple external interrupt controllers. Signed-off-by: Arnd Bergmann <arndb@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-06-23[PATCH] ppc64: add BPA platform typeArnd Bergmann
This adds the basic support for running on BPA machines. So far, this is only the IBM workstation, and it will not run on others without a little more generalization. It should be possible to configure a kernel for any combination of CONFIG_PPC_BPA with any of the other multiplatform targets. Signed-off-by: Arnd Bergmann <arndb@de.ibm.com> Signed-off-by: Paul Mackerras <paulus@samba.org>