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2009-03-10Merge branch 'master' of ↵Paul Mundt
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
2009-03-10sh: hibernation supportMagnus Damm
Add Suspend-to-disk / swsusp / CONFIG_HIBERNATION support to the SuperH architecture. To suspend, use "swapon /dev/sda2; echo disk > /sys/power/state" To resume, pass "resume=/dev/sda2" on the kernel command line. The patch "pm: rework includes, remove arch ifdefs V2" is needed to allow the generic swsusp code to build properly. Hibernation is not enabled with this patch though, a patch setting ARCH_HIBERNATION_POSSIBLE will be submitted later. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7720.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7710.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7705.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh770x.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - mxg.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7619.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7206.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7201.Paul Mundt
Follow the conversions as per the other subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7263.Paul Mundt
Convert over the SH7263 IRQ groups as well. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7203.Paul Mundt
Follow the conversions as per the other subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: Restore RTC IRQ setting for SH7763 setup.Nobuhiro Iwamatsu
This was accidentally dropped in the multiple vectors per irq conversion. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-06sh: multiple vectors per irq - sh7763Nobuhiro Iwamatsu
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7763 hardware blocks such as RTC/SCIF/DMAC/GETHER/PCIC5/MMCIF/SIM/GPIO/USBF. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-05sh: Set a sensible default for the SH7786 pclk.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-05sh: urquell: Add smc91x support and update defconfig accordingly.Kuninori Morimoto
Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-03sh: Urquell board support.Kuninori Morimoto
This adds preliminary support for the SH7786-based Urquell board. Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-03sh: SH7786 is an SH-X3 core, select CPU_SHX3.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-03sh: Add support for SH7786 CPU subtype.Kuninori Morimoto
This adds preliminary support for the SH7786 CPU subtype. While this is a dual-core CPU, only UP is supported for now. L2 cache support is likewise not yet implemented. More information on this particular CPU subtype is available at: http://www.renesas.com/fmwk.jsp?cnt=sh7786_root.jsp&fp=/products/mpumcu/superh_family/sh7780_series/sh7786_group/ Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-01Merge branch 'master' of ↵David S. Miller
master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 Conflicts: drivers/net/wireless/iwlwifi/iwl-tx.c net/8021q/vlan_core.c net/core/dev.c
2009-02-27sh: Fix up SH-X3 general exception handler build.Paul Mundt
With the recent entry.S refactoring, the SH-X3 path had a mov.l for a register to register copy, resulting in: AS arch/sh/kernel/cpu/sh4/../sh3/entry.o arch/sh/kernel/cpu/sh4/../sh3/entry.S: Assembler messages: arch/sh/kernel/cpu/sh4/../sh3/entry.S:366: Error: invalid operands for opcode make[3]: *** [arch/sh/kernel/cpu/sh4/../sh3/entry.o] Error 1 Switch it over to a mov to fix it up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - sh7785Magnus Damm
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7785 hardware blocks such as SCIF/DMAC/PCIC5/MMCIF/GDTA/FLCTL/GPIO Signed-off-by: Magnus Damm <damm@igel.co.jp> Tested-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - sh7780Magnus Damm
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7780 hardware blocks such as SCIF/RTC/DMAC/PCIC5/MMCIF/FLCTL/GPIO Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - sh7750Magnus Damm
Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh775x hardware blocks such as SCI/SCIF/RTC/DMAC/TMU2/REF. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: multiple vectors per irq - baseMagnus Damm
Instead of keeping the single vector -> single linux irq mapping we extend the intc code to support merging of vectors to a single linux irq. This helps processors such as sh7750, sh7780 and sh7785 which have more vectors than masking ability. With this patch in place we can modify the intc tables to use one irq per maskable irq source. Please note the following: - If multiple vectors share the same enum then only the first vector will be available as a linux irq. - Drivers may need to be rewritten to get pending irq source from the hardware block instead of irq number. This patch together with the sh7785 specific intc tables solves DMA controller irq issues related to buggy interrupt masking. Reported-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: fix P4 iounmap() pass-throughMagnus Damm
Fix iounmap() of pass-through P4 addresses. Without this patch iounmap() on the sh7780 rtc area results in a warning message. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: Disable unsupportable prefetching on SH-3.Paul Mundt
The SH-3 does not support 'pref'-based prefetching, only SH-2A and SH-4A parts do. Remove SH-3 from the list. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: prefetch early exception data on sh4/sh4a.Magnus Damm
Prefetch early exception data. There is unused space in our exception handler cache line anyway, so this is almost free. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: remove EXPEVT vector from stack on sh3/sh4/sh4aMagnus Damm
Remove EXPEVT vector from the stack, lookup_exception_vector() for sh3/sh4/sh4a is already using k2 to get the vector. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: rework register restore code for sh3/sh4/sh4aMagnus Damm
This patch reworks the sh3/sh4/sh4a register restore code in the following ways: - break out restore_regs() from restore_all() - the register saving order is unchanged - use restore_regs() in sh_bios_handler and restore_all - document the function Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: shared register saving code for sh3/sh4/sh4aMagnus Damm
This patch reworks the sh3/sh4/sh4a register saving code in the following ways: - break out prepare_stack_save_dsp() from handle_exception() - break out save_regs() from handle_exception() - the register saving order is unchanged - align new functions to fit in cache lines - separate exception code from interrupt code - keep main code flow in a single cache line per exception vector - use bsr/rts for regular functions (save pr first) - keep data in one shared cache line (exception_data) - document the functions - tie in the hp6xx code Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-27sh: ap325rxa: Revert ov772x support.Paul Mundt
This change depends on some v4l changes that have been pushed back to 2.6.30, so drop this and fall back on the old soc_camera code until then. Reported-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Acked-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-15net: new user space API for time stamping of incoming and outgoing packetsPatrick Ohly
User space can request hardware and/or software time stamping. Reporting of the result(s) via a new control message is enabled separately for each field in the message because some of the fields may require additional computation and thus cause overhead. User space can tell the different kinds of time stamps apart and choose what suits its needs. When a TX timestamp operation is requested, the TX skb will be cloned and the clone will be time stamped (in hardware or software) and added to the socket error queue of the skb, if the skb has a socket associated with it. The actual TX timestamp will reach userspace as a RX timestamp on the cloned packet. If timestamping is requested and no timestamping is done in the device driver (potentially this may use hardware timestamping), it will be done in software after the device's start_hard_xmit routine. Signed-off-by: Patrick Ohly <patrick.ohly@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2009-02-13Merge branches 'irq/genirq', 'irq/sparseirq' and 'irq/urgent' into irq/coreIngo Molnar
2009-02-12Merge branch 'sh/stable-updates'Paul Mundt
2009-02-12sh: Storage class should be before const qualifierTobias Klauser
The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-02-04sh: Restrict old CMT timer code to SH-2/SH-2A.Paul Mundt
None of the other platforms use this, and need individual porting. Restrict it back to the supported set of CPU subtypes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: Don't enable GENERIC_TIME for the CMT clockevent driver yet.Paul Mundt
GENERIC_TIME still depends on the clocksource bits being there, which is presently not supported. This allows the CMT clockevent driver to be used alongside alternate system timers that do not yet provide a clocksource of their own (MTU2 and so on in the case of SH-2A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: Fix up MTU2 support for SH7203.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: Use SYS_SUPPORTS_CMT for managing CMT timer dependencies.Paul Mundt
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: CMT platform data for sh7723/sh7722/sh7366/sh7343Magnus Damm
CMT platform data for SuperH Mobile sh7723/sh7722/sh7343/sh7366. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: CMT clockevent platform driverMagnus Damm
SuperH CMT clockevent driver. Both 16-bit and 32-bit CMT versions are supported, but only 32-bit is tested. This driver contains support for both clockevents and clocksources, but no unregistration is supported at this point. Works fine as clock source and/or event in periodic or oneshot mode. Tested on sh7722 and sh7723, but should work with any cpu/architecture. This version is lacking clocksource and early platform driver support for now - this to minimize the amount of dependencies. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: fix no sys_timer caseMagnus Damm
Handle the case with a sys_timer set to NULL. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: tmu disable supportMagnus Damm
Add TMU disable support so we can use other clockevents. Also, setup the clockevent rating. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: rework clocksource and sched_clockMagnus Damm
Rework and simplify the sched_clock and clocksource code. Instead of registering the clocksource in a shared file we move it into the tmu driver. Also, add code to handle sched_clock in the case of no clocksource. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29SH: fix start_thread and user_stack_pointer macrosRoel Kluin
Fix macros start_thread and user_stack_pointer. When these macros aren't called with a variable named regs as second argument, this will result in a build failure. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: Use the atomic_t "counter" memberMatt Fleming
Now that atomic_t is a generic opaque type for all architectures, it is unwise to use intimate knowledge of its internals when manipulating it. Instead of relying on the "counter" member being at offset 0 from the beginning of an atomic_t, explicitly reference the member. This guards us from any changes to the layout of the beginning of the atomic_t type. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29sh: Relax inline assembly constraintsMatt Fleming
When dereferencing the memory address contained in a register and modifying the value at that memory address, the register should not be listed in the inline asm outputs. The value at the memory address is an output (which is taken care of with the "memory" clobber), not the register. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-29Merge branch 'sh/stable-updates'Paul Mundt
2009-01-29sh: Fix up T-bit error handling in SH-4A mutex fastpath.Takashi Yoshii
This corrects a deadlock encountered on ap325 in the cases where the mutex is contended and the slow-path needs to be fallen back upon. Signed-off-by: Takashi YOSHII <yoshii.takashi@renesas.com> Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>