| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2007-03-19 | [SPARC64]: store-init needs trailing membar. | David S. Miller | |
| The manual says that it is required and we actually have crash reports where loads see stale data due to not having membars here. In one case the networking does: memset(skb, 0, offsetof(struct sk_buff, truesize)); and then some code later checks skb->nohdr for zero, but it's still the value that was there before the memset(). Note that arch/sparc64/lib/xor.S already got this right. Signed-off-by: David S. Miller <davem@davemloft.net> | |||
| 2006-03-20 | [SPARC64]: Fix branch signedness bug in all code patching. | David S. Miller | |
| The bug that hit SUN4V TLB patching exists elsewhere. Make sure we cure all such cases. Signed-off-by: David S. Miller <davem@davemloft.net> | |||
| 2006-03-20 | [SPARC64]: Niagara copy/clear page. | David S. Miller | |
| Happily we have no D-cache aliasing issues on these chips, so the implementation is very straightforward. Add a stub in bootup which will be where the patching calls will be made for niagara/sun4v/hypervisor. Signed-off-by: David S. Miller <davem@davemloft.net> | |||
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